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STM32F103xB HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32f1xx_hal_adc_ex.h 00004 * @author MCD Application Team 00005 * @brief Header file of ADC HAL extension module. 00006 ****************************************************************************** 00007 * @attention 00008 * 00009 * <h2><center>© Copyright (c) 2016 STMicroelectronics. 00010 * All rights reserved.</center></h2> 00011 * 00012 * This software component is licensed by ST under BSD 3-Clause license, 00013 * the "License"; You may not use this file except in compliance with the 00014 * License. You may obtain a copy of the License at: 00015 * opensource.org/licenses/BSD-3-Clause 00016 * 00017 ****************************************************************************** 00018 */ 00019 00020 /* Define to prevent recursive inclusion -------------------------------------*/ 00021 #ifndef __STM32F1xx_HAL_ADC_EX_H 00022 #define __STM32F1xx_HAL_ADC_EX_H 00023 00024 #ifdef __cplusplus 00025 extern "C" { 00026 #endif 00027 00028 /* Includes ------------------------------------------------------------------*/ 00029 #include "stm32f1xx_hal_def.h" 00030 00031 /** @addtogroup STM32F1xx_HAL_Driver 00032 * @{ 00033 */ 00034 00035 /** @addtogroup ADCEx 00036 * @{ 00037 */ 00038 00039 /* Exported types ------------------------------------------------------------*/ 00040 /** @defgroup ADCEx_Exported_Types ADCEx Exported Types 00041 * @{ 00042 */ 00043 00044 /** 00045 * @brief ADC Configuration injected Channel structure definition 00046 * @note Parameters of this structure are shared within 2 scopes: 00047 * - Scope channel: InjectedChannel, InjectedRank, InjectedSamplingTime, InjectedOffset 00048 * - Scope injected group (affects all channels of injected group): InjectedNbrOfConversion, InjectedDiscontinuousConvMode, 00049 * AutoInjectedConv, ExternalTrigInjecConvEdge, ExternalTrigInjecConv. 00050 * @note The setting of these parameters with function HAL_ADCEx_InjectedConfigChannel() is conditioned to ADC state. 00051 * ADC state can be either: 00052 * - For all parameters: ADC disabled (this is the only possible ADC state to modify parameter 'ExternalTrigInjecConv') 00053 * - For all except parameters 'ExternalTrigInjecConv': ADC enabled without conversion on going on injected group. 00054 */ 00055 typedef struct 00056 { 00057 uint32_t InjectedChannel; /*!< Selection of ADC channel to configure 00058 This parameter can be a value of @ref ADC_channels 00059 Note: Depending on devices, some channels may not be available on package pins. Refer to device datasheet for channels availability. 00060 Note: On STM32F1 devices with several ADC: Only ADC1 can access internal measurement channels (VrefInt/TempSensor) 00061 Note: On STM32F10xx8 and STM32F10xxB devices: A low-amplitude voltage glitch may be generated (on ADC input 0) on the PA0 pin, when the ADC is converting with injection trigger. 00062 It is advised to distribute the analog channels so that Channel 0 is configured as an injected channel. 00063 Refer to errata sheet of these devices for more details. */ 00064 uint32_t InjectedRank; /*!< Rank in the injected group sequencer 00065 This parameter must be a value of @ref ADCEx_injected_rank 00066 Note: In case of need to disable a channel or change order of conversion sequencer, rank containing a previous channel setting can be overwritten by the new channel setting (or parameter number of conversions can be adjusted) */ 00067 uint32_t InjectedSamplingTime; /*!< Sampling time value to be set for the selected channel. 00068 Unit: ADC clock cycles 00069 Conversion time is the addition of sampling time and processing time (12.5 ADC clock cycles at ADC resolution 12 bits). 00070 This parameter can be a value of @ref ADC_sampling_times 00071 Caution: This parameter updates the parameter property of the channel, that can be used into regular and/or injected groups. 00072 If this same channel has been previously configured in the other group (regular/injected), it will be updated to last setting. 00073 Note: In case of usage of internal measurement channels (VrefInt/TempSensor), 00074 sampling time constraints must be respected (sampling time can be adjusted in function of ADC clock frequency and sampling time setting) 00075 Refer to device datasheet for timings values, parameters TS_vrefint, TS_temp (values rough order: 5us to 17.1us min). */ 00076 uint32_t InjectedOffset; /*!< Defines the offset to be subtracted from the raw converted data (for channels set on injected group only). 00077 Offset value must be a positive number. 00078 Depending of ADC resolution selected (12, 10, 8 or 6 bits), 00079 this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF, 0x3FF, 0xFF or 0x3F respectively. */ 00080 uint32_t InjectedNbrOfConversion; /*!< Specifies the number of ranks that will be converted within the injected group sequencer. 00081 To use the injected group sequencer and convert several ranks, parameter 'ScanConvMode' must be enabled. 00082 This parameter must be a number between Min_Data = 1 and Max_Data = 4. 00083 Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to 00084 configure a channel on injected group can impact the configuration of other channels previously set. */ 00085 FunctionalState InjectedDiscontinuousConvMode; /*!< Specifies whether the conversions sequence of injected group is performed in Complete-sequence/Discontinuous-sequence (main sequence subdivided in successive parts). 00086 Discontinuous mode is used only if sequencer is enabled (parameter 'ScanConvMode'). If sequencer is disabled, this parameter is discarded. 00087 Discontinuous mode can be enabled only if continuous mode is disabled. If continuous mode is enabled, this parameter setting is discarded. 00088 This parameter can be set to ENABLE or DISABLE. 00089 Note: For injected group, number of discontinuous ranks increment is fixed to one-by-one. 00090 Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to 00091 configure a channel on injected group can impact the configuration of other channels previously set. */ 00092 FunctionalState AutoInjectedConv; /*!< Enables or disables the selected ADC automatic injected group conversion after regular one 00093 This parameter can be set to ENABLE or DISABLE. 00094 Note: To use Automatic injected conversion, discontinuous mode must be disabled ('DiscontinuousConvMode' and 'InjectedDiscontinuousConvMode' set to DISABLE) 00095 Note: To use Automatic injected conversion, injected group external triggers must be disabled ('ExternalTrigInjecConv' set to ADC_SOFTWARE_START) 00096 Note: In case of DMA used with regular group: if DMA configured in normal mode (single shot) JAUTO will be stopped upon DMA transfer complete. 00097 To maintain JAUTO always enabled, DMA must be configured in circular mode. 00098 Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to 00099 configure a channel on injected group can impact the configuration of other channels previously set. */ 00100 uint32_t ExternalTrigInjecConv; /*!< Selects the external event used to trigger the conversion start of injected group. 00101 If set to ADC_INJECTED_SOFTWARE_START, external triggers are disabled. 00102 If set to external trigger source, triggering is on event rising edge. 00103 This parameter can be a value of @ref ADCEx_External_trigger_source_Injected 00104 Note: This parameter must be modified when ADC is disabled (before ADC start conversion or after ADC stop conversion). 00105 If ADC is enabled, this parameter setting is bypassed without error reporting (as it can be the expected behaviour in case of another parameter update on the fly) 00106 Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to 00107 configure a channel on injected group can impact the configuration of other channels previously set. */ 00108 }ADC_InjectionConfTypeDef; 00109 00110 #if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG) 00111 /** 00112 * @brief Structure definition of ADC multimode 00113 * @note The setting of these parameters with function HAL_ADCEx_MultiModeConfigChannel() is conditioned to ADCs state (both ADCs of the common group). 00114 * State of ADCs of the common group must be: disabled. 00115 */ 00116 typedef struct 00117 { 00118 uint32_t Mode; /*!< Configures the ADC to operate in independent or multi mode. 00119 This parameter can be a value of @ref ADCEx_Common_mode 00120 Note: In dual mode, a change of channel configuration generates a restart that can produce a loss of synchronization. It is recommended to disable dual mode before any configuration change. 00121 Note: In case of simultaneous mode used: Exactly the same sampling time should be configured for the 2 channels that will be sampled simultaneously by ACD1 and ADC2. 00122 Note: In case of interleaved mode used: To avoid overlap between conversions, maximum sampling time allowed is 7 ADC clock cycles for fast interleaved mode and 14 ADC clock cycles for slow interleaved mode. 00123 Note: Some multimode parameters are fixed on STM32F1 and can be configured on other STM32 devices with several ADC (multimode configuration structure can have additional parameters). 00124 The equivalences are: 00125 - Parameter 'DMAAccessMode': On STM32F1, this parameter is fixed to 1 DMA channel (one DMA channel for both ADC, DMA of ADC master). On other STM32 devices with several ADC, this is equivalent to parameter 'ADC_DMAACCESSMODE_12_10_BITS'. 00126 - Parameter 'TwoSamplingDelay': On STM32F1, this parameter is fixed to 7 or 14 ADC clock cycles depending on fast or slow interleaved mode selected. On other STM32 devices with several ADC, this is equivalent to parameter 'ADC_TWOSAMPLINGDELAY_7CYCLES' (for fast interleaved mode). */ 00127 00128 00129 }ADC_MultiModeTypeDef; 00130 #endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */ 00131 00132 /** 00133 * @} 00134 */ 00135 00136 00137 /* Exported constants --------------------------------------------------------*/ 00138 00139 /** @defgroup ADCEx_Exported_Constants ADCEx Exported Constants 00140 * @{ 00141 */ 00142 00143 /** @defgroup ADCEx_injected_rank ADCEx rank into injected group 00144 * @{ 00145 */ 00146 #define ADC_INJECTED_RANK_1 0x00000001U 00147 #define ADC_INJECTED_RANK_2 0x00000002U 00148 #define ADC_INJECTED_RANK_3 0x00000003U 00149 #define ADC_INJECTED_RANK_4 0x00000004U 00150 /** 00151 * @} 00152 */ 00153 00154 /** @defgroup ADCEx_External_trigger_edge_Injected ADCEx external trigger enable for injected group 00155 * @{ 00156 */ 00157 #define ADC_EXTERNALTRIGINJECCONV_EDGE_NONE 0x00000000U 00158 #define ADC_EXTERNALTRIGINJECCONV_EDGE_RISING ((uint32_t)ADC_CR2_JEXTTRIG) 00159 /** 00160 * @} 00161 */ 00162 00163 /** @defgroup ADC_External_trigger_source_Regular ADC External trigger selection for regular group 00164 * @{ 00165 */ 00166 /*!< List of external triggers with generic trigger name, independently of */ 00167 /* ADC target, sorted by trigger name: */ 00168 00169 /*!< External triggers of regular group for ADC1&ADC2 only */ 00170 #define ADC_EXTERNALTRIGCONV_T1_CC1 ADC1_2_EXTERNALTRIG_T1_CC1 00171 #define ADC_EXTERNALTRIGCONV_T1_CC2 ADC1_2_EXTERNALTRIG_T1_CC2 00172 #define ADC_EXTERNALTRIGCONV_T2_CC2 ADC1_2_EXTERNALTRIG_T2_CC2 00173 #define ADC_EXTERNALTRIGCONV_T3_TRGO ADC1_2_EXTERNALTRIG_T3_TRGO 00174 #define ADC_EXTERNALTRIGCONV_T4_CC4 ADC1_2_EXTERNALTRIG_T4_CC4 00175 #define ADC_EXTERNALTRIGCONV_EXT_IT11 ADC1_2_EXTERNALTRIG_EXT_IT11 00176 00177 #if defined (STM32F103xE) || defined (STM32F103xG) 00178 /*!< External triggers of regular group for ADC3 only */ 00179 #define ADC_EXTERNALTRIGCONV_T2_CC3 ADC3_EXTERNALTRIG_T2_CC3 00180 #define ADC_EXTERNALTRIGCONV_T3_CC1 ADC3_EXTERNALTRIG_T3_CC1 00181 #define ADC_EXTERNALTRIGCONV_T5_CC1 ADC3_EXTERNALTRIG_T5_CC1 00182 #define ADC_EXTERNALTRIGCONV_T5_CC3 ADC3_EXTERNALTRIG_T5_CC3 00183 #define ADC_EXTERNALTRIGCONV_T8_CC1 ADC3_EXTERNALTRIG_T8_CC1 00184 #endif /* STM32F103xE || defined STM32F103xG */ 00185 00186 /*!< External triggers of regular group for all ADC instances */ 00187 #define ADC_EXTERNALTRIGCONV_T1_CC3 ADC1_2_3_EXTERNALTRIG_T1_CC3 00188 00189 #if defined (STM32F101xE) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC) 00190 /*!< Note: TIM8_TRGO is available on ADC1 and ADC2 only in high-density and */ 00191 /* XL-density devices. */ 00192 /* To use it on ADC or ADC2, a remap of trigger must be done from */ 00193 /* EXTI line 11 to TIM8_TRGO with macro: */ 00194 /* __HAL_AFIO_REMAP_ADC1_ETRGREG_ENABLE() */ 00195 /* __HAL_AFIO_REMAP_ADC2_ETRGREG_ENABLE() */ 00196 00197 /* Note for internal constant value management: If TIM8_TRGO is available, */ 00198 /* its definition is set to value for ADC1&ADC2 by default and changed to */ 00199 /* value for ADC3 by HAL ADC driver if ADC3 is selected. */ 00200 #define ADC_EXTERNALTRIGCONV_T8_TRGO ADC1_2_EXTERNALTRIG_T8_TRGO 00201 #endif /* STM32F101xE || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */ 00202 00203 #define ADC_SOFTWARE_START ADC1_2_3_SWSTART 00204 /** 00205 * @} 00206 */ 00207 00208 /** @defgroup ADCEx_External_trigger_source_Injected ADCEx External trigger selection for injected group 00209 * @{ 00210 */ 00211 /*!< List of external triggers with generic trigger name, independently of */ 00212 /* ADC target, sorted by trigger name: */ 00213 00214 /*!< External triggers of injected group for ADC1&ADC2 only */ 00215 #define ADC_EXTERNALTRIGINJECCONV_T2_TRGO ADC1_2_EXTERNALTRIGINJEC_T2_TRGO 00216 #define ADC_EXTERNALTRIGINJECCONV_T2_CC1 ADC1_2_EXTERNALTRIGINJEC_T2_CC1 00217 #define ADC_EXTERNALTRIGINJECCONV_T3_CC4 ADC1_2_EXTERNALTRIGINJEC_T3_CC4 00218 #define ADC_EXTERNALTRIGINJECCONV_T4_TRGO ADC1_2_EXTERNALTRIGINJEC_T4_TRGO 00219 #define ADC_EXTERNALTRIGINJECCONV_EXT_IT15 ADC1_2_EXTERNALTRIGINJEC_EXT_IT15 00220 00221 #if defined (STM32F103xE) || defined (STM32F103xG) 00222 /*!< External triggers of injected group for ADC3 only */ 00223 #define ADC_EXTERNALTRIGINJECCONV_T4_CC3 ADC3_EXTERNALTRIGINJEC_T4_CC3 00224 #define ADC_EXTERNALTRIGINJECCONV_T8_CC2 ADC3_EXTERNALTRIGINJEC_T8_CC2 00225 #define ADC_EXTERNALTRIGINJECCONV_T5_TRGO ADC3_EXTERNALTRIGINJEC_T5_TRGO 00226 #define ADC_EXTERNALTRIGINJECCONV_T5_CC4 ADC3_EXTERNALTRIGINJEC_T5_CC4 00227 #endif /* STM32F103xE || defined STM32F103xG */ 00228 00229 /*!< External triggers of injected group for all ADC instances */ 00230 #define ADC_EXTERNALTRIGINJECCONV_T1_CC4 ADC1_2_3_EXTERNALTRIGINJEC_T1_CC4 00231 #define ADC_EXTERNALTRIGINJECCONV_T1_TRGO ADC1_2_3_EXTERNALTRIGINJEC_T1_TRGO 00232 00233 #if defined (STM32F101xE) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC) 00234 /*!< Note: TIM8_CC4 is available on ADC1 and ADC2 only in high-density and */ 00235 /* XL-density devices. */ 00236 /* To use it on ADC1 or ADC2, a remap of trigger must be done from */ 00237 /* EXTI line 11 to TIM8_CC4 with macro: */ 00238 /* __HAL_AFIO_REMAP_ADC1_ETRGINJ_ENABLE() */ 00239 /* __HAL_AFIO_REMAP_ADC2_ETRGINJ_ENABLE() */ 00240 00241 /* Note for internal constant value management: If TIM8_CC4 is available, */ 00242 /* its definition is set to value for ADC1&ADC2 by default and changed to */ 00243 /* value for ADC3 by HAL ADC driver if ADC3 is selected. */ 00244 #define ADC_EXTERNALTRIGINJECCONV_T8_CC4 ADC1_2_EXTERNALTRIGINJEC_T8_CC4 00245 #endif /* STM32F101xE || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */ 00246 00247 #define ADC_INJECTED_SOFTWARE_START ADC1_2_3_JSWSTART 00248 /** 00249 * @} 00250 */ 00251 00252 #if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG) 00253 /** @defgroup ADCEx_Common_mode ADC Extended Dual ADC Mode 00254 * @{ 00255 */ 00256 #define ADC_MODE_INDEPENDENT 0x00000000U /*!< ADC dual mode disabled (ADC independent mode) */ 00257 #define ADC_DUALMODE_REGSIMULT_INJECSIMULT ((uint32_t)( ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Combined regular simultaneous + injected simultaneous mode, on groups regular and injected */ 00258 #define ADC_DUALMODE_REGSIMULT_ALTERTRIG ((uint32_t)( ADC_CR1_DUALMOD_1 )) /*!< ADC dual mode enabled: Combined regular simultaneous + alternate trigger mode, on groups regular and injected */ 00259 #define ADC_DUALMODE_INJECSIMULT_INTERLFAST ((uint32_t)( ADC_CR1_DUALMOD_1 | ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Combined injected simultaneous + fast interleaved mode, on groups regular and injected (delay between ADC sampling phases: 7 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */ 00260 #define ADC_DUALMODE_INJECSIMULT_INTERLSLOW ((uint32_t)( ADC_CR1_DUALMOD_2 )) /*!< ADC dual mode enabled: Combined injected simultaneous + slow Interleaved mode, on groups regular and injected (delay between ADC sampling phases: 14 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */ 00261 #define ADC_DUALMODE_INJECSIMULT ((uint32_t)( ADC_CR1_DUALMOD_2 | ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Injected simultaneous mode, on group injected */ 00262 #define ADC_DUALMODE_REGSIMULT ((uint32_t)( ADC_CR1_DUALMOD_2 | ADC_CR1_DUALMOD_1 )) /*!< ADC dual mode enabled: Regular simultaneous mode, on group regular */ 00263 #define ADC_DUALMODE_INTERLFAST ((uint32_t)( ADC_CR1_DUALMOD_2 | ADC_CR1_DUALMOD_1 | ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Fast interleaved mode, on group regular (delay between ADC sampling phases: 7 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */ 00264 #define ADC_DUALMODE_INTERLSLOW ((uint32_t)(ADC_CR1_DUALMOD_3 )) /*!< ADC dual mode enabled: Slow interleaved mode, on group regular (delay between ADC sampling phases: 14 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */ 00265 #define ADC_DUALMODE_ALTERTRIG ((uint32_t)(ADC_CR1_DUALMOD_3 | ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Alternate trigger mode, on group injected */ 00266 /** 00267 * @} 00268 */ 00269 #endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */ 00270 00271 /** 00272 * @} 00273 */ 00274 00275 00276 /* Private constants ---------------------------------------------------------*/ 00277 00278 /** @addtogroup ADCEx_Private_Constants ADCEx Private Constants 00279 * @{ 00280 */ 00281 00282 /** @defgroup ADCEx_Internal_HAL_driver_Ext_trig_src_Regular ADC Extended Internal HAL driver trigger selection for regular group 00283 * @{ 00284 */ 00285 /* List of external triggers of regular group for ADC1, ADC2, ADC3 (if ADC */ 00286 /* instance is available on the selected device). */ 00287 /* (used internally by HAL driver. To not use into HAL structure parameters) */ 00288 00289 /* External triggers of regular group for ADC1&ADC2 (if ADCx available) */ 00290 #define ADC1_2_EXTERNALTRIG_T1_CC1 0x00000000U 00291 #define ADC1_2_EXTERNALTRIG_T1_CC2 ((uint32_t)( ADC_CR2_EXTSEL_0)) 00292 #define ADC1_2_EXTERNALTRIG_T2_CC2 ((uint32_t)( ADC_CR2_EXTSEL_1 | ADC_CR2_EXTSEL_0)) 00293 #define ADC1_2_EXTERNALTRIG_T3_TRGO ((uint32_t)(ADC_CR2_EXTSEL_2 )) 00294 #define ADC1_2_EXTERNALTRIG_T4_CC4 ((uint32_t)(ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_0)) 00295 #define ADC1_2_EXTERNALTRIG_EXT_IT11 ((uint32_t)(ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_1 )) 00296 #if defined (STM32F101xE) || defined (STM32F103xE) || defined (STM32F103xG) 00297 /* Note: TIM8_TRGO is available on ADC1 and ADC2 only in high-density and */ 00298 /* XL-density devices. */ 00299 #define ADC1_2_EXTERNALTRIG_T8_TRGO ADC1_2_EXTERNALTRIG_EXT_IT11 00300 #endif 00301 00302 #if defined (STM32F103xE) || defined (STM32F103xG) 00303 /* External triggers of regular group for ADC3 */ 00304 #define ADC3_EXTERNALTRIG_T3_CC1 ADC1_2_EXTERNALTRIG_T1_CC1 00305 #define ADC3_EXTERNALTRIG_T2_CC3 ADC1_2_EXTERNALTRIG_T1_CC2 00306 #define ADC3_EXTERNALTRIG_T8_CC1 ADC1_2_EXTERNALTRIG_T2_CC2 00307 #define ADC3_EXTERNALTRIG_T8_TRGO ADC1_2_EXTERNALTRIG_T3_TRGO 00308 #define ADC3_EXTERNALTRIG_T5_CC1 ADC1_2_EXTERNALTRIG_T4_CC4 00309 #define ADC3_EXTERNALTRIG_T5_CC3 ADC1_2_EXTERNALTRIG_EXT_IT11 00310 #endif 00311 00312 /* External triggers of regular group for ADC1&ADC2&ADC3 (if ADCx available) */ 00313 #define ADC1_2_3_EXTERNALTRIG_T1_CC3 ((uint32_t)( ADC_CR2_EXTSEL_1 )) 00314 #define ADC1_2_3_SWSTART ((uint32_t)(ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_1 | ADC_CR2_EXTSEL_0)) 00315 /** 00316 * @} 00317 */ 00318 00319 /** @defgroup ADCEx_Internal_HAL_driver_Ext_trig_src_Injected ADC Extended Internal HAL driver trigger selection for injected group 00320 * @{ 00321 */ 00322 /* List of external triggers of injected group for ADC1, ADC2, ADC3 (if ADC */ 00323 /* instance is available on the selected device). */ 00324 /* (used internally by HAL driver. To not use into HAL structure parameters) */ 00325 00326 /* External triggers of injected group for ADC1&ADC2 (if ADCx available) */ 00327 #define ADC1_2_EXTERNALTRIGINJEC_T2_TRGO ((uint32_t)( ADC_CR2_JEXTSEL_1 )) 00328 #define ADC1_2_EXTERNALTRIGINJEC_T2_CC1 ((uint32_t)( ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0)) 00329 #define ADC1_2_EXTERNALTRIGINJEC_T3_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_2 )) 00330 #define ADC1_2_EXTERNALTRIGINJEC_T4_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_0)) 00331 #define ADC1_2_EXTERNALTRIGINJEC_EXT_IT15 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1 )) 00332 #if defined (STM32F101xE) || defined (STM32F103xE) || defined (STM32F103xG) 00333 /* Note: TIM8_CC4 is available on ADC1 and ADC2 only in high-density and */ 00334 /* XL-density devices. */ 00335 #define ADC1_2_EXTERNALTRIGINJEC_T8_CC4 ADC1_2_EXTERNALTRIGINJEC_EXT_IT15 00336 #endif 00337 00338 #if defined (STM32F103xE) || defined (STM32F103xG) 00339 /* External triggers of injected group for ADC3 */ 00340 #define ADC3_EXTERNALTRIGINJEC_T4_CC3 ADC1_2_EXTERNALTRIGINJEC_T2_TRGO 00341 #define ADC3_EXTERNALTRIGINJEC_T8_CC2 ADC1_2_EXTERNALTRIGINJEC_T2_CC1 00342 #define ADC3_EXTERNALTRIGINJEC_T8_CC4 ADC1_2_EXTERNALTRIGINJEC_T3_CC4 00343 #define ADC3_EXTERNALTRIGINJEC_T5_TRGO ADC1_2_EXTERNALTRIGINJEC_T4_TRGO 00344 #define ADC3_EXTERNALTRIGINJEC_T5_CC4 ADC1_2_EXTERNALTRIGINJEC_EXT_IT15 00345 #endif /* STM32F103xE || defined STM32F103xG */ 00346 00347 /* External triggers of injected group for ADC1&ADC2&ADC3 (if ADCx available) */ 00348 #define ADC1_2_3_EXTERNALTRIGINJEC_T1_TRGO 0x00000000U 00349 #define ADC1_2_3_EXTERNALTRIGINJEC_T1_CC4 ((uint32_t)( ADC_CR2_JEXTSEL_0)) 00350 #define ADC1_2_3_JSWSTART ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0)) 00351 /** 00352 * @} 00353 */ 00354 00355 /** 00356 * @} 00357 */ 00358 00359 00360 /* Exported macro ------------------------------------------------------------*/ 00361 00362 /* Private macro -------------------------------------------------------------*/ 00363 00364 /** @defgroup ADCEx_Private_Macro ADCEx Private Macro 00365 * @{ 00366 */ 00367 /* Macro reserved for internal HAL driver usage, not intended to be used in */ 00368 /* code of final user. */ 00369 00370 00371 /** 00372 * @brief For devices with 3 ADCs: Defines the external trigger source 00373 * for regular group according to ADC into common group ADC1&ADC2 or 00374 * ADC3 (some triggers with same source have different value to 00375 * be programmed into ADC EXTSEL bits of CR2 register). 00376 * For devices with 2 ADCs or less: this macro makes no change. 00377 * @param __HANDLE__: ADC handle 00378 * @param __EXT_TRIG_CONV__: External trigger selected for regular group. 00379 * @retval External trigger to be programmed into EXTSEL bits of CR2 register 00380 */ 00381 #if defined (STM32F103xE) || defined (STM32F103xG) 00382 #define ADC_CFGR_EXTSEL(__HANDLE__, __EXT_TRIG_CONV__) \ 00383 (( (((__HANDLE__)->Instance) == ADC3) \ 00384 )? \ 00385 ( ( (__EXT_TRIG_CONV__) == ADC_EXTERNALTRIGCONV_T8_TRGO \ 00386 )? \ 00387 (ADC3_EXTERNALTRIG_T8_TRGO) \ 00388 : \ 00389 (__EXT_TRIG_CONV__) \ 00390 ) \ 00391 : \ 00392 (__EXT_TRIG_CONV__) \ 00393 ) 00394 #else 00395 #define ADC_CFGR_EXTSEL(__HANDLE__, __EXT_TRIG_CONV__) \ 00396 (__EXT_TRIG_CONV__) 00397 #endif /* STM32F103xE || STM32F103xG */ 00398 00399 /** 00400 * @brief For devices with 3 ADCs: Defines the external trigger source 00401 * for injected group according to ADC into common group ADC1&ADC2 or 00402 * ADC3 (some triggers with same source have different value to 00403 * be programmed into ADC JEXTSEL bits of CR2 register). 00404 * For devices with 2 ADCs or less: this macro makes no change. 00405 * @param __HANDLE__: ADC handle 00406 * @param __EXT_TRIG_INJECTCONV__: External trigger selected for injected group. 00407 * @retval External trigger to be programmed into JEXTSEL bits of CR2 register 00408 */ 00409 #if defined (STM32F103xE) || defined (STM32F103xG) 00410 #define ADC_CFGR_JEXTSEL(__HANDLE__, __EXT_TRIG_INJECTCONV__) \ 00411 (( (((__HANDLE__)->Instance) == ADC3) \ 00412 )? \ 00413 ( ( (__EXT_TRIG_INJECTCONV__) == ADC_EXTERNALTRIGINJECCONV_T8_CC4 \ 00414 )? \ 00415 (ADC3_EXTERNALTRIGINJEC_T8_CC4) \ 00416 : \ 00417 (__EXT_TRIG_INJECTCONV__) \ 00418 ) \ 00419 : \ 00420 (__EXT_TRIG_INJECTCONV__) \ 00421 ) 00422 #else 00423 #define ADC_CFGR_JEXTSEL(__HANDLE__, __EXT_TRIG_INJECTCONV__) \ 00424 (__EXT_TRIG_INJECTCONV__) 00425 #endif /* STM32F103xE || STM32F103xG */ 00426 00427 00428 /** 00429 * @brief Verification if multimode is enabled for the selected ADC (multimode ADC master or ADC slave) (applicable for devices with several ADCs) 00430 * @param __HANDLE__: ADC handle 00431 * @retval Multimode state: RESET if multimode is disabled, other value if multimode is enabled 00432 */ 00433 #if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG) 00434 #define ADC_MULTIMODE_IS_ENABLE(__HANDLE__) \ 00435 (( (((__HANDLE__)->Instance) == ADC1) || (((__HANDLE__)->Instance) == ADC2) \ 00436 )? \ 00437 (ADC1->CR1 & ADC_CR1_DUALMOD) \ 00438 : \ 00439 (RESET) \ 00440 ) 00441 #else 00442 #define ADC_MULTIMODE_IS_ENABLE(__HANDLE__) \ 00443 (RESET) 00444 #endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */ 00445 00446 /** 00447 * @brief Verification of condition for ADC start conversion: ADC must be in non-multimode, or multimode with handle of ADC master (applicable for devices with several ADCs) 00448 * @param __HANDLE__: ADC handle 00449 * @retval None 00450 */ 00451 #if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG) 00452 #define ADC_NONMULTIMODE_OR_MULTIMODEMASTER(__HANDLE__) \ 00453 (( (((__HANDLE__)->Instance) == ADC2) \ 00454 )? \ 00455 ((ADC1->CR1 & ADC_CR1_DUALMOD) == RESET) \ 00456 : \ 00457 (!RESET) \ 00458 ) 00459 #else 00460 #define ADC_NONMULTIMODE_OR_MULTIMODEMASTER(__HANDLE__) \ 00461 (!RESET) 00462 #endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */ 00463 00464 /** 00465 * @brief Check ADC multimode setting: In case of multimode, check whether ADC master of the selected ADC has feature auto-injection enabled (applicable for devices with several ADCs) 00466 * @param __HANDLE__: ADC handle 00467 * @retval None 00468 */ 00469 #if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG) 00470 #define ADC_MULTIMODE_AUTO_INJECTED(__HANDLE__) \ 00471 (( (((__HANDLE__)->Instance) == ADC1) || (((__HANDLE__)->Instance) == ADC2) \ 00472 )? \ 00473 (ADC1->CR1 & ADC_CR1_JAUTO) \ 00474 : \ 00475 (RESET) \ 00476 ) 00477 #else 00478 #define ADC_MULTIMODE_AUTO_INJECTED(__HANDLE__) \ 00479 (RESET) 00480 #endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */ 00481 00482 #if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG) 00483 /** 00484 * @brief Set handle of the other ADC sharing the common multimode settings 00485 * @param __HANDLE__: ADC handle 00486 * @param __HANDLE_OTHER_ADC__: other ADC handle 00487 * @retval None 00488 */ 00489 #define ADC_COMMON_ADC_OTHER(__HANDLE__, __HANDLE_OTHER_ADC__) \ 00490 ((__HANDLE_OTHER_ADC__)->Instance = ADC2) 00491 00492 /** 00493 * @brief Set handle of the ADC slave associated to the ADC master 00494 * On STM32F1 devices, ADC slave is always ADC2 (this can be different 00495 * on other STM32 devices) 00496 * @param __HANDLE_MASTER__: ADC master handle 00497 * @param __HANDLE_SLAVE__: ADC slave handle 00498 * @retval None 00499 */ 00500 #define ADC_MULTI_SLAVE(__HANDLE_MASTER__, __HANDLE_SLAVE__) \ 00501 ((__HANDLE_SLAVE__)->Instance = ADC2) 00502 00503 #endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */ 00504 00505 #define IS_ADC_INJECTED_RANK(CHANNEL) (((CHANNEL) == ADC_INJECTED_RANK_1) || \ 00506 ((CHANNEL) == ADC_INJECTED_RANK_2) || \ 00507 ((CHANNEL) == ADC_INJECTED_RANK_3) || \ 00508 ((CHANNEL) == ADC_INJECTED_RANK_4)) 00509 00510 #define IS_ADC_EXTTRIGINJEC_EDGE(EDGE) (((EDGE) == ADC_EXTERNALTRIGINJECCONV_EDGE_NONE) || \ 00511 ((EDGE) == ADC_EXTERNALTRIGINJECCONV_EDGE_RISING)) 00512 00513 /** @defgroup ADCEx_injected_nb_conv_verification ADCEx injected nb conv verification 00514 * @{ 00515 */ 00516 #define IS_ADC_INJECTED_NB_CONV(LENGTH) (((LENGTH) >= 1U) && ((LENGTH) <= 4U)) 00517 /** 00518 * @} 00519 */ 00520 00521 #if defined (STM32F100xB) || defined (STM32F100xE) || defined (STM32F101x6) || defined (STM32F101xB) || defined (STM32F102x6) || defined (STM32F102xB) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) 00522 #define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1) || \ 00523 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2) || \ 00524 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2) || \ 00525 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO) || \ 00526 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4) || \ 00527 ((REGTRIG) == ADC_EXTERNALTRIGCONV_EXT_IT11) || \ 00528 ((REGTRIG) == ADC_SOFTWARE_START)) 00529 #endif 00530 #if defined (STM32F101xE) 00531 #define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1) || \ 00532 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2) || \ 00533 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2) || \ 00534 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO) || \ 00535 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4) || \ 00536 ((REGTRIG) == ADC_EXTERNALTRIGCONV_EXT_IT11) || \ 00537 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T8_TRGO) || \ 00538 ((REGTRIG) == ADC_SOFTWARE_START)) 00539 #endif 00540 #if defined (STM32F101xG) 00541 #define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1) || \ 00542 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2) || \ 00543 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2) || \ 00544 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO) || \ 00545 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4) || \ 00546 ((REGTRIG) == ADC_EXTERNALTRIGCONV_EXT_IT11) || \ 00547 ((REGTRIG) == ADC_SOFTWARE_START)) 00548 #endif 00549 #if defined (STM32F103xE) || defined (STM32F103xG) 00550 #define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1) || \ 00551 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2) || \ 00552 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2) || \ 00553 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO) || \ 00554 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4) || \ 00555 ((REGTRIG) == ADC_EXTERNALTRIGCONV_EXT_IT11) || \ 00556 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_CC1) || \ 00557 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC3) || \ 00558 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T8_CC1) || \ 00559 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T5_CC1) || \ 00560 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T5_CC3) || \ 00561 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC3) || \ 00562 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T8_TRGO) || \ 00563 ((REGTRIG) == ADC_SOFTWARE_START)) 00564 #endif 00565 00566 #if defined (STM32F100xB) || defined (STM32F100xE) || defined (STM32F101x6) || defined (STM32F101xB) || defined (STM32F102x6) || defined (STM32F102xB) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) 00567 #define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO) || \ 00568 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1) || \ 00569 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4) || \ 00570 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO) || \ 00571 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \ 00572 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4) || \ 00573 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO) || \ 00574 ((REGTRIG) == ADC_INJECTED_SOFTWARE_START)) 00575 #endif 00576 #if defined (STM32F101xE) 00577 #define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO) || \ 00578 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1) || \ 00579 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4) || \ 00580 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO) || \ 00581 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \ 00582 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4) || \ 00583 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO) || \ 00584 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC4) || \ 00585 ((REGTRIG) == ADC_INJECTED_SOFTWARE_START)) 00586 #endif 00587 #if defined (STM32F101xG) 00588 #define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO) || \ 00589 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1) || \ 00590 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4) || \ 00591 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO) || \ 00592 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \ 00593 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4) || \ 00594 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO) || \ 00595 ((REGTRIG) == ADC_INJECTED_SOFTWARE_START)) 00596 #endif 00597 #if defined (STM32F103xE) || defined (STM32F103xG) 00598 #define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO) || \ 00599 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1) || \ 00600 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4) || \ 00601 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO) || \ 00602 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_CC4) || \ 00603 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \ 00604 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC3) || \ 00605 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC2) || \ 00606 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_TRGO) || \ 00607 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_CC4) || \ 00608 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4) || \ 00609 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO) || \ 00610 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC4) || \ 00611 ((REGTRIG) == ADC_INJECTED_SOFTWARE_START)) 00612 #endif 00613 00614 #if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG) 00615 #define IS_ADC_MODE(MODE) (((MODE) == ADC_MODE_INDEPENDENT) || \ 00616 ((MODE) == ADC_DUALMODE_REGSIMULT_INJECSIMULT) || \ 00617 ((MODE) == ADC_DUALMODE_REGSIMULT_ALTERTRIG) || \ 00618 ((MODE) == ADC_DUALMODE_INJECSIMULT_INTERLFAST) || \ 00619 ((MODE) == ADC_DUALMODE_INJECSIMULT_INTERLSLOW) || \ 00620 ((MODE) == ADC_DUALMODE_INJECSIMULT) || \ 00621 ((MODE) == ADC_DUALMODE_REGSIMULT) || \ 00622 ((MODE) == ADC_DUALMODE_INTERLFAST) || \ 00623 ((MODE) == ADC_DUALMODE_INTERLSLOW) || \ 00624 ((MODE) == ADC_DUALMODE_ALTERTRIG) ) 00625 #endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */ 00626 00627 /** 00628 * @} 00629 */ 00630 00631 00632 00633 00634 00635 00636 /* Exported functions --------------------------------------------------------*/ 00637 /** @addtogroup ADCEx_Exported_Functions 00638 * @{ 00639 */ 00640 00641 /* IO operation functions *****************************************************/ 00642 /** @addtogroup ADCEx_Exported_Functions_Group1 00643 * @{ 00644 */ 00645 00646 /* ADC calibration */ 00647 HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc); 00648 00649 /* Blocking mode: Polling */ 00650 HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc); 00651 HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc); 00652 HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout); 00653 00654 /* Non-blocking mode: Interruption */ 00655 HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc); 00656 HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc); 00657 00658 #if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG) 00659 /* ADC multimode */ 00660 HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef *hadc, uint32_t *pData, uint32_t Length); 00661 HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef *hadc); 00662 #endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */ 00663 00664 /* ADC retrieve conversion value intended to be used with polling or interruption */ 00665 uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank); 00666 #if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG) 00667 uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef *hadc); 00668 #endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */ 00669 00670 /* ADC IRQHandler and Callbacks used in non-blocking modes (Interruption) */ 00671 void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc); 00672 /** 00673 * @} 00674 */ 00675 00676 00677 /* Peripheral Control functions ***********************************************/ 00678 /** @addtogroup ADCEx_Exported_Functions_Group2 00679 * @{ 00680 */ 00681 HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc,ADC_InjectionConfTypeDef* sConfigInjected); 00682 #if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG) 00683 HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef *hadc, ADC_MultiModeTypeDef *multimode); 00684 #endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */ 00685 /** 00686 * @} 00687 */ 00688 00689 00690 /** 00691 * @} 00692 */ 00693 00694 00695 /** 00696 * @} 00697 */ 00698 00699 /** 00700 * @} 00701 */ 00702 00703 #ifdef __cplusplus 00704 } 00705 #endif 00706 00707 #endif /* __STM32F1xx_HAL_ADC_EX_H */ 00708 00709 00710 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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