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STM32F103xB HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32f1xx_hal_i2s.h 00004 * @author MCD Application Team 00005 * @brief Header file of I2S HAL module. 00006 ****************************************************************************** 00007 * @attention 00008 * 00009 * <h2><center>© Copyright (c) 2016 STMicroelectronics. 00010 * All rights reserved.</center></h2> 00011 * 00012 * This software component is licensed by ST under BSD 3-Clause license, 00013 * the "License"; You may not use this file except in compliance with the 00014 * License. You may obtain a copy of the License at: 00015 * opensource.org/licenses/BSD-3-Clause 00016 * 00017 ****************************************************************************** 00018 */ 00019 00020 /* Define to prevent recursive inclusion -------------------------------------*/ 00021 #ifndef STM32F1xx_HAL_I2S_H 00022 #define STM32F1xx_HAL_I2S_H 00023 00024 #ifdef __cplusplus 00025 extern "C" { 00026 #endif 00027 00028 /* Includes ------------------------------------------------------------------*/ 00029 #include "stm32f1xx_hal_def.h" 00030 00031 #if defined(SPI_I2S_SUPPORT) 00032 /** @addtogroup STM32F1xx_HAL_Driver 00033 * @{ 00034 */ 00035 00036 /** @addtogroup I2S 00037 * @{ 00038 */ 00039 00040 /* Exported types ------------------------------------------------------------*/ 00041 /** @defgroup I2S_Exported_Types I2S Exported Types 00042 * @{ 00043 */ 00044 00045 /** 00046 * @brief I2S Init structure definition 00047 */ 00048 typedef struct 00049 { 00050 uint32_t Mode; /*!< Specifies the I2S operating mode. 00051 This parameter can be a value of @ref I2S_Mode */ 00052 00053 uint32_t Standard; /*!< Specifies the standard used for the I2S communication. 00054 This parameter can be a value of @ref I2S_Standard */ 00055 00056 uint32_t DataFormat; /*!< Specifies the data format for the I2S communication. 00057 This parameter can be a value of @ref I2S_Data_Format */ 00058 00059 uint32_t MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not. 00060 This parameter can be a value of @ref I2S_MCLK_Output */ 00061 00062 uint32_t AudioFreq; /*!< Specifies the frequency selected for the I2S communication. 00063 This parameter can be a value of @ref I2S_Audio_Frequency */ 00064 00065 uint32_t CPOL; /*!< Specifies the idle state of the I2S clock. 00066 This parameter can be a value of @ref I2S_Clock_Polarity */ 00067 } I2S_InitTypeDef; 00068 00069 /** 00070 * @brief HAL State structures definition 00071 */ 00072 typedef enum 00073 { 00074 HAL_I2S_STATE_RESET = 0x00U, /*!< I2S not yet initialized or disabled */ 00075 HAL_I2S_STATE_READY = 0x01U, /*!< I2S initialized and ready for use */ 00076 HAL_I2S_STATE_BUSY = 0x02U, /*!< I2S internal process is ongoing */ 00077 HAL_I2S_STATE_BUSY_TX = 0x03U, /*!< Data Transmission process is ongoing */ 00078 HAL_I2S_STATE_BUSY_RX = 0x04U, /*!< Data Reception process is ongoing */ 00079 HAL_I2S_STATE_TIMEOUT = 0x06U, /*!< I2S timeout state */ 00080 HAL_I2S_STATE_ERROR = 0x07U /*!< I2S error state */ 00081 } HAL_I2S_StateTypeDef; 00082 00083 /** 00084 * @brief I2S handle Structure definition 00085 */ 00086 #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1) 00087 typedef struct __I2S_HandleTypeDef 00088 #else 00089 typedef struct 00090 #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */ 00091 { 00092 SPI_TypeDef *Instance; /*!< I2S registers base address */ 00093 00094 I2S_InitTypeDef Init; /*!< I2S communication parameters */ 00095 00096 uint16_t *pTxBuffPtr; /*!< Pointer to I2S Tx transfer buffer */ 00097 00098 __IO uint16_t TxXferSize; /*!< I2S Tx transfer size */ 00099 00100 __IO uint16_t TxXferCount; /*!< I2S Tx transfer Counter */ 00101 00102 uint16_t *pRxBuffPtr; /*!< Pointer to I2S Rx transfer buffer */ 00103 00104 __IO uint16_t RxXferSize; /*!< I2S Rx transfer size */ 00105 00106 __IO uint16_t RxXferCount; /*!< I2S Rx transfer counter 00107 (This field is initialized at the 00108 same value as transfer size at the 00109 beginning of the transfer and 00110 decremented when a sample is received 00111 NbSamplesReceived = RxBufferSize-RxBufferCount) */ 00112 DMA_HandleTypeDef *hdmatx; /*!< I2S Tx DMA handle parameters */ 00113 00114 DMA_HandleTypeDef *hdmarx; /*!< I2S Rx DMA handle parameters */ 00115 00116 __IO HAL_LockTypeDef Lock; /*!< I2S locking object */ 00117 00118 __IO HAL_I2S_StateTypeDef State; /*!< I2S communication state */ 00119 00120 __IO uint32_t ErrorCode; /*!< I2S Error code 00121 This parameter can be a value of @ref I2S_Error */ 00122 00123 #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U) 00124 void (* TxCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Tx Completed callback */ 00125 void (* RxCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Rx Completed callback */ 00126 void (* TxHalfCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Tx Half Completed callback */ 00127 void (* RxHalfCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Rx Half Completed callback */ 00128 void (* ErrorCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Error callback */ 00129 void (* MspInitCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Msp Init callback */ 00130 void (* MspDeInitCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Msp DeInit callback */ 00131 00132 #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */ 00133 } I2S_HandleTypeDef; 00134 00135 #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U) 00136 /** 00137 * @brief HAL I2S Callback ID enumeration definition 00138 */ 00139 typedef enum 00140 { 00141 HAL_I2S_TX_COMPLETE_CB_ID = 0x00U, /*!< I2S Tx Completed callback ID */ 00142 HAL_I2S_RX_COMPLETE_CB_ID = 0x01U, /*!< I2S Rx Completed callback ID */ 00143 HAL_I2S_TX_HALF_COMPLETE_CB_ID = 0x03U, /*!< I2S Tx Half Completed callback ID */ 00144 HAL_I2S_RX_HALF_COMPLETE_CB_ID = 0x04U, /*!< I2S Rx Half Completed callback ID */ 00145 HAL_I2S_ERROR_CB_ID = 0x06U, /*!< I2S Error callback ID */ 00146 HAL_I2S_MSPINIT_CB_ID = 0x07U, /*!< I2S Msp Init callback ID */ 00147 HAL_I2S_MSPDEINIT_CB_ID = 0x08U /*!< I2S Msp DeInit callback ID */ 00148 00149 } HAL_I2S_CallbackIDTypeDef; 00150 00151 /** 00152 * @brief HAL I2S Callback pointer definition 00153 */ 00154 typedef void (*pI2S_CallbackTypeDef)(I2S_HandleTypeDef *hi2s); /*!< pointer to an I2S callback function */ 00155 00156 #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */ 00157 /** 00158 * @} 00159 */ 00160 00161 /* Exported constants --------------------------------------------------------*/ 00162 /** @defgroup I2S_Exported_Constants I2S Exported Constants 00163 * @{ 00164 */ 00165 /** @defgroup I2S_Error I2S Error 00166 * @{ 00167 */ 00168 #define HAL_I2S_ERROR_NONE (0x00000000U) /*!< No error */ 00169 #define HAL_I2S_ERROR_TIMEOUT (0x00000001U) /*!< Timeout error */ 00170 #define HAL_I2S_ERROR_OVR (0x00000002U) /*!< OVR error */ 00171 #define HAL_I2S_ERROR_UDR (0x00000004U) /*!< UDR error */ 00172 #define HAL_I2S_ERROR_DMA (0x00000008U) /*!< DMA transfer error */ 00173 #define HAL_I2S_ERROR_PRESCALER (0x00000010U) /*!< Prescaler Calculation error */ 00174 #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U) 00175 #define HAL_I2S_ERROR_INVALID_CALLBACK (0x00000020U) /*!< Invalid Callback error */ 00176 #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */ 00177 #define HAL_I2S_ERROR_BUSY_LINE_RX (0x00000040U) /*!< Busy Rx Line error */ 00178 /** 00179 * @} 00180 */ 00181 00182 /** @defgroup I2S_Mode I2S Mode 00183 * @{ 00184 */ 00185 #define I2S_MODE_SLAVE_TX (0x00000000U) 00186 #define I2S_MODE_SLAVE_RX (SPI_I2SCFGR_I2SCFG_0) 00187 #define I2S_MODE_MASTER_TX (SPI_I2SCFGR_I2SCFG_1) 00188 #define I2S_MODE_MASTER_RX ((SPI_I2SCFGR_I2SCFG_0 | SPI_I2SCFGR_I2SCFG_1)) 00189 /** 00190 * @} 00191 */ 00192 00193 /** @defgroup I2S_Standard I2S Standard 00194 * @{ 00195 */ 00196 #define I2S_STANDARD_PHILIPS (0x00000000U) 00197 #define I2S_STANDARD_MSB (SPI_I2SCFGR_I2SSTD_0) 00198 #define I2S_STANDARD_LSB (SPI_I2SCFGR_I2SSTD_1) 00199 #define I2S_STANDARD_PCM_SHORT ((SPI_I2SCFGR_I2SSTD_0 | SPI_I2SCFGR_I2SSTD_1)) 00200 #define I2S_STANDARD_PCM_LONG ((SPI_I2SCFGR_I2SSTD_0 | SPI_I2SCFGR_I2SSTD_1 | SPI_I2SCFGR_PCMSYNC)) 00201 /** 00202 * @} 00203 */ 00204 00205 /** @defgroup I2S_Data_Format I2S Data Format 00206 * @{ 00207 */ 00208 #define I2S_DATAFORMAT_16B (0x00000000U) 00209 #define I2S_DATAFORMAT_16B_EXTENDED (SPI_I2SCFGR_CHLEN) 00210 #define I2S_DATAFORMAT_24B ((SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN_0)) 00211 #define I2S_DATAFORMAT_32B ((SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN_1)) 00212 /** 00213 * @} 00214 */ 00215 00216 /** @defgroup I2S_MCLK_Output I2S MCLK Output 00217 * @{ 00218 */ 00219 #define I2S_MCLKOUTPUT_ENABLE (SPI_I2SPR_MCKOE) 00220 #define I2S_MCLKOUTPUT_DISABLE (0x00000000U) 00221 /** 00222 * @} 00223 */ 00224 00225 /** @defgroup I2S_Audio_Frequency I2S Audio Frequency 00226 * @{ 00227 */ 00228 #define I2S_AUDIOFREQ_192K (192000U) 00229 #define I2S_AUDIOFREQ_96K (96000U) 00230 #define I2S_AUDIOFREQ_48K (48000U) 00231 #define I2S_AUDIOFREQ_44K (44100U) 00232 #define I2S_AUDIOFREQ_32K (32000U) 00233 #define I2S_AUDIOFREQ_22K (22050U) 00234 #define I2S_AUDIOFREQ_16K (16000U) 00235 #define I2S_AUDIOFREQ_11K (11025U) 00236 #define I2S_AUDIOFREQ_8K (8000U) 00237 #define I2S_AUDIOFREQ_DEFAULT (2U) 00238 /** 00239 * @} 00240 */ 00241 00242 /** @defgroup I2S_Clock_Polarity I2S Clock Polarity 00243 * @{ 00244 */ 00245 #define I2S_CPOL_LOW (0x00000000U) 00246 #define I2S_CPOL_HIGH (SPI_I2SCFGR_CKPOL) 00247 /** 00248 * @} 00249 */ 00250 00251 /** @defgroup I2S_Interrupts_Definition I2S Interrupts Definition 00252 * @{ 00253 */ 00254 #define I2S_IT_TXE SPI_CR2_TXEIE 00255 #define I2S_IT_RXNE SPI_CR2_RXNEIE 00256 #define I2S_IT_ERR SPI_CR2_ERRIE 00257 /** 00258 * @} 00259 */ 00260 00261 /** @defgroup I2S_Flags_Definition I2S Flags Definition 00262 * @{ 00263 */ 00264 #define I2S_FLAG_TXE SPI_SR_TXE 00265 #define I2S_FLAG_RXNE SPI_SR_RXNE 00266 00267 #define I2S_FLAG_UDR SPI_SR_UDR 00268 #define I2S_FLAG_OVR SPI_SR_OVR 00269 #define I2S_FLAG_FRE SPI_SR_FRE 00270 00271 #define I2S_FLAG_CHSIDE SPI_SR_CHSIDE 00272 #define I2S_FLAG_BSY SPI_SR_BSY 00273 00274 #define I2S_FLAG_MASK (SPI_SR_RXNE\ 00275 | SPI_SR_TXE | SPI_SR_UDR | SPI_SR_OVR | SPI_SR_CHSIDE | SPI_SR_BSY) 00276 /** 00277 * @} 00278 */ 00279 00280 /** 00281 * @} 00282 */ 00283 00284 /* Exported macros -----------------------------------------------------------*/ 00285 /** @defgroup I2S_Exported_macros I2S Exported Macros 00286 * @{ 00287 */ 00288 00289 /** @brief Reset I2S handle state 00290 * @param __HANDLE__ specifies the I2S Handle. 00291 * @retval None 00292 */ 00293 #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U) 00294 #define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) do{ \ 00295 (__HANDLE__)->State = HAL_I2S_STATE_RESET; \ 00296 (__HANDLE__)->MspInitCallback = NULL; \ 00297 (__HANDLE__)->MspDeInitCallback = NULL; \ 00298 } while(0) 00299 #else 00300 #define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2S_STATE_RESET) 00301 #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */ 00302 00303 /** @brief Enable the specified SPI peripheral (in I2S mode). 00304 * @param __HANDLE__ specifies the I2S Handle. 00305 * @retval None 00306 */ 00307 #define __HAL_I2S_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->I2SCFGR, SPI_I2SCFGR_I2SE)) 00308 00309 /** @brief Disable the specified SPI peripheral (in I2S mode). 00310 * @param __HANDLE__ specifies the I2S Handle. 00311 * @retval None 00312 */ 00313 #define __HAL_I2S_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->I2SCFGR, SPI_I2SCFGR_I2SE)) 00314 00315 /** @brief Enable the specified I2S interrupts. 00316 * @param __HANDLE__ specifies the I2S Handle. 00317 * @param __INTERRUPT__ specifies the interrupt source to enable or disable. 00318 * This parameter can be one of the following values: 00319 * @arg I2S_IT_TXE: Tx buffer empty interrupt enable 00320 * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable 00321 * @arg I2S_IT_ERR: Error interrupt enable 00322 * @retval None 00323 */ 00324 #define __HAL_I2S_ENABLE_IT(__HANDLE__, __INTERRUPT__) (SET_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__))) 00325 00326 /** @brief Disable the specified I2S interrupts. 00327 * @param __HANDLE__ specifies the I2S Handle. 00328 * @param __INTERRUPT__ specifies the interrupt source to enable or disable. 00329 * This parameter can be one of the following values: 00330 * @arg I2S_IT_TXE: Tx buffer empty interrupt enable 00331 * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable 00332 * @arg I2S_IT_ERR: Error interrupt enable 00333 * @retval None 00334 */ 00335 #define __HAL_I2S_DISABLE_IT(__HANDLE__, __INTERRUPT__) (CLEAR_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__))) 00336 00337 /** @brief Checks if the specified I2S interrupt source is enabled or disabled. 00338 * @param __HANDLE__ specifies the I2S Handle. 00339 * This parameter can be I2S where x: 1, 2, or 3 to select the I2S peripheral. 00340 * @param __INTERRUPT__ specifies the I2S interrupt source to check. 00341 * This parameter can be one of the following values: 00342 * @arg I2S_IT_TXE: Tx buffer empty interrupt enable 00343 * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable 00344 * @arg I2S_IT_ERR: Error interrupt enable 00345 * @retval The new state of __IT__ (TRUE or FALSE). 00346 */ 00347 #define __HAL_I2S_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2\ 00348 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 00349 00350 /** @brief Checks whether the specified I2S flag is set or not. 00351 * @param __HANDLE__ specifies the I2S Handle. 00352 * @param __FLAG__ specifies the flag to check. 00353 * This parameter can be one of the following values: 00354 * @arg I2S_FLAG_RXNE: Receive buffer not empty flag 00355 * @arg I2S_FLAG_TXE: Transmit buffer empty flag 00356 * @arg I2S_FLAG_UDR: Underrun flag 00357 * @arg I2S_FLAG_OVR: Overrun flag 00358 * @arg I2S_FLAG_FRE: Frame error flag 00359 * @arg I2S_FLAG_CHSIDE: Channel Side flag 00360 * @arg I2S_FLAG_BSY: Busy flag 00361 * @retval The new state of __FLAG__ (TRUE or FALSE). 00362 */ 00363 #define __HAL_I2S_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) 00364 00365 /** @brief Clears the I2S OVR pending flag. 00366 * @param __HANDLE__ specifies the I2S Handle. 00367 * @retval None 00368 */ 00369 #define __HAL_I2S_CLEAR_OVRFLAG(__HANDLE__) do{ \ 00370 __IO uint32_t tmpreg_ovr = 0x00U; \ 00371 tmpreg_ovr = (__HANDLE__)->Instance->DR; \ 00372 tmpreg_ovr = (__HANDLE__)->Instance->SR; \ 00373 UNUSED(tmpreg_ovr); \ 00374 }while(0U) 00375 /** @brief Clears the I2S UDR pending flag. 00376 * @param __HANDLE__ specifies the I2S Handle. 00377 * @retval None 00378 */ 00379 #define __HAL_I2S_CLEAR_UDRFLAG(__HANDLE__) do{\ 00380 __IO uint32_t tmpreg_udr = 0x00U;\ 00381 tmpreg_udr = ((__HANDLE__)->Instance->SR);\ 00382 UNUSED(tmpreg_udr); \ 00383 }while(0U) 00384 /** @brief Flush the I2S DR Register. 00385 * @param __HANDLE__ specifies the I2S Handle. 00386 * @retval None 00387 */ 00388 #define __HAL_I2S_FLUSH_RX_DR(__HANDLE__) do{\ 00389 __IO uint32_t tmpreg_dr = 0x00U;\ 00390 tmpreg_dr = ((__HANDLE__)->Instance->DR);\ 00391 UNUSED(tmpreg_dr); \ 00392 }while(0U) 00393 /** 00394 * @} 00395 */ 00396 00397 /* Exported functions --------------------------------------------------------*/ 00398 /** @addtogroup I2S_Exported_Functions 00399 * @{ 00400 */ 00401 00402 /** @addtogroup I2S_Exported_Functions_Group1 00403 * @{ 00404 */ 00405 /* Initialization/de-initialization functions ********************************/ 00406 HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s); 00407 HAL_StatusTypeDef HAL_I2S_DeInit(I2S_HandleTypeDef *hi2s); 00408 void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s); 00409 void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s); 00410 00411 /* Callbacks Register/UnRegister functions ***********************************/ 00412 #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U) 00413 HAL_StatusTypeDef HAL_I2S_RegisterCallback(I2S_HandleTypeDef *hi2s, HAL_I2S_CallbackIDTypeDef CallbackID, 00414 pI2S_CallbackTypeDef pCallback); 00415 HAL_StatusTypeDef HAL_I2S_UnRegisterCallback(I2S_HandleTypeDef *hi2s, HAL_I2S_CallbackIDTypeDef CallbackID); 00416 #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */ 00417 /** 00418 * @} 00419 */ 00420 00421 /** @addtogroup I2S_Exported_Functions_Group2 00422 * @{ 00423 */ 00424 /* I/O operation functions ***************************************************/ 00425 /* Blocking mode: Polling */ 00426 HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout); 00427 HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout); 00428 00429 /* Non-Blocking mode: Interrupt */ 00430 HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); 00431 HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); 00432 void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s); 00433 00434 /* Non-Blocking mode: DMA */ 00435 HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); 00436 HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); 00437 00438 HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s); 00439 HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s); 00440 HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s); 00441 00442 /* Callbacks used in non blocking modes (Interrupt and DMA) *******************/ 00443 void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s); 00444 void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s); 00445 void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s); 00446 void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s); 00447 void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s); 00448 /** 00449 * @} 00450 */ 00451 00452 /** @addtogroup I2S_Exported_Functions_Group3 00453 * @{ 00454 */ 00455 /* Peripheral Control and State functions ************************************/ 00456 HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s); 00457 uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s); 00458 /** 00459 * @} 00460 */ 00461 00462 /** 00463 * @} 00464 */ 00465 00466 /* Private types -------------------------------------------------------------*/ 00467 /* Private variables ---------------------------------------------------------*/ 00468 /* Private constants ---------------------------------------------------------*/ 00469 /* Private macros ------------------------------------------------------------*/ 00470 /** @defgroup I2S_Private_Macros I2S Private Macros 00471 * @{ 00472 */ 00473 00474 /** @brief Check whether the specified SPI flag is set or not. 00475 * @param __SR__ copy of I2S SR register. 00476 * @param __FLAG__ specifies the flag to check. 00477 * This parameter can be one of the following values: 00478 * @arg I2S_FLAG_RXNE: Receive buffer not empty flag 00479 * @arg I2S_FLAG_TXE: Transmit buffer empty flag 00480 * @arg I2S_FLAG_UDR: Underrun error flag 00481 * @arg I2S_FLAG_OVR: Overrun flag 00482 * @arg I2S_FLAG_CHSIDE: Channel side flag 00483 * @arg I2S_FLAG_BSY: Busy flag 00484 * @retval SET or RESET. 00485 */ 00486 #define I2S_CHECK_FLAG(__SR__, __FLAG__) ((((__SR__)\ 00487 & ((__FLAG__) & I2S_FLAG_MASK)) == ((__FLAG__) & I2S_FLAG_MASK)) ? SET : RESET) 00488 00489 /** @brief Check whether the specified SPI Interrupt is set or not. 00490 * @param __CR2__ copy of I2S CR2 register. 00491 * @param __INTERRUPT__ specifies the SPI interrupt source to check. 00492 * This parameter can be one of the following values: 00493 * @arg I2S_IT_TXE: Tx buffer empty interrupt enable 00494 * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable 00495 * @arg I2S_IT_ERR: Error interrupt enable 00496 * @retval SET or RESET. 00497 */ 00498 #define I2S_CHECK_IT_SOURCE(__CR2__, __INTERRUPT__) ((((__CR2__)\ 00499 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 00500 00501 /** @brief Checks if I2S Mode parameter is in allowed range. 00502 * @param __MODE__ specifies the I2S Mode. 00503 * This parameter can be a value of @ref I2S_Mode 00504 * @retval None 00505 */ 00506 #define IS_I2S_MODE(__MODE__) (((__MODE__) == I2S_MODE_SLAVE_TX) || \ 00507 ((__MODE__) == I2S_MODE_SLAVE_RX) || \ 00508 ((__MODE__) == I2S_MODE_MASTER_TX) || \ 00509 ((__MODE__) == I2S_MODE_MASTER_RX)) 00510 00511 #define IS_I2S_STANDARD(__STANDARD__) (((__STANDARD__) == I2S_STANDARD_PHILIPS) || \ 00512 ((__STANDARD__) == I2S_STANDARD_MSB) || \ 00513 ((__STANDARD__) == I2S_STANDARD_LSB) || \ 00514 ((__STANDARD__) == I2S_STANDARD_PCM_SHORT) || \ 00515 ((__STANDARD__) == I2S_STANDARD_PCM_LONG)) 00516 00517 #define IS_I2S_DATA_FORMAT(__FORMAT__) (((__FORMAT__) == I2S_DATAFORMAT_16B) || \ 00518 ((__FORMAT__) == I2S_DATAFORMAT_16B_EXTENDED) || \ 00519 ((__FORMAT__) == I2S_DATAFORMAT_24B) || \ 00520 ((__FORMAT__) == I2S_DATAFORMAT_32B)) 00521 00522 #define IS_I2S_MCLK_OUTPUT(__OUTPUT__) (((__OUTPUT__) == I2S_MCLKOUTPUT_ENABLE) || \ 00523 ((__OUTPUT__) == I2S_MCLKOUTPUT_DISABLE)) 00524 00525 #define IS_I2S_AUDIO_FREQ(__FREQ__) ((((__FREQ__) >= I2S_AUDIOFREQ_8K) && \ 00526 ((__FREQ__) <= I2S_AUDIOFREQ_192K)) || \ 00527 ((__FREQ__) == I2S_AUDIOFREQ_DEFAULT)) 00528 00529 /** @brief Checks if I2S Serial clock steady state parameter is in allowed range. 00530 * @param __CPOL__ specifies the I2S serial clock steady state. 00531 * This parameter can be a value of @ref I2S_Clock_Polarity 00532 * @retval None 00533 */ 00534 #define IS_I2S_CPOL(__CPOL__) (((__CPOL__) == I2S_CPOL_LOW) || \ 00535 ((__CPOL__) == I2S_CPOL_HIGH)) 00536 00537 /** 00538 * @} 00539 */ 00540 00541 /** 00542 * @} 00543 */ 00544 00545 /** 00546 * @} 00547 */ 00548 #endif /* SPI_I2S_SUPPORT */ 00549 00550 #ifdef __cplusplus 00551 } 00552 #endif 00553 00554 #endif /* STM32F1xx_HAL_I2S_H */ 00555 00556 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
1.7.6.1