STM32F103xB HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32f1xx_hal_nor.h 00004 * @author MCD Application Team 00005 * @brief Header file of NOR HAL module. 00006 ****************************************************************************** 00007 * @attention 00008 * 00009 * <h2><center>© Copyright (c) 2016 STMicroelectronics. 00010 * All rights reserved.</center></h2> 00011 * 00012 * This software component is licensed by ST under BSD 3-Clause license, 00013 * the "License"; You may not use this file except in compliance with the 00014 * License. You may obtain a copy of the License at: 00015 * opensource.org/licenses/BSD-3-Clause 00016 * 00017 ****************************************************************************** 00018 */ 00019 00020 /* Define to prevent recursive inclusion -------------------------------------*/ 00021 #ifndef STM32F1xx_HAL_NOR_H 00022 #define STM32F1xx_HAL_NOR_H 00023 00024 #ifdef __cplusplus 00025 extern "C" { 00026 #endif 00027 00028 #if defined(FSMC_BANK1) 00029 00030 /* Includes ------------------------------------------------------------------*/ 00031 #include "stm32f1xx_ll_fsmc.h" 00032 00033 /** @addtogroup STM32F1xx_HAL_Driver 00034 * @{ 00035 */ 00036 00037 /** @addtogroup NOR 00038 * @{ 00039 */ 00040 00041 /* Exported typedef ----------------------------------------------------------*/ 00042 /** @defgroup NOR_Exported_Types NOR Exported Types 00043 * @{ 00044 */ 00045 00046 /** 00047 * @brief HAL SRAM State structures definition 00048 */ 00049 typedef enum 00050 { 00051 HAL_NOR_STATE_RESET = 0x00U, /*!< NOR not yet initialized or disabled */ 00052 HAL_NOR_STATE_READY = 0x01U, /*!< NOR initialized and ready for use */ 00053 HAL_NOR_STATE_BUSY = 0x02U, /*!< NOR internal processing is ongoing */ 00054 HAL_NOR_STATE_ERROR = 0x03U, /*!< NOR error state */ 00055 HAL_NOR_STATE_PROTECTED = 0x04U /*!< NOR NORSRAM device write protected */ 00056 } HAL_NOR_StateTypeDef; 00057 00058 /** 00059 * @brief FSMC NOR Status typedef 00060 */ 00061 typedef enum 00062 { 00063 HAL_NOR_STATUS_SUCCESS = 0U, 00064 HAL_NOR_STATUS_ONGOING, 00065 HAL_NOR_STATUS_ERROR, 00066 HAL_NOR_STATUS_TIMEOUT 00067 } HAL_NOR_StatusTypeDef; 00068 00069 /** 00070 * @brief FSMC NOR ID typedef 00071 */ 00072 typedef struct 00073 { 00074 uint16_t Manufacturer_Code; /*!< Defines the device's manufacturer code used to identify the memory */ 00075 00076 uint16_t Device_Code1; 00077 00078 uint16_t Device_Code2; 00079 00080 uint16_t Device_Code3; /*!< Defines the device's codes used to identify the memory. 00081 These codes can be accessed by performing read operations with specific 00082 control signals and addresses set.They can also be accessed by issuing 00083 an Auto Select command */ 00084 } NOR_IDTypeDef; 00085 00086 /** 00087 * @brief FSMC NOR CFI typedef 00088 */ 00089 typedef struct 00090 { 00091 /*!< Defines the information stored in the memory's Common flash interface 00092 which contains a description of various electrical and timing parameters, 00093 density information and functions supported by the memory */ 00094 00095 uint16_t CFI_1; 00096 00097 uint16_t CFI_2; 00098 00099 uint16_t CFI_3; 00100 00101 uint16_t CFI_4; 00102 } NOR_CFITypeDef; 00103 00104 /** 00105 * @brief NOR handle Structure definition 00106 */ 00107 #if (USE_HAL_NOR_REGISTER_CALLBACKS == 1) 00108 typedef struct __NOR_HandleTypeDef 00109 #else 00110 typedef struct 00111 #endif /* USE_HAL_NOR_REGISTER_CALLBACKS */ 00112 00113 { 00114 FSMC_NORSRAM_TypeDef *Instance; /*!< Register base address */ 00115 00116 FSMC_NORSRAM_EXTENDED_TypeDef *Extended; /*!< Extended mode register base address */ 00117 00118 FSMC_NORSRAM_InitTypeDef Init; /*!< NOR device control configuration parameters */ 00119 00120 HAL_LockTypeDef Lock; /*!< NOR locking object */ 00121 00122 __IO HAL_NOR_StateTypeDef State; /*!< NOR device access state */ 00123 00124 uint32_t CommandSet; /*!< NOR algorithm command set and control */ 00125 00126 #if (USE_HAL_NOR_REGISTER_CALLBACKS == 1) 00127 void (* MspInitCallback)(struct __NOR_HandleTypeDef *hnor); /*!< NOR Msp Init callback */ 00128 void (* MspDeInitCallback)(struct __NOR_HandleTypeDef *hnor); /*!< NOR Msp DeInit callback */ 00129 #endif /* USE_HAL_NOR_REGISTER_CALLBACKS */ 00130 } NOR_HandleTypeDef; 00131 00132 #if (USE_HAL_NOR_REGISTER_CALLBACKS == 1) 00133 /** 00134 * @brief HAL NOR Callback ID enumeration definition 00135 */ 00136 typedef enum 00137 { 00138 HAL_NOR_MSP_INIT_CB_ID = 0x00U, /*!< NOR MspInit Callback ID */ 00139 HAL_NOR_MSP_DEINIT_CB_ID = 0x01U /*!< NOR MspDeInit Callback ID */ 00140 } HAL_NOR_CallbackIDTypeDef; 00141 00142 /** 00143 * @brief HAL NOR Callback pointer definition 00144 */ 00145 typedef void (*pNOR_CallbackTypeDef)(NOR_HandleTypeDef *hnor); 00146 #endif /* USE_HAL_NOR_REGISTER_CALLBACKS */ 00147 /** 00148 * @} 00149 */ 00150 00151 /* Exported constants --------------------------------------------------------*/ 00152 /* Exported macro ------------------------------------------------------------*/ 00153 /** @defgroup NOR_Exported_Macros NOR Exported Macros 00154 * @{ 00155 */ 00156 /** @brief Reset NOR handle state 00157 * @param __HANDLE__ specifies the NOR handle. 00158 * @retval None 00159 */ 00160 #if (USE_HAL_NOR_REGISTER_CALLBACKS == 1) 00161 #define __HAL_NOR_RESET_HANDLE_STATE(__HANDLE__) do { \ 00162 (__HANDLE__)->State = HAL_NOR_STATE_RESET; \ 00163 (__HANDLE__)->MspInitCallback = NULL; \ 00164 (__HANDLE__)->MspDeInitCallback = NULL; \ 00165 } while(0) 00166 #else 00167 #define __HAL_NOR_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NOR_STATE_RESET) 00168 #endif /* USE_HAL_NOR_REGISTER_CALLBACKS */ 00169 /** 00170 * @} 00171 */ 00172 00173 /* Exported functions --------------------------------------------------------*/ 00174 /** @addtogroup NOR_Exported_Functions NOR Exported Functions 00175 * @{ 00176 */ 00177 00178 /** @addtogroup NOR_Exported_Functions_Group1 Initialization and de-initialization functions 00179 * @{ 00180 */ 00181 00182 /* Initialization/de-initialization functions ********************************/ 00183 HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FSMC_NORSRAM_TimingTypeDef *Timing, 00184 FSMC_NORSRAM_TimingTypeDef *ExtTiming); 00185 HAL_StatusTypeDef HAL_NOR_DeInit(NOR_HandleTypeDef *hnor); 00186 void HAL_NOR_MspInit(NOR_HandleTypeDef *hnor); 00187 void HAL_NOR_MspDeInit(NOR_HandleTypeDef *hnor); 00188 void HAL_NOR_MspWait(NOR_HandleTypeDef *hnor, uint32_t Timeout); 00189 /** 00190 * @} 00191 */ 00192 00193 /** @addtogroup NOR_Exported_Functions_Group2 Input and Output functions 00194 * @{ 00195 */ 00196 00197 /* I/O operation functions ***************************************************/ 00198 HAL_StatusTypeDef HAL_NOR_Read_ID(NOR_HandleTypeDef *hnor, NOR_IDTypeDef *pNOR_ID); 00199 HAL_StatusTypeDef HAL_NOR_ReturnToReadMode(NOR_HandleTypeDef *hnor); 00200 HAL_StatusTypeDef HAL_NOR_Read(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData); 00201 HAL_StatusTypeDef HAL_NOR_Program(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData); 00202 00203 HAL_StatusTypeDef HAL_NOR_ReadBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, 00204 uint32_t uwBufferSize); 00205 HAL_StatusTypeDef HAL_NOR_ProgramBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, 00206 uint32_t uwBufferSize); 00207 00208 HAL_StatusTypeDef HAL_NOR_Erase_Block(NOR_HandleTypeDef *hnor, uint32_t BlockAddress, uint32_t Address); 00209 HAL_StatusTypeDef HAL_NOR_Erase_Chip(NOR_HandleTypeDef *hnor, uint32_t Address); 00210 HAL_StatusTypeDef HAL_NOR_Read_CFI(NOR_HandleTypeDef *hnor, NOR_CFITypeDef *pNOR_CFI); 00211 00212 #if (USE_HAL_NOR_REGISTER_CALLBACKS == 1) 00213 /* NOR callback registering/unregistering */ 00214 HAL_StatusTypeDef HAL_NOR_RegisterCallback(NOR_HandleTypeDef *hnor, HAL_NOR_CallbackIDTypeDef CallbackId, 00215 pNOR_CallbackTypeDef pCallback); 00216 HAL_StatusTypeDef HAL_NOR_UnRegisterCallback(NOR_HandleTypeDef *hnor, HAL_NOR_CallbackIDTypeDef CallbackId); 00217 #endif /* USE_HAL_NOR_REGISTER_CALLBACKS */ 00218 /** 00219 * @} 00220 */ 00221 00222 /** @addtogroup NOR_Exported_Functions_Group3 NOR Control functions 00223 * @{ 00224 */ 00225 00226 /* NOR Control functions *****************************************************/ 00227 HAL_StatusTypeDef HAL_NOR_WriteOperation_Enable(NOR_HandleTypeDef *hnor); 00228 HAL_StatusTypeDef HAL_NOR_WriteOperation_Disable(NOR_HandleTypeDef *hnor); 00229 /** 00230 * @} 00231 */ 00232 00233 /** @addtogroup NOR_Exported_Functions_Group4 NOR State functions 00234 * @{ 00235 */ 00236 00237 /* NOR State functions ********************************************************/ 00238 HAL_NOR_StateTypeDef HAL_NOR_GetState(NOR_HandleTypeDef *hnor); 00239 HAL_NOR_StatusTypeDef HAL_NOR_GetStatus(NOR_HandleTypeDef *hnor, uint32_t Address, uint32_t Timeout); 00240 /** 00241 * @} 00242 */ 00243 00244 /** 00245 * @} 00246 */ 00247 00248 /* Private types -------------------------------------------------------------*/ 00249 /* Private variables ---------------------------------------------------------*/ 00250 /* Private constants ---------------------------------------------------------*/ 00251 /** @defgroup NOR_Private_Constants NOR Private Constants 00252 * @{ 00253 */ 00254 /* NOR device IDs addresses */ 00255 #define MC_ADDRESS ((uint16_t)0x0000) 00256 #define DEVICE_CODE1_ADDR ((uint16_t)0x0001) 00257 #define DEVICE_CODE2_ADDR ((uint16_t)0x000E) 00258 #define DEVICE_CODE3_ADDR ((uint16_t)0x000F) 00259 00260 /* NOR CFI IDs addresses */ 00261 #define CFI1_ADDRESS ((uint16_t)0x0061) 00262 #define CFI2_ADDRESS ((uint16_t)0x0062) 00263 #define CFI3_ADDRESS ((uint16_t)0x0063) 00264 #define CFI4_ADDRESS ((uint16_t)0x0064) 00265 00266 /* NOR operation wait timeout */ 00267 #define NOR_TMEOUT ((uint16_t)0xFFFF) 00268 00269 /* NOR memory data width */ 00270 #define NOR_MEMORY_8B ((uint8_t)0x00) 00271 #define NOR_MEMORY_16B ((uint8_t)0x01) 00272 00273 /* NOR memory device read/write start address */ 00274 #define NOR_MEMORY_ADRESS1 (0x60000000U) 00275 #define NOR_MEMORY_ADRESS2 (0x64000000U) 00276 #define NOR_MEMORY_ADRESS3 (0x68000000U) 00277 #define NOR_MEMORY_ADRESS4 (0x6C000000U) 00278 /** 00279 * @} 00280 */ 00281 00282 /* Private macros ------------------------------------------------------------*/ 00283 /** @defgroup NOR_Private_Macros NOR Private Macros 00284 * @{ 00285 */ 00286 /** 00287 * @brief NOR memory address shifting. 00288 * @param __NOR_ADDRESS NOR base address 00289 * @param __NOR_MEMORY_WIDTH_ NOR memory width 00290 * @param __ADDRESS__ NOR memory address 00291 * @retval NOR shifted address value 00292 */ 00293 #define NOR_ADDR_SHIFT(__NOR_ADDRESS, __NOR_MEMORY_WIDTH_, __ADDRESS__) \ 00294 ((uint32_t)(((__NOR_MEMORY_WIDTH_) == NOR_MEMORY_16B)? \ 00295 ((uint32_t)((__NOR_ADDRESS) + (2U * (__ADDRESS__)))): \ 00296 ((uint32_t)((__NOR_ADDRESS) + (__ADDRESS__))))) 00297 00298 /** 00299 * @brief NOR memory write data to specified address. 00300 * @param __ADDRESS__ NOR memory address 00301 * @param __DATA__ Data to write 00302 * @retval None 00303 */ 00304 #define NOR_WRITE(__ADDRESS__, __DATA__) do{ \ 00305 (*(__IO uint16_t *)((uint32_t)(__ADDRESS__)) = (__DATA__)); \ 00306 __DSB(); \ 00307 } while(0) 00308 00309 /** 00310 * @} 00311 */ 00312 00313 /** 00314 * @} 00315 */ 00316 00317 /** 00318 * @} 00319 */ 00320 00321 #endif /* FSMC_BANK1 */ 00322 00323 #ifdef __cplusplus 00324 } 00325 #endif 00326 00327 #endif /* STM32F1xx_HAL_NOR_H */ 00328 00329 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/