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STM32F103xB HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32f1xx_hal_pcd.h 00004 * @author MCD Application Team 00005 * @brief Header file of PCD HAL module. 00006 ****************************************************************************** 00007 * @attention 00008 * 00009 * <h2><center>© Copyright (c) 2016 STMicroelectronics. 00010 * All rights reserved.</center></h2> 00011 * 00012 * This software component is licensed by ST under BSD 3-Clause license, 00013 * the "License"; You may not use this file except in compliance with the 00014 * License. You may obtain a copy of the License at: 00015 * opensource.org/licenses/BSD-3-Clause 00016 * 00017 ****************************************************************************** 00018 */ 00019 00020 /* Define to prevent recursive inclusion -------------------------------------*/ 00021 #ifndef STM32F1xx_HAL_PCD_H 00022 #define STM32F1xx_HAL_PCD_H 00023 00024 #ifdef __cplusplus 00025 extern "C" { 00026 #endif 00027 00028 /* Includes ------------------------------------------------------------------*/ 00029 #include "stm32f1xx_ll_usb.h" 00030 00031 #if defined (USB) || defined (USB_OTG_FS) 00032 00033 /** @addtogroup STM32F1xx_HAL_Driver 00034 * @{ 00035 */ 00036 00037 /** @addtogroup PCD 00038 * @{ 00039 */ 00040 00041 /* Exported types ------------------------------------------------------------*/ 00042 /** @defgroup PCD_Exported_Types PCD Exported Types 00043 * @{ 00044 */ 00045 00046 /** 00047 * @brief PCD State structure definition 00048 */ 00049 typedef enum 00050 { 00051 HAL_PCD_STATE_RESET = 0x00, 00052 HAL_PCD_STATE_READY = 0x01, 00053 HAL_PCD_STATE_ERROR = 0x02, 00054 HAL_PCD_STATE_BUSY = 0x03, 00055 HAL_PCD_STATE_TIMEOUT = 0x04 00056 } PCD_StateTypeDef; 00057 00058 /* Device LPM suspend state */ 00059 typedef enum 00060 { 00061 LPM_L0 = 0x00, /* on */ 00062 LPM_L1 = 0x01, /* LPM L1 sleep */ 00063 LPM_L2 = 0x02, /* suspend */ 00064 LPM_L3 = 0x03, /* off */ 00065 } PCD_LPM_StateTypeDef; 00066 00067 typedef enum 00068 { 00069 PCD_LPM_L0_ACTIVE = 0x00, /* on */ 00070 PCD_LPM_L1_ACTIVE = 0x01, /* LPM L1 sleep */ 00071 } PCD_LPM_MsgTypeDef; 00072 00073 typedef enum 00074 { 00075 PCD_BCD_ERROR = 0xFF, 00076 PCD_BCD_CONTACT_DETECTION = 0xFE, 00077 PCD_BCD_STD_DOWNSTREAM_PORT = 0xFD, 00078 PCD_BCD_CHARGING_DOWNSTREAM_PORT = 0xFC, 00079 PCD_BCD_DEDICATED_CHARGING_PORT = 0xFB, 00080 PCD_BCD_DISCOVERY_COMPLETED = 0x00, 00081 00082 } PCD_BCD_MsgTypeDef; 00083 00084 #if defined (USB) 00085 00086 #endif /* defined (USB) */ 00087 #if defined (USB_OTG_FS) 00088 typedef USB_OTG_GlobalTypeDef PCD_TypeDef; 00089 typedef USB_OTG_CfgTypeDef PCD_InitTypeDef; 00090 typedef USB_OTG_EPTypeDef PCD_EPTypeDef; 00091 #endif /* defined (USB_OTG_FS) */ 00092 #if defined (USB) 00093 typedef USB_TypeDef PCD_TypeDef; 00094 typedef USB_CfgTypeDef PCD_InitTypeDef; 00095 typedef USB_EPTypeDef PCD_EPTypeDef; 00096 #endif /* defined (USB) */ 00097 00098 /** 00099 * @brief PCD Handle Structure definition 00100 */ 00101 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) 00102 typedef struct __PCD_HandleTypeDef 00103 #else 00104 typedef struct 00105 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ 00106 { 00107 PCD_TypeDef *Instance; /*!< Register base address */ 00108 PCD_InitTypeDef Init; /*!< PCD required parameters */ 00109 __IO uint8_t USB_Address; /*!< USB Address */ 00110 #if defined (USB_OTG_FS) 00111 PCD_EPTypeDef IN_ep[16]; /*!< IN endpoint parameters */ 00112 PCD_EPTypeDef OUT_ep[16]; /*!< OUT endpoint parameters */ 00113 #endif /* defined (USB_OTG_FS) */ 00114 #if defined (USB) 00115 PCD_EPTypeDef IN_ep[8]; /*!< IN endpoint parameters */ 00116 PCD_EPTypeDef OUT_ep[8]; /*!< OUT endpoint parameters */ 00117 #endif /* defined (USB) */ 00118 HAL_LockTypeDef Lock; /*!< PCD peripheral status */ 00119 __IO PCD_StateTypeDef State; /*!< PCD communication state */ 00120 __IO uint32_t ErrorCode; /*!< PCD Error code */ 00121 uint32_t Setup[12]; /*!< Setup packet buffer */ 00122 PCD_LPM_StateTypeDef LPM_State; /*!< LPM State */ 00123 uint32_t BESL; 00124 00125 void *pData; /*!< Pointer to upper stack Handler */ 00126 00127 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) 00128 void (* SOFCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD SOF callback */ 00129 void (* SetupStageCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Setup Stage callback */ 00130 void (* ResetCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Reset callback */ 00131 void (* SuspendCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Suspend callback */ 00132 void (* ResumeCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Resume callback */ 00133 void (* ConnectCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Connect callback */ 00134 void (* DisconnectCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Disconnect callback */ 00135 00136 void (* DataOutStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD Data OUT Stage callback */ 00137 void (* DataInStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD Data IN Stage callback */ 00138 void (* ISOOUTIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD ISO OUT Incomplete callback */ 00139 void (* ISOINIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD ISO IN Incomplete callback */ 00140 00141 void (* MspInitCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Msp Init callback */ 00142 void (* MspDeInitCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Msp DeInit callback */ 00143 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ 00144 } PCD_HandleTypeDef; 00145 00146 /** 00147 * @} 00148 */ 00149 00150 /* Include PCD HAL Extended module */ 00151 #include "stm32f1xx_hal_pcd_ex.h" 00152 00153 /* Exported constants --------------------------------------------------------*/ 00154 /** @defgroup PCD_Exported_Constants PCD Exported Constants 00155 * @{ 00156 */ 00157 00158 /** @defgroup PCD_Speed PCD Speed 00159 * @{ 00160 */ 00161 #define PCD_SPEED_FULL USBD_FS_SPEED 00162 /** 00163 * @} 00164 */ 00165 00166 /** @defgroup PCD_PHY_Module PCD PHY Module 00167 * @{ 00168 */ 00169 #define PCD_PHY_ULPI 1U 00170 #define PCD_PHY_EMBEDDED 2U 00171 #define PCD_PHY_UTMI 3U 00172 /** 00173 * @} 00174 */ 00175 00176 /** @defgroup PCD_Error_Code_definition PCD Error Code definition 00177 * @brief PCD Error Code definition 00178 * @{ 00179 */ 00180 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) 00181 #define HAL_PCD_ERROR_INVALID_CALLBACK (0x00000010U) /*!< Invalid Callback error */ 00182 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ 00183 00184 /** 00185 * @} 00186 */ 00187 00188 /** 00189 * @} 00190 */ 00191 00192 /* Exported macros -----------------------------------------------------------*/ 00193 /** @defgroup PCD_Exported_Macros PCD Exported Macros 00194 * @brief macros to handle interrupts and specific clock configurations 00195 * @{ 00196 */ 00197 #if defined (USB_OTG_FS) 00198 #define __HAL_PCD_ENABLE(__HANDLE__) (void)USB_EnableGlobalInt ((__HANDLE__)->Instance) 00199 #define __HAL_PCD_DISABLE(__HANDLE__) (void)USB_DisableGlobalInt ((__HANDLE__)->Instance) 00200 00201 #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) \ 00202 ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__)) 00203 00204 #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->GINTSTS) &= (__INTERRUPT__)) 00205 #define __HAL_PCD_IS_INVALID_INTERRUPT(__HANDLE__) (USB_ReadInterrupts((__HANDLE__)->Instance) == 0U) 00206 00207 #define __HAL_PCD_UNGATE_PHYCLOCK(__HANDLE__) \ 00208 *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) &= ~(USB_OTG_PCGCCTL_STOPCLK) 00209 00210 #define __HAL_PCD_GATE_PHYCLOCK(__HANDLE__) \ 00211 *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) |= USB_OTG_PCGCCTL_STOPCLK 00212 00213 #define __HAL_PCD_IS_PHY_SUSPENDED(__HANDLE__) \ 00214 ((*(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE)) & 0x10U) 00215 00216 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= USB_OTG_FS_WAKEUP_EXTI_LINE 00217 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE) 00218 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_GET_FLAG() EXTI->PR & (USB_OTG_FS_WAKEUP_EXTI_LINE) 00219 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = USB_OTG_FS_WAKEUP_EXTI_LINE 00220 00221 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_EDGE() \ 00222 do { \ 00223 EXTI->FTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE); \ 00224 EXTI->RTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE; \ 00225 } while(0U) 00226 #endif /* defined (USB_OTG_FS) */ 00227 00228 #if defined (USB) 00229 #define __HAL_PCD_ENABLE(__HANDLE__) (void)USB_EnableGlobalInt ((__HANDLE__)->Instance) 00230 #define __HAL_PCD_DISABLE(__HANDLE__) (void)USB_DisableGlobalInt ((__HANDLE__)->Instance) 00231 #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance)\ 00232 & (__INTERRUPT__)) == (__INTERRUPT__)) 00233 00234 #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR)\ 00235 &= (uint16_t)(~(__INTERRUPT__))) 00236 00237 #define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= USB_WAKEUP_EXTI_LINE 00238 #define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_WAKEUP_EXTI_LINE) 00239 #define __HAL_USB_WAKEUP_EXTI_GET_FLAG() EXTI->PR & (USB_WAKEUP_EXTI_LINE) 00240 #define __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = USB_WAKEUP_EXTI_LINE 00241 00242 #define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE() \ 00243 do { \ 00244 EXTI->FTSR &= ~(USB_WAKEUP_EXTI_LINE); \ 00245 EXTI->RTSR |= USB_WAKEUP_EXTI_LINE; \ 00246 } while(0U) 00247 00248 #endif /* defined (USB) */ 00249 00250 /** 00251 * @} 00252 */ 00253 00254 /* Exported functions --------------------------------------------------------*/ 00255 /** @addtogroup PCD_Exported_Functions PCD Exported Functions 00256 * @{ 00257 */ 00258 00259 /* Initialization/de-initialization functions ********************************/ 00260 /** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions 00261 * @{ 00262 */ 00263 HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd); 00264 HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd); 00265 void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd); 00266 void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd); 00267 00268 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) 00269 /** @defgroup HAL_PCD_Callback_ID_enumeration_definition HAL USB OTG PCD Callback ID enumeration definition 00270 * @brief HAL USB OTG PCD Callback ID enumeration definition 00271 * @{ 00272 */ 00273 typedef enum 00274 { 00275 HAL_PCD_SOF_CB_ID = 0x01, /*!< USB PCD SOF callback ID */ 00276 HAL_PCD_SETUPSTAGE_CB_ID = 0x02, /*!< USB PCD Setup Stage callback ID */ 00277 HAL_PCD_RESET_CB_ID = 0x03, /*!< USB PCD Reset callback ID */ 00278 HAL_PCD_SUSPEND_CB_ID = 0x04, /*!< USB PCD Suspend callback ID */ 00279 HAL_PCD_RESUME_CB_ID = 0x05, /*!< USB PCD Resume callback ID */ 00280 HAL_PCD_CONNECT_CB_ID = 0x06, /*!< USB PCD Connect callback ID */ 00281 HAL_PCD_DISCONNECT_CB_ID = 0x07, /*!< USB PCD Disconnect callback ID */ 00282 00283 HAL_PCD_MSPINIT_CB_ID = 0x08, /*!< USB PCD MspInit callback ID */ 00284 HAL_PCD_MSPDEINIT_CB_ID = 0x09 /*!< USB PCD MspDeInit callback ID */ 00285 00286 } HAL_PCD_CallbackIDTypeDef; 00287 /** 00288 * @} 00289 */ 00290 00291 /** @defgroup HAL_PCD_Callback_pointer_definition HAL USB OTG PCD Callback pointer definition 00292 * @brief HAL USB OTG PCD Callback pointer definition 00293 * @{ 00294 */ 00295 00296 typedef void (*pPCD_CallbackTypeDef)(PCD_HandleTypeDef *hpcd); /*!< pointer to a common USB OTG PCD callback function */ 00297 typedef void (*pPCD_DataOutStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD Data OUT Stage callback */ 00298 typedef void (*pPCD_DataInStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD Data IN Stage callback */ 00299 typedef void (*pPCD_IsoOutIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD ISO OUT Incomplete callback */ 00300 typedef void (*pPCD_IsoInIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD ISO IN Incomplete callback */ 00301 00302 /** 00303 * @} 00304 */ 00305 00306 HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd, 00307 HAL_PCD_CallbackIDTypeDef CallbackID, 00308 pPCD_CallbackTypeDef pCallback); 00309 00310 HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd, 00311 HAL_PCD_CallbackIDTypeDef CallbackID); 00312 00313 HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd, 00314 pPCD_DataOutStageCallbackTypeDef pCallback); 00315 00316 HAL_StatusTypeDef HAL_PCD_UnRegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd); 00317 00318 HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd, 00319 pPCD_DataInStageCallbackTypeDef pCallback); 00320 00321 HAL_StatusTypeDef HAL_PCD_UnRegisterDataInStageCallback(PCD_HandleTypeDef *hpcd); 00322 00323 HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd, 00324 pPCD_IsoOutIncpltCallbackTypeDef pCallback); 00325 00326 HAL_StatusTypeDef HAL_PCD_UnRegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd); 00327 00328 HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd, 00329 pPCD_IsoInIncpltCallbackTypeDef pCallback); 00330 00331 HAL_StatusTypeDef HAL_PCD_UnRegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd); 00332 00333 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ 00334 /** 00335 * @} 00336 */ 00337 00338 /* I/O operation functions ***************************************************/ 00339 /* Non-Blocking mode: Interrupt */ 00340 /** @addtogroup PCD_Exported_Functions_Group2 Input and Output operation functions 00341 * @{ 00342 */ 00343 HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd); 00344 HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd); 00345 void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd); 00346 void HAL_PCD_WKUP_IRQHandler(PCD_HandleTypeDef *hpcd); 00347 00348 void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd); 00349 void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd); 00350 void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd); 00351 void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd); 00352 void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd); 00353 void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd); 00354 void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd); 00355 00356 void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); 00357 void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); 00358 void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); 00359 void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); 00360 /** 00361 * @} 00362 */ 00363 00364 /* Peripheral Control functions **********************************************/ 00365 /** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions 00366 * @{ 00367 */ 00368 HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd); 00369 HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd); 00370 HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address); 00371 HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, 00372 uint16_t ep_mps, uint8_t ep_type); 00373 00374 HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); 00375 HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, 00376 uint8_t *pBuf, uint32_t len); 00377 00378 HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, 00379 uint8_t *pBuf, uint32_t len); 00380 00381 00382 HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); 00383 HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); 00384 HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); 00385 HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd); 00386 HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd); 00387 00388 uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); 00389 /** 00390 * @} 00391 */ 00392 00393 /* Peripheral State functions ************************************************/ 00394 /** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions 00395 * @{ 00396 */ 00397 PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd); 00398 /** 00399 * @} 00400 */ 00401 00402 /** 00403 * @} 00404 */ 00405 00406 /* Private constants ---------------------------------------------------------*/ 00407 /** @defgroup PCD_Private_Constants PCD Private Constants 00408 * @{ 00409 */ 00410 /** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt 00411 * @{ 00412 */ 00413 #if defined (USB_OTG_FS) 00414 #define USB_OTG_FS_WAKEUP_EXTI_LINE (0x1U << 18) /*!< USB FS EXTI Line WakeUp Interrupt */ 00415 #endif /* defined (USB_OTG_FS) */ 00416 00417 #if defined (USB) 00418 #define USB_WAKEUP_EXTI_LINE (0x1U << 18) /*!< USB FS EXTI Line WakeUp Interrupt */ 00419 #endif /* defined (USB) */ 00420 00421 /** 00422 * @} 00423 */ 00424 #if defined (USB) 00425 /** @defgroup PCD_EP0_MPS PCD EP0 MPS 00426 * @{ 00427 */ 00428 #define PCD_EP0MPS_64 EP_MPS_64 00429 #define PCD_EP0MPS_32 EP_MPS_32 00430 #define PCD_EP0MPS_16 EP_MPS_16 00431 #define PCD_EP0MPS_08 EP_MPS_8 00432 /** 00433 * @} 00434 */ 00435 00436 /** @defgroup PCD_ENDP PCD ENDP 00437 * @{ 00438 */ 00439 #define PCD_ENDP0 0U 00440 #define PCD_ENDP1 1U 00441 #define PCD_ENDP2 2U 00442 #define PCD_ENDP3 3U 00443 #define PCD_ENDP4 4U 00444 #define PCD_ENDP5 5U 00445 #define PCD_ENDP6 6U 00446 #define PCD_ENDP7 7U 00447 /** 00448 * @} 00449 */ 00450 00451 /** @defgroup PCD_ENDP_Kind PCD Endpoint Kind 00452 * @{ 00453 */ 00454 #define PCD_SNG_BUF 0U 00455 #define PCD_DBL_BUF 1U 00456 /** 00457 * @} 00458 */ 00459 #endif /* defined (USB) */ 00460 /** 00461 * @} 00462 */ 00463 00464 #if defined (USB_OTG_FS) 00465 #ifndef USB_OTG_DOEPINT_OTEPSPR 00466 #define USB_OTG_DOEPINT_OTEPSPR (0x1UL << 5) /*!< Status Phase Received interrupt */ 00467 #endif /* defined USB_OTG_DOEPINT_OTEPSPR */ 00468 00469 #ifndef USB_OTG_DOEPMSK_OTEPSPRM 00470 #define USB_OTG_DOEPMSK_OTEPSPRM (0x1UL << 5) /*!< Setup Packet Received interrupt mask */ 00471 #endif /* defined USB_OTG_DOEPMSK_OTEPSPRM */ 00472 00473 #ifndef USB_OTG_DOEPINT_NAK 00474 #define USB_OTG_DOEPINT_NAK (0x1UL << 13) /*!< NAK interrupt */ 00475 #endif /* defined USB_OTG_DOEPINT_NAK */ 00476 00477 #ifndef USB_OTG_DOEPMSK_NAKM 00478 #define USB_OTG_DOEPMSK_NAKM (0x1UL << 13) /*!< OUT Packet NAK interrupt mask */ 00479 #endif /* defined USB_OTG_DOEPMSK_NAKM */ 00480 00481 #ifndef USB_OTG_DOEPINT_STPKTRX 00482 #define USB_OTG_DOEPINT_STPKTRX (0x1UL << 15) /*!< Setup Packet Received interrupt */ 00483 #endif /* defined USB_OTG_DOEPINT_STPKTRX */ 00484 00485 #ifndef USB_OTG_DOEPMSK_NYETM 00486 #define USB_OTG_DOEPMSK_NYETM (0x1UL << 14) /*!< Setup Packet Received interrupt mask */ 00487 #endif /* defined USB_OTG_DOEPMSK_NYETM */ 00488 #endif /* defined (USB_OTG_FS) */ 00489 00490 /* Private macros ------------------------------------------------------------*/ 00491 /** @defgroup PCD_Private_Macros PCD Private Macros 00492 * @{ 00493 */ 00494 #if defined (USB) 00495 /******************** Bit definition for USB_COUNTn_RX register *************/ 00496 #define USB_CNTRX_NBLK_MSK (0x1FU << 10) 00497 #define USB_CNTRX_BLSIZE (0x1U << 15) 00498 00499 /* SetENDPOINT */ 00500 #define PCD_SET_ENDPOINT(USBx, bEpNum, wRegValue) (*(__IO uint16_t *)\ 00501 (&(USBx)->EP0R + ((bEpNum) * 2U)) = (uint16_t)(wRegValue)) 00502 00503 /* GetENDPOINT */ 00504 #define PCD_GET_ENDPOINT(USBx, bEpNum) (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U))) 00505 00506 /* ENDPOINT transfer */ 00507 #define USB_EP0StartXfer USB_EPStartXfer 00508 00509 /** 00510 * @brief sets the type in the endpoint register(bits EP_TYPE[1:0]) 00511 * @param USBx USB peripheral instance register address. 00512 * @param bEpNum Endpoint Number. 00513 * @param wType Endpoint Type. 00514 * @retval None 00515 */ 00516 #define PCD_SET_EPTYPE(USBx, bEpNum, wType) (PCD_SET_ENDPOINT((USBx), (bEpNum), ((PCD_GET_ENDPOINT((USBx), (bEpNum))\ 00517 & USB_EP_T_MASK) | (wType) | USB_EP_CTR_TX | USB_EP_CTR_RX))) 00518 00519 00520 /** 00521 * @brief gets the type in the endpoint register(bits EP_TYPE[1:0]) 00522 * @param USBx USB peripheral instance register address. 00523 * @param bEpNum Endpoint Number. 00524 * @retval Endpoint Type 00525 */ 00526 #define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD) 00527 00528 /** 00529 * @brief free buffer used from the application realizing it to the line 00530 * toggles bit SW_BUF in the double buffered endpoint register 00531 * @param USBx USB device. 00532 * @param bEpNum, bDir 00533 * @retval None 00534 */ 00535 #define PCD_FreeUserBuffer(USBx, bEpNum, bDir) \ 00536 do { \ 00537 if ((bDir) == 0U) \ 00538 { \ 00539 /* OUT double buffered endpoint */ \ 00540 PCD_TX_DTOG((USBx), (bEpNum)); \ 00541 } \ 00542 else if ((bDir) == 1U) \ 00543 { \ 00544 /* IN double buffered endpoint */ \ 00545 PCD_RX_DTOG((USBx), (bEpNum)); \ 00546 } \ 00547 } while(0) 00548 00549 /** 00550 * @brief sets the status for tx transfer (bits STAT_TX[1:0]). 00551 * @param USBx USB peripheral instance register address. 00552 * @param bEpNum Endpoint Number. 00553 * @param wState new state 00554 * @retval None 00555 */ 00556 #define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) \ 00557 do { \ 00558 uint16_t _wRegVal; \ 00559 \ 00560 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK; \ 00561 /* toggle first bit ? */ \ 00562 if ((USB_EPTX_DTOG1 & (wState))!= 0U) \ 00563 { \ 00564 _wRegVal ^= USB_EPTX_DTOG1; \ 00565 } \ 00566 /* toggle second bit ? */ \ 00567 if ((USB_EPTX_DTOG2 & (wState))!= 0U) \ 00568 { \ 00569 _wRegVal ^= USB_EPTX_DTOG2; \ 00570 } \ 00571 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ 00572 } while(0) /* PCD_SET_EP_TX_STATUS */ 00573 00574 /** 00575 * @brief sets the status for rx transfer (bits STAT_TX[1:0]) 00576 * @param USBx USB peripheral instance register address. 00577 * @param bEpNum Endpoint Number. 00578 * @param wState new state 00579 * @retval None 00580 */ 00581 #define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) \ 00582 do { \ 00583 uint16_t _wRegVal; \ 00584 \ 00585 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK; \ 00586 /* toggle first bit ? */ \ 00587 if ((USB_EPRX_DTOG1 & (wState))!= 0U) \ 00588 { \ 00589 _wRegVal ^= USB_EPRX_DTOG1; \ 00590 } \ 00591 /* toggle second bit ? */ \ 00592 if ((USB_EPRX_DTOG2 & (wState))!= 0U) \ 00593 { \ 00594 _wRegVal ^= USB_EPRX_DTOG2; \ 00595 } \ 00596 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ 00597 } while(0) /* PCD_SET_EP_RX_STATUS */ 00598 00599 /** 00600 * @brief sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0]) 00601 * @param USBx USB peripheral instance register address. 00602 * @param bEpNum Endpoint Number. 00603 * @param wStaterx new state. 00604 * @param wStatetx new state. 00605 * @retval None 00606 */ 00607 #define PCD_SET_EP_TXRX_STATUS(USBx, bEpNum, wStaterx, wStatetx) \ 00608 do { \ 00609 uint16_t _wRegVal; \ 00610 \ 00611 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK | USB_EPTX_STAT); \ 00612 /* toggle first bit ? */ \ 00613 if ((USB_EPRX_DTOG1 & (wStaterx))!= 0U) \ 00614 { \ 00615 _wRegVal ^= USB_EPRX_DTOG1; \ 00616 } \ 00617 /* toggle second bit ? */ \ 00618 if ((USB_EPRX_DTOG2 & (wStaterx))!= 0U) \ 00619 { \ 00620 _wRegVal ^= USB_EPRX_DTOG2; \ 00621 } \ 00622 /* toggle first bit ? */ \ 00623 if ((USB_EPTX_DTOG1 & (wStatetx))!= 0U) \ 00624 { \ 00625 _wRegVal ^= USB_EPTX_DTOG1; \ 00626 } \ 00627 /* toggle second bit ? */ \ 00628 if ((USB_EPTX_DTOG2 & (wStatetx))!= 0U) \ 00629 { \ 00630 _wRegVal ^= USB_EPTX_DTOG2; \ 00631 } \ 00632 \ 00633 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ 00634 } while(0) /* PCD_SET_EP_TXRX_STATUS */ 00635 00636 /** 00637 * @brief gets the status for tx/rx transfer (bits STAT_TX[1:0] 00638 * /STAT_RX[1:0]) 00639 * @param USBx USB peripheral instance register address. 00640 * @param bEpNum Endpoint Number. 00641 * @retval status 00642 */ 00643 #define PCD_GET_EP_TX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT) 00644 #define PCD_GET_EP_RX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT) 00645 00646 /** 00647 * @brief sets directly the VALID tx/rx-status into the endpoint register 00648 * @param USBx USB peripheral instance register address. 00649 * @param bEpNum Endpoint Number. 00650 * @retval None 00651 */ 00652 #define PCD_SET_EP_TX_VALID(USBx, bEpNum) (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID)) 00653 #define PCD_SET_EP_RX_VALID(USBx, bEpNum) (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID)) 00654 00655 /** 00656 * @brief checks stall condition in an endpoint. 00657 * @param USBx USB peripheral instance register address. 00658 * @param bEpNum Endpoint Number. 00659 * @retval TRUE = endpoint in stall condition. 00660 */ 00661 #define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) == USB_EP_TX_STALL) 00662 #define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) == USB_EP_RX_STALL) 00663 00664 /** 00665 * @brief set & clear EP_KIND bit. 00666 * @param USBx USB peripheral instance register address. 00667 * @param bEpNum Endpoint Number. 00668 * @retval None 00669 */ 00670 #define PCD_SET_EP_KIND(USBx, bEpNum) \ 00671 do { \ 00672 uint16_t _wRegVal; \ 00673 \ 00674 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \ 00675 \ 00676 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_KIND)); \ 00677 } while(0) /* PCD_SET_EP_KIND */ 00678 00679 #define PCD_CLEAR_EP_KIND(USBx, bEpNum) \ 00680 do { \ 00681 uint16_t _wRegVal; \ 00682 \ 00683 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK; \ 00684 \ 00685 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ 00686 } while(0) /* PCD_CLEAR_EP_KIND */ 00687 00688 /** 00689 * @brief Sets/clears directly STATUS_OUT bit in the endpoint register. 00690 * @param USBx USB peripheral instance register address. 00691 * @param bEpNum Endpoint Number. 00692 * @retval None 00693 */ 00694 #define PCD_SET_OUT_STATUS(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum)) 00695 #define PCD_CLEAR_OUT_STATUS(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum)) 00696 00697 /** 00698 * @brief Sets/clears directly EP_KIND bit in the endpoint register. 00699 * @param USBx USB peripheral instance register address. 00700 * @param bEpNum Endpoint Number. 00701 * @retval None 00702 */ 00703 #define PCD_SET_EP_DBUF(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum)) 00704 #define PCD_CLEAR_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum)) 00705 00706 /** 00707 * @brief Clears bit CTR_RX / CTR_TX in the endpoint register. 00708 * @param USBx USB peripheral instance register address. 00709 * @param bEpNum Endpoint Number. 00710 * @retval None 00711 */ 00712 #define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) \ 00713 do { \ 00714 uint16_t _wRegVal; \ 00715 \ 00716 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0x7FFFU & USB_EPREG_MASK); \ 00717 \ 00718 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_TX)); \ 00719 } while(0) /* PCD_CLEAR_RX_EP_CTR */ 00720 00721 #define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) \ 00722 do { \ 00723 uint16_t _wRegVal; \ 00724 \ 00725 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0xFF7FU & USB_EPREG_MASK); \ 00726 \ 00727 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX)); \ 00728 } while(0) /* PCD_CLEAR_TX_EP_CTR */ 00729 00730 /** 00731 * @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register. 00732 * @param USBx USB peripheral instance register address. 00733 * @param bEpNum Endpoint Number. 00734 * @retval None 00735 */ 00736 #define PCD_RX_DTOG(USBx, bEpNum) \ 00737 do { \ 00738 uint16_t _wEPVal; \ 00739 \ 00740 _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \ 00741 \ 00742 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_RX)); \ 00743 } while(0) /* PCD_RX_DTOG */ 00744 00745 #define PCD_TX_DTOG(USBx, bEpNum) \ 00746 do { \ 00747 uint16_t _wEPVal; \ 00748 \ 00749 _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \ 00750 \ 00751 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_TX)); \ 00752 } while(0) /* PCD_TX_DTOG */ 00753 /** 00754 * @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register. 00755 * @param USBx USB peripheral instance register address. 00756 * @param bEpNum Endpoint Number. 00757 * @retval None 00758 */ 00759 #define PCD_CLEAR_RX_DTOG(USBx, bEpNum) \ 00760 do { \ 00761 uint16_t _wRegVal; \ 00762 \ 00763 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \ 00764 \ 00765 if ((_wRegVal & USB_EP_DTOG_RX) != 0U)\ 00766 { \ 00767 PCD_RX_DTOG((USBx), (bEpNum)); \ 00768 } \ 00769 } while(0) /* PCD_CLEAR_RX_DTOG */ 00770 00771 #define PCD_CLEAR_TX_DTOG(USBx, bEpNum) \ 00772 do { \ 00773 uint16_t _wRegVal; \ 00774 \ 00775 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \ 00776 \ 00777 if ((_wRegVal & USB_EP_DTOG_TX) != 0U)\ 00778 { \ 00779 PCD_TX_DTOG((USBx), (bEpNum)); \ 00780 } \ 00781 } while(0) /* PCD_CLEAR_TX_DTOG */ 00782 00783 /** 00784 * @brief Sets address in an endpoint register. 00785 * @param USBx USB peripheral instance register address. 00786 * @param bEpNum Endpoint Number. 00787 * @param bAddr Address. 00788 * @retval None 00789 */ 00790 #define PCD_SET_EP_ADDRESS(USBx, bEpNum, bAddr) \ 00791 do { \ 00792 uint16_t _wRegVal; \ 00793 \ 00794 _wRegVal = (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr); \ 00795 \ 00796 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ 00797 } while(0) /* PCD_SET_EP_ADDRESS */ 00798 00799 /** 00800 * @brief Gets address in an endpoint register. 00801 * @param USBx USB peripheral instance register address. 00802 * @param bEpNum Endpoint Number. 00803 * @retval None 00804 */ 00805 #define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD)) 00806 00807 #define PCD_EP_TX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE\ 00808 + ((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U))) 00809 00810 #define PCD_EP_RX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE\ 00811 + ((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U))) 00812 00813 00814 /** 00815 * @brief sets address of the tx/rx buffer. 00816 * @param USBx USB peripheral instance register address. 00817 * @param bEpNum Endpoint Number. 00818 * @param wAddr address to be set (must be word aligned). 00819 * @retval None 00820 */ 00821 #define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum, wAddr) \ 00822 do { \ 00823 __IO uint16_t *_wRegVal; \ 00824 uint32_t _wRegBase = (uint32_t)USBx; \ 00825 \ 00826 _wRegBase += (uint32_t)(USBx)->BTABLE; \ 00827 _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + (((uint32_t)(bEpNum) * 8U) * PMA_ACCESS)); \ 00828 *_wRegVal = ((wAddr) >> 1) << 1; \ 00829 } while(0) /* PCD_SET_EP_TX_ADDRESS */ 00830 00831 #define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum, wAddr) \ 00832 do { \ 00833 __IO uint16_t *_wRegVal; \ 00834 uint32_t _wRegBase = (uint32_t)USBx; \ 00835 \ 00836 _wRegBase += (uint32_t)(USBx)->BTABLE; \ 00837 _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 4U) * PMA_ACCESS)); \ 00838 *_wRegVal = ((wAddr) >> 1) << 1; \ 00839 } while(0) /* PCD_SET_EP_RX_ADDRESS */ 00840 00841 /** 00842 * @brief Gets address of the tx/rx buffer. 00843 * @param USBx USB peripheral instance register address. 00844 * @param bEpNum Endpoint Number. 00845 * @retval address of the buffer. 00846 */ 00847 #define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum))) 00848 #define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum))) 00849 00850 /** 00851 * @brief Sets counter of rx buffer with no. of blocks. 00852 * @param pdwReg Register pointer 00853 * @param wCount Counter. 00854 * @param wNBlocks no. of Blocks. 00855 * @retval None 00856 */ 00857 #define PCD_CALC_BLK32(pdwReg, wCount, wNBlocks) \ 00858 do { \ 00859 (wNBlocks) = (wCount) >> 5; \ 00860 if (((wCount) & 0x1fU) == 0U) \ 00861 { \ 00862 (wNBlocks)--; \ 00863 } \ 00864 *(pdwReg) = (uint16_t)(((wNBlocks) << 10) | USB_CNTRX_BLSIZE); \ 00865 } while(0) /* PCD_CALC_BLK32 */ 00866 00867 #define PCD_CALC_BLK2(pdwReg, wCount, wNBlocks) \ 00868 do { \ 00869 (wNBlocks) = (wCount) >> 1; \ 00870 if (((wCount) & 0x1U) != 0U) \ 00871 { \ 00872 (wNBlocks)++; \ 00873 } \ 00874 *(pdwReg) = (uint16_t)((wNBlocks) << 10); \ 00875 } while(0) /* PCD_CALC_BLK2 */ 00876 00877 #define PCD_SET_EP_CNT_RX_REG(pdwReg, wCount) \ 00878 do { \ 00879 uint32_t wNBlocks; \ 00880 if ((wCount) == 0U) \ 00881 { \ 00882 *(pdwReg) &= (uint16_t)~USB_CNTRX_NBLK_MSK; \ 00883 *(pdwReg) |= USB_CNTRX_BLSIZE; \ 00884 } \ 00885 else if((wCount) <= 62U) \ 00886 { \ 00887 PCD_CALC_BLK2((pdwReg), (wCount), wNBlocks); \ 00888 } \ 00889 else \ 00890 { \ 00891 PCD_CALC_BLK32((pdwReg), (wCount), wNBlocks); \ 00892 } \ 00893 } while(0) /* PCD_SET_EP_CNT_RX_REG */ 00894 00895 #define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum, wCount) \ 00896 do { \ 00897 uint32_t _wRegBase = (uint32_t)(USBx); \ 00898 __IO uint16_t *pdwReg; \ 00899 \ 00900 _wRegBase += (uint32_t)(USBx)->BTABLE; \ 00901 pdwReg = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \ 00902 PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount)); \ 00903 } while(0) 00904 00905 /** 00906 * @brief sets counter for the tx/rx buffer. 00907 * @param USBx USB peripheral instance register address. 00908 * @param bEpNum Endpoint Number. 00909 * @param wCount Counter value. 00910 * @retval None 00911 */ 00912 #define PCD_SET_EP_TX_CNT(USBx, bEpNum, wCount) \ 00913 do { \ 00914 uint32_t _wRegBase = (uint32_t)(USBx); \ 00915 __IO uint16_t *_wRegVal; \ 00916 \ 00917 _wRegBase += (uint32_t)(USBx)->BTABLE; \ 00918 _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \ 00919 *_wRegVal = (uint16_t)(wCount); \ 00920 } while(0) 00921 00922 #define PCD_SET_EP_RX_CNT(USBx, bEpNum, wCount) \ 00923 do { \ 00924 uint32_t _wRegBase = (uint32_t)(USBx); \ 00925 __IO uint16_t *_wRegVal; \ 00926 \ 00927 _wRegBase += (uint32_t)(USBx)->BTABLE; \ 00928 _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \ 00929 PCD_SET_EP_CNT_RX_REG(_wRegVal, (wCount)); \ 00930 } while(0) 00931 00932 /** 00933 * @brief gets counter of the tx buffer. 00934 * @param USBx USB peripheral instance register address. 00935 * @param bEpNum Endpoint Number. 00936 * @retval Counter value 00937 */ 00938 #define PCD_GET_EP_TX_CNT(USBx, bEpNum) ((uint32_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ffU) 00939 #define PCD_GET_EP_RX_CNT(USBx, bEpNum) ((uint32_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ffU) 00940 00941 /** 00942 * @brief Sets buffer 0/1 address in a double buffer endpoint. 00943 * @param USBx USB peripheral instance register address. 00944 * @param bEpNum Endpoint Number. 00945 * @param wBuf0Addr buffer 0 address. 00946 * @retval Counter value 00947 */ 00948 #define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum, wBuf0Addr) \ 00949 do { \ 00950 PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr)); \ 00951 } while(0) /* PCD_SET_EP_DBUF0_ADDR */ 00952 00953 #define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum, wBuf1Addr) \ 00954 do { \ 00955 PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr)); \ 00956 } while(0) /* PCD_SET_EP_DBUF1_ADDR */ 00957 00958 /** 00959 * @brief Sets addresses in a double buffer endpoint. 00960 * @param USBx USB peripheral instance register address. 00961 * @param bEpNum Endpoint Number. 00962 * @param wBuf0Addr: buffer 0 address. 00963 * @param wBuf1Addr = buffer 1 address. 00964 * @retval None 00965 */ 00966 #define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum, wBuf0Addr, wBuf1Addr) \ 00967 do { \ 00968 PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr)); \ 00969 PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr)); \ 00970 } while(0) /* PCD_SET_EP_DBUF_ADDR */ 00971 00972 /** 00973 * @brief Gets buffer 0/1 address of a double buffer endpoint. 00974 * @param USBx USB peripheral instance register address. 00975 * @param bEpNum Endpoint Number. 00976 * @retval None 00977 */ 00978 #define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum) (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum))) 00979 #define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum) (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum))) 00980 00981 /** 00982 * @brief Gets buffer 0/1 address of a double buffer endpoint. 00983 * @param USBx USB peripheral instance register address. 00984 * @param bEpNum Endpoint Number. 00985 * @param bDir endpoint dir EP_DBUF_OUT = OUT 00986 * EP_DBUF_IN = IN 00987 * @param wCount: Counter value 00988 * @retval None 00989 */ 00990 #define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) \ 00991 do { \ 00992 if ((bDir) == 0U) \ 00993 /* OUT endpoint */ \ 00994 { \ 00995 PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum), (wCount)); \ 00996 } \ 00997 else \ 00998 { \ 00999 if ((bDir) == 1U) \ 01000 { \ 01001 /* IN endpoint */ \ 01002 PCD_SET_EP_TX_CNT((USBx), (bEpNum), (wCount)); \ 01003 } \ 01004 } \ 01005 } while(0) /* SetEPDblBuf0Count*/ 01006 01007 #define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) \ 01008 do { \ 01009 uint32_t _wBase = (uint32_t)(USBx); \ 01010 __IO uint16_t *_wEPRegVal; \ 01011 \ 01012 if ((bDir) == 0U) \ 01013 { \ 01014 /* OUT endpoint */ \ 01015 PCD_SET_EP_RX_CNT((USBx), (bEpNum), (wCount)); \ 01016 } \ 01017 else \ 01018 { \ 01019 if ((bDir) == 1U) \ 01020 { \ 01021 /* IN endpoint */ \ 01022 _wBase += (uint32_t)(USBx)->BTABLE; \ 01023 _wEPRegVal = (__IO uint16_t *)(_wBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \ 01024 *_wEPRegVal = (uint16_t)(wCount); \ 01025 } \ 01026 } \ 01027 } while(0) /* SetEPDblBuf1Count */ 01028 01029 #define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) \ 01030 do { \ 01031 PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \ 01032 PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \ 01033 } while(0) /* PCD_SET_EP_DBUF_CNT */ 01034 01035 /** 01036 * @brief Gets buffer 0/1 rx/tx counter for double buffering. 01037 * @param USBx USB peripheral instance register address. 01038 * @param bEpNum Endpoint Number. 01039 * @retval None 01040 */ 01041 #define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum) (PCD_GET_EP_TX_CNT((USBx), (bEpNum))) 01042 #define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum) (PCD_GET_EP_RX_CNT((USBx), (bEpNum))) 01043 01044 #endif /* defined (USB) */ 01045 01046 /** 01047 * @} 01048 */ 01049 01050 /** 01051 * @} 01052 */ 01053 01054 /** 01055 * @} 01056 */ 01057 #endif /* defined (USB) || defined (USB_OTG_FS) */ 01058 01059 #ifdef __cplusplus 01060 } 01061 #endif 01062 01063 #endif /* STM32F1xx_HAL_PCD_H */ 01064 01065 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
1.7.6.1