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STM32F103xB HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32f1xx_hal_spi.h 00004 * @author MCD Application Team 00005 * @brief Header file of SPI HAL module. 00006 ****************************************************************************** 00007 * @attention 00008 * 00009 * <h2><center>© Copyright (c) 2016 STMicroelectronics. 00010 * All rights reserved.</center></h2> 00011 * 00012 * This software component is licensed by ST under BSD 3-Clause license, 00013 * the "License"; You may not use this file except in compliance with the 00014 * License. You may obtain a copy of the License at: 00015 * opensource.org/licenses/BSD-3-Clause 00016 * 00017 ****************************************************************************** 00018 */ 00019 00020 /* Define to prevent recursive inclusion -------------------------------------*/ 00021 #ifndef STM32F1xx_HAL_SPI_H 00022 #define STM32F1xx_HAL_SPI_H 00023 00024 #ifdef __cplusplus 00025 extern "C" { 00026 #endif 00027 00028 /* Includes ------------------------------------------------------------------*/ 00029 #include "stm32f1xx_hal_def.h" 00030 00031 /** @addtogroup STM32F1xx_HAL_Driver 00032 * @{ 00033 */ 00034 00035 /** @addtogroup SPI 00036 * @{ 00037 */ 00038 00039 /* Exported types ------------------------------------------------------------*/ 00040 /** @defgroup SPI_Exported_Types SPI Exported Types 00041 * @{ 00042 */ 00043 00044 /** 00045 * @brief SPI Configuration Structure definition 00046 */ 00047 typedef struct 00048 { 00049 uint32_t Mode; /*!< Specifies the SPI operating mode. 00050 This parameter can be a value of @ref SPI_Mode */ 00051 00052 uint32_t Direction; /*!< Specifies the SPI bidirectional mode state. 00053 This parameter can be a value of @ref SPI_Direction */ 00054 00055 uint32_t DataSize; /*!< Specifies the SPI data size. 00056 This parameter can be a value of @ref SPI_Data_Size */ 00057 00058 uint32_t CLKPolarity; /*!< Specifies the serial clock steady state. 00059 This parameter can be a value of @ref SPI_Clock_Polarity */ 00060 00061 uint32_t CLKPhase; /*!< Specifies the clock active edge for the bit capture. 00062 This parameter can be a value of @ref SPI_Clock_Phase */ 00063 00064 uint32_t NSS; /*!< Specifies whether the NSS signal is managed by 00065 hardware (NSS pin) or by software using the SSI bit. 00066 This parameter can be a value of @ref SPI_Slave_Select_management */ 00067 00068 uint32_t BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be 00069 used to configure the transmit and receive SCK clock. 00070 This parameter can be a value of @ref SPI_BaudRate_Prescaler 00071 @note The communication clock is derived from the master 00072 clock. The slave clock does not need to be set. */ 00073 00074 uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit. 00075 This parameter can be a value of @ref SPI_MSB_LSB_transmission */ 00076 00077 uint32_t TIMode; /*!< Specifies if the TI mode is enabled or not. 00078 This parameter can be a value of @ref SPI_TI_mode */ 00079 00080 uint32_t CRCCalculation; /*!< Specifies if the CRC calculation is enabled or not. 00081 This parameter can be a value of @ref SPI_CRC_Calculation */ 00082 00083 uint32_t CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation. 00084 This parameter must be an odd number between Min_Data = 1 and Max_Data = 65535 */ 00085 } SPI_InitTypeDef; 00086 00087 /** 00088 * @brief HAL SPI State structure definition 00089 */ 00090 typedef enum 00091 { 00092 HAL_SPI_STATE_RESET = 0x00U, /*!< Peripheral not Initialized */ 00093 HAL_SPI_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */ 00094 HAL_SPI_STATE_BUSY = 0x02U, /*!< an internal process is ongoing */ 00095 HAL_SPI_STATE_BUSY_TX = 0x03U, /*!< Data Transmission process is ongoing */ 00096 HAL_SPI_STATE_BUSY_RX = 0x04U, /*!< Data Reception process is ongoing */ 00097 HAL_SPI_STATE_BUSY_TX_RX = 0x05U, /*!< Data Transmission and Reception process is ongoing */ 00098 HAL_SPI_STATE_ERROR = 0x06U, /*!< SPI error state */ 00099 HAL_SPI_STATE_ABORT = 0x07U /*!< SPI abort is ongoing */ 00100 } HAL_SPI_StateTypeDef; 00101 00102 /** 00103 * @brief SPI handle Structure definition 00104 */ 00105 typedef struct __SPI_HandleTypeDef 00106 { 00107 SPI_TypeDef *Instance; /*!< SPI registers base address */ 00108 00109 SPI_InitTypeDef Init; /*!< SPI communication parameters */ 00110 00111 uint8_t *pTxBuffPtr; /*!< Pointer to SPI Tx transfer Buffer */ 00112 00113 uint16_t TxXferSize; /*!< SPI Tx Transfer size */ 00114 00115 __IO uint16_t TxXferCount; /*!< SPI Tx Transfer Counter */ 00116 00117 uint8_t *pRxBuffPtr; /*!< Pointer to SPI Rx transfer Buffer */ 00118 00119 uint16_t RxXferSize; /*!< SPI Rx Transfer size */ 00120 00121 __IO uint16_t RxXferCount; /*!< SPI Rx Transfer Counter */ 00122 00123 void (*RxISR)(struct __SPI_HandleTypeDef *hspi); /*!< function pointer on Rx ISR */ 00124 00125 void (*TxISR)(struct __SPI_HandleTypeDef *hspi); /*!< function pointer on Tx ISR */ 00126 00127 DMA_HandleTypeDef *hdmatx; /*!< SPI Tx DMA Handle parameters */ 00128 00129 DMA_HandleTypeDef *hdmarx; /*!< SPI Rx DMA Handle parameters */ 00130 00131 HAL_LockTypeDef Lock; /*!< Locking object */ 00132 00133 __IO HAL_SPI_StateTypeDef State; /*!< SPI communication state */ 00134 00135 __IO uint32_t ErrorCode; /*!< SPI Error code */ 00136 00137 #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) 00138 void (* TxCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Tx Completed callback */ 00139 void (* RxCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Rx Completed callback */ 00140 void (* TxRxCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI TxRx Completed callback */ 00141 void (* TxHalfCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Tx Half Completed callback */ 00142 void (* RxHalfCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Rx Half Completed callback */ 00143 void (* TxRxHalfCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI TxRx Half Completed callback */ 00144 void (* ErrorCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Error callback */ 00145 void (* AbortCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Abort callback */ 00146 void (* MspInitCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Msp Init callback */ 00147 void (* MspDeInitCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Msp DeInit callback */ 00148 00149 #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ 00150 } SPI_HandleTypeDef; 00151 00152 #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) 00153 /** 00154 * @brief HAL SPI Callback ID enumeration definition 00155 */ 00156 typedef enum 00157 { 00158 HAL_SPI_TX_COMPLETE_CB_ID = 0x00U, /*!< SPI Tx Completed callback ID */ 00159 HAL_SPI_RX_COMPLETE_CB_ID = 0x01U, /*!< SPI Rx Completed callback ID */ 00160 HAL_SPI_TX_RX_COMPLETE_CB_ID = 0x02U, /*!< SPI TxRx Completed callback ID */ 00161 HAL_SPI_TX_HALF_COMPLETE_CB_ID = 0x03U, /*!< SPI Tx Half Completed callback ID */ 00162 HAL_SPI_RX_HALF_COMPLETE_CB_ID = 0x04U, /*!< SPI Rx Half Completed callback ID */ 00163 HAL_SPI_TX_RX_HALF_COMPLETE_CB_ID = 0x05U, /*!< SPI TxRx Half Completed callback ID */ 00164 HAL_SPI_ERROR_CB_ID = 0x06U, /*!< SPI Error callback ID */ 00165 HAL_SPI_ABORT_CB_ID = 0x07U, /*!< SPI Abort callback ID */ 00166 HAL_SPI_MSPINIT_CB_ID = 0x08U, /*!< SPI Msp Init callback ID */ 00167 HAL_SPI_MSPDEINIT_CB_ID = 0x09U /*!< SPI Msp DeInit callback ID */ 00168 00169 } HAL_SPI_CallbackIDTypeDef; 00170 00171 /** 00172 * @brief HAL SPI Callback pointer definition 00173 */ 00174 typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to an SPI callback function */ 00175 00176 #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ 00177 /** 00178 * @} 00179 */ 00180 00181 /* Exported constants --------------------------------------------------------*/ 00182 /** @defgroup SPI_Exported_Constants SPI Exported Constants 00183 * @{ 00184 */ 00185 00186 /** @defgroup SPI_Error_Code SPI Error Code 00187 * @{ 00188 */ 00189 #define HAL_SPI_ERROR_NONE (0x00000000U) /*!< No error */ 00190 #define HAL_SPI_ERROR_MODF (0x00000001U) /*!< MODF error */ 00191 #define HAL_SPI_ERROR_CRC (0x00000002U) /*!< CRC error */ 00192 #define HAL_SPI_ERROR_OVR (0x00000004U) /*!< OVR error */ 00193 #define HAL_SPI_ERROR_DMA (0x00000010U) /*!< DMA transfer error */ 00194 #define HAL_SPI_ERROR_FLAG (0x00000020U) /*!< Error on RXNE/TXE/BSY Flag */ 00195 #define HAL_SPI_ERROR_ABORT (0x00000040U) /*!< Error during SPI Abort procedure */ 00196 #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) 00197 #define HAL_SPI_ERROR_INVALID_CALLBACK (0x00000080U) /*!< Invalid Callback error */ 00198 #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ 00199 /** 00200 * @} 00201 */ 00202 00203 /** @defgroup SPI_Mode SPI Mode 00204 * @{ 00205 */ 00206 #define SPI_MODE_SLAVE (0x00000000U) 00207 #define SPI_MODE_MASTER (SPI_CR1_MSTR | SPI_CR1_SSI) 00208 /** 00209 * @} 00210 */ 00211 00212 /** @defgroup SPI_Direction SPI Direction Mode 00213 * @{ 00214 */ 00215 #define SPI_DIRECTION_2LINES (0x00000000U) 00216 #define SPI_DIRECTION_2LINES_RXONLY SPI_CR1_RXONLY 00217 #define SPI_DIRECTION_1LINE SPI_CR1_BIDIMODE 00218 /** 00219 * @} 00220 */ 00221 00222 /** @defgroup SPI_Data_Size SPI Data Size 00223 * @{ 00224 */ 00225 #define SPI_DATASIZE_8BIT (0x00000000U) 00226 #define SPI_DATASIZE_16BIT SPI_CR1_DFF 00227 /** 00228 * @} 00229 */ 00230 00231 /** @defgroup SPI_Clock_Polarity SPI Clock Polarity 00232 * @{ 00233 */ 00234 #define SPI_POLARITY_LOW (0x00000000U) 00235 #define SPI_POLARITY_HIGH SPI_CR1_CPOL 00236 /** 00237 * @} 00238 */ 00239 00240 /** @defgroup SPI_Clock_Phase SPI Clock Phase 00241 * @{ 00242 */ 00243 #define SPI_PHASE_1EDGE (0x00000000U) 00244 #define SPI_PHASE_2EDGE SPI_CR1_CPHA 00245 /** 00246 * @} 00247 */ 00248 00249 /** @defgroup SPI_Slave_Select_management SPI Slave Select Management 00250 * @{ 00251 */ 00252 #define SPI_NSS_SOFT SPI_CR1_SSM 00253 #define SPI_NSS_HARD_INPUT (0x00000000U) 00254 #define SPI_NSS_HARD_OUTPUT (SPI_CR2_SSOE << 16U) 00255 /** 00256 * @} 00257 */ 00258 00259 /** @defgroup SPI_BaudRate_Prescaler SPI BaudRate Prescaler 00260 * @{ 00261 */ 00262 #define SPI_BAUDRATEPRESCALER_2 (0x00000000U) 00263 #define SPI_BAUDRATEPRESCALER_4 (SPI_CR1_BR_0) 00264 #define SPI_BAUDRATEPRESCALER_8 (SPI_CR1_BR_1) 00265 #define SPI_BAUDRATEPRESCALER_16 (SPI_CR1_BR_1 | SPI_CR1_BR_0) 00266 #define SPI_BAUDRATEPRESCALER_32 (SPI_CR1_BR_2) 00267 #define SPI_BAUDRATEPRESCALER_64 (SPI_CR1_BR_2 | SPI_CR1_BR_0) 00268 #define SPI_BAUDRATEPRESCALER_128 (SPI_CR1_BR_2 | SPI_CR1_BR_1) 00269 #define SPI_BAUDRATEPRESCALER_256 (SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0) 00270 /** 00271 * @} 00272 */ 00273 00274 /** @defgroup SPI_MSB_LSB_transmission SPI MSB LSB Transmission 00275 * @{ 00276 */ 00277 #define SPI_FIRSTBIT_MSB (0x00000000U) 00278 #define SPI_FIRSTBIT_LSB SPI_CR1_LSBFIRST 00279 /** 00280 * @} 00281 */ 00282 00283 /** @defgroup SPI_TI_mode SPI TI Mode 00284 * @{ 00285 */ 00286 #define SPI_TIMODE_DISABLE (0x00000000U) 00287 /** 00288 * @} 00289 */ 00290 00291 /** @defgroup SPI_CRC_Calculation SPI CRC Calculation 00292 * @{ 00293 */ 00294 #define SPI_CRCCALCULATION_DISABLE (0x00000000U) 00295 #define SPI_CRCCALCULATION_ENABLE SPI_CR1_CRCEN 00296 /** 00297 * @} 00298 */ 00299 00300 /** @defgroup SPI_Interrupt_definition SPI Interrupt Definition 00301 * @{ 00302 */ 00303 #define SPI_IT_TXE SPI_CR2_TXEIE 00304 #define SPI_IT_RXNE SPI_CR2_RXNEIE 00305 #define SPI_IT_ERR SPI_CR2_ERRIE 00306 /** 00307 * @} 00308 */ 00309 00310 /** @defgroup SPI_Flags_definition SPI Flags Definition 00311 * @{ 00312 */ 00313 #define SPI_FLAG_RXNE SPI_SR_RXNE /* SPI status flag: Rx buffer not empty flag */ 00314 #define SPI_FLAG_TXE SPI_SR_TXE /* SPI status flag: Tx buffer empty flag */ 00315 #define SPI_FLAG_BSY SPI_SR_BSY /* SPI status flag: Busy flag */ 00316 #define SPI_FLAG_CRCERR SPI_SR_CRCERR /* SPI Error flag: CRC error flag */ 00317 #define SPI_FLAG_MODF SPI_SR_MODF /* SPI Error flag: Mode fault flag */ 00318 #define SPI_FLAG_OVR SPI_SR_OVR /* SPI Error flag: Overrun flag */ 00319 #define SPI_FLAG_MASK (SPI_SR_RXNE | SPI_SR_TXE | SPI_SR_BSY\ 00320 | SPI_SR_CRCERR | SPI_SR_MODF | SPI_SR_OVR) 00321 /** 00322 * @} 00323 */ 00324 00325 /** 00326 * @} 00327 */ 00328 00329 /* Exported macros -----------------------------------------------------------*/ 00330 /** @defgroup SPI_Exported_Macros SPI Exported Macros 00331 * @{ 00332 */ 00333 00334 /** @brief Reset SPI handle state. 00335 * @param __HANDLE__ specifies the SPI Handle. 00336 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 00337 * @retval None 00338 */ 00339 #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) 00340 #define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) do{ \ 00341 (__HANDLE__)->State = HAL_SPI_STATE_RESET; \ 00342 (__HANDLE__)->MspInitCallback = NULL; \ 00343 (__HANDLE__)->MspDeInitCallback = NULL; \ 00344 } while(0) 00345 #else 00346 #define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPI_STATE_RESET) 00347 #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ 00348 00349 /** @brief Enable the specified SPI interrupts. 00350 * @param __HANDLE__ specifies the SPI Handle. 00351 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 00352 * @param __INTERRUPT__ specifies the interrupt source to enable. 00353 * This parameter can be one of the following values: 00354 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable 00355 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable 00356 * @arg SPI_IT_ERR: Error interrupt enable 00357 * @retval None 00358 */ 00359 #define __HAL_SPI_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__)) 00360 00361 /** @brief Disable the specified SPI interrupts. 00362 * @param __HANDLE__ specifies the SPI handle. 00363 * This parameter can be SPIx where x: 1, 2, or 3 to select the SPI peripheral. 00364 * @param __INTERRUPT__ specifies the interrupt source to disable. 00365 * This parameter can be one of the following values: 00366 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable 00367 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable 00368 * @arg SPI_IT_ERR: Error interrupt enable 00369 * @retval None 00370 */ 00371 #define __HAL_SPI_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__)) 00372 00373 /** @brief Check whether the specified SPI interrupt source is enabled or not. 00374 * @param __HANDLE__ specifies the SPI Handle. 00375 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 00376 * @param __INTERRUPT__ specifies the SPI interrupt source to check. 00377 * This parameter can be one of the following values: 00378 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable 00379 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable 00380 * @arg SPI_IT_ERR: Error interrupt enable 00381 * @retval The new state of __IT__ (TRUE or FALSE). 00382 */ 00383 #define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2\ 00384 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 00385 00386 /** @brief Check whether the specified SPI flag is set or not. 00387 * @param __HANDLE__ specifies the SPI Handle. 00388 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 00389 * @param __FLAG__ specifies the flag to check. 00390 * This parameter can be one of the following values: 00391 * @arg SPI_FLAG_RXNE: Receive buffer not empty flag 00392 * @arg SPI_FLAG_TXE: Transmit buffer empty flag 00393 * @arg SPI_FLAG_CRCERR: CRC error flag 00394 * @arg SPI_FLAG_MODF: Mode fault flag 00395 * @arg SPI_FLAG_OVR: Overrun flag 00396 * @arg SPI_FLAG_BSY: Busy flag 00397 * @retval The new state of __FLAG__ (TRUE or FALSE). 00398 */ 00399 #define __HAL_SPI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) 00400 00401 /** @brief Clear the SPI CRCERR pending flag. 00402 * @param __HANDLE__ specifies the SPI Handle. 00403 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 00404 * @retval None 00405 */ 00406 #define __HAL_SPI_CLEAR_CRCERRFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR = (uint16_t)(~SPI_FLAG_CRCERR)) 00407 00408 /** @brief Clear the SPI MODF pending flag. 00409 * @param __HANDLE__ specifies the SPI Handle. 00410 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 00411 * @retval None 00412 */ 00413 #define __HAL_SPI_CLEAR_MODFFLAG(__HANDLE__) \ 00414 do{ \ 00415 __IO uint32_t tmpreg_modf = 0x00U; \ 00416 tmpreg_modf = (__HANDLE__)->Instance->SR; \ 00417 CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE); \ 00418 UNUSED(tmpreg_modf); \ 00419 } while(0U) 00420 00421 /** @brief Clear the SPI OVR pending flag. 00422 * @param __HANDLE__ specifies the SPI Handle. 00423 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 00424 * @retval None 00425 */ 00426 #define __HAL_SPI_CLEAR_OVRFLAG(__HANDLE__) \ 00427 do{ \ 00428 __IO uint32_t tmpreg_ovr = 0x00U; \ 00429 tmpreg_ovr = (__HANDLE__)->Instance->DR; \ 00430 tmpreg_ovr = (__HANDLE__)->Instance->SR; \ 00431 UNUSED(tmpreg_ovr); \ 00432 } while(0U) 00433 00434 /** @brief Enable the SPI peripheral. 00435 * @param __HANDLE__ specifies the SPI Handle. 00436 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 00437 * @retval None 00438 */ 00439 #define __HAL_SPI_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE) 00440 00441 /** @brief Disable the SPI peripheral. 00442 * @param __HANDLE__ specifies the SPI Handle. 00443 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 00444 * @retval None 00445 */ 00446 #define __HAL_SPI_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE) 00447 00448 /** 00449 * @} 00450 */ 00451 00452 /* Private constants ---------------------------------------------------------*/ 00453 /** @defgroup SPI_Private_Constants SPI Private Constants 00454 * @{ 00455 */ 00456 #define SPI_INVALID_CRC_ERROR 0U /* CRC error wrongly detected */ 00457 #define SPI_VALID_CRC_ERROR 1U /* CRC error is true */ 00458 /** 00459 * @} 00460 */ 00461 00462 /* Private macros ------------------------------------------------------------*/ 00463 /** @defgroup SPI_Private_Macros SPI Private Macros 00464 * @{ 00465 */ 00466 00467 /** @brief Set the SPI transmit-only mode. 00468 * @param __HANDLE__ specifies the SPI Handle. 00469 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 00470 * @retval None 00471 */ 00472 #define SPI_1LINE_TX(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_BIDIOE) 00473 00474 /** @brief Set the SPI receive-only mode. 00475 * @param __HANDLE__ specifies the SPI Handle. 00476 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 00477 * @retval None 00478 */ 00479 #define SPI_1LINE_RX(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_BIDIOE) 00480 00481 /** @brief Reset the CRC calculation of the SPI. 00482 * @param __HANDLE__ specifies the SPI Handle. 00483 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 00484 * @retval None 00485 */ 00486 #define SPI_RESET_CRC(__HANDLE__) do{CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN);\ 00487 SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN);}while(0U) 00488 00489 /** @brief Check whether the specified SPI flag is set or not. 00490 * @param __SR__ copy of SPI SR register. 00491 * @param __FLAG__ specifies the flag to check. 00492 * This parameter can be one of the following values: 00493 * @arg SPI_FLAG_RXNE: Receive buffer not empty flag 00494 * @arg SPI_FLAG_TXE: Transmit buffer empty flag 00495 * @arg SPI_FLAG_CRCERR: CRC error flag 00496 * @arg SPI_FLAG_MODF: Mode fault flag 00497 * @arg SPI_FLAG_OVR: Overrun flag 00498 * @arg SPI_FLAG_BSY: Busy flag 00499 * @retval SET or RESET. 00500 */ 00501 #define SPI_CHECK_FLAG(__SR__, __FLAG__) ((((__SR__) & ((__FLAG__) & SPI_FLAG_MASK)) == \ 00502 ((__FLAG__) & SPI_FLAG_MASK)) ? SET : RESET) 00503 00504 /** @brief Check whether the specified SPI Interrupt is set or not. 00505 * @param __CR2__ copy of SPI CR2 register. 00506 * @param __INTERRUPT__ specifies the SPI interrupt source to check. 00507 * This parameter can be one of the following values: 00508 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable 00509 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable 00510 * @arg SPI_IT_ERR: Error interrupt enable 00511 * @retval SET or RESET. 00512 */ 00513 #define SPI_CHECK_IT_SOURCE(__CR2__, __INTERRUPT__) ((((__CR2__) & (__INTERRUPT__)) == \ 00514 (__INTERRUPT__)) ? SET : RESET) 00515 00516 /** @brief Checks if SPI Mode parameter is in allowed range. 00517 * @param __MODE__ specifies the SPI Mode. 00518 * This parameter can be a value of @ref SPI_Mode 00519 * @retval None 00520 */ 00521 #define IS_SPI_MODE(__MODE__) (((__MODE__) == SPI_MODE_SLAVE) || \ 00522 ((__MODE__) == SPI_MODE_MASTER)) 00523 00524 /** @brief Checks if SPI Direction Mode parameter is in allowed range. 00525 * @param __MODE__ specifies the SPI Direction Mode. 00526 * This parameter can be a value of @ref SPI_Direction 00527 * @retval None 00528 */ 00529 #define IS_SPI_DIRECTION(__MODE__) (((__MODE__) == SPI_DIRECTION_2LINES) || \ 00530 ((__MODE__) == SPI_DIRECTION_2LINES_RXONLY) || \ 00531 ((__MODE__) == SPI_DIRECTION_1LINE)) 00532 00533 /** @brief Checks if SPI Direction Mode parameter is 2 lines. 00534 * @param __MODE__ specifies the SPI Direction Mode. 00535 * @retval None 00536 */ 00537 #define IS_SPI_DIRECTION_2LINES(__MODE__) ((__MODE__) == SPI_DIRECTION_2LINES) 00538 00539 /** @brief Checks if SPI Direction Mode parameter is 1 or 2 lines. 00540 * @param __MODE__ specifies the SPI Direction Mode. 00541 * @retval None 00542 */ 00543 #define IS_SPI_DIRECTION_2LINES_OR_1LINE(__MODE__) (((__MODE__) == SPI_DIRECTION_2LINES) || \ 00544 ((__MODE__) == SPI_DIRECTION_1LINE)) 00545 00546 /** @brief Checks if SPI Data Size parameter is in allowed range. 00547 * @param __DATASIZE__ specifies the SPI Data Size. 00548 * This parameter can be a value of @ref SPI_Data_Size 00549 * @retval None 00550 */ 00551 #define IS_SPI_DATASIZE(__DATASIZE__) (((__DATASIZE__) == SPI_DATASIZE_16BIT) || \ 00552 ((__DATASIZE__) == SPI_DATASIZE_8BIT)) 00553 00554 /** @brief Checks if SPI Serial clock steady state parameter is in allowed range. 00555 * @param __CPOL__ specifies the SPI serial clock steady state. 00556 * This parameter can be a value of @ref SPI_Clock_Polarity 00557 * @retval None 00558 */ 00559 #define IS_SPI_CPOL(__CPOL__) (((__CPOL__) == SPI_POLARITY_LOW) || \ 00560 ((__CPOL__) == SPI_POLARITY_HIGH)) 00561 00562 /** @brief Checks if SPI Clock Phase parameter is in allowed range. 00563 * @param __CPHA__ specifies the SPI Clock Phase. 00564 * This parameter can be a value of @ref SPI_Clock_Phase 00565 * @retval None 00566 */ 00567 #define IS_SPI_CPHA(__CPHA__) (((__CPHA__) == SPI_PHASE_1EDGE) || \ 00568 ((__CPHA__) == SPI_PHASE_2EDGE)) 00569 00570 /** @brief Checks if SPI Slave Select parameter is in allowed range. 00571 * @param __NSS__ specifies the SPI Slave Select management parameter. 00572 * This parameter can be a value of @ref SPI_Slave_Select_management 00573 * @retval None 00574 */ 00575 #define IS_SPI_NSS(__NSS__) (((__NSS__) == SPI_NSS_SOFT) || \ 00576 ((__NSS__) == SPI_NSS_HARD_INPUT) || \ 00577 ((__NSS__) == SPI_NSS_HARD_OUTPUT)) 00578 00579 /** @brief Checks if SPI Baudrate prescaler parameter is in allowed range. 00580 * @param __PRESCALER__ specifies the SPI Baudrate prescaler. 00581 * This parameter can be a value of @ref SPI_BaudRate_Prescaler 00582 * @retval None 00583 */ 00584 #define IS_SPI_BAUDRATE_PRESCALER(__PRESCALER__) (((__PRESCALER__) == SPI_BAUDRATEPRESCALER_2) || \ 00585 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_4) || \ 00586 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_8) || \ 00587 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_16) || \ 00588 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_32) || \ 00589 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_64) || \ 00590 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_128) || \ 00591 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_256)) 00592 00593 /** @brief Checks if SPI MSB LSB transmission parameter is in allowed range. 00594 * @param __BIT__ specifies the SPI MSB LSB transmission (whether data transfer starts from MSB or LSB bit). 00595 * This parameter can be a value of @ref SPI_MSB_LSB_transmission 00596 * @retval None 00597 */ 00598 #define IS_SPI_FIRST_BIT(__BIT__) (((__BIT__) == SPI_FIRSTBIT_MSB) || \ 00599 ((__BIT__) == SPI_FIRSTBIT_LSB)) 00600 00601 /** @brief Checks if SPI TI mode parameter is disabled. 00602 * @param __MODE__ SPI_TIMODE_DISABLE. Device not support Ti Mode. 00603 * This parameter can be a value of @ref SPI_TI_mode 00604 * @retval None 00605 */ 00606 #define IS_SPI_TIMODE(__MODE__) ((__MODE__) == SPI_TIMODE_DISABLE) 00607 00608 /** @brief Checks if SPI CRC calculation enabled state is in allowed range. 00609 * @param __CALCULATION__ specifies the SPI CRC calculation enable state. 00610 * This parameter can be a value of @ref SPI_CRC_Calculation 00611 * @retval None 00612 */ 00613 #define IS_SPI_CRC_CALCULATION(__CALCULATION__) (((__CALCULATION__) == SPI_CRCCALCULATION_DISABLE) || \ 00614 ((__CALCULATION__) == SPI_CRCCALCULATION_ENABLE)) 00615 00616 /** @brief Checks if SPI polynomial value to be used for the CRC calculation, is in allowed range. 00617 * @param __POLYNOMIAL__ specifies the SPI polynomial value to be used for the CRC calculation. 00618 * This parameter must be a number between Min_Data = 0 and Max_Data = 65535 00619 * @retval None 00620 */ 00621 #define IS_SPI_CRC_POLYNOMIAL(__POLYNOMIAL__) (((__POLYNOMIAL__) >= 0x1U) && \ 00622 ((__POLYNOMIAL__) <= 0xFFFFU) && \ 00623 (((__POLYNOMIAL__)&0x1U) != 0U)) 00624 00625 /** @brief Checks if DMA handle is valid. 00626 * @param __HANDLE__ specifies a DMA Handle. 00627 * @retval None 00628 */ 00629 #define IS_SPI_DMA_HANDLE(__HANDLE__) ((__HANDLE__) != NULL) 00630 00631 /** 00632 * @} 00633 */ 00634 00635 /* Private functions ---------------------------------------------------------*/ 00636 /** @defgroup SPI_Private_Functions SPI Private Functions 00637 * @{ 00638 */ 00639 uint8_t SPI_ISCRCErrorValid(SPI_HandleTypeDef *hspi); 00640 /** 00641 * @} 00642 */ 00643 00644 /* Exported functions --------------------------------------------------------*/ 00645 /** @addtogroup SPI_Exported_Functions 00646 * @{ 00647 */ 00648 00649 /** @addtogroup SPI_Exported_Functions_Group1 00650 * @{ 00651 */ 00652 /* Initialization/de-initialization functions ********************************/ 00653 HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi); 00654 HAL_StatusTypeDef HAL_SPI_DeInit(SPI_HandleTypeDef *hspi); 00655 void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi); 00656 void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi); 00657 00658 /* Callbacks Register/UnRegister functions ***********************************/ 00659 #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) 00660 HAL_StatusTypeDef HAL_SPI_RegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_CallbackIDTypeDef CallbackID, pSPI_CallbackTypeDef pCallback); 00661 HAL_StatusTypeDef HAL_SPI_UnRegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_CallbackIDTypeDef CallbackID); 00662 #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ 00663 /** 00664 * @} 00665 */ 00666 00667 /** @addtogroup SPI_Exported_Functions_Group2 00668 * @{ 00669 */ 00670 /* I/O operation functions ***************************************************/ 00671 HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout); 00672 HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout); 00673 HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, 00674 uint32_t Timeout); 00675 HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); 00676 HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); 00677 HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, 00678 uint16_t Size); 00679 HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); 00680 HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); 00681 HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, 00682 uint16_t Size); 00683 HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi); 00684 HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi); 00685 HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi); 00686 /* Transfer Abort functions */ 00687 HAL_StatusTypeDef HAL_SPI_Abort(SPI_HandleTypeDef *hspi); 00688 HAL_StatusTypeDef HAL_SPI_Abort_IT(SPI_HandleTypeDef *hspi); 00689 00690 void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi); 00691 void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi); 00692 void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi); 00693 void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi); 00694 void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi); 00695 void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi); 00696 void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi); 00697 void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi); 00698 void HAL_SPI_AbortCpltCallback(SPI_HandleTypeDef *hspi); 00699 /** 00700 * @} 00701 */ 00702 00703 /** @addtogroup SPI_Exported_Functions_Group3 00704 * @{ 00705 */ 00706 /* Peripheral State and Error functions ***************************************/ 00707 HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi); 00708 uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi); 00709 /** 00710 * @} 00711 */ 00712 00713 /** 00714 * @} 00715 */ 00716 00717 /** 00718 * @} 00719 */ 00720 00721 /** 00722 * @} 00723 */ 00724 00725 #ifdef __cplusplus 00726 } 00727 #endif 00728 00729 #endif /* STM32F1xx_HAL_SPI_H */ 00730 00731 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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