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STM32F103xB HAL User Manual
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Header file of DMA LL module. More...
#include "stm32f1xx.h"Go to the source code of this file.
Data Structures | |
| struct | LL_DMA_InitTypeDef |
Defines | |
| #define | LL_DMA_IFCR_CGIF1 DMA_IFCR_CGIF1 |
| #define | LL_DMA_IFCR_CTCIF1 DMA_IFCR_CTCIF1 |
| #define | LL_DMA_IFCR_CHTIF1 DMA_IFCR_CHTIF1 |
| #define | LL_DMA_IFCR_CTEIF1 DMA_IFCR_CTEIF1 |
| #define | LL_DMA_IFCR_CGIF2 DMA_IFCR_CGIF2 |
| #define | LL_DMA_IFCR_CTCIF2 DMA_IFCR_CTCIF2 |
| #define | LL_DMA_IFCR_CHTIF2 DMA_IFCR_CHTIF2 |
| #define | LL_DMA_IFCR_CTEIF2 DMA_IFCR_CTEIF2 |
| #define | LL_DMA_IFCR_CGIF3 DMA_IFCR_CGIF3 |
| #define | LL_DMA_IFCR_CTCIF3 DMA_IFCR_CTCIF3 |
| #define | LL_DMA_IFCR_CHTIF3 DMA_IFCR_CHTIF3 |
| #define | LL_DMA_IFCR_CTEIF3 DMA_IFCR_CTEIF3 |
| #define | LL_DMA_IFCR_CGIF4 DMA_IFCR_CGIF4 |
| #define | LL_DMA_IFCR_CTCIF4 DMA_IFCR_CTCIF4 |
| #define | LL_DMA_IFCR_CHTIF4 DMA_IFCR_CHTIF4 |
| #define | LL_DMA_IFCR_CTEIF4 DMA_IFCR_CTEIF4 |
| #define | LL_DMA_IFCR_CGIF5 DMA_IFCR_CGIF5 |
| #define | LL_DMA_IFCR_CTCIF5 DMA_IFCR_CTCIF5 |
| #define | LL_DMA_IFCR_CHTIF5 DMA_IFCR_CHTIF5 |
| #define | LL_DMA_IFCR_CTEIF5 DMA_IFCR_CTEIF5 |
| #define | LL_DMA_IFCR_CGIF6 DMA_IFCR_CGIF6 |
| #define | LL_DMA_IFCR_CTCIF6 DMA_IFCR_CTCIF6 |
| #define | LL_DMA_IFCR_CHTIF6 DMA_IFCR_CHTIF6 |
| #define | LL_DMA_IFCR_CTEIF6 DMA_IFCR_CTEIF6 |
| #define | LL_DMA_IFCR_CGIF7 DMA_IFCR_CGIF7 |
| #define | LL_DMA_IFCR_CTCIF7 DMA_IFCR_CTCIF7 |
| #define | LL_DMA_IFCR_CHTIF7 DMA_IFCR_CHTIF7 |
| #define | LL_DMA_IFCR_CTEIF7 DMA_IFCR_CTEIF7 |
| #define | LL_DMA_ISR_GIF1 DMA_ISR_GIF1 |
| #define | LL_DMA_ISR_TCIF1 DMA_ISR_TCIF1 |
| #define | LL_DMA_ISR_HTIF1 DMA_ISR_HTIF1 |
| #define | LL_DMA_ISR_TEIF1 DMA_ISR_TEIF1 |
| #define | LL_DMA_ISR_GIF2 DMA_ISR_GIF2 |
| #define | LL_DMA_ISR_TCIF2 DMA_ISR_TCIF2 |
| #define | LL_DMA_ISR_HTIF2 DMA_ISR_HTIF2 |
| #define | LL_DMA_ISR_TEIF2 DMA_ISR_TEIF2 |
| #define | LL_DMA_ISR_GIF3 DMA_ISR_GIF3 |
| #define | LL_DMA_ISR_TCIF3 DMA_ISR_TCIF3 |
| #define | LL_DMA_ISR_HTIF3 DMA_ISR_HTIF3 |
| #define | LL_DMA_ISR_TEIF3 DMA_ISR_TEIF3 |
| #define | LL_DMA_ISR_GIF4 DMA_ISR_GIF4 |
| #define | LL_DMA_ISR_TCIF4 DMA_ISR_TCIF4 |
| #define | LL_DMA_ISR_HTIF4 DMA_ISR_HTIF4 |
| #define | LL_DMA_ISR_TEIF4 DMA_ISR_TEIF4 |
| #define | LL_DMA_ISR_GIF5 DMA_ISR_GIF5 |
| #define | LL_DMA_ISR_TCIF5 DMA_ISR_TCIF5 |
| #define | LL_DMA_ISR_HTIF5 DMA_ISR_HTIF5 |
| #define | LL_DMA_ISR_TEIF5 DMA_ISR_TEIF5 |
| #define | LL_DMA_ISR_GIF6 DMA_ISR_GIF6 |
| #define | LL_DMA_ISR_TCIF6 DMA_ISR_TCIF6 |
| #define | LL_DMA_ISR_HTIF6 DMA_ISR_HTIF6 |
| #define | LL_DMA_ISR_TEIF6 DMA_ISR_TEIF6 |
| #define | LL_DMA_ISR_GIF7 DMA_ISR_GIF7 |
| #define | LL_DMA_ISR_TCIF7 DMA_ISR_TCIF7 |
| #define | LL_DMA_ISR_HTIF7 DMA_ISR_HTIF7 |
| #define | LL_DMA_ISR_TEIF7 DMA_ISR_TEIF7 |
| #define | LL_DMA_CCR_TCIE DMA_CCR_TCIE |
| #define | LL_DMA_CCR_HTIE DMA_CCR_HTIE |
| #define | LL_DMA_CCR_TEIE DMA_CCR_TEIE |
| #define | LL_DMA_CHANNEL_1 0x00000001U |
| #define | LL_DMA_CHANNEL_2 0x00000002U |
| #define | LL_DMA_CHANNEL_3 0x00000003U |
| #define | LL_DMA_CHANNEL_4 0x00000004U |
| #define | LL_DMA_CHANNEL_5 0x00000005U |
| #define | LL_DMA_CHANNEL_6 0x00000006U |
| #define | LL_DMA_CHANNEL_7 0x00000007U |
| #define | LL_DMA_CHANNEL_ALL 0xFFFF0000U |
| #define | LL_DMA_DIRECTION_PERIPH_TO_MEMORY 0x00000000U |
| #define | LL_DMA_DIRECTION_MEMORY_TO_PERIPH DMA_CCR_DIR |
| #define | LL_DMA_DIRECTION_MEMORY_TO_MEMORY DMA_CCR_MEM2MEM |
| #define | LL_DMA_MODE_NORMAL 0x00000000U |
| #define | LL_DMA_MODE_CIRCULAR DMA_CCR_CIRC |
| #define | LL_DMA_PERIPH_INCREMENT DMA_CCR_PINC |
| #define | LL_DMA_PERIPH_NOINCREMENT 0x00000000U |
| #define | LL_DMA_MEMORY_INCREMENT DMA_CCR_MINC |
| #define | LL_DMA_MEMORY_NOINCREMENT 0x00000000U |
| #define | LL_DMA_PDATAALIGN_BYTE 0x00000000U |
| #define | LL_DMA_PDATAALIGN_HALFWORD DMA_CCR_PSIZE_0 |
| #define | LL_DMA_PDATAALIGN_WORD DMA_CCR_PSIZE_1 |
| #define | LL_DMA_MDATAALIGN_BYTE 0x00000000U |
| #define | LL_DMA_MDATAALIGN_HALFWORD DMA_CCR_MSIZE_0 |
| #define | LL_DMA_MDATAALIGN_WORD DMA_CCR_MSIZE_1 |
| #define | LL_DMA_PRIORITY_LOW 0x00000000U |
| #define | LL_DMA_PRIORITY_MEDIUM DMA_CCR_PL_0 |
| #define | LL_DMA_PRIORITY_HIGH DMA_CCR_PL_1 |
| #define | LL_DMA_PRIORITY_VERYHIGH DMA_CCR_PL |
| #define | LL_DMA_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__)) |
| Write a value in DMA register. | |
| #define | LL_DMA_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) |
| Read a value in DMA register. | |
| #define | __LL_DMA_GET_INSTANCE(__CHANNEL_INSTANCE__) (DMA1) |
| Convert DMAx_Channely into DMAx. | |
| #define | __LL_DMA_GET_CHANNEL(__CHANNEL_INSTANCE__) |
| Convert DMAx_Channely into LL_DMA_CHANNEL_y. | |
| #define | __LL_DMA_GET_CHANNEL_INSTANCE(__DMA_INSTANCE__, __CHANNEL__) |
| Convert DMA Instance DMAx and LL_DMA_CHANNEL_y into DMAx_Channely. | |
Functions | |
| __STATIC_INLINE void | LL_DMA_EnableChannel (DMA_TypeDef *DMAx, uint32_t Channel) |
| Enable DMA channel. | |
| __STATIC_INLINE void | LL_DMA_DisableChannel (DMA_TypeDef *DMAx, uint32_t Channel) |
| Disable DMA channel. | |
| __STATIC_INLINE uint32_t | LL_DMA_IsEnabledChannel (DMA_TypeDef *DMAx, uint32_t Channel) |
| Check if DMA channel is enabled or disabled. | |
| __STATIC_INLINE void | LL_DMA_ConfigTransfer (DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Configuration) |
| Configure all parameters link to DMA transfer. | |
| __STATIC_INLINE void | LL_DMA_SetDataTransferDirection (DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Direction) |
| Set Data transfer direction (read from peripheral or from memory). | |
| __STATIC_INLINE uint32_t | LL_DMA_GetDataTransferDirection (DMA_TypeDef *DMAx, uint32_t Channel) |
| Get Data transfer direction (read from peripheral or from memory). | |
| __STATIC_INLINE void | LL_DMA_SetMode (DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Mode) |
| Set DMA mode circular or normal. | |
| __STATIC_INLINE uint32_t | LL_DMA_GetMode (DMA_TypeDef *DMAx, uint32_t Channel) |
| Get DMA mode circular or normal. | |
| __STATIC_INLINE void | LL_DMA_SetPeriphIncMode (DMA_TypeDef *DMAx, uint32_t Channel, uint32_t PeriphOrM2MSrcIncMode) |
| Set Peripheral increment mode. | |
| __STATIC_INLINE uint32_t | LL_DMA_GetPeriphIncMode (DMA_TypeDef *DMAx, uint32_t Channel) |
| Get Peripheral increment mode. | |
| __STATIC_INLINE void | LL_DMA_SetMemoryIncMode (DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryOrM2MDstIncMode) |
| Set Memory increment mode. | |
| __STATIC_INLINE uint32_t | LL_DMA_GetMemoryIncMode (DMA_TypeDef *DMAx, uint32_t Channel) |
| Get Memory increment mode. | |
| __STATIC_INLINE void | LL_DMA_SetPeriphSize (DMA_TypeDef *DMAx, uint32_t Channel, uint32_t PeriphOrM2MSrcDataSize) |
| Set Peripheral size. | |
| __STATIC_INLINE uint32_t | LL_DMA_GetPeriphSize (DMA_TypeDef *DMAx, uint32_t Channel) |
| Get Peripheral size. | |
| __STATIC_INLINE void | LL_DMA_SetMemorySize (DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryOrM2MDstDataSize) |
| Set Memory size. | |
| __STATIC_INLINE uint32_t | LL_DMA_GetMemorySize (DMA_TypeDef *DMAx, uint32_t Channel) |
| Get Memory size. | |
| __STATIC_INLINE void | LL_DMA_SetChannelPriorityLevel (DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Priority) |
| Set Channel priority level. | |
| __STATIC_INLINE uint32_t | LL_DMA_GetChannelPriorityLevel (DMA_TypeDef *DMAx, uint32_t Channel) |
| Get Channel priority level. | |
| __STATIC_INLINE void | LL_DMA_SetDataLength (DMA_TypeDef *DMAx, uint32_t Channel, uint32_t NbData) |
| Set Number of data to transfer. | |
| __STATIC_INLINE uint32_t | LL_DMA_GetDataLength (DMA_TypeDef *DMAx, uint32_t Channel) |
| Get Number of data to transfer. | |
| __STATIC_INLINE void | LL_DMA_ConfigAddresses (DMA_TypeDef *DMAx, uint32_t Channel, uint32_t SrcAddress, uint32_t DstAddress, uint32_t Direction) |
| Configure the Source and Destination addresses. | |
| __STATIC_INLINE void | LL_DMA_SetMemoryAddress (DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryAddress) |
| Set the Memory address. | |
| __STATIC_INLINE void | LL_DMA_SetPeriphAddress (DMA_TypeDef *DMAx, uint32_t Channel, uint32_t PeriphAddress) |
| Set the Peripheral address. | |
| __STATIC_INLINE uint32_t | LL_DMA_GetMemoryAddress (DMA_TypeDef *DMAx, uint32_t Channel) |
| Get Memory address. | |
| __STATIC_INLINE uint32_t | LL_DMA_GetPeriphAddress (DMA_TypeDef *DMAx, uint32_t Channel) |
| Get Peripheral address. | |
| __STATIC_INLINE void | LL_DMA_SetM2MSrcAddress (DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryAddress) |
| Set the Memory to Memory Source address. | |
| __STATIC_INLINE void | LL_DMA_SetM2MDstAddress (DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryAddress) |
| Set the Memory to Memory Destination address. | |
| __STATIC_INLINE uint32_t | LL_DMA_GetM2MSrcAddress (DMA_TypeDef *DMAx, uint32_t Channel) |
| Get the Memory to Memory Source address. | |
| __STATIC_INLINE uint32_t | LL_DMA_GetM2MDstAddress (DMA_TypeDef *DMAx, uint32_t Channel) |
| Get the Memory to Memory Destination address. | |
| __STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_GI1 (DMA_TypeDef *DMAx) |
| Get Channel 1 global interrupt flag. | |
| __STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_GI2 (DMA_TypeDef *DMAx) |
| Get Channel 2 global interrupt flag. | |
| __STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_GI3 (DMA_TypeDef *DMAx) |
| Get Channel 3 global interrupt flag. | |
| __STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_GI4 (DMA_TypeDef *DMAx) |
| Get Channel 4 global interrupt flag. | |
| __STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_GI5 (DMA_TypeDef *DMAx) |
| Get Channel 5 global interrupt flag. | |
| __STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_GI6 (DMA_TypeDef *DMAx) |
| Get Channel 6 global interrupt flag. | |
| __STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_GI7 (DMA_TypeDef *DMAx) |
| Get Channel 7 global interrupt flag. | |
| __STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_TC1 (DMA_TypeDef *DMAx) |
| Get Channel 1 transfer complete flag. | |
| __STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_TC2 (DMA_TypeDef *DMAx) |
| Get Channel 2 transfer complete flag. | |
| __STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_TC3 (DMA_TypeDef *DMAx) |
| Get Channel 3 transfer complete flag. | |
| __STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_TC4 (DMA_TypeDef *DMAx) |
| Get Channel 4 transfer complete flag. | |
| __STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_TC5 (DMA_TypeDef *DMAx) |
| Get Channel 5 transfer complete flag. | |
| __STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_TC6 (DMA_TypeDef *DMAx) |
| Get Channel 6 transfer complete flag. | |
| __STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_TC7 (DMA_TypeDef *DMAx) |
| Get Channel 7 transfer complete flag. | |
| __STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_HT1 (DMA_TypeDef *DMAx) |
| Get Channel 1 half transfer flag. | |
| __STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_HT2 (DMA_TypeDef *DMAx) |
| Get Channel 2 half transfer flag. | |
| __STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_HT3 (DMA_TypeDef *DMAx) |
| Get Channel 3 half transfer flag. | |
| __STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_HT4 (DMA_TypeDef *DMAx) |
| Get Channel 4 half transfer flag. | |
| __STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_HT5 (DMA_TypeDef *DMAx) |
| Get Channel 5 half transfer flag. | |
| __STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_HT6 (DMA_TypeDef *DMAx) |
| Get Channel 6 half transfer flag. | |
| __STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_HT7 (DMA_TypeDef *DMAx) |
| Get Channel 7 half transfer flag. | |
| __STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_TE1 (DMA_TypeDef *DMAx) |
| Get Channel 1 transfer error flag. | |
| __STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_TE2 (DMA_TypeDef *DMAx) |
| Get Channel 2 transfer error flag. | |
| __STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_TE3 (DMA_TypeDef *DMAx) |
| Get Channel 3 transfer error flag. | |
| __STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_TE4 (DMA_TypeDef *DMAx) |
| Get Channel 4 transfer error flag. | |
| __STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_TE5 (DMA_TypeDef *DMAx) |
| Get Channel 5 transfer error flag. | |
| __STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_TE6 (DMA_TypeDef *DMAx) |
| Get Channel 6 transfer error flag. | |
| __STATIC_INLINE uint32_t | LL_DMA_IsActiveFlag_TE7 (DMA_TypeDef *DMAx) |
| Get Channel 7 transfer error flag. | |
| __STATIC_INLINE void | LL_DMA_ClearFlag_GI1 (DMA_TypeDef *DMAx) |
| Clear Channel 1 global interrupt flag. | |
| __STATIC_INLINE void | LL_DMA_ClearFlag_GI2 (DMA_TypeDef *DMAx) |
| Clear Channel 2 global interrupt flag. | |
| __STATIC_INLINE void | LL_DMA_ClearFlag_GI3 (DMA_TypeDef *DMAx) |
| Clear Channel 3 global interrupt flag. | |
| __STATIC_INLINE void | LL_DMA_ClearFlag_GI4 (DMA_TypeDef *DMAx) |
| Clear Channel 4 global interrupt flag. | |
| __STATIC_INLINE void | LL_DMA_ClearFlag_GI5 (DMA_TypeDef *DMAx) |
| Clear Channel 5 global interrupt flag. | |
| __STATIC_INLINE void | LL_DMA_ClearFlag_GI6 (DMA_TypeDef *DMAx) |
| Clear Channel 6 global interrupt flag. | |
| __STATIC_INLINE void | LL_DMA_ClearFlag_GI7 (DMA_TypeDef *DMAx) |
| Clear Channel 7 global interrupt flag. | |
| __STATIC_INLINE void | LL_DMA_ClearFlag_TC1 (DMA_TypeDef *DMAx) |
| Clear Channel 1 transfer complete flag. | |
| __STATIC_INLINE void | LL_DMA_ClearFlag_TC2 (DMA_TypeDef *DMAx) |
| Clear Channel 2 transfer complete flag. | |
| __STATIC_INLINE void | LL_DMA_ClearFlag_TC3 (DMA_TypeDef *DMAx) |
| Clear Channel 3 transfer complete flag. | |
| __STATIC_INLINE void | LL_DMA_ClearFlag_TC4 (DMA_TypeDef *DMAx) |
| Clear Channel 4 transfer complete flag. | |
| __STATIC_INLINE void | LL_DMA_ClearFlag_TC5 (DMA_TypeDef *DMAx) |
| Clear Channel 5 transfer complete flag. | |
| __STATIC_INLINE void | LL_DMA_ClearFlag_TC6 (DMA_TypeDef *DMAx) |
| Clear Channel 6 transfer complete flag. | |
| __STATIC_INLINE void | LL_DMA_ClearFlag_TC7 (DMA_TypeDef *DMAx) |
| Clear Channel 7 transfer complete flag. | |
| __STATIC_INLINE void | LL_DMA_ClearFlag_HT1 (DMA_TypeDef *DMAx) |
| Clear Channel 1 half transfer flag. | |
| __STATIC_INLINE void | LL_DMA_ClearFlag_HT2 (DMA_TypeDef *DMAx) |
| Clear Channel 2 half transfer flag. | |
| __STATIC_INLINE void | LL_DMA_ClearFlag_HT3 (DMA_TypeDef *DMAx) |
| Clear Channel 3 half transfer flag. | |
| __STATIC_INLINE void | LL_DMA_ClearFlag_HT4 (DMA_TypeDef *DMAx) |
| Clear Channel 4 half transfer flag. | |
| __STATIC_INLINE void | LL_DMA_ClearFlag_HT5 (DMA_TypeDef *DMAx) |
| Clear Channel 5 half transfer flag. | |
| __STATIC_INLINE void | LL_DMA_ClearFlag_HT6 (DMA_TypeDef *DMAx) |
| Clear Channel 6 half transfer flag. | |
| __STATIC_INLINE void | LL_DMA_ClearFlag_HT7 (DMA_TypeDef *DMAx) |
| Clear Channel 7 half transfer flag. | |
| __STATIC_INLINE void | LL_DMA_ClearFlag_TE1 (DMA_TypeDef *DMAx) |
| Clear Channel 1 transfer error flag. | |
| __STATIC_INLINE void | LL_DMA_ClearFlag_TE2 (DMA_TypeDef *DMAx) |
| Clear Channel 2 transfer error flag. | |
| __STATIC_INLINE void | LL_DMA_ClearFlag_TE3 (DMA_TypeDef *DMAx) |
| Clear Channel 3 transfer error flag. | |
| __STATIC_INLINE void | LL_DMA_ClearFlag_TE4 (DMA_TypeDef *DMAx) |
| Clear Channel 4 transfer error flag. | |
| __STATIC_INLINE void | LL_DMA_ClearFlag_TE5 (DMA_TypeDef *DMAx) |
| Clear Channel 5 transfer error flag. | |
| __STATIC_INLINE void | LL_DMA_ClearFlag_TE6 (DMA_TypeDef *DMAx) |
| Clear Channel 6 transfer error flag. | |
| __STATIC_INLINE void | LL_DMA_ClearFlag_TE7 (DMA_TypeDef *DMAx) |
| Clear Channel 7 transfer error flag. | |
| __STATIC_INLINE void | LL_DMA_EnableIT_TC (DMA_TypeDef *DMAx, uint32_t Channel) |
| Enable Transfer complete interrupt. | |
| __STATIC_INLINE void | LL_DMA_EnableIT_HT (DMA_TypeDef *DMAx, uint32_t Channel) |
| Enable Half transfer interrupt. | |
| __STATIC_INLINE void | LL_DMA_EnableIT_TE (DMA_TypeDef *DMAx, uint32_t Channel) |
| Enable Transfer error interrupt. | |
| __STATIC_INLINE void | LL_DMA_DisableIT_TC (DMA_TypeDef *DMAx, uint32_t Channel) |
| Disable Transfer complete interrupt. | |
| __STATIC_INLINE void | LL_DMA_DisableIT_HT (DMA_TypeDef *DMAx, uint32_t Channel) |
| Disable Half transfer interrupt. | |
| __STATIC_INLINE void | LL_DMA_DisableIT_TE (DMA_TypeDef *DMAx, uint32_t Channel) |
| Disable Transfer error interrupt. | |
| __STATIC_INLINE uint32_t | LL_DMA_IsEnabledIT_TC (DMA_TypeDef *DMAx, uint32_t Channel) |
| Check if Transfer complete Interrupt is enabled. | |
| __STATIC_INLINE uint32_t | LL_DMA_IsEnabledIT_HT (DMA_TypeDef *DMAx, uint32_t Channel) |
| Check if Half transfer Interrupt is enabled. | |
| __STATIC_INLINE uint32_t | LL_DMA_IsEnabledIT_TE (DMA_TypeDef *DMAx, uint32_t Channel) |
| Check if Transfer error Interrupt is enabled. | |
| uint32_t | LL_DMA_Init (DMA_TypeDef *DMAx, uint32_t Channel, LL_DMA_InitTypeDef *DMA_InitStruct) |
| Initialize the DMA registers according to the specified parameters in DMA_InitStruct. | |
| uint32_t | LL_DMA_DeInit (DMA_TypeDef *DMAx, uint32_t Channel) |
| De-initialize the DMA registers to their default reset values. | |
| void | LL_DMA_StructInit (LL_DMA_InitTypeDef *DMA_InitStruct) |
| Set each LL_DMA_InitTypeDef field to default value. | |
Variables | |
| static const uint8_t | CHANNEL_OFFSET_TAB [] |
Header file of DMA LL module.
This software component is licensed by ST under BSD 3-Clause license, the "License"; You may not use this file except in compliance with the License. You may obtain a copy of the License at: opensource.org/licenses/BSD-3-Clause
Definition in file stm32f1xx_ll_dma.h.
1.7.6.1