STM32F103xB HAL User Manual
stm32f1xx_ll_pwr.h
Go to the documentation of this file.
00001 /**
00002   ******************************************************************************
00003   * @file    stm32f1xx_ll_pwr.h
00004   * @author  MCD Application Team
00005   * @brief   Header file of PWR LL module.
00006   ******************************************************************************
00007   * @attention
00008   *
00009   * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
00010   * All rights reserved.</center></h2>
00011   *
00012   * This software component is licensed by ST under BSD 3-Clause license,
00013   * the "License"; You may not use this file except in compliance with the
00014   * License. You may obtain a copy of the License at:
00015   *                        opensource.org/licenses/BSD-3-Clause
00016   *
00017   ******************************************************************************
00018   */
00019 
00020 /* Define to prevent recursive inclusion -------------------------------------*/
00021 #ifndef __STM32F1xx_LL_PWR_H
00022 #define __STM32F1xx_LL_PWR_H
00023 
00024 #ifdef __cplusplus
00025 extern "C" {
00026 #endif
00027 
00028 /* Includes ------------------------------------------------------------------*/
00029 #include "stm32f1xx.h"
00030 
00031 /** @addtogroup STM32F1xx_LL_Driver
00032   * @{
00033   */
00034 
00035 #if defined(PWR)
00036 
00037 /** @defgroup PWR_LL PWR
00038   * @{
00039   */
00040 
00041 /* Private types -------------------------------------------------------------*/
00042 /* Private variables ---------------------------------------------------------*/
00043 /* Private constants ---------------------------------------------------------*/
00044 /* Private macros ------------------------------------------------------------*/
00045 /* Exported types ------------------------------------------------------------*/
00046 /* Exported constants --------------------------------------------------------*/
00047 /** @defgroup PWR_LL_Exported_Constants PWR Exported Constants
00048   * @{
00049   */
00050 
00051 /** @defgroup PWR_LL_EC_CLEAR_FLAG Clear Flags Defines
00052   * @brief    Flags defines which can be used with LL_PWR_WriteReg function
00053   * @{
00054   */
00055 #define LL_PWR_CR_CSBF                     PWR_CR_CSBF            /*!< Clear standby flag */
00056 #define LL_PWR_CR_CWUF                     PWR_CR_CWUF            /*!< Clear wakeup flag */
00057 /**
00058   * @}
00059   */
00060 
00061 /** @defgroup PWR_LL_EC_GET_FLAG Get Flags Defines
00062   * @brief    Flags defines which can be used with LL_PWR_ReadReg function
00063   * @{
00064   */
00065 #define LL_PWR_CSR_WUF                     PWR_CSR_WUF            /*!< Wakeup flag */
00066 #define LL_PWR_CSR_SBF                     PWR_CSR_SBF            /*!< Standby flag */
00067 #define LL_PWR_CSR_PVDO                    PWR_CSR_PVDO           /*!< Power voltage detector output flag */
00068 #define LL_PWR_CSR_EWUP1                   PWR_CSR_EWUP           /*!< Enable WKUP pin 1 */
00069 /**
00070   * @}
00071   */
00072 
00073 
00074 /** @defgroup PWR_LL_EC_MODE_PWR Mode Power
00075   * @{
00076   */
00077 #define LL_PWR_MODE_STOP_MAINREGU             0x00000000U                    /*!< Enter Stop mode when the CPU enters deepsleep */
00078 #define LL_PWR_MODE_STOP_LPREGU               (PWR_CR_LPDS)                  /*!< Enter Stop mode (with low power Regulator ON) when the CPU enters deepsleep */
00079 #define LL_PWR_MODE_STANDBY                   (PWR_CR_PDDS)                  /*!< Enter Standby mode when the CPU enters deepsleep */
00080 /**
00081   * @}
00082   */
00083 
00084 /** @defgroup PWR_LL_EC_REGU_MODE_DS_MODE  Regulator Mode In Deep Sleep Mode
00085  * @{
00086  */
00087 #define LL_PWR_REGU_DSMODE_MAIN        0x00000000U           /*!< Voltage Regulator in main mode during deepsleep mode */
00088 #define LL_PWR_REGU_DSMODE_LOW_POWER   (PWR_CR_LPDS)         /*!< Voltage Regulator in low-power mode during deepsleep mode */
00089 /**
00090   * @}
00091   */
00092 
00093 /** @defgroup PWR_LL_EC_PVDLEVEL Power Voltage Detector Level
00094   * @{
00095   */
00096 #define LL_PWR_PVDLEVEL_0                  (PWR_CR_PLS_LEV0)      /*!< Voltage threshold detected by PVD 2.2 V */
00097 #define LL_PWR_PVDLEVEL_1                  (PWR_CR_PLS_LEV1)      /*!< Voltage threshold detected by PVD 2.3 V */
00098 #define LL_PWR_PVDLEVEL_2                  (PWR_CR_PLS_LEV2)      /*!< Voltage threshold detected by PVD 2.4 V */
00099 #define LL_PWR_PVDLEVEL_3                  (PWR_CR_PLS_LEV3)      /*!< Voltage threshold detected by PVD 2.5 V */
00100 #define LL_PWR_PVDLEVEL_4                  (PWR_CR_PLS_LEV4)      /*!< Voltage threshold detected by PVD 2.6 V */
00101 #define LL_PWR_PVDLEVEL_5                  (PWR_CR_PLS_LEV5)      /*!< Voltage threshold detected by PVD 2.7 V */
00102 #define LL_PWR_PVDLEVEL_6                  (PWR_CR_PLS_LEV6)      /*!< Voltage threshold detected by PVD 2.8 V */
00103 #define LL_PWR_PVDLEVEL_7                  (PWR_CR_PLS_LEV7)      /*!< Voltage threshold detected by PVD 2.9 V */
00104 /**
00105   * @}
00106   */
00107 /** @defgroup PWR_LL_EC_WAKEUP_PIN  Wakeup Pins
00108   * @{
00109   */
00110 #define LL_PWR_WAKEUP_PIN1                 (PWR_CSR_EWUP)         /*!< WKUP pin 1 : PA0 */
00111 /**
00112   * @}
00113   */
00114 
00115 /**
00116   * @}
00117   */
00118 
00119 
00120 /* Exported macro ------------------------------------------------------------*/
00121 /** @defgroup PWR_LL_Exported_Macros PWR Exported Macros
00122   * @{
00123   */
00124 
00125 /** @defgroup PWR_LL_EM_WRITE_READ Common write and read registers Macros
00126   * @{
00127   */
00128 
00129 /**
00130   * @brief  Write a value in PWR register
00131   * @param  __REG__ Register to be written
00132   * @param  __VALUE__ Value to be written in the register
00133   * @retval None
00134   */
00135 #define LL_PWR_WriteReg(__REG__, __VALUE__) WRITE_REG(PWR->__REG__, (__VALUE__))
00136 
00137 /**
00138   * @brief  Read a value in PWR register
00139   * @param  __REG__ Register to be read
00140   * @retval Register value
00141   */
00142 #define LL_PWR_ReadReg(__REG__) READ_REG(PWR->__REG__)
00143 /**
00144   * @}
00145   */
00146 
00147 /**
00148   * @}
00149   */
00150 
00151 /* Exported functions --------------------------------------------------------*/
00152 /** @defgroup PWR_LL_Exported_Functions PWR Exported Functions
00153   * @{
00154   */
00155 
00156 /** @defgroup PWR_LL_EF_Configuration Configuration
00157   * @{
00158   */
00159 
00160 /**
00161   * @brief  Enable access to the backup domain
00162   * @rmtoll CR    DBP       LL_PWR_EnableBkUpAccess
00163   * @retval None
00164   */
00165 __STATIC_INLINE void LL_PWR_EnableBkUpAccess(void)
00166 {
00167   SET_BIT(PWR->CR, PWR_CR_DBP);
00168 }
00169 
00170 /**
00171   * @brief  Disable access to the backup domain
00172   * @rmtoll CR    DBP       LL_PWR_DisableBkUpAccess
00173   * @retval None
00174   */
00175 __STATIC_INLINE void LL_PWR_DisableBkUpAccess(void)
00176 {
00177   CLEAR_BIT(PWR->CR, PWR_CR_DBP);
00178 }
00179 
00180 /**
00181   * @brief  Check if the backup domain is enabled
00182   * @rmtoll CR    DBP       LL_PWR_IsEnabledBkUpAccess
00183   * @retval State of bit (1 or 0).
00184   */
00185 __STATIC_INLINE uint32_t LL_PWR_IsEnabledBkUpAccess(void)
00186 {
00187   return (READ_BIT(PWR->CR, PWR_CR_DBP) == (PWR_CR_DBP));
00188 }
00189 
00190 /**
00191   * @brief  Set voltage Regulator mode during deep sleep mode
00192   * @rmtoll CR    LPDS         LL_PWR_SetRegulModeDS
00193   * @param  RegulMode This parameter can be one of the following values:
00194   *         @arg @ref LL_PWR_REGU_DSMODE_MAIN
00195   *         @arg @ref LL_PWR_REGU_DSMODE_LOW_POWER
00196   * @retval None
00197   */
00198 __STATIC_INLINE void LL_PWR_SetRegulModeDS(uint32_t RegulMode)
00199 {
00200   MODIFY_REG(PWR->CR, PWR_CR_LPDS, RegulMode);
00201 }
00202 
00203 /**
00204   * @brief  Get voltage Regulator mode during deep sleep mode
00205   * @rmtoll CR    LPDS         LL_PWR_GetRegulModeDS
00206   * @retval Returned value can be one of the following values:
00207   *         @arg @ref LL_PWR_REGU_DSMODE_MAIN
00208   *         @arg @ref LL_PWR_REGU_DSMODE_LOW_POWER
00209   */
00210 __STATIC_INLINE uint32_t LL_PWR_GetRegulModeDS(void)
00211 {
00212   return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_LPDS));
00213 }
00214 
00215 /**
00216   * @brief  Set Power Down mode when CPU enters deepsleep
00217   * @rmtoll CR    PDDS         LL_PWR_SetPowerMode\n
00218   * @rmtoll CR    LPDS         LL_PWR_SetPowerMode
00219   * @param  PDMode This parameter can be one of the following values:
00220   *         @arg @ref LL_PWR_MODE_STOP_MAINREGU
00221   *         @arg @ref LL_PWR_MODE_STOP_LPREGU
00222   *         @arg @ref LL_PWR_MODE_STANDBY
00223   * @retval None
00224   */
00225 __STATIC_INLINE void LL_PWR_SetPowerMode(uint32_t PDMode)
00226 {
00227   MODIFY_REG(PWR->CR, (PWR_CR_PDDS| PWR_CR_LPDS), PDMode);
00228 }
00229 
00230 /**
00231   * @brief  Get Power Down mode when CPU enters deepsleep
00232   * @rmtoll CR    PDDS         LL_PWR_GetPowerMode\n
00233   * @rmtoll CR    LPDS         LL_PWR_GetPowerMode
00234   * @retval Returned value can be one of the following values:
00235   *         @arg @ref LL_PWR_MODE_STOP_MAINREGU
00236   *         @arg @ref LL_PWR_MODE_STOP_LPREGU
00237   *         @arg @ref LL_PWR_MODE_STANDBY
00238   */
00239 __STATIC_INLINE uint32_t LL_PWR_GetPowerMode(void)
00240 {
00241   return (uint32_t)(READ_BIT(PWR->CR, (PWR_CR_PDDS| PWR_CR_LPDS)));
00242 }
00243 
00244 /**
00245   * @brief  Configure the voltage threshold detected by the Power Voltage Detector
00246   * @rmtoll CR    PLS       LL_PWR_SetPVDLevel
00247   * @param  PVDLevel This parameter can be one of the following values:
00248   *         @arg @ref LL_PWR_PVDLEVEL_0
00249   *         @arg @ref LL_PWR_PVDLEVEL_1
00250   *         @arg @ref LL_PWR_PVDLEVEL_2
00251   *         @arg @ref LL_PWR_PVDLEVEL_3
00252   *         @arg @ref LL_PWR_PVDLEVEL_4
00253   *         @arg @ref LL_PWR_PVDLEVEL_5
00254   *         @arg @ref LL_PWR_PVDLEVEL_6
00255   *         @arg @ref LL_PWR_PVDLEVEL_7
00256   * @retval None
00257   */
00258 __STATIC_INLINE void LL_PWR_SetPVDLevel(uint32_t PVDLevel)
00259 {
00260   MODIFY_REG(PWR->CR, PWR_CR_PLS, PVDLevel);
00261 }
00262 
00263 /**
00264   * @brief  Get the voltage threshold detection
00265   * @rmtoll CR    PLS       LL_PWR_GetPVDLevel
00266   * @retval Returned value can be one of the following values:
00267   *         @arg @ref LL_PWR_PVDLEVEL_0
00268   *         @arg @ref LL_PWR_PVDLEVEL_1
00269   *         @arg @ref LL_PWR_PVDLEVEL_2
00270   *         @arg @ref LL_PWR_PVDLEVEL_3
00271   *         @arg @ref LL_PWR_PVDLEVEL_4
00272   *         @arg @ref LL_PWR_PVDLEVEL_5
00273   *         @arg @ref LL_PWR_PVDLEVEL_6
00274   *         @arg @ref LL_PWR_PVDLEVEL_7
00275   */
00276 __STATIC_INLINE uint32_t LL_PWR_GetPVDLevel(void)
00277 {
00278   return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_PLS));
00279 }
00280 
00281 /**
00282   * @brief  Enable Power Voltage Detector
00283   * @rmtoll CR    PVDE       LL_PWR_EnablePVD
00284   * @retval None
00285   */
00286 __STATIC_INLINE void LL_PWR_EnablePVD(void)
00287 {
00288   SET_BIT(PWR->CR, PWR_CR_PVDE);
00289 }
00290 
00291 /**
00292   * @brief  Disable Power Voltage Detector
00293   * @rmtoll CR    PVDE       LL_PWR_DisablePVD
00294   * @retval None
00295   */
00296 __STATIC_INLINE void LL_PWR_DisablePVD(void)
00297 {
00298   CLEAR_BIT(PWR->CR, PWR_CR_PVDE);
00299 }
00300 
00301 /**
00302   * @brief  Check if Power Voltage Detector is enabled
00303   * @rmtoll CR    PVDE       LL_PWR_IsEnabledPVD
00304   * @retval State of bit (1 or 0).
00305   */
00306 __STATIC_INLINE uint32_t LL_PWR_IsEnabledPVD(void)
00307 {
00308   return (READ_BIT(PWR->CR, PWR_CR_PVDE) == (PWR_CR_PVDE));
00309 }
00310 
00311 /**
00312   * @brief  Enable the WakeUp PINx functionality
00313   * @rmtoll CSR   EWUP       LL_PWR_EnableWakeUpPin
00314   * @param  WakeUpPin This parameter can be one of the following values:
00315   *         @arg @ref LL_PWR_WAKEUP_PIN1
00316   * @retval None
00317   */
00318 __STATIC_INLINE void LL_PWR_EnableWakeUpPin(uint32_t WakeUpPin)
00319 {
00320   SET_BIT(PWR->CSR, WakeUpPin);
00321 }
00322 
00323 /**
00324   * @brief  Disable the WakeUp PINx functionality
00325   * @rmtoll CSR   EWUP       LL_PWR_DisableWakeUpPin
00326   * @param  WakeUpPin This parameter can be one of the following values:
00327   *         @arg @ref LL_PWR_WAKEUP_PIN1
00328   * @retval None
00329   */
00330 __STATIC_INLINE void LL_PWR_DisableWakeUpPin(uint32_t WakeUpPin)
00331 {
00332   CLEAR_BIT(PWR->CSR, WakeUpPin);
00333 }
00334 
00335 /**
00336   * @brief  Check if the WakeUp PINx functionality is enabled
00337   * @rmtoll CSR   EWUP       LL_PWR_IsEnabledWakeUpPin
00338   * @param  WakeUpPin This parameter can be one of the following values:
00339   *         @arg @ref LL_PWR_WAKEUP_PIN1
00340   * @retval State of bit (1 or 0).
00341   */
00342 __STATIC_INLINE uint32_t LL_PWR_IsEnabledWakeUpPin(uint32_t WakeUpPin)
00343 {
00344   return (READ_BIT(PWR->CSR, WakeUpPin) == (WakeUpPin));
00345 }
00346 
00347 
00348 /**
00349   * @}
00350   */
00351 
00352 /** @defgroup PWR_LL_EF_FLAG_Management FLAG_Management
00353   * @{
00354   */
00355 
00356 /**
00357   * @brief  Get Wake-up Flag
00358   * @rmtoll CSR   WUF       LL_PWR_IsActiveFlag_WU
00359   * @retval State of bit (1 or 0).
00360   */
00361 __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_WU(void)
00362 {
00363   return (READ_BIT(PWR->CSR, PWR_CSR_WUF) == (PWR_CSR_WUF));
00364 }
00365 
00366 /**
00367   * @brief  Get Standby Flag
00368   * @rmtoll CSR   SBF       LL_PWR_IsActiveFlag_SB
00369   * @retval State of bit (1 or 0).
00370   */
00371 __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_SB(void)
00372 {
00373   return (READ_BIT(PWR->CSR, PWR_CSR_SBF) == (PWR_CSR_SBF));
00374 }
00375 
00376 /**
00377   * @brief  Indicate whether VDD voltage is below the selected PVD threshold
00378   * @rmtoll CSR   PVDO       LL_PWR_IsActiveFlag_PVDO
00379   * @retval State of bit (1 or 0).
00380   */
00381 __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_PVDO(void)
00382 {
00383   return (READ_BIT(PWR->CSR, PWR_CSR_PVDO) == (PWR_CSR_PVDO));
00384 }
00385 
00386 /**
00387   * @brief  Clear Standby Flag
00388   * @rmtoll CR   CSBF       LL_PWR_ClearFlag_SB
00389   * @retval None
00390   */
00391 __STATIC_INLINE void LL_PWR_ClearFlag_SB(void)
00392 {
00393   SET_BIT(PWR->CR, PWR_CR_CSBF);
00394 }
00395 
00396 /**
00397   * @brief  Clear Wake-up Flags
00398   * @rmtoll CR   CWUF       LL_PWR_ClearFlag_WU
00399   * @retval None
00400   */
00401 __STATIC_INLINE void LL_PWR_ClearFlag_WU(void)
00402 {
00403   SET_BIT(PWR->CR, PWR_CR_CWUF);
00404 }
00405 
00406 /**
00407   * @}
00408   */
00409 
00410 #if defined(USE_FULL_LL_DRIVER)
00411 /** @defgroup PWR_LL_EF_Init De-initialization function
00412   * @{
00413   */
00414 ErrorStatus LL_PWR_DeInit(void);
00415 /**
00416   * @}
00417   */
00418 #endif /* USE_FULL_LL_DRIVER */
00419 
00420 /**
00421   * @}
00422   */
00423 
00424 /**
00425   * @}
00426   */
00427 
00428 #endif /* defined(PWR) */
00429 
00430 /**
00431   * @}
00432   */
00433 
00434 #ifdef __cplusplus
00435 }
00436 #endif
00437 
00438 #endif /* __STM32F1xx_LL_PWR_H */
00439 
00440 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/