|
STM32F479xx HAL User Manual
|
00001 /** 00002 ****************************************************************************** 00003 * @file stm32f4xx_hal_fmpi2c.h 00004 * @author MCD Application Team 00005 * @brief Header file of FMPI2C HAL module. 00006 ****************************************************************************** 00007 * @attention 00008 * 00009 * <h2><center>© Copyright (c) 2016 STMicroelectronics. 00010 * All rights reserved.</center></h2> 00011 * 00012 * This software component is licensed by ST under BSD 3-Clause license, 00013 * the "License"; You may not use this file except in compliance with the 00014 * License. You may obtain a copy of the License at: 00015 * opensource.org/licenses/BSD-3-Clause 00016 * 00017 ****************************************************************************** 00018 */ 00019 00020 /* Define to prevent recursive inclusion -------------------------------------*/ 00021 #ifndef STM32F4xx_HAL_FMPI2C_H 00022 #define STM32F4xx_HAL_FMPI2C_H 00023 00024 #ifdef __cplusplus 00025 extern "C" { 00026 #endif 00027 00028 #if defined(FMPI2C_CR1_PE) 00029 /* Includes ------------------------------------------------------------------*/ 00030 #include "stm32f4xx_hal_def.h" 00031 00032 /** @addtogroup STM32F4xx_HAL_Driver 00033 * @{ 00034 */ 00035 00036 /** @addtogroup FMPI2C 00037 * @{ 00038 */ 00039 00040 /* Exported types ------------------------------------------------------------*/ 00041 /** @defgroup FMPI2C_Exported_Types FMPI2C Exported Types 00042 * @{ 00043 */ 00044 00045 /** @defgroup FMPI2C_Configuration_Structure_definition FMPI2C Configuration Structure definition 00046 * @brief FMPI2C Configuration Structure definition 00047 * @{ 00048 */ 00049 typedef struct 00050 { 00051 uint32_t Timing; /*!< Specifies the FMPI2C_TIMINGR_register value. 00052 This parameter calculated by referring to FMPI2C initialization section 00053 in Reference manual */ 00054 00055 uint32_t OwnAddress1; /*!< Specifies the first device own address. 00056 This parameter can be a 7-bit or 10-bit address. */ 00057 00058 uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode is selected. 00059 This parameter can be a value of @ref FMPI2C_ADDRESSING_MODE */ 00060 00061 uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected. 00062 This parameter can be a value of @ref FMPI2C_DUAL_ADDRESSING_MODE */ 00063 00064 uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected 00065 This parameter can be a 7-bit address. */ 00066 00067 uint32_t OwnAddress2Masks; /*!< Specifies the acknowledge mask address second device own address if dual addressing 00068 mode is selected. 00069 This parameter can be a value of @ref FMPI2C_OWN_ADDRESS2_MASKS */ 00070 00071 uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected. 00072 This parameter can be a value of @ref FMPI2C_GENERAL_CALL_ADDRESSING_MODE */ 00073 00074 uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected. 00075 This parameter can be a value of @ref FMPI2C_NOSTRETCH_MODE */ 00076 00077 } FMPI2C_InitTypeDef; 00078 00079 /** 00080 * @} 00081 */ 00082 00083 /** @defgroup HAL_state_structure_definition HAL state structure definition 00084 * @brief HAL State structure definition 00085 * @note HAL FMPI2C State value coding follow below described bitmap :\n 00086 * b7-b6 Error information\n 00087 * 00 : No Error\n 00088 * 01 : Abort (Abort user request on going)\n 00089 * 10 : Timeout\n 00090 * 11 : Error\n 00091 * b5 Peripheral initialization status\n 00092 * 0 : Reset (peripheral not initialized)\n 00093 * 1 : Init done (peripheral initialized and ready to use. HAL FMPI2C Init function called)\n 00094 * b4 (not used)\n 00095 * x : Should be set to 0\n 00096 * b3\n 00097 * 0 : Ready or Busy (No Listen mode ongoing)\n 00098 * 1 : Listen (peripheral in Address Listen Mode)\n 00099 * b2 Intrinsic process state\n 00100 * 0 : Ready\n 00101 * 1 : Busy (peripheral busy with some configuration or internal operations)\n 00102 * b1 Rx state\n 00103 * 0 : Ready (no Rx operation ongoing)\n 00104 * 1 : Busy (Rx operation ongoing)\n 00105 * b0 Tx state\n 00106 * 0 : Ready (no Tx operation ongoing)\n 00107 * 1 : Busy (Tx operation ongoing) 00108 * @{ 00109 */ 00110 typedef enum 00111 { 00112 HAL_FMPI2C_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized */ 00113 HAL_FMPI2C_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use */ 00114 HAL_FMPI2C_STATE_BUSY = 0x24U, /*!< An internal process is ongoing */ 00115 HAL_FMPI2C_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing */ 00116 HAL_FMPI2C_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */ 00117 HAL_FMPI2C_STATE_LISTEN = 0x28U, /*!< Address Listen Mode is ongoing */ 00118 HAL_FMPI2C_STATE_BUSY_TX_LISTEN = 0x29U, /*!< Address Listen Mode and Data Transmission 00119 process is ongoing */ 00120 HAL_FMPI2C_STATE_BUSY_RX_LISTEN = 0x2AU, /*!< Address Listen Mode and Data Reception 00121 process is ongoing */ 00122 HAL_FMPI2C_STATE_ABORT = 0x60U, /*!< Abort user request ongoing */ 00123 HAL_FMPI2C_STATE_TIMEOUT = 0xA0U, /*!< Timeout state */ 00124 HAL_FMPI2C_STATE_ERROR = 0xE0U /*!< Error */ 00125 00126 } HAL_FMPI2C_StateTypeDef; 00127 00128 /** 00129 * @} 00130 */ 00131 00132 /** @defgroup HAL_mode_structure_definition HAL mode structure definition 00133 * @brief HAL Mode structure definition 00134 * @note HAL FMPI2C Mode value coding follow below described bitmap :\n 00135 * b7 (not used)\n 00136 * x : Should be set to 0\n 00137 * b6\n 00138 * 0 : None\n 00139 * 1 : Memory (HAL FMPI2C communication is in Memory Mode)\n 00140 * b5\n 00141 * 0 : None\n 00142 * 1 : Slave (HAL FMPI2C communication is in Slave Mode)\n 00143 * b4\n 00144 * 0 : None\n 00145 * 1 : Master (HAL FMPI2C communication is in Master Mode)\n 00146 * b3-b2-b1-b0 (not used)\n 00147 * xxxx : Should be set to 0000 00148 * @{ 00149 */ 00150 typedef enum 00151 { 00152 HAL_FMPI2C_MODE_NONE = 0x00U, /*!< No FMPI2C communication on going */ 00153 HAL_FMPI2C_MODE_MASTER = 0x10U, /*!< FMPI2C communication is in Master Mode */ 00154 HAL_FMPI2C_MODE_SLAVE = 0x20U, /*!< FMPI2C communication is in Slave Mode */ 00155 HAL_FMPI2C_MODE_MEM = 0x40U /*!< FMPI2C communication is in Memory Mode */ 00156 00157 } HAL_FMPI2C_ModeTypeDef; 00158 00159 /** 00160 * @} 00161 */ 00162 00163 /** @defgroup FMPI2C_Error_Code_definition FMPI2C Error Code definition 00164 * @brief FMPI2C Error Code definition 00165 * @{ 00166 */ 00167 #define HAL_FMPI2C_ERROR_NONE (0x00000000U) /*!< No error */ 00168 #define HAL_FMPI2C_ERROR_BERR (0x00000001U) /*!< BERR error */ 00169 #define HAL_FMPI2C_ERROR_ARLO (0x00000002U) /*!< ARLO error */ 00170 #define HAL_FMPI2C_ERROR_AF (0x00000004U) /*!< ACKF error */ 00171 #define HAL_FMPI2C_ERROR_OVR (0x00000008U) /*!< OVR error */ 00172 #define HAL_FMPI2C_ERROR_DMA (0x00000010U) /*!< DMA transfer error */ 00173 #define HAL_FMPI2C_ERROR_TIMEOUT (0x00000020U) /*!< Timeout error */ 00174 #define HAL_FMPI2C_ERROR_SIZE (0x00000040U) /*!< Size Management error */ 00175 #define HAL_FMPI2C_ERROR_DMA_PARAM (0x00000080U) /*!< DMA Parameter Error */ 00176 #if (USE_HAL_FMPI2C_REGISTER_CALLBACKS == 1) 00177 #define HAL_FMPI2C_ERROR_INVALID_CALLBACK (0x00000100U) /*!< Invalid Callback error */ 00178 #endif /* USE_HAL_FMPI2C_REGISTER_CALLBACKS */ 00179 #define HAL_FMPI2C_ERROR_INVALID_PARAM (0x00000200U) /*!< Invalid Parameters error */ 00180 /** 00181 * @} 00182 */ 00183 00184 /** @defgroup FMPI2C_handle_Structure_definition FMPI2C handle Structure definition 00185 * @brief FMPI2C handle Structure definition 00186 * @{ 00187 */ 00188 typedef struct __FMPI2C_HandleTypeDef 00189 { 00190 FMPI2C_TypeDef *Instance; /*!< FMPI2C registers base address */ 00191 00192 FMPI2C_InitTypeDef Init; /*!< FMPI2C communication parameters */ 00193 00194 uint8_t *pBuffPtr; /*!< Pointer to FMPI2C transfer buffer */ 00195 00196 uint16_t XferSize; /*!< FMPI2C transfer size */ 00197 00198 __IO uint16_t XferCount; /*!< FMPI2C transfer counter */ 00199 00200 __IO uint32_t XferOptions; /*!< FMPI2C sequantial transfer options, this parameter can 00201 be a value of @ref FMPI2C_XFEROPTIONS */ 00202 00203 __IO uint32_t PreviousState; /*!< FMPI2C communication Previous state */ 00204 00205 HAL_StatusTypeDef(*XferISR)(struct __FMPI2C_HandleTypeDef *hfmpi2c, uint32_t ITFlags, uint32_t ITSources); 00206 /*!< FMPI2C transfer IRQ handler function pointer */ 00207 00208 DMA_HandleTypeDef *hdmatx; /*!< FMPI2C Tx DMA handle parameters */ 00209 00210 DMA_HandleTypeDef *hdmarx; /*!< FMPI2C Rx DMA handle parameters */ 00211 00212 HAL_LockTypeDef Lock; /*!< FMPI2C locking object */ 00213 00214 __IO HAL_FMPI2C_StateTypeDef State; /*!< FMPI2C communication state */ 00215 00216 __IO HAL_FMPI2C_ModeTypeDef Mode; /*!< FMPI2C communication mode */ 00217 00218 __IO uint32_t ErrorCode; /*!< FMPI2C Error code */ 00219 00220 __IO uint32_t AddrEventCount; /*!< FMPI2C Address Event counter */ 00221 00222 #if (USE_HAL_FMPI2C_REGISTER_CALLBACKS == 1) 00223 void (* MasterTxCpltCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c); 00224 /*!< FMPI2C Master Tx Transfer completed callback */ 00225 void (* MasterRxCpltCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c); 00226 /*!< FMPI2C Master Rx Transfer completed callback */ 00227 void (* SlaveTxCpltCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c); 00228 /*!< FMPI2C Slave Tx Transfer completed callback */ 00229 void (* SlaveRxCpltCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c); 00230 /*!< FMPI2C Slave Rx Transfer completed callback */ 00231 void (* ListenCpltCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c); 00232 /*!< FMPI2C Listen Complete callback */ 00233 void (* MemTxCpltCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c); 00234 /*!< FMPI2C Memory Tx Transfer completed callback */ 00235 void (* MemRxCpltCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c); 00236 /*!< FMPI2C Memory Rx Transfer completed callback */ 00237 void (* ErrorCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c); 00238 /*!< FMPI2C Error callback */ 00239 void (* AbortCpltCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c); 00240 /*!< FMPI2C Abort callback */ 00241 00242 void (* AddrCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); 00243 /*!< FMPI2C Slave Address Match callback */ 00244 00245 void (* MspInitCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c); 00246 /*!< FMPI2C Msp Init callback */ 00247 void (* MspDeInitCallback)(struct __FMPI2C_HandleTypeDef *hfmpi2c); 00248 /*!< FMPI2C Msp DeInit callback */ 00249 00250 #endif /* USE_HAL_FMPI2C_REGISTER_CALLBACKS */ 00251 } FMPI2C_HandleTypeDef; 00252 00253 #if (USE_HAL_FMPI2C_REGISTER_CALLBACKS == 1) 00254 /** 00255 * @brief HAL FMPI2C Callback ID enumeration definition 00256 */ 00257 typedef enum 00258 { 00259 HAL_FMPI2C_MASTER_TX_COMPLETE_CB_ID = 0x00U, /*!< FMPI2C Master Tx Transfer completed callback ID */ 00260 HAL_FMPI2C_MASTER_RX_COMPLETE_CB_ID = 0x01U, /*!< FMPI2C Master Rx Transfer completed callback ID */ 00261 HAL_FMPI2C_SLAVE_TX_COMPLETE_CB_ID = 0x02U, /*!< FMPI2C Slave Tx Transfer completed callback ID */ 00262 HAL_FMPI2C_SLAVE_RX_COMPLETE_CB_ID = 0x03U, /*!< FMPI2C Slave Rx Transfer completed callback ID */ 00263 HAL_FMPI2C_LISTEN_COMPLETE_CB_ID = 0x04U, /*!< FMPI2C Listen Complete callback ID */ 00264 HAL_FMPI2C_MEM_TX_COMPLETE_CB_ID = 0x05U, /*!< FMPI2C Memory Tx Transfer callback ID */ 00265 HAL_FMPI2C_MEM_RX_COMPLETE_CB_ID = 0x06U, /*!< FMPI2C Memory Rx Transfer completed callback ID */ 00266 HAL_FMPI2C_ERROR_CB_ID = 0x07U, /*!< FMPI2C Error callback ID */ 00267 HAL_FMPI2C_ABORT_CB_ID = 0x08U, /*!< FMPI2C Abort callback ID */ 00268 00269 HAL_FMPI2C_MSPINIT_CB_ID = 0x09U, /*!< FMPI2C Msp Init callback ID */ 00270 HAL_FMPI2C_MSPDEINIT_CB_ID = 0x0AU /*!< FMPI2C Msp DeInit callback ID */ 00271 00272 } HAL_FMPI2C_CallbackIDTypeDef; 00273 00274 /** 00275 * @brief HAL FMPI2C Callback pointer definition 00276 */ 00277 typedef void (*pFMPI2C_CallbackTypeDef)(FMPI2C_HandleTypeDef *hfmpi2c); 00278 /*!< pointer to an FMPI2C callback function */ 00279 typedef void (*pFMPI2C_AddrCallbackTypeDef)(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t TransferDirection, 00280 uint16_t AddrMatchCode); 00281 /*!< pointer to an FMPI2C Address Match callback function */ 00282 00283 #endif /* USE_HAL_FMPI2C_REGISTER_CALLBACKS */ 00284 /** 00285 * @} 00286 */ 00287 00288 /** 00289 * @} 00290 */ 00291 /* Exported constants --------------------------------------------------------*/ 00292 00293 /** @defgroup FMPI2C_Exported_Constants FMPI2C Exported Constants 00294 * @{ 00295 */ 00296 00297 /** @defgroup FMPI2C_XFEROPTIONS FMPI2C Sequential Transfer Options 00298 * @{ 00299 */ 00300 #define FMPI2C_FIRST_FRAME ((uint32_t)FMPI2C_SOFTEND_MODE) 00301 #define FMPI2C_FIRST_AND_NEXT_FRAME ((uint32_t)(FMPI2C_RELOAD_MODE | FMPI2C_SOFTEND_MODE)) 00302 #define FMPI2C_NEXT_FRAME ((uint32_t)(FMPI2C_RELOAD_MODE | FMPI2C_SOFTEND_MODE)) 00303 #define FMPI2C_FIRST_AND_LAST_FRAME ((uint32_t)FMPI2C_AUTOEND_MODE) 00304 #define FMPI2C_LAST_FRAME ((uint32_t)FMPI2C_AUTOEND_MODE) 00305 #define FMPI2C_LAST_FRAME_NO_STOP ((uint32_t)FMPI2C_SOFTEND_MODE) 00306 00307 /* List of XferOptions in usage of : 00308 * 1- Restart condition in all use cases (direction change or not) 00309 */ 00310 #define FMPI2C_OTHER_FRAME (0x000000AAU) 00311 #define FMPI2C_OTHER_AND_LAST_FRAME (0x0000AA00U) 00312 /** 00313 * @} 00314 */ 00315 00316 /** @defgroup FMPI2C_ADDRESSING_MODE FMPI2C Addressing Mode 00317 * @{ 00318 */ 00319 #define FMPI2C_ADDRESSINGMODE_7BIT (0x00000001U) 00320 #define FMPI2C_ADDRESSINGMODE_10BIT (0x00000002U) 00321 /** 00322 * @} 00323 */ 00324 00325 /** @defgroup FMPI2C_DUAL_ADDRESSING_MODE FMPI2C Dual Addressing Mode 00326 * @{ 00327 */ 00328 #define FMPI2C_DUALADDRESS_DISABLE (0x00000000U) 00329 #define FMPI2C_DUALADDRESS_ENABLE FMPI2C_OAR2_OA2EN 00330 /** 00331 * @} 00332 */ 00333 00334 /** @defgroup FMPI2C_OWN_ADDRESS2_MASKS FMPI2C Own Address2 Masks 00335 * @{ 00336 */ 00337 #define FMPI2C_OA2_NOMASK ((uint8_t)0x00U) 00338 #define FMPI2C_OA2_MASK01 ((uint8_t)0x01U) 00339 #define FMPI2C_OA2_MASK02 ((uint8_t)0x02U) 00340 #define FMPI2C_OA2_MASK03 ((uint8_t)0x03U) 00341 #define FMPI2C_OA2_MASK04 ((uint8_t)0x04U) 00342 #define FMPI2C_OA2_MASK05 ((uint8_t)0x05U) 00343 #define FMPI2C_OA2_MASK06 ((uint8_t)0x06U) 00344 #define FMPI2C_OA2_MASK07 ((uint8_t)0x07U) 00345 /** 00346 * @} 00347 */ 00348 00349 /** @defgroup FMPI2C_GENERAL_CALL_ADDRESSING_MODE FMPI2C General Call Addressing Mode 00350 * @{ 00351 */ 00352 #define FMPI2C_GENERALCALL_DISABLE (0x00000000U) 00353 #define FMPI2C_GENERALCALL_ENABLE FMPI2C_CR1_GCEN 00354 /** 00355 * @} 00356 */ 00357 00358 /** @defgroup FMPI2C_NOSTRETCH_MODE FMPI2C No-Stretch Mode 00359 * @{ 00360 */ 00361 #define FMPI2C_NOSTRETCH_DISABLE (0x00000000U) 00362 #define FMPI2C_NOSTRETCH_ENABLE FMPI2C_CR1_NOSTRETCH 00363 /** 00364 * @} 00365 */ 00366 00367 /** @defgroup FMPI2C_MEMORY_ADDRESS_SIZE FMPI2C Memory Address Size 00368 * @{ 00369 */ 00370 #define FMPI2C_MEMADD_SIZE_8BIT (0x00000001U) 00371 #define FMPI2C_MEMADD_SIZE_16BIT (0x00000002U) 00372 /** 00373 * @} 00374 */ 00375 00376 /** @defgroup FMPI2C_XFERDIRECTION FMPI2C Transfer Direction Master Point of View 00377 * @{ 00378 */ 00379 #define FMPI2C_DIRECTION_TRANSMIT (0x00000000U) 00380 #define FMPI2C_DIRECTION_RECEIVE (0x00000001U) 00381 /** 00382 * @} 00383 */ 00384 00385 /** @defgroup FMPI2C_RELOAD_END_MODE FMPI2C Reload End Mode 00386 * @{ 00387 */ 00388 #define FMPI2C_RELOAD_MODE FMPI2C_CR2_RELOAD 00389 #define FMPI2C_AUTOEND_MODE FMPI2C_CR2_AUTOEND 00390 #define FMPI2C_SOFTEND_MODE (0x00000000U) 00391 /** 00392 * @} 00393 */ 00394 00395 /** @defgroup FMPI2C_START_STOP_MODE FMPI2C Start or Stop Mode 00396 * @{ 00397 */ 00398 #define FMPI2C_NO_STARTSTOP (0x00000000U) 00399 #define FMPI2C_GENERATE_STOP (uint32_t)(0x80000000U | FMPI2C_CR2_STOP) 00400 #define FMPI2C_GENERATE_START_READ (uint32_t)(0x80000000U | FMPI2C_CR2_START | FMPI2C_CR2_RD_WRN) 00401 #define FMPI2C_GENERATE_START_WRITE (uint32_t)(0x80000000U | FMPI2C_CR2_START) 00402 /** 00403 * @} 00404 */ 00405 00406 /** @defgroup FMPI2C_Interrupt_configuration_definition FMPI2C Interrupt configuration definition 00407 * @brief FMPI2C Interrupt definition 00408 * Elements values convention: 0xXXXXXXXX 00409 * - XXXXXXXX : Interrupt control mask 00410 * @{ 00411 */ 00412 #define FMPI2C_IT_ERRI FMPI2C_CR1_ERRIE 00413 #define FMPI2C_IT_TCI FMPI2C_CR1_TCIE 00414 #define FMPI2C_IT_STOPI FMPI2C_CR1_STOPIE 00415 #define FMPI2C_IT_NACKI FMPI2C_CR1_NACKIE 00416 #define FMPI2C_IT_ADDRI FMPI2C_CR1_ADDRIE 00417 #define FMPI2C_IT_RXI FMPI2C_CR1_RXIE 00418 #define FMPI2C_IT_TXI FMPI2C_CR1_TXIE 00419 /** 00420 * @} 00421 */ 00422 00423 /** @defgroup FMPI2C_Flag_definition FMPI2C Flag definition 00424 * @{ 00425 */ 00426 #define FMPI2C_FLAG_TXE FMPI2C_ISR_TXE 00427 #define FMPI2C_FLAG_TXIS FMPI2C_ISR_TXIS 00428 #define FMPI2C_FLAG_RXNE FMPI2C_ISR_RXNE 00429 #define FMPI2C_FLAG_ADDR FMPI2C_ISR_ADDR 00430 #define FMPI2C_FLAG_AF FMPI2C_ISR_NACKF 00431 #define FMPI2C_FLAG_STOPF FMPI2C_ISR_STOPF 00432 #define FMPI2C_FLAG_TC FMPI2C_ISR_TC 00433 #define FMPI2C_FLAG_TCR FMPI2C_ISR_TCR 00434 #define FMPI2C_FLAG_BERR FMPI2C_ISR_BERR 00435 #define FMPI2C_FLAG_ARLO FMPI2C_ISR_ARLO 00436 #define FMPI2C_FLAG_OVR FMPI2C_ISR_OVR 00437 #define FMPI2C_FLAG_PECERR FMPI2C_ISR_PECERR 00438 #define FMPI2C_FLAG_TIMEOUT FMPI2C_ISR_TIMEOUT 00439 #define FMPI2C_FLAG_ALERT FMPI2C_ISR_ALERT 00440 #define FMPI2C_FLAG_BUSY FMPI2C_ISR_BUSY 00441 #define FMPI2C_FLAG_DIR FMPI2C_ISR_DIR 00442 /** 00443 * @} 00444 */ 00445 00446 /** 00447 * @} 00448 */ 00449 00450 /* Exported macros -----------------------------------------------------------*/ 00451 00452 /** @defgroup FMPI2C_Exported_Macros FMPI2C Exported Macros 00453 * @{ 00454 */ 00455 00456 /** @brief Reset FMPI2C handle state. 00457 * @param __HANDLE__ specifies the FMPI2C Handle. 00458 * @retval None 00459 */ 00460 #if (USE_HAL_FMPI2C_REGISTER_CALLBACKS == 1) 00461 #define __HAL_FMPI2C_RESET_HANDLE_STATE(__HANDLE__) do{ \ 00462 (__HANDLE__)->State = HAL_FMPI2C_STATE_RESET; \ 00463 (__HANDLE__)->MspInitCallback = NULL; \ 00464 (__HANDLE__)->MspDeInitCallback = NULL; \ 00465 } while(0) 00466 #else 00467 #define __HAL_FMPI2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_FMPI2C_STATE_RESET) 00468 #endif /* USE_HAL_FMPI2C_REGISTER_CALLBACKS */ 00469 00470 /** @brief Enable the specified FMPI2C interrupt. 00471 * @param __HANDLE__ specifies the FMPI2C Handle. 00472 * @param __INTERRUPT__ specifies the interrupt source to enable. 00473 * This parameter can be one of the following values: 00474 * @arg @ref FMPI2C_IT_ERRI Errors interrupt enable 00475 * @arg @ref FMPI2C_IT_TCI Transfer complete interrupt enable 00476 * @arg @ref FMPI2C_IT_STOPI STOP detection interrupt enable 00477 * @arg @ref FMPI2C_IT_NACKI NACK received interrupt enable 00478 * @arg @ref FMPI2C_IT_ADDRI Address match interrupt enable 00479 * @arg @ref FMPI2C_IT_RXI RX interrupt enable 00480 * @arg @ref FMPI2C_IT_TXI TX interrupt enable 00481 * 00482 * @retval None 00483 */ 00484 #define __HAL_FMPI2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__)) 00485 00486 /** @brief Disable the specified FMPI2C interrupt. 00487 * @param __HANDLE__ specifies the FMPI2C Handle. 00488 * @param __INTERRUPT__ specifies the interrupt source to disable. 00489 * This parameter can be one of the following values: 00490 * @arg @ref FMPI2C_IT_ERRI Errors interrupt enable 00491 * @arg @ref FMPI2C_IT_TCI Transfer complete interrupt enable 00492 * @arg @ref FMPI2C_IT_STOPI STOP detection interrupt enable 00493 * @arg @ref FMPI2C_IT_NACKI NACK received interrupt enable 00494 * @arg @ref FMPI2C_IT_ADDRI Address match interrupt enable 00495 * @arg @ref FMPI2C_IT_RXI RX interrupt enable 00496 * @arg @ref FMPI2C_IT_TXI TX interrupt enable 00497 * 00498 * @retval None 00499 */ 00500 #define __HAL_FMPI2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__))) 00501 00502 /** @brief Check whether the specified FMPI2C interrupt source is enabled or not. 00503 * @param __HANDLE__ specifies the FMPI2C Handle. 00504 * @param __INTERRUPT__ specifies the FMPI2C interrupt source to check. 00505 * This parameter can be one of the following values: 00506 * @arg @ref FMPI2C_IT_ERRI Errors interrupt enable 00507 * @arg @ref FMPI2C_IT_TCI Transfer complete interrupt enable 00508 * @arg @ref FMPI2C_IT_STOPI STOP detection interrupt enable 00509 * @arg @ref FMPI2C_IT_NACKI NACK received interrupt enable 00510 * @arg @ref FMPI2C_IT_ADDRI Address match interrupt enable 00511 * @arg @ref FMPI2C_IT_RXI RX interrupt enable 00512 * @arg @ref FMPI2C_IT_TXI TX interrupt enable 00513 * 00514 * @retval The new state of __INTERRUPT__ (SET or RESET). 00515 */ 00516 #define __HAL_FMPI2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & \ 00517 (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 00518 00519 /** @brief Check whether the specified FMPI2C flag is set or not. 00520 * @param __HANDLE__ specifies the FMPI2C Handle. 00521 * @param __FLAG__ specifies the flag to check. 00522 * This parameter can be one of the following values: 00523 * @arg @ref FMPI2C_FLAG_TXE Transmit data register empty 00524 * @arg @ref FMPI2C_FLAG_TXIS Transmit interrupt status 00525 * @arg @ref FMPI2C_FLAG_RXNE Receive data register not empty 00526 * @arg @ref FMPI2C_FLAG_ADDR Address matched (slave mode) 00527 * @arg @ref FMPI2C_FLAG_AF Acknowledge failure received flag 00528 * @arg @ref FMPI2C_FLAG_STOPF STOP detection flag 00529 * @arg @ref FMPI2C_FLAG_TC Transfer complete (master mode) 00530 * @arg @ref FMPI2C_FLAG_TCR Transfer complete reload 00531 * @arg @ref FMPI2C_FLAG_BERR Bus error 00532 * @arg @ref FMPI2C_FLAG_ARLO Arbitration lost 00533 * @arg @ref FMPI2C_FLAG_OVR Overrun/Underrun 00534 * @arg @ref FMPI2C_FLAG_PECERR PEC error in reception 00535 * @arg @ref FMPI2C_FLAG_TIMEOUT Timeout or Tlow detection flag 00536 * @arg @ref FMPI2C_FLAG_ALERT SMBus alert 00537 * @arg @ref FMPI2C_FLAG_BUSY Bus busy 00538 * @arg @ref FMPI2C_FLAG_DIR Transfer direction (slave mode) 00539 * 00540 * @retval The new state of __FLAG__ (SET or RESET). 00541 */ 00542 #define FMPI2C_FLAG_MASK (0x0001FFFFU) 00543 #define __HAL_FMPI2C_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & \ 00544 (__FLAG__)) == (__FLAG__)) ? SET : RESET) 00545 00546 /** @brief Clear the FMPI2C pending flags which are cleared by writing 1 in a specific bit. 00547 * @param __HANDLE__ specifies the FMPI2C Handle. 00548 * @param __FLAG__ specifies the flag to clear. 00549 * This parameter can be any combination of the following values: 00550 * @arg @ref FMPI2C_FLAG_TXE Transmit data register empty 00551 * @arg @ref FMPI2C_FLAG_ADDR Address matched (slave mode) 00552 * @arg @ref FMPI2C_FLAG_AF Acknowledge failure received flag 00553 * @arg @ref FMPI2C_FLAG_STOPF STOP detection flag 00554 * @arg @ref FMPI2C_FLAG_BERR Bus error 00555 * @arg @ref FMPI2C_FLAG_ARLO Arbitration lost 00556 * @arg @ref FMPI2C_FLAG_OVR Overrun/Underrun 00557 * @arg @ref FMPI2C_FLAG_PECERR PEC error in reception 00558 * @arg @ref FMPI2C_FLAG_TIMEOUT Timeout or Tlow detection flag 00559 * @arg @ref FMPI2C_FLAG_ALERT SMBus alert 00560 * 00561 * @retval None 00562 */ 00563 #define __HAL_FMPI2C_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__FLAG__) == FMPI2C_FLAG_TXE) ? \ 00564 ((__HANDLE__)->Instance->ISR |= (__FLAG__)) : \ 00565 ((__HANDLE__)->Instance->ICR = (__FLAG__))) 00566 00567 /** @brief Enable the specified FMPI2C peripheral. 00568 * @param __HANDLE__ specifies the FMPI2C Handle. 00569 * @retval None 00570 */ 00571 #define __HAL_FMPI2C_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR1, FMPI2C_CR1_PE)) 00572 00573 /** @brief Disable the specified FMPI2C peripheral. 00574 * @param __HANDLE__ specifies the FMPI2C Handle. 00575 * @retval None 00576 */ 00577 #define __HAL_FMPI2C_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, FMPI2C_CR1_PE)) 00578 00579 /** @brief Generate a Non-Acknowledge FMPI2C peripheral in Slave mode. 00580 * @param __HANDLE__ specifies the FMPI2C Handle. 00581 * @retval None 00582 */ 00583 #define __HAL_FMPI2C_GENERATE_NACK(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR2, FMPI2C_CR2_NACK)) 00584 /** 00585 * @} 00586 */ 00587 00588 /* Include FMPI2C HAL Extended module */ 00589 #include "stm32f4xx_hal_fmpi2c_ex.h" 00590 00591 /* Exported functions --------------------------------------------------------*/ 00592 /** @addtogroup FMPI2C_Exported_Functions 00593 * @{ 00594 */ 00595 00596 /** @addtogroup FMPI2C_Exported_Functions_Group1 Initialization and de-initialization functions 00597 * @{ 00598 */ 00599 /* Initialization and de-initialization functions******************************/ 00600 HAL_StatusTypeDef HAL_FMPI2C_Init(FMPI2C_HandleTypeDef *hfmpi2c); 00601 HAL_StatusTypeDef HAL_FMPI2C_DeInit(FMPI2C_HandleTypeDef *hfmpi2c); 00602 void HAL_FMPI2C_MspInit(FMPI2C_HandleTypeDef *hfmpi2c); 00603 void HAL_FMPI2C_MspDeInit(FMPI2C_HandleTypeDef *hfmpi2c); 00604 00605 /* Callbacks Register/UnRegister functions ***********************************/ 00606 #if (USE_HAL_FMPI2C_REGISTER_CALLBACKS == 1) 00607 HAL_StatusTypeDef HAL_FMPI2C_RegisterCallback(FMPI2C_HandleTypeDef *hfmpi2c, HAL_FMPI2C_CallbackIDTypeDef CallbackID, 00608 pFMPI2C_CallbackTypeDef pCallback); 00609 HAL_StatusTypeDef HAL_FMPI2C_UnRegisterCallback(FMPI2C_HandleTypeDef *hfmpi2c, HAL_FMPI2C_CallbackIDTypeDef CallbackID); 00610 00611 HAL_StatusTypeDef HAL_FMPI2C_RegisterAddrCallback(FMPI2C_HandleTypeDef *hfmpi2c, pFMPI2C_AddrCallbackTypeDef pCallback); 00612 HAL_StatusTypeDef HAL_FMPI2C_UnRegisterAddrCallback(FMPI2C_HandleTypeDef *hfmpi2c); 00613 #endif /* USE_HAL_FMPI2C_REGISTER_CALLBACKS */ 00614 /** 00615 * @} 00616 */ 00617 00618 /** @addtogroup FMPI2C_Exported_Functions_Group2 Input and Output operation functions 00619 * @{ 00620 */ 00621 /* IO operation functions ****************************************************/ 00622 /******* Blocking mode: Polling */ 00623 HAL_StatusTypeDef HAL_FMPI2C_Master_Transmit(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, 00624 uint16_t Size, uint32_t Timeout); 00625 HAL_StatusTypeDef HAL_FMPI2C_Master_Receive(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, 00626 uint16_t Size, uint32_t Timeout); 00627 HAL_StatusTypeDef HAL_FMPI2C_Slave_Transmit(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size, 00628 uint32_t Timeout); 00629 HAL_StatusTypeDef HAL_FMPI2C_Slave_Receive(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size, 00630 uint32_t Timeout); 00631 HAL_StatusTypeDef HAL_FMPI2C_Mem_Write(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress, 00632 uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout); 00633 HAL_StatusTypeDef HAL_FMPI2C_Mem_Read(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress, 00634 uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout); 00635 HAL_StatusTypeDef HAL_FMPI2C_IsDeviceReady(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint32_t Trials, 00636 uint32_t Timeout); 00637 00638 /******* Non-Blocking mode: Interrupt */ 00639 HAL_StatusTypeDef HAL_FMPI2C_Master_Transmit_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, 00640 uint16_t Size); 00641 HAL_StatusTypeDef HAL_FMPI2C_Master_Receive_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, 00642 uint16_t Size); 00643 HAL_StatusTypeDef HAL_FMPI2C_Slave_Transmit_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size); 00644 HAL_StatusTypeDef HAL_FMPI2C_Slave_Receive_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size); 00645 HAL_StatusTypeDef HAL_FMPI2C_Mem_Write_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress, 00646 uint16_t MemAddSize, uint8_t *pData, uint16_t Size); 00647 HAL_StatusTypeDef HAL_FMPI2C_Mem_Read_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress, 00648 uint16_t MemAddSize, uint8_t *pData, uint16_t Size); 00649 00650 HAL_StatusTypeDef HAL_FMPI2C_Master_Seq_Transmit_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, 00651 uint16_t Size, uint32_t XferOptions); 00652 HAL_StatusTypeDef HAL_FMPI2C_Master_Seq_Receive_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, 00653 uint16_t Size, uint32_t XferOptions); 00654 HAL_StatusTypeDef HAL_FMPI2C_Slave_Seq_Transmit_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size, 00655 uint32_t XferOptions); 00656 HAL_StatusTypeDef HAL_FMPI2C_Slave_Seq_Receive_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size, 00657 uint32_t XferOptions); 00658 HAL_StatusTypeDef HAL_FMPI2C_EnableListen_IT(FMPI2C_HandleTypeDef *hfmpi2c); 00659 HAL_StatusTypeDef HAL_FMPI2C_DisableListen_IT(FMPI2C_HandleTypeDef *hfmpi2c); 00660 HAL_StatusTypeDef HAL_FMPI2C_Master_Abort_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress); 00661 00662 /******* Non-Blocking mode: DMA */ 00663 HAL_StatusTypeDef HAL_FMPI2C_Master_Transmit_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, 00664 uint16_t Size); 00665 HAL_StatusTypeDef HAL_FMPI2C_Master_Receive_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, 00666 uint16_t Size); 00667 HAL_StatusTypeDef HAL_FMPI2C_Slave_Transmit_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size); 00668 HAL_StatusTypeDef HAL_FMPI2C_Slave_Receive_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size); 00669 HAL_StatusTypeDef HAL_FMPI2C_Mem_Write_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress, 00670 uint16_t MemAddSize, uint8_t *pData, uint16_t Size); 00671 HAL_StatusTypeDef HAL_FMPI2C_Mem_Read_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress, 00672 uint16_t MemAddSize, uint8_t *pData, uint16_t Size); 00673 00674 HAL_StatusTypeDef HAL_FMPI2C_Master_Seq_Transmit_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, 00675 uint16_t Size, uint32_t XferOptions); 00676 HAL_StatusTypeDef HAL_FMPI2C_Master_Seq_Receive_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, 00677 uint16_t Size, uint32_t XferOptions); 00678 HAL_StatusTypeDef HAL_FMPI2C_Slave_Seq_Transmit_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size, 00679 uint32_t XferOptions); 00680 HAL_StatusTypeDef HAL_FMPI2C_Slave_Seq_Receive_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size, 00681 uint32_t XferOptions); 00682 /** 00683 * @} 00684 */ 00685 00686 /** @addtogroup FMPI2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks 00687 * @{ 00688 */ 00689 /******* FMPI2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */ 00690 void HAL_FMPI2C_EV_IRQHandler(FMPI2C_HandleTypeDef *hfmpi2c); 00691 void HAL_FMPI2C_ER_IRQHandler(FMPI2C_HandleTypeDef *hfmpi2c); 00692 void HAL_FMPI2C_MasterTxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c); 00693 void HAL_FMPI2C_MasterRxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c); 00694 void HAL_FMPI2C_SlaveTxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c); 00695 void HAL_FMPI2C_SlaveRxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c); 00696 void HAL_FMPI2C_AddrCallback(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); 00697 void HAL_FMPI2C_ListenCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c); 00698 void HAL_FMPI2C_MemTxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c); 00699 void HAL_FMPI2C_MemRxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c); 00700 void HAL_FMPI2C_ErrorCallback(FMPI2C_HandleTypeDef *hfmpi2c); 00701 void HAL_FMPI2C_AbortCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c); 00702 /** 00703 * @} 00704 */ 00705 00706 /** @addtogroup FMPI2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions 00707 * @{ 00708 */ 00709 /* Peripheral State, Mode and Error functions *********************************/ 00710 HAL_FMPI2C_StateTypeDef HAL_FMPI2C_GetState(FMPI2C_HandleTypeDef *hfmpi2c); 00711 HAL_FMPI2C_ModeTypeDef HAL_FMPI2C_GetMode(FMPI2C_HandleTypeDef *hfmpi2c); 00712 uint32_t HAL_FMPI2C_GetError(FMPI2C_HandleTypeDef *hfmpi2c); 00713 00714 /** 00715 * @} 00716 */ 00717 00718 /** 00719 * @} 00720 */ 00721 00722 /* Private constants ---------------------------------------------------------*/ 00723 /** @defgroup FMPI2C_Private_Constants FMPI2C Private Constants 00724 * @{ 00725 */ 00726 00727 /** 00728 * @} 00729 */ 00730 00731 /* Private macros ------------------------------------------------------------*/ 00732 /** @defgroup FMPI2C_Private_Macro FMPI2C Private Macros 00733 * @{ 00734 */ 00735 00736 #define IS_FMPI2C_ADDRESSING_MODE(MODE) (((MODE) == FMPI2C_ADDRESSINGMODE_7BIT) || \ 00737 ((MODE) == FMPI2C_ADDRESSINGMODE_10BIT)) 00738 00739 #define IS_FMPI2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == FMPI2C_DUALADDRESS_DISABLE) || \ 00740 ((ADDRESS) == FMPI2C_DUALADDRESS_ENABLE)) 00741 00742 #define IS_FMPI2C_OWN_ADDRESS2_MASK(MASK) (((MASK) == FMPI2C_OA2_NOMASK) || \ 00743 ((MASK) == FMPI2C_OA2_MASK01) || \ 00744 ((MASK) == FMPI2C_OA2_MASK02) || \ 00745 ((MASK) == FMPI2C_OA2_MASK03) || \ 00746 ((MASK) == FMPI2C_OA2_MASK04) || \ 00747 ((MASK) == FMPI2C_OA2_MASK05) || \ 00748 ((MASK) == FMPI2C_OA2_MASK06) || \ 00749 ((MASK) == FMPI2C_OA2_MASK07)) 00750 00751 #define IS_FMPI2C_GENERAL_CALL(CALL) (((CALL) == FMPI2C_GENERALCALL_DISABLE) || \ 00752 ((CALL) == FMPI2C_GENERALCALL_ENABLE)) 00753 00754 #define IS_FMPI2C_NO_STRETCH(STRETCH) (((STRETCH) == FMPI2C_NOSTRETCH_DISABLE) || \ 00755 ((STRETCH) == FMPI2C_NOSTRETCH_ENABLE)) 00756 00757 #define IS_FMPI2C_MEMADD_SIZE(SIZE) (((SIZE) == FMPI2C_MEMADD_SIZE_8BIT) || \ 00758 ((SIZE) == FMPI2C_MEMADD_SIZE_16BIT)) 00759 00760 #define IS_TRANSFER_MODE(MODE) (((MODE) == FMPI2C_RELOAD_MODE) || \ 00761 ((MODE) == FMPI2C_AUTOEND_MODE) || \ 00762 ((MODE) == FMPI2C_SOFTEND_MODE)) 00763 00764 #define IS_TRANSFER_REQUEST(REQUEST) (((REQUEST) == FMPI2C_GENERATE_STOP) || \ 00765 ((REQUEST) == FMPI2C_GENERATE_START_READ) || \ 00766 ((REQUEST) == FMPI2C_GENERATE_START_WRITE) || \ 00767 ((REQUEST) == FMPI2C_NO_STARTSTOP)) 00768 00769 #define IS_FMPI2C_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == FMPI2C_FIRST_FRAME) || \ 00770 ((REQUEST) == FMPI2C_FIRST_AND_NEXT_FRAME) || \ 00771 ((REQUEST) == FMPI2C_NEXT_FRAME) || \ 00772 ((REQUEST) == FMPI2C_FIRST_AND_LAST_FRAME) || \ 00773 ((REQUEST) == FMPI2C_LAST_FRAME) || \ 00774 ((REQUEST) == FMPI2C_LAST_FRAME_NO_STOP) || \ 00775 IS_FMPI2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST)) 00776 00777 #define IS_FMPI2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == FMPI2C_OTHER_FRAME) || \ 00778 ((REQUEST) == FMPI2C_OTHER_AND_LAST_FRAME)) 00779 00780 #define FMPI2C_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= \ 00781 (uint32_t)~((uint32_t)(FMPI2C_CR2_SADD | FMPI2C_CR2_HEAD10R | \ 00782 FMPI2C_CR2_NBYTES | FMPI2C_CR2_RELOAD | \ 00783 FMPI2C_CR2_RD_WRN))) 00784 00785 #define FMPI2C_GET_ADDR_MATCH(__HANDLE__) ((uint16_t)(((__HANDLE__)->Instance->ISR & FMPI2C_ISR_ADDCODE) \ 00786 >> 16U)) 00787 #define FMPI2C_GET_DIR(__HANDLE__) ((uint8_t)(((__HANDLE__)->Instance->ISR & FMPI2C_ISR_DIR) \ 00788 >> 16U)) 00789 #define FMPI2C_GET_STOP_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & FMPI2C_CR2_AUTOEND) 00790 #define FMPI2C_GET_OWN_ADDRESS1(__HANDLE__) ((uint16_t)((__HANDLE__)->Instance->OAR1 & FMPI2C_OAR1_OA1)) 00791 #define FMPI2C_GET_OWN_ADDRESS2(__HANDLE__) ((uint16_t)((__HANDLE__)->Instance->OAR2 & FMPI2C_OAR2_OA2)) 00792 00793 #define IS_FMPI2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x000003FFU) 00794 #define IS_FMPI2C_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FFU) 00795 00796 #define FMPI2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & \ 00797 (uint16_t)(0xFF00U))) >> 8U))) 00798 #define FMPI2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FFU)))) 00799 00800 #define FMPI2C_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == FMPI2C_ADDRESSINGMODE_7BIT) ? \ 00801 (uint32_t)((((uint32_t)(__ADDRESS__) & (FMPI2C_CR2_SADD)) | \ 00802 (FMPI2C_CR2_START) | (FMPI2C_CR2_AUTOEND)) & \ 00803 (~FMPI2C_CR2_RD_WRN)) : \ 00804 (uint32_t)((((uint32_t)(__ADDRESS__) & (FMPI2C_CR2_SADD)) | \ 00805 (FMPI2C_CR2_ADD10) | (FMPI2C_CR2_START)) & \ 00806 (~FMPI2C_CR2_RD_WRN))) 00807 00808 #define FMPI2C_CHECK_FLAG(__ISR__, __FLAG__) ((((__ISR__) & ((__FLAG__) & FMPI2C_FLAG_MASK)) == \ 00809 ((__FLAG__) & FMPI2C_FLAG_MASK)) ? SET : RESET) 00810 #define FMPI2C_CHECK_IT_SOURCE(__CR1__, __IT__) ((((__CR1__) & (__IT__)) == (__IT__)) ? SET : RESET) 00811 /** 00812 * @} 00813 */ 00814 00815 /* Private Functions ---------------------------------------------------------*/ 00816 /** @defgroup FMPI2C_Private_Functions FMPI2C Private Functions 00817 * @{ 00818 */ 00819 /* Private functions are defined in stm32f4xx_hal_fmpi2c.c file */ 00820 /** 00821 * @} 00822 */ 00823 00824 /** 00825 * @} 00826 */ 00827 00828 /** 00829 * @} 00830 */ 00831 00832 #endif /* FMPI2C_CR1_PE */ 00833 #ifdef __cplusplus 00834 } 00835 #endif 00836 00837 00838 #endif /* STM32F4xx_HAL_FMPI2C_H */ 00839 00840 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
1.7.6.1