STM32F479xx HAL User Manual
stm32f4xx_hal_lptim.c
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00001 /**
00002   ******************************************************************************
00003   * @file    stm32f4xx_hal_lptim.c
00004   * @author  MCD Application Team
00005   * @brief   LPTIM HAL module driver.
00006   *          This file provides firmware functions to manage the following
00007   *          functionalities of the Low Power Timer (LPTIM) peripheral:
00008   *           + Initialization and de-initialization functions.
00009   *           + Start/Stop operation functions in polling mode.
00010   *           + Start/Stop operation functions in interrupt mode.
00011   *           + Reading operation functions.
00012   *           + Peripheral State functions.
00013   *
00014   @verbatim
00015   ==============================================================================
00016                      ##### How to use this driver #####
00017   ==============================================================================
00018     [..]
00019       The LPTIM HAL driver can be used as follows:
00020 
00021       (#)Initialize the LPTIM low level resources by implementing the
00022         HAL_LPTIM_MspInit():
00023          (++) Enable the LPTIM interface clock using __HAL_RCC_LPTIMx_CLK_ENABLE().
00024          (++) In case of using interrupts (e.g. HAL_LPTIM_PWM_Start_IT()):
00025              (+++) Configure the LPTIM interrupt priority using HAL_NVIC_SetPriority().
00026              (+++) Enable the LPTIM IRQ handler using HAL_NVIC_EnableIRQ().
00027              (+++) In LPTIM IRQ handler, call HAL_LPTIM_IRQHandler().
00028 
00029       (#)Initialize the LPTIM HAL using HAL_LPTIM_Init(). This function
00030          configures mainly:
00031          (++) The instance: LPTIM1.
00032          (++) Clock: the counter clock.
00033              (+++) Source   : it can be either the ULPTIM input (IN1) or one of
00034                               the internal clock; (APB, LSE or LSI).
00035              (+++) Prescaler: select the clock divider.
00036          (++)  UltraLowPowerClock : To be used only if the ULPTIM is selected
00037                as counter clock source.
00038              (+++) Polarity:   polarity of the active edge for the counter unit
00039                                if the ULPTIM input is selected.
00040              (+++) SampleTime: clock sampling time to configure the clock glitch
00041                                filter.
00042          (++) Trigger: How the counter start.
00043              (+++) Source: trigger can be software or one of the hardware triggers.
00044              (+++) ActiveEdge : only for hardware trigger.
00045              (+++) SampleTime : trigger sampling time to configure the trigger
00046                                 glitch filter.
00047          (++) OutputPolarity : 2 opposite polarities are possible.
00048          (++) UpdateMode: specifies whether the update of the autoreload and
00049               the compare values is done immediately or after the end of current
00050               period.
00051 
00052       (#)Six modes are available:
00053 
00054          (++) PWM Mode: To generate a PWM signal with specified period and pulse,
00055          call HAL_LPTIM_PWM_Start() or HAL_LPTIM_PWM_Start_IT() for interruption
00056          mode.
00057 
00058          (++) One Pulse Mode: To generate pulse with specified width in response
00059          to a stimulus, call HAL_LPTIM_OnePulse_Start() or
00060          HAL_LPTIM_OnePulse_Start_IT() for interruption mode.
00061 
00062          (++) Set once Mode: In this mode, the output changes the level (from
00063          low level to high level if the output polarity is configured high, else
00064          the opposite) when a compare match occurs. To start this mode, call
00065          HAL_LPTIM_SetOnce_Start() or HAL_LPTIM_SetOnce_Start_IT() for
00066          interruption mode.
00067 
00068          (++) Encoder Mode: To use the encoder interface call
00069          HAL_LPTIM_Encoder_Start() or HAL_LPTIM_Encoder_Start_IT() for
00070          interruption mode. Only available for LPTIM1 instance.
00071 
00072          (++) Time out Mode: an active edge on one selected trigger input rests
00073          the counter. The first trigger event will start the timer, any
00074          successive trigger event will reset the counter and the timer will
00075          restart. To start this mode call HAL_LPTIM_TimeOut_Start_IT() or
00076          HAL_LPTIM_TimeOut_Start_IT() for interruption mode.
00077 
00078          (++) Counter Mode: counter can be used to count external events on
00079          the LPTIM Input1 or it can be used to count internal clock cycles.
00080          To start this mode, call HAL_LPTIM_Counter_Start() or
00081          HAL_LPTIM_Counter_Start_IT() for interruption mode.
00082 
00083 
00084       (#) User can stop any process by calling the corresponding API:
00085           HAL_LPTIM_Xxx_Stop() or HAL_LPTIM_Xxx_Stop_IT() if the process is
00086           already started in interruption mode.
00087 
00088       (#) De-initialize the LPTIM peripheral using HAL_LPTIM_DeInit().
00089 
00090     *** Callback registration ***
00091   =============================================
00092   [..]
00093   The compilation define  USE_HAL_LPTIM_REGISTER_CALLBACKS when set to 1
00094   allows the user to configure dynamically the driver callbacks.
00095   [..]
00096   Use Function HAL_LPTIM_RegisterCallback() to register a callback.
00097   HAL_LPTIM_RegisterCallback() takes as parameters the HAL peripheral handle,
00098   the Callback ID and a pointer to the user callback function.
00099   [..]
00100   Use function HAL_LPTIM_UnRegisterCallback() to reset a callback to the
00101   default weak function.
00102   HAL_LPTIM_UnRegisterCallback takes as parameters the HAL peripheral handle,
00103   and the Callback ID.
00104   [..]
00105   These functions allow to register/unregister following callbacks:
00106 
00107     (+) MspInitCallback         : LPTIM Base Msp Init Callback.
00108     (+) MspDeInitCallback       : LPTIM Base Msp DeInit Callback.
00109     (+) CompareMatchCallback    : Compare match Callback.
00110     (+) AutoReloadMatchCallback : Auto-reload match Callback.
00111     (+) TriggerCallback         : External trigger event detection Callback.
00112     (+) CompareWriteCallback    : Compare register write complete Callback.
00113     (+) AutoReloadWriteCallback : Auto-reload register write complete Callback.
00114     (+) DirectionUpCallback     : Up-counting direction change Callback.
00115     (+) DirectionDownCallback   : Down-counting direction change Callback.
00116 
00117   [..]
00118   By default, after the Init and when the state is HAL_LPTIM_STATE_RESET
00119   all interrupt callbacks are set to the corresponding weak functions:
00120   examples HAL_LPTIM_TriggerCallback(), HAL_LPTIM_CompareMatchCallback().
00121 
00122   [..]
00123   Exception done for MspInit and MspDeInit functions that are reset to the legacy weak
00124   functionalities in the Init/DeInit only when these callbacks are null
00125   (not registered beforehand). If not, MspInit or MspDeInit are not null, the Init/DeInit
00126   keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
00127 
00128   [..]
00129   Callbacks can be registered/unregistered in HAL_LPTIM_STATE_READY state only.
00130   Exception done MspInit/MspDeInit that can be registered/unregistered
00131   in HAL_LPTIM_STATE_READY or HAL_LPTIM_STATE_RESET state,
00132   thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
00133   In that case first register the MspInit/MspDeInit user callbacks
00134   using HAL_LPTIM_RegisterCallback() before calling DeInit or Init function.
00135 
00136   [..]
00137   When The compilation define USE_HAL_LPTIM_REGISTER_CALLBACKS is set to 0 or
00138   not defined, the callback registration feature is not available and all callbacks
00139   are set to the corresponding weak functions.
00140 
00141   @endverbatim
00142   ******************************************************************************
00143   * @attention
00144   *
00145   * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
00146   * All rights reserved.</center></h2>
00147   *
00148   * This software component is licensed by ST under BSD 3-Clause license,
00149   * the "License"; You may not use this file except in compliance with the
00150   * License. You may obtain a copy of the License at:
00151   *                        opensource.org/licenses/BSD-3-Clause
00152   *
00153   ******************************************************************************
00154   */
00155 
00156 /* Includes ------------------------------------------------------------------*/
00157 #include "stm32f4xx_hal.h"
00158 
00159 /** @addtogroup STM32F4xx_HAL_Driver
00160   * @{
00161   */
00162 
00163 /** @defgroup LPTIM LPTIM
00164   * @brief LPTIM HAL module driver.
00165   * @{
00166   */
00167 
00168 #ifdef HAL_LPTIM_MODULE_ENABLED
00169 
00170 #if defined (LPTIM1)
00171 
00172 /* Private typedef -----------------------------------------------------------*/
00173 /* Private define ------------------------------------------------------------*/
00174 /** @addtogroup LPTIM_Private_Constants
00175   * @{
00176   */
00177 #define TIMEOUT                                     1000UL /* Timeout is 1s */
00178 /**
00179   * @}
00180   */
00181 
00182 /* Private macro -------------------------------------------------------------*/
00183 /* Private variables ---------------------------------------------------------*/
00184 /* Private function prototypes -----------------------------------------------*/
00185 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
00186 static void LPTIM_ResetCallback(LPTIM_HandleTypeDef *lptim);
00187 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
00188 static HAL_StatusTypeDef LPTIM_WaitForFlag(LPTIM_HandleTypeDef *hlptim, uint32_t flag);
00189 
00190 /* Exported functions --------------------------------------------------------*/
00191 
00192 /** @defgroup LPTIM_Exported_Functions LPTIM Exported Functions
00193   * @{
00194   */
00195 
00196 /** @defgroup LPTIM_Exported_Functions_Group1 Initialization/de-initialization functions
00197   *  @brief    Initialization and Configuration functions.
00198   *
00199 @verbatim
00200   ==============================================================================
00201               ##### Initialization and de-initialization functions #####
00202   ==============================================================================
00203     [..]  This section provides functions allowing to:
00204       (+) Initialize the LPTIM according to the specified parameters in the
00205           LPTIM_InitTypeDef and initialize the associated handle.
00206       (+) DeInitialize the LPTIM peripheral.
00207       (+) Initialize the LPTIM MSP.
00208       (+) DeInitialize the LPTIM MSP.
00209 
00210 @endverbatim
00211   * @{
00212   */
00213 
00214 /**
00215   * @brief  Initialize the LPTIM according to the specified parameters in the
00216   *         LPTIM_InitTypeDef and initialize the associated handle.
00217   * @param  hlptim LPTIM handle
00218   * @retval HAL status
00219   */
00220 HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim)
00221 {
00222   uint32_t tmpcfgr;
00223 
00224   /* Check the LPTIM handle allocation */
00225   if (hlptim == NULL)
00226   {
00227     return HAL_ERROR;
00228   }
00229 
00230   /* Check the parameters */
00231   assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
00232 
00233   assert_param(IS_LPTIM_CLOCK_SOURCE(hlptim->Init.Clock.Source));
00234   assert_param(IS_LPTIM_CLOCK_PRESCALER(hlptim->Init.Clock.Prescaler));
00235   if ((hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM)
00236       || (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
00237   {
00238     assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
00239     assert_param(IS_LPTIM_CLOCK_SAMPLE_TIME(hlptim->Init.UltraLowPowerClock.SampleTime));
00240   }
00241   assert_param(IS_LPTIM_TRG_SOURCE(hlptim->Init.Trigger.Source));
00242   if (hlptim->Init.Trigger.Source != LPTIM_TRIGSOURCE_SOFTWARE)
00243   {
00244     assert_param(IS_LPTIM_EXT_TRG_POLARITY(hlptim->Init.Trigger.ActiveEdge));
00245     assert_param(IS_LPTIM_TRIG_SAMPLE_TIME(hlptim->Init.Trigger.SampleTime));
00246   }
00247   assert_param(IS_LPTIM_OUTPUT_POLARITY(hlptim->Init.OutputPolarity));
00248   assert_param(IS_LPTIM_UPDATE_MODE(hlptim->Init.UpdateMode));
00249   assert_param(IS_LPTIM_COUNTER_SOURCE(hlptim->Init.CounterSource));
00250 
00251   if (hlptim->State == HAL_LPTIM_STATE_RESET)
00252   {
00253     /* Allocate lock resource and initialize it */
00254     hlptim->Lock = HAL_UNLOCKED;
00255 
00256 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
00257     /* Reset interrupt callbacks to legacy weak callbacks */
00258     LPTIM_ResetCallback(hlptim);
00259 
00260     if (hlptim->MspInitCallback == NULL)
00261     {
00262       hlptim->MspInitCallback = HAL_LPTIM_MspInit;
00263     }
00264 
00265     /* Init the low level hardware : GPIO, CLOCK, NVIC */
00266     hlptim->MspInitCallback(hlptim);
00267 #else
00268     /* Init the low level hardware : GPIO, CLOCK, NVIC */
00269     HAL_LPTIM_MspInit(hlptim);
00270 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
00271   }
00272 
00273   /* Change the LPTIM state */
00274   hlptim->State = HAL_LPTIM_STATE_BUSY;
00275 
00276   /* Get the LPTIMx CFGR value */
00277   tmpcfgr = hlptim->Instance->CFGR;
00278 
00279   if ((hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM)
00280       || (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
00281   {
00282     tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKPOL | LPTIM_CFGR_CKFLT));
00283   }
00284   if (hlptim->Init.Trigger.Source != LPTIM_TRIGSOURCE_SOFTWARE)
00285   {
00286     tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_TRGFLT | LPTIM_CFGR_TRIGSEL));
00287   }
00288 
00289   /* Clear CKSEL, PRESC, TRIGEN, TRGFLT, WAVPOL, PRELOAD & COUNTMODE bits */
00290   tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKSEL | LPTIM_CFGR_TRIGEN | LPTIM_CFGR_PRELOAD |
00291                           LPTIM_CFGR_WAVPOL | LPTIM_CFGR_PRESC | LPTIM_CFGR_COUNTMODE));
00292 
00293   /* Set initialization parameters */
00294   tmpcfgr |= (hlptim->Init.Clock.Source    |
00295               hlptim->Init.Clock.Prescaler |
00296               hlptim->Init.OutputPolarity  |
00297               hlptim->Init.UpdateMode      |
00298               hlptim->Init.CounterSource);
00299 
00300   /* Glitch filters for internal triggers and  external inputs are configured
00301    * only if an internal clock source is provided to the LPTIM
00302    */
00303   if (hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC)
00304   {
00305     tmpcfgr |= (hlptim->Init.Trigger.SampleTime |
00306                 hlptim->Init.UltraLowPowerClock.SampleTime);
00307   }
00308 
00309   /* Configure LPTIM external clock polarity and digital filter */
00310   if ((hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM)
00311       || (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
00312   {
00313     tmpcfgr |= (hlptim->Init.UltraLowPowerClock.Polarity |
00314                 hlptim->Init.UltraLowPowerClock.SampleTime);
00315   }
00316 
00317   /* Configure LPTIM external trigger */
00318   if (hlptim->Init.Trigger.Source != LPTIM_TRIGSOURCE_SOFTWARE)
00319   {
00320     /* Enable External trigger and set the trigger source */
00321     tmpcfgr |= (hlptim->Init.Trigger.Source     |
00322                 hlptim->Init.Trigger.ActiveEdge |
00323                 hlptim->Init.Trigger.SampleTime);
00324   }
00325 
00326   /* Write to LPTIMx CFGR */
00327   hlptim->Instance->CFGR = tmpcfgr;
00328 
00329   /* Change the LPTIM state */
00330   hlptim->State = HAL_LPTIM_STATE_READY;
00331 
00332   /* Return function status */
00333   return HAL_OK;
00334 }
00335 
00336 /**
00337   * @brief  DeInitialize the LPTIM peripheral.
00338   * @param  hlptim LPTIM handle
00339   * @retval HAL status
00340   */
00341 HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim)
00342 {
00343   /* Check the LPTIM handle allocation */
00344   if (hlptim == NULL)
00345   {
00346     return HAL_ERROR;
00347   }
00348 
00349   /* Change the LPTIM state */
00350   hlptim->State = HAL_LPTIM_STATE_BUSY;
00351 
00352   /* Disable the LPTIM Peripheral Clock */
00353   __HAL_LPTIM_DISABLE(hlptim);
00354 
00355   if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
00356   {
00357     return HAL_TIMEOUT;
00358   }
00359 
00360 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
00361   if (hlptim->MspDeInitCallback == NULL)
00362   {
00363     hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit;
00364   }
00365 
00366   /* DeInit the low level hardware: CLOCK, NVIC.*/
00367   hlptim->MspDeInitCallback(hlptim);
00368 #else
00369   /* DeInit the low level hardware: CLOCK, NVIC.*/
00370   HAL_LPTIM_MspDeInit(hlptim);
00371 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
00372 
00373   /* Change the LPTIM state */
00374   hlptim->State = HAL_LPTIM_STATE_RESET;
00375 
00376   /* Release Lock */
00377   __HAL_UNLOCK(hlptim);
00378 
00379   /* Return function status */
00380   return HAL_OK;
00381 }
00382 
00383 /**
00384   * @brief  Initialize the LPTIM MSP.
00385   * @param  hlptim LPTIM handle
00386   * @retval None
00387   */
00388 __weak void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim)
00389 {
00390   /* Prevent unused argument(s) compilation warning */
00391   UNUSED(hlptim);
00392 
00393   /* NOTE : This function should not be modified, when the callback is needed,
00394             the HAL_LPTIM_MspInit could be implemented in the user file
00395    */
00396 }
00397 
00398 /**
00399   * @brief  DeInitialize LPTIM MSP.
00400   * @param  hlptim LPTIM handle
00401   * @retval None
00402   */
00403 __weak void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef *hlptim)
00404 {
00405   /* Prevent unused argument(s) compilation warning */
00406   UNUSED(hlptim);
00407 
00408   /* NOTE : This function should not be modified, when the callback is needed,
00409             the HAL_LPTIM_MspDeInit could be implemented in the user file
00410    */
00411 }
00412 
00413 /**
00414   * @}
00415   */
00416 
00417 /** @defgroup LPTIM_Exported_Functions_Group2 LPTIM Start-Stop operation functions
00418   *  @brief   Start-Stop operation functions.
00419   *
00420 @verbatim
00421   ==============================================================================
00422                 ##### LPTIM Start Stop operation functions #####
00423   ==============================================================================
00424     [..]  This section provides functions allowing to:
00425       (+) Start the PWM mode.
00426       (+) Stop the PWM mode.
00427       (+) Start the One pulse mode.
00428       (+) Stop the One pulse mode.
00429       (+) Start the Set once mode.
00430       (+) Stop the Set once mode.
00431       (+) Start the Encoder mode.
00432       (+) Stop the Encoder mode.
00433       (+) Start the Timeout mode.
00434       (+) Stop the Timeout mode.
00435       (+) Start the Counter mode.
00436       (+) Stop the Counter mode.
00437 
00438 
00439 @endverbatim
00440   * @{
00441   */
00442 
00443 /**
00444   * @brief  Start the LPTIM PWM generation.
00445   * @param  hlptim LPTIM handle
00446   * @param  Period Specifies the Autoreload value.
00447   *         This parameter must be a value between 0x0000 and 0xFFFF.
00448   * @param  Pulse Specifies the compare value.
00449   *         This parameter must be a value between 0x0000 and 0xFFFF.
00450   * @retval HAL status
00451   */
00452 HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
00453 {
00454   /* Check the parameters */
00455   assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
00456   assert_param(IS_LPTIM_PERIOD(Period));
00457   assert_param(IS_LPTIM_PULSE(Pulse));
00458 
00459   /* Set the LPTIM state */
00460   hlptim->State = HAL_LPTIM_STATE_BUSY;
00461 
00462   /* Reset WAVE bit to set PWM mode */
00463   hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
00464 
00465   /* Enable the Peripheral */
00466   __HAL_LPTIM_ENABLE(hlptim);
00467 
00468   /* Clear flag */
00469   __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
00470 
00471   /* Load the period value in the autoreload register */
00472   __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
00473 
00474   /* Wait for the completion of the write operation to the LPTIM_ARR register */
00475   if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
00476   {
00477     return HAL_TIMEOUT;
00478   }
00479 
00480   /* Clear flag */
00481   __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
00482 
00483   /* Load the pulse value in the compare register */
00484   __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
00485 
00486   /* Wait for the completion of the write operation to the LPTIM_CMP register */
00487   if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
00488   {
00489     return HAL_TIMEOUT;
00490   }
00491 
00492   /* Start timer in continuous mode */
00493   __HAL_LPTIM_START_CONTINUOUS(hlptim);
00494 
00495   /* Change the TIM state*/
00496   hlptim->State = HAL_LPTIM_STATE_READY;
00497 
00498   /* Return function status */
00499   return HAL_OK;
00500 }
00501 
00502 /**
00503   * @brief  Stop the LPTIM PWM generation.
00504   * @param  hlptim LPTIM handle
00505   * @retval HAL status
00506   */
00507 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim)
00508 {
00509   /* Check the parameters */
00510   assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
00511 
00512   /* Set the LPTIM state */
00513   hlptim->State = HAL_LPTIM_STATE_BUSY;
00514 
00515   /* Disable the Peripheral */
00516   __HAL_LPTIM_DISABLE(hlptim);
00517 
00518   if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
00519   {
00520     return HAL_TIMEOUT;
00521   }
00522 
00523   /* Change the LPTIM state*/
00524   hlptim->State = HAL_LPTIM_STATE_READY;
00525 
00526   /* Return function status */
00527   return HAL_OK;
00528 }
00529 
00530 /**
00531   * @brief  Start the LPTIM PWM generation in interrupt mode.
00532   * @param  hlptim LPTIM handle
00533   * @param  Period Specifies the Autoreload value.
00534   *         This parameter must be a value between 0x0000 and 0xFFFF
00535   * @param  Pulse Specifies the compare value.
00536   *         This parameter must be a value between 0x0000 and 0xFFFF
00537   * @retval HAL status
00538   */
00539 HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
00540 {
00541   /* Check the parameters */
00542   assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
00543   assert_param(IS_LPTIM_PERIOD(Period));
00544   assert_param(IS_LPTIM_PULSE(Pulse));
00545 
00546   /* Set the LPTIM state */
00547   hlptim->State = HAL_LPTIM_STATE_BUSY;
00548 
00549   /* Reset WAVE bit to set PWM mode */
00550   hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
00551 
00552   /* Enable the Peripheral */
00553   __HAL_LPTIM_ENABLE(hlptim);
00554 
00555   /* Clear flag */
00556   __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
00557 
00558   /* Load the period value in the autoreload register */
00559   __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
00560 
00561   /* Wait for the completion of the write operation to the LPTIM_ARR register */
00562   if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
00563   {
00564     return HAL_TIMEOUT;
00565   }
00566 
00567   /* Clear flag */
00568   __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
00569 
00570   /* Load the pulse value in the compare register */
00571   __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
00572 
00573   /* Wait for the completion of the write operation to the LPTIM_CMP register */
00574   if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
00575   {
00576     return HAL_TIMEOUT;
00577   }
00578 
00579   /* Disable the Peripheral */
00580   __HAL_LPTIM_DISABLE(hlptim);
00581 
00582   if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
00583   {
00584     return HAL_TIMEOUT;
00585   }
00586 
00587   /* Enable Autoreload write complete interrupt */
00588   __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
00589 
00590   /* Enable Compare write complete interrupt */
00591   __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
00592 
00593   /* Enable Autoreload match interrupt */
00594   __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
00595 
00596   /* Enable Compare match interrupt */
00597   __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
00598 
00599   /* If external trigger source is used, then enable external trigger interrupt */
00600   if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
00601   {
00602     /* Enable external trigger interrupt */
00603     __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
00604   }
00605 
00606   /* Enable the Peripheral */
00607   __HAL_LPTIM_ENABLE(hlptim);
00608 
00609   /* Start timer in continuous mode */
00610   __HAL_LPTIM_START_CONTINUOUS(hlptim);
00611 
00612   /* Change the TIM state*/
00613   hlptim->State = HAL_LPTIM_STATE_READY;
00614 
00615   /* Return function status */
00616   return HAL_OK;
00617 }
00618 
00619 /**
00620   * @brief  Stop the LPTIM PWM generation in interrupt mode.
00621   * @param  hlptim LPTIM handle
00622   * @retval HAL status
00623   */
00624 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef *hlptim)
00625 {
00626   /* Check the parameters */
00627   assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
00628 
00629   /* Set the LPTIM state */
00630   hlptim->State = HAL_LPTIM_STATE_BUSY;
00631 
00632   /* Disable the Peripheral */
00633   __HAL_LPTIM_DISABLE(hlptim);
00634 
00635   if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
00636   {
00637     return HAL_TIMEOUT;
00638   }
00639 
00640   /* Disable Autoreload write complete interrupt */
00641   __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
00642 
00643   /* Disable Compare write complete interrupt */
00644   __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
00645 
00646   /* Disable Autoreload match interrupt */
00647   __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
00648 
00649   /* Disable Compare match interrupt */
00650   __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
00651 
00652   /* If external trigger source is used, then disable external trigger interrupt */
00653   if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
00654   {
00655     /* Disable external trigger interrupt */
00656     __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
00657   }
00658 
00659   /* Change the LPTIM state*/
00660   hlptim->State = HAL_LPTIM_STATE_READY;
00661 
00662   /* Return function status */
00663   return HAL_OK;
00664 }
00665 
00666 /**
00667   * @brief  Start the LPTIM One pulse generation.
00668   * @param  hlptim LPTIM handle
00669   * @param  Period Specifies the Autoreload value.
00670   *         This parameter must be a value between 0x0000 and 0xFFFF.
00671   * @param  Pulse Specifies the compare value.
00672   *         This parameter must be a value between 0x0000 and 0xFFFF.
00673   * @retval HAL status
00674   */
00675 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
00676 {
00677   /* Check the parameters */
00678   assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
00679   assert_param(IS_LPTIM_PERIOD(Period));
00680   assert_param(IS_LPTIM_PULSE(Pulse));
00681 
00682   /* Set the LPTIM state */
00683   hlptim->State = HAL_LPTIM_STATE_BUSY;
00684 
00685   /* Reset WAVE bit to set one pulse mode */
00686   hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
00687 
00688   /* Enable the Peripheral */
00689   __HAL_LPTIM_ENABLE(hlptim);
00690 
00691   /* Clear flag */
00692   __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
00693 
00694   /* Load the period value in the autoreload register */
00695   __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
00696 
00697   /* Wait for the completion of the write operation to the LPTIM_ARR register */
00698   if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
00699   {
00700     return HAL_TIMEOUT;
00701   }
00702 
00703   /* Clear flag */
00704   __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
00705 
00706   /* Load the pulse value in the compare register */
00707   __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
00708 
00709   /* Wait for the completion of the write operation to the LPTIM_CMP register */
00710   if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
00711   {
00712     return HAL_TIMEOUT;
00713   }
00714 
00715   /* Start timer in single (one shot) mode */
00716   __HAL_LPTIM_START_SINGLE(hlptim);
00717 
00718   /* Change the TIM state*/
00719   hlptim->State = HAL_LPTIM_STATE_READY;
00720 
00721   /* Return function status */
00722   return HAL_OK;
00723 }
00724 
00725 /**
00726   * @brief  Stop the LPTIM One pulse generation.
00727   * @param  hlptim LPTIM handle
00728   * @retval HAL status
00729   */
00730 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef *hlptim)
00731 {
00732   /* Check the parameters */
00733   assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
00734 
00735   /* Set the LPTIM state */
00736   hlptim->State = HAL_LPTIM_STATE_BUSY;
00737 
00738   /* Disable the Peripheral */
00739   __HAL_LPTIM_DISABLE(hlptim);
00740 
00741   if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
00742   {
00743     return HAL_TIMEOUT;
00744   }
00745 
00746   /* Change the LPTIM state*/
00747   hlptim->State = HAL_LPTIM_STATE_READY;
00748 
00749   /* Return function status */
00750   return HAL_OK;
00751 }
00752 
00753 /**
00754   * @brief  Start the LPTIM One pulse generation in interrupt mode.
00755   * @param  hlptim LPTIM handle
00756   * @param  Period Specifies the Autoreload value.
00757   *         This parameter must be a value between 0x0000 and 0xFFFF.
00758   * @param  Pulse Specifies the compare value.
00759   *         This parameter must be a value between 0x0000 and 0xFFFF.
00760   * @retval HAL status
00761   */
00762 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
00763 {
00764   /* Check the parameters */
00765   assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
00766   assert_param(IS_LPTIM_PERIOD(Period));
00767   assert_param(IS_LPTIM_PULSE(Pulse));
00768 
00769   /* Set the LPTIM state */
00770   hlptim->State = HAL_LPTIM_STATE_BUSY;
00771 
00772   /* Reset WAVE bit to set one pulse mode */
00773   hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
00774 
00775   /* Enable the Peripheral */
00776   __HAL_LPTIM_ENABLE(hlptim);
00777 
00778   /* Clear flag */
00779   __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
00780 
00781   /* Load the period value in the autoreload register */
00782   __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
00783 
00784   /* Wait for the completion of the write operation to the LPTIM_ARR register */
00785   if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
00786   {
00787     return HAL_TIMEOUT;
00788   }
00789 
00790   /* Clear flag */
00791   __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
00792 
00793   /* Load the pulse value in the compare register */
00794   __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
00795 
00796   /* Wait for the completion of the write operation to the LPTIM_CMP register */
00797   if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
00798   {
00799     return HAL_TIMEOUT;
00800   }
00801 
00802   /* Disable the Peripheral */
00803   __HAL_LPTIM_DISABLE(hlptim);
00804 
00805   if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
00806   {
00807     return HAL_TIMEOUT;
00808   }
00809 
00810   /* Enable Autoreload write complete interrupt */
00811   __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
00812 
00813   /* Enable Compare write complete interrupt */
00814   __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
00815 
00816   /* Enable Autoreload match interrupt */
00817   __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
00818 
00819   /* Enable Compare match interrupt */
00820   __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
00821 
00822   /* If external trigger source is used, then enable external trigger interrupt */
00823   if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
00824   {
00825     /* Enable external trigger interrupt */
00826     __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
00827   }
00828 
00829   /* Enable the Peripheral */
00830   __HAL_LPTIM_ENABLE(hlptim);
00831 
00832   /* Start timer in single (one shot) mode */
00833   __HAL_LPTIM_START_SINGLE(hlptim);
00834 
00835   /* Change the TIM state*/
00836   hlptim->State = HAL_LPTIM_STATE_READY;
00837 
00838   /* Return function status */
00839   return HAL_OK;
00840 }
00841 
00842 /**
00843   * @brief  Stop the LPTIM One pulse generation in interrupt mode.
00844   * @param  hlptim LPTIM handle
00845   * @retval HAL status
00846   */
00847 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef *hlptim)
00848 {
00849   /* Check the parameters */
00850   assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
00851 
00852   /* Set the LPTIM state */
00853   hlptim->State = HAL_LPTIM_STATE_BUSY;
00854 
00855   /* Disable the Peripheral */
00856   __HAL_LPTIM_DISABLE(hlptim);
00857 
00858   if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
00859   {
00860     return HAL_TIMEOUT;
00861   }
00862 
00863   /* Disable Autoreload write complete interrupt */
00864   __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
00865 
00866   /* Disable Compare write complete interrupt */
00867   __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
00868 
00869   /* Disable Autoreload match interrupt */
00870   __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
00871 
00872   /* Disable Compare match interrupt */
00873   __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
00874 
00875   /* If external trigger source is used, then disable external trigger interrupt */
00876   if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
00877   {
00878     /* Disable external trigger interrupt */
00879     __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
00880   }
00881 
00882   /* Change the LPTIM state*/
00883   hlptim->State = HAL_LPTIM_STATE_READY;
00884 
00885   /* Return function status */
00886   return HAL_OK;
00887 }
00888 
00889 /**
00890   * @brief  Start the LPTIM in Set once mode.
00891   * @param  hlptim LPTIM handle
00892   * @param  Period Specifies the Autoreload value.
00893   *         This parameter must be a value between 0x0000 and 0xFFFF.
00894   * @param  Pulse Specifies the compare value.
00895   *         This parameter must be a value between 0x0000 and 0xFFFF.
00896   * @retval HAL status
00897   */
00898 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
00899 {
00900   /* Check the parameters */
00901   assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
00902   assert_param(IS_LPTIM_PERIOD(Period));
00903   assert_param(IS_LPTIM_PULSE(Pulse));
00904 
00905   /* Set the LPTIM state */
00906   hlptim->State = HAL_LPTIM_STATE_BUSY;
00907 
00908   /* Set WAVE bit to enable the set once mode */
00909   hlptim->Instance->CFGR |= LPTIM_CFGR_WAVE;
00910 
00911   /* Enable the Peripheral */
00912   __HAL_LPTIM_ENABLE(hlptim);
00913 
00914   /* Clear flag */
00915   __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
00916 
00917   /* Load the period value in the autoreload register */
00918   __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
00919 
00920   /* Wait for the completion of the write operation to the LPTIM_ARR register */
00921   if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
00922   {
00923     return HAL_TIMEOUT;
00924   }
00925 
00926   /* Clear flag */
00927   __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
00928 
00929   /* Load the pulse value in the compare register */
00930   __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
00931 
00932   /* Wait for the completion of the write operation to the LPTIM_CMP register */
00933   if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
00934   {
00935     return HAL_TIMEOUT;
00936   }
00937 
00938   /* Start timer in single (one shot) mode */
00939   __HAL_LPTIM_START_SINGLE(hlptim);
00940 
00941   /* Change the TIM state*/
00942   hlptim->State = HAL_LPTIM_STATE_READY;
00943 
00944   /* Return function status */
00945   return HAL_OK;
00946 }
00947 
00948 /**
00949   * @brief  Stop the LPTIM Set once mode.
00950   * @param  hlptim LPTIM handle
00951   * @retval HAL status
00952   */
00953 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef *hlptim)
00954 {
00955   /* Check the parameters */
00956   assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
00957 
00958   /* Set the LPTIM state */
00959   hlptim->State = HAL_LPTIM_STATE_BUSY;
00960 
00961   /* Disable the Peripheral */
00962   __HAL_LPTIM_DISABLE(hlptim);
00963 
00964   if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
00965   {
00966     return HAL_TIMEOUT;
00967   }
00968 
00969   /* Change the LPTIM state*/
00970   hlptim->State = HAL_LPTIM_STATE_READY;
00971 
00972   /* Return function status */
00973   return HAL_OK;
00974 }
00975 
00976 /**
00977   * @brief  Start the LPTIM Set once mode in interrupt mode.
00978   * @param  hlptim LPTIM handle
00979   * @param  Period Specifies the Autoreload value.
00980   *         This parameter must be a value between 0x0000 and 0xFFFF.
00981   * @param  Pulse Specifies the compare value.
00982   *         This parameter must be a value between 0x0000 and 0xFFFF.
00983   * @retval HAL status
00984   */
00985 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
00986 {
00987   /* Check the parameters */
00988   assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
00989   assert_param(IS_LPTIM_PERIOD(Period));
00990   assert_param(IS_LPTIM_PULSE(Pulse));
00991 
00992   /* Set the LPTIM state */
00993   hlptim->State = HAL_LPTIM_STATE_BUSY;
00994 
00995   /* Set WAVE bit to enable the set once mode */
00996   hlptim->Instance->CFGR |= LPTIM_CFGR_WAVE;
00997 
00998   /* Enable the Peripheral */
00999   __HAL_LPTIM_ENABLE(hlptim);
01000 
01001   /* Clear flag */
01002   __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
01003 
01004   /* Load the period value in the autoreload register */
01005   __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
01006 
01007   /* Wait for the completion of the write operation to the LPTIM_ARR register */
01008   if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
01009   {
01010     return HAL_TIMEOUT;
01011   }
01012 
01013   /* Clear flag */
01014   __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
01015 
01016   /* Load the pulse value in the compare register */
01017   __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
01018 
01019   /* Wait for the completion of the write operation to the LPTIM_CMP register */
01020   if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
01021   {
01022     return HAL_TIMEOUT;
01023   }
01024 
01025   /* Disable the Peripheral */
01026   __HAL_LPTIM_DISABLE(hlptim);
01027 
01028   if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
01029   {
01030     return HAL_TIMEOUT;
01031   }
01032 
01033   /* Enable Autoreload write complete interrupt */
01034   __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
01035 
01036   /* Enable Compare write complete interrupt */
01037   __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
01038 
01039   /* Enable Autoreload match interrupt */
01040   __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
01041 
01042   /* Enable Compare match interrupt */
01043   __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
01044 
01045   /* If external trigger source is used, then enable external trigger interrupt */
01046   if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
01047   {
01048     /* Enable external trigger interrupt */
01049     __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
01050   }
01051 
01052   /* Enable the Peripheral */
01053   __HAL_LPTIM_ENABLE(hlptim);
01054 
01055   /* Start timer in single (one shot) mode */
01056   __HAL_LPTIM_START_SINGLE(hlptim);
01057 
01058   /* Change the TIM state*/
01059   hlptim->State = HAL_LPTIM_STATE_READY;
01060 
01061   /* Return function status */
01062   return HAL_OK;
01063 }
01064 
01065 /**
01066   * @brief  Stop the LPTIM Set once mode in interrupt mode.
01067   * @param  hlptim LPTIM handle
01068   * @retval HAL status
01069   */
01070 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef *hlptim)
01071 {
01072   /* Check the parameters */
01073   assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
01074 
01075   /* Set the LPTIM state */
01076   hlptim->State = HAL_LPTIM_STATE_BUSY;
01077 
01078   /* Disable the Peripheral */
01079   __HAL_LPTIM_DISABLE(hlptim);
01080 
01081   if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
01082   {
01083     return HAL_TIMEOUT;
01084   }
01085 
01086   /* Disable Autoreload write complete interrupt */
01087   __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
01088 
01089   /* Disable Compare write complete interrupt */
01090   __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
01091 
01092   /* Disable Autoreload match interrupt */
01093   __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
01094 
01095   /* Disable Compare match interrupt */
01096   __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
01097 
01098   /* If external trigger source is used, then disable external trigger interrupt */
01099   if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
01100   {
01101     /* Disable external trigger interrupt */
01102     __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
01103   }
01104 
01105   /* Change the LPTIM state*/
01106   hlptim->State = HAL_LPTIM_STATE_READY;
01107 
01108   /* Return function status */
01109   return HAL_OK;
01110 }
01111 
01112 /**
01113   * @brief  Start the Encoder interface.
01114   * @param  hlptim LPTIM handle
01115   * @param  Period Specifies the Autoreload value.
01116   *         This parameter must be a value between 0x0000 and 0xFFFF.
01117   * @retval HAL status
01118   */
01119 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
01120 {
01121   uint32_t          tmpcfgr;
01122 
01123   /* Check the parameters */
01124   assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
01125   assert_param(IS_LPTIM_PERIOD(Period));
01126   assert_param(hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC);
01127   assert_param(hlptim->Init.Clock.Prescaler == LPTIM_PRESCALER_DIV1);
01128   assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
01129 
01130   /* Set the LPTIM state */
01131   hlptim->State = HAL_LPTIM_STATE_BUSY;
01132 
01133   /* Get the LPTIMx CFGR value */
01134   tmpcfgr = hlptim->Instance->CFGR;
01135 
01136   /* Clear CKPOL bits */
01137   tmpcfgr &= (uint32_t)(~LPTIM_CFGR_CKPOL);
01138 
01139   /* Set Input polarity */
01140   tmpcfgr |=  hlptim->Init.UltraLowPowerClock.Polarity;
01141 
01142   /* Write to LPTIMx CFGR */
01143   hlptim->Instance->CFGR = tmpcfgr;
01144 
01145   /* Set ENC bit to enable the encoder interface */
01146   hlptim->Instance->CFGR |= LPTIM_CFGR_ENC;
01147 
01148   /* Enable the Peripheral */
01149   __HAL_LPTIM_ENABLE(hlptim);
01150 
01151   /* Clear flag */
01152   __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
01153 
01154   /* Load the period value in the autoreload register */
01155   __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
01156 
01157   /* Wait for the completion of the write operation to the LPTIM_ARR register */
01158   if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
01159   {
01160     return HAL_TIMEOUT;
01161   }
01162 
01163   /* Start timer in continuous mode */
01164   __HAL_LPTIM_START_CONTINUOUS(hlptim);
01165 
01166   /* Change the TIM state*/
01167   hlptim->State = HAL_LPTIM_STATE_READY;
01168 
01169   /* Return function status */
01170   return HAL_OK;
01171 }
01172 
01173 /**
01174   * @brief  Stop the Encoder interface.
01175   * @param  hlptim LPTIM handle
01176   * @retval HAL status
01177   */
01178 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef *hlptim)
01179 {
01180   /* Check the parameters */
01181   assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
01182 
01183   /* Set the LPTIM state */
01184   hlptim->State = HAL_LPTIM_STATE_BUSY;
01185 
01186   /* Disable the Peripheral */
01187   __HAL_LPTIM_DISABLE(hlptim);
01188 
01189   if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
01190   {
01191     return HAL_TIMEOUT;
01192   }
01193 
01194   /* Reset ENC bit to disable the encoder interface */
01195   hlptim->Instance->CFGR &= ~LPTIM_CFGR_ENC;
01196 
01197   /* Change the TIM state*/
01198   hlptim->State = HAL_LPTIM_STATE_READY;
01199 
01200   /* Return function status */
01201   return HAL_OK;
01202 }
01203 
01204 /**
01205   * @brief  Start the Encoder interface in interrupt mode.
01206   * @param  hlptim LPTIM handle
01207   * @param  Period Specifies the Autoreload value.
01208   *         This parameter must be a value between 0x0000 and 0xFFFF.
01209   * @retval HAL status
01210   */
01211 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
01212 {
01213   uint32_t          tmpcfgr;
01214 
01215   /* Check the parameters */
01216   assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
01217   assert_param(IS_LPTIM_PERIOD(Period));
01218   assert_param(hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC);
01219   assert_param(hlptim->Init.Clock.Prescaler == LPTIM_PRESCALER_DIV1);
01220   assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
01221 
01222   /* Set the LPTIM state */
01223   hlptim->State = HAL_LPTIM_STATE_BUSY;
01224 
01225   /* Configure edge sensitivity for encoder mode */
01226   /* Get the LPTIMx CFGR value */
01227   tmpcfgr = hlptim->Instance->CFGR;
01228 
01229   /* Clear CKPOL bits */
01230   tmpcfgr &= (uint32_t)(~LPTIM_CFGR_CKPOL);
01231 
01232   /* Set Input polarity */
01233   tmpcfgr |=  hlptim->Init.UltraLowPowerClock.Polarity;
01234 
01235   /* Write to LPTIMx CFGR */
01236   hlptim->Instance->CFGR = tmpcfgr;
01237 
01238   /* Set ENC bit to enable the encoder interface */
01239   hlptim->Instance->CFGR |= LPTIM_CFGR_ENC;
01240 
01241   /* Enable the Peripheral */
01242   __HAL_LPTIM_ENABLE(hlptim);
01243 
01244   /* Clear flag */
01245   __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
01246 
01247   /* Load the period value in the autoreload register */
01248   __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
01249 
01250   /* Wait for the completion of the write operation to the LPTIM_ARR register */
01251   if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
01252   {
01253     return HAL_TIMEOUT;
01254   }
01255 
01256   /* Disable the Peripheral */
01257   __HAL_LPTIM_DISABLE(hlptim);
01258 
01259   if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
01260   {
01261     return HAL_TIMEOUT;
01262   }
01263 
01264   /* Enable "switch to down direction" interrupt */
01265   __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_DOWN);
01266 
01267   /* Enable "switch to up direction" interrupt */
01268   __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_UP);
01269 
01270   /* Enable the Peripheral */
01271   __HAL_LPTIM_ENABLE(hlptim);
01272 
01273   /* Start timer in continuous mode */
01274   __HAL_LPTIM_START_CONTINUOUS(hlptim);
01275 
01276   /* Change the TIM state*/
01277   hlptim->State = HAL_LPTIM_STATE_READY;
01278 
01279   /* Return function status */
01280   return HAL_OK;
01281 }
01282 
01283 /**
01284   * @brief  Stop the Encoder interface in interrupt mode.
01285   * @param  hlptim LPTIM handle
01286   * @retval HAL status
01287   */
01288 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef *hlptim)
01289 {
01290   /* Check the parameters */
01291   assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
01292 
01293   /* Set the LPTIM state */
01294   hlptim->State = HAL_LPTIM_STATE_BUSY;
01295 
01296   /* Disable the Peripheral */
01297   __HAL_LPTIM_DISABLE(hlptim);
01298 
01299   if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
01300   {
01301     return HAL_TIMEOUT;
01302   }
01303 
01304   /* Reset ENC bit to disable the encoder interface */
01305   hlptim->Instance->CFGR &= ~LPTIM_CFGR_ENC;
01306 
01307   /* Disable "switch to down direction" interrupt */
01308   __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_DOWN);
01309 
01310   /* Disable "switch to up direction" interrupt */
01311   __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_UP);
01312 
01313   /* Change the TIM state*/
01314   hlptim->State = HAL_LPTIM_STATE_READY;
01315 
01316   /* Return function status */
01317   return HAL_OK;
01318 }
01319 
01320 /**
01321   * @brief  Start the Timeout function.
01322   * @note   The first trigger event will start the timer, any successive
01323   *         trigger event will reset the counter and the timer restarts.
01324   * @param  hlptim LPTIM handle
01325   * @param  Period Specifies the Autoreload value.
01326   *         This parameter must be a value between 0x0000 and 0xFFFF.
01327   * @param  Timeout Specifies the TimeOut value to reset the counter.
01328   *         This parameter must be a value between 0x0000 and 0xFFFF.
01329   * @retval HAL status
01330   */
01331 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout)
01332 {
01333   /* Check the parameters */
01334   assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
01335   assert_param(IS_LPTIM_PERIOD(Period));
01336   assert_param(IS_LPTIM_PULSE(Timeout));
01337 
01338   /* Set the LPTIM state */
01339   hlptim->State = HAL_LPTIM_STATE_BUSY;
01340 
01341   /* Set TIMOUT bit to enable the timeout function */
01342   hlptim->Instance->CFGR |= LPTIM_CFGR_TIMOUT;
01343 
01344   /* Enable the Peripheral */
01345   __HAL_LPTIM_ENABLE(hlptim);
01346 
01347   /* Clear flag */
01348   __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
01349 
01350   /* Load the period value in the autoreload register */
01351   __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
01352 
01353   /* Wait for the completion of the write operation to the LPTIM_ARR register */
01354   if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
01355   {
01356     return HAL_TIMEOUT;
01357   }
01358 
01359   /* Clear flag */
01360   __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
01361 
01362   /* Load the Timeout value in the compare register */
01363   __HAL_LPTIM_COMPARE_SET(hlptim, Timeout);
01364 
01365   /* Wait for the completion of the write operation to the LPTIM_CMP register */
01366   if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
01367   {
01368     return HAL_TIMEOUT;
01369   }
01370 
01371   /* Start timer in continuous mode */
01372   __HAL_LPTIM_START_CONTINUOUS(hlptim);
01373 
01374   /* Change the TIM state*/
01375   hlptim->State = HAL_LPTIM_STATE_READY;
01376 
01377   /* Return function status */
01378   return HAL_OK;
01379 }
01380 
01381 /**
01382   * @brief  Stop the Timeout function.
01383   * @param  hlptim LPTIM handle
01384   * @retval HAL status
01385   */
01386 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef *hlptim)
01387 {
01388   /* Check the parameters */
01389   assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
01390 
01391   /* Set the LPTIM state */
01392   hlptim->State = HAL_LPTIM_STATE_BUSY;
01393 
01394   /* Disable the Peripheral */
01395   __HAL_LPTIM_DISABLE(hlptim);
01396 
01397   if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
01398   {
01399     return HAL_TIMEOUT;
01400   }
01401 
01402   /* Reset TIMOUT bit to enable the timeout function */
01403   hlptim->Instance->CFGR &= ~LPTIM_CFGR_TIMOUT;
01404 
01405   /* Change the TIM state*/
01406   hlptim->State = HAL_LPTIM_STATE_READY;
01407 
01408   /* Return function status */
01409   return HAL_OK;
01410 }
01411 
01412 /**
01413   * @brief  Start the Timeout function in interrupt mode.
01414   * @note   The first trigger event will start the timer, any successive
01415   *         trigger event will reset the counter and the timer restarts.
01416   * @param  hlptim LPTIM handle
01417   * @param  Period Specifies the Autoreload value.
01418   *         This parameter must be a value between 0x0000 and 0xFFFF.
01419   * @param  Timeout Specifies the TimeOut value to reset the counter.
01420   *         This parameter must be a value between 0x0000 and 0xFFFF.
01421   * @retval HAL status
01422   */
01423 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout)
01424 {
01425   /* Check the parameters */
01426   assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
01427   assert_param(IS_LPTIM_PERIOD(Period));
01428   assert_param(IS_LPTIM_PULSE(Timeout));
01429 
01430   /* Set the LPTIM state */
01431   hlptim->State = HAL_LPTIM_STATE_BUSY;
01432 
01433   /* Enable EXTI Line interrupt on the LPTIM Wake-up Timer */
01434   __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT();
01435 #if defined(EXTI_IMR_MR23)
01436   /* Enable rising edge trigger on the LPTIM Wake-up Timer Exti line */
01437   __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE();
01438 #endif /* EXTI_IMR_MR23 */
01439 
01440   /* Set TIMOUT bit to enable the timeout function */
01441   hlptim->Instance->CFGR |= LPTIM_CFGR_TIMOUT;
01442 
01443   /* Enable the Peripheral */
01444   __HAL_LPTIM_ENABLE(hlptim);
01445 
01446   /* Clear flag */
01447   __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
01448 
01449   /* Load the period value in the autoreload register */
01450   __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
01451 
01452   /* Wait for the completion of the write operation to the LPTIM_ARR register */
01453   if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
01454   {
01455     return HAL_TIMEOUT;
01456   }
01457 
01458   /* Clear flag */
01459   __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
01460 
01461   /* Load the Timeout value in the compare register */
01462   __HAL_LPTIM_COMPARE_SET(hlptim, Timeout);
01463 
01464   /* Wait for the completion of the write operation to the LPTIM_CMP register */
01465   if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
01466   {
01467     return HAL_TIMEOUT;
01468   }
01469 
01470   /* Disable the Peripheral */
01471   __HAL_LPTIM_DISABLE(hlptim);
01472 
01473   if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
01474   {
01475     return HAL_TIMEOUT;
01476   }
01477 
01478   /* Enable Compare match interrupt */
01479   __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
01480 
01481   /* Enable the Peripheral */
01482   __HAL_LPTIM_ENABLE(hlptim);
01483 
01484   /* Start timer in continuous mode */
01485   __HAL_LPTIM_START_CONTINUOUS(hlptim);
01486 
01487   /* Change the TIM state*/
01488   hlptim->State = HAL_LPTIM_STATE_READY;
01489 
01490   /* Return function status */
01491   return HAL_OK;
01492 }
01493 
01494 /**
01495   * @brief  Stop the Timeout function in interrupt mode.
01496   * @param  hlptim LPTIM handle
01497   * @retval HAL status
01498   */
01499 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef *hlptim)
01500 {
01501   /* Check the parameters */
01502   assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
01503 
01504   /* Set the LPTIM state */
01505   hlptim->State = HAL_LPTIM_STATE_BUSY;
01506 #if defined(EXTI_IMR_MR23)
01507   /* Disable rising edge trigger on the LPTIM Wake-up Timer Exti line */
01508   __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_RISING_EDGE();
01509 #endif /* EXTI_IMR_MR23 */
01510 
01511   /* Disable EXTI Line interrupt on the LPTIM Wake-up Timer */
01512   __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT();
01513 
01514   /* Disable the Peripheral */
01515   __HAL_LPTIM_DISABLE(hlptim);
01516 
01517   if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
01518   {
01519     return HAL_TIMEOUT;
01520   }
01521 
01522   /* Reset TIMOUT bit to enable the timeout function */
01523   hlptim->Instance->CFGR &= ~LPTIM_CFGR_TIMOUT;
01524 
01525   /* Disable Compare match interrupt */
01526   __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
01527 
01528   /* Change the TIM state*/
01529   hlptim->State = HAL_LPTIM_STATE_READY;
01530 
01531   /* Return function status */
01532   return HAL_OK;
01533 }
01534 
01535 /**
01536   * @brief  Start the Counter mode.
01537   * @param  hlptim LPTIM handle
01538   * @param  Period Specifies the Autoreload value.
01539   *         This parameter must be a value between 0x0000 and 0xFFFF.
01540   * @retval HAL status
01541   */
01542 HAL_StatusTypeDef HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
01543 {
01544   /* Check the parameters */
01545   assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
01546   assert_param(IS_LPTIM_PERIOD(Period));
01547 
01548   /* Set the LPTIM state */
01549   hlptim->State = HAL_LPTIM_STATE_BUSY;
01550 
01551   /* If clock source is not ULPTIM clock and counter source is external, then it must not be prescaled */
01552   if ((hlptim->Init.Clock.Source != LPTIM_CLOCKSOURCE_ULPTIM)
01553       && (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
01554   {
01555     /* Check if clock is prescaled */
01556     assert_param(IS_LPTIM_CLOCK_PRESCALERDIV1(hlptim->Init.Clock.Prescaler));
01557     /* Set clock prescaler to 0 */
01558     hlptim->Instance->CFGR &= ~LPTIM_CFGR_PRESC;
01559   }
01560 
01561   /* Enable the Peripheral */
01562   __HAL_LPTIM_ENABLE(hlptim);
01563 
01564   /* Clear flag */
01565   __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
01566 
01567   /* Load the period value in the autoreload register */
01568   __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
01569 
01570   /* Wait for the completion of the write operation to the LPTIM_ARR register */
01571   if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
01572   {
01573     return HAL_TIMEOUT;
01574   }
01575 
01576   /* Start timer in continuous mode */
01577   __HAL_LPTIM_START_CONTINUOUS(hlptim);
01578 
01579   /* Change the TIM state*/
01580   hlptim->State = HAL_LPTIM_STATE_READY;
01581 
01582   /* Return function status */
01583   return HAL_OK;
01584 }
01585 
01586 /**
01587   * @brief  Stop the Counter mode.
01588   * @param  hlptim LPTIM handle
01589   * @retval HAL status
01590   */
01591 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef *hlptim)
01592 {
01593   /* Check the parameters */
01594   assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
01595 
01596   /* Set the LPTIM state */
01597   hlptim->State = HAL_LPTIM_STATE_BUSY;
01598 
01599   /* Disable the Peripheral */
01600   __HAL_LPTIM_DISABLE(hlptim);
01601 
01602   if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
01603   {
01604     return HAL_TIMEOUT;
01605   }
01606 
01607   /* Change the TIM state*/
01608   hlptim->State = HAL_LPTIM_STATE_READY;
01609 
01610   /* Return function status */
01611   return HAL_OK;
01612 }
01613 
01614 /**
01615   * @brief  Start the Counter mode in interrupt mode.
01616   * @param  hlptim LPTIM handle
01617   * @param  Period Specifies the Autoreload value.
01618   *         This parameter must be a value between 0x0000 and 0xFFFF.
01619   * @retval HAL status
01620   */
01621 HAL_StatusTypeDef HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
01622 {
01623   /* Check the parameters */
01624   assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
01625   assert_param(IS_LPTIM_PERIOD(Period));
01626 
01627   /* Set the LPTIM state */
01628   hlptim->State = HAL_LPTIM_STATE_BUSY;
01629 
01630   /* Enable EXTI Line interrupt on the LPTIM Wake-up Timer */
01631   __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT();
01632 #if defined(EXTI_IMR_MR23)
01633   /* Enable rising edge trigger on the LPTIM Wake-up Timer Exti line */
01634   __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE();
01635 #endif /* EXTI_IMR_MR23 */
01636 
01637   /* If clock source is not ULPTIM clock and counter source is external, then it must not be prescaled */
01638   if ((hlptim->Init.Clock.Source != LPTIM_CLOCKSOURCE_ULPTIM)
01639       && (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
01640   {
01641     /* Check if clock is prescaled */
01642     assert_param(IS_LPTIM_CLOCK_PRESCALERDIV1(hlptim->Init.Clock.Prescaler));
01643     /* Set clock prescaler to 0 */
01644     hlptim->Instance->CFGR &= ~LPTIM_CFGR_PRESC;
01645   }
01646 
01647   /* Enable the Peripheral */
01648   __HAL_LPTIM_ENABLE(hlptim);
01649 
01650   /* Clear flag */
01651   __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
01652 
01653   /* Load the period value in the autoreload register */
01654   __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
01655 
01656   /* Wait for the completion of the write operation to the LPTIM_ARR register */
01657   if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
01658   {
01659     return HAL_TIMEOUT;
01660   }
01661 
01662   /* Disable the Peripheral */
01663   __HAL_LPTIM_DISABLE(hlptim);
01664 
01665   if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
01666   {
01667     return HAL_TIMEOUT;
01668   }
01669 
01670   /* Enable Autoreload write complete interrupt */
01671   __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
01672 
01673   /* Enable Autoreload match interrupt */
01674   __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
01675 
01676   /* Enable the Peripheral */
01677   __HAL_LPTIM_ENABLE(hlptim);
01678 
01679   /* Start timer in continuous mode */
01680   __HAL_LPTIM_START_CONTINUOUS(hlptim);
01681 
01682   /* Change the TIM state*/
01683   hlptim->State = HAL_LPTIM_STATE_READY;
01684 
01685   /* Return function status */
01686   return HAL_OK;
01687 }
01688 
01689 /**
01690   * @brief  Stop the Counter mode in interrupt mode.
01691   * @param  hlptim LPTIM handle
01692   * @retval HAL status
01693   */
01694 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef *hlptim)
01695 {
01696   /* Check the parameters */
01697   assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
01698 
01699   /* Set the LPTIM state */
01700   hlptim->State = HAL_LPTIM_STATE_BUSY;
01701 #if defined(EXTI_IMR_MR23)
01702   /* Disable rising edge trigger on the LPTIM Wake-up Timer Exti line */
01703   __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_RISING_EDGE();
01704 #endif /* EXTI_IMR_MR23 */
01705 
01706   /* Disable EXTI Line interrupt on the LPTIM Wake-up Timer */
01707   __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT();
01708 
01709   /* Disable the Peripheral */
01710   __HAL_LPTIM_DISABLE(hlptim);
01711 
01712   if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
01713   {
01714     return HAL_TIMEOUT;
01715   }
01716 
01717   /* Disable Autoreload write complete interrupt */
01718   __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
01719 
01720   /* Disable Autoreload match interrupt */
01721   __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
01722   /* Change the TIM state*/
01723   hlptim->State = HAL_LPTIM_STATE_READY;
01724 
01725   /* Return function status */
01726   return HAL_OK;
01727 }
01728 
01729 /**
01730   * @}
01731   */
01732 
01733 /** @defgroup LPTIM_Exported_Functions_Group3 LPTIM Read operation functions
01734   *  @brief  Read operation functions.
01735   *
01736 @verbatim
01737   ==============================================================================
01738                   ##### LPTIM Read operation functions #####
01739   ==============================================================================
01740 [..]  This section provides LPTIM Reading functions.
01741       (+) Read the counter value.
01742       (+) Read the period (Auto-reload) value.
01743       (+) Read the pulse (Compare)value.
01744 @endverbatim
01745   * @{
01746   */
01747 
01748 /**
01749   * @brief  Return the current counter value.
01750   * @param  hlptim LPTIM handle
01751   * @retval Counter value.
01752   */
01753 uint32_t HAL_LPTIM_ReadCounter(LPTIM_HandleTypeDef *hlptim)
01754 {
01755   /* Check the parameters */
01756   assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
01757 
01758   return (hlptim->Instance->CNT);
01759 }
01760 
01761 /**
01762   * @brief  Return the current Autoreload (Period) value.
01763   * @param  hlptim LPTIM handle
01764   * @retval Autoreload value.
01765   */
01766 uint32_t HAL_LPTIM_ReadAutoReload(LPTIM_HandleTypeDef *hlptim)
01767 {
01768   /* Check the parameters */
01769   assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
01770 
01771   return (hlptim->Instance->ARR);
01772 }
01773 
01774 /**
01775   * @brief  Return the current Compare (Pulse) value.
01776   * @param  hlptim LPTIM handle
01777   * @retval Compare value.
01778   */
01779 uint32_t HAL_LPTIM_ReadCompare(LPTIM_HandleTypeDef *hlptim)
01780 {
01781   /* Check the parameters */
01782   assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
01783 
01784   return (hlptim->Instance->CMP);
01785 }
01786 
01787 /**
01788   * @}
01789   */
01790 
01791 /** @defgroup LPTIM_Exported_Functions_Group4 LPTIM IRQ handler and callbacks
01792   *  @brief  LPTIM  IRQ handler.
01793   *
01794 @verbatim
01795   ==============================================================================
01796                       ##### LPTIM IRQ handler and callbacks  #####
01797   ==============================================================================
01798 [..]  This section provides LPTIM IRQ handler and callback functions called within
01799       the IRQ handler:
01800    (+) LPTIM interrupt request handler
01801    (+) Compare match Callback
01802    (+) Auto-reload match Callback
01803    (+) External trigger event detection Callback
01804    (+) Compare register write complete Callback
01805    (+) Auto-reload register write complete Callback
01806    (+) Up-counting direction change Callback
01807    (+) Down-counting direction change Callback
01808 
01809 @endverbatim
01810   * @{
01811   */
01812 
01813 /**
01814   * @brief  Handle LPTIM interrupt request.
01815   * @param  hlptim LPTIM handle
01816   * @retval None
01817   */
01818 void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim)
01819 {
01820   /* Compare match interrupt */
01821   if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_CMPM) != RESET)
01822   {
01823     if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_CMPM) != RESET)
01824     {
01825       /* Clear Compare match flag */
01826       __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPM);
01827 
01828       /* Compare match Callback */
01829 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
01830       hlptim->CompareMatchCallback(hlptim);
01831 #else
01832       HAL_LPTIM_CompareMatchCallback(hlptim);
01833 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
01834     }
01835   }
01836 
01837   /* Autoreload match interrupt */
01838   if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_ARRM) != RESET)
01839   {
01840     if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_ARRM) != RESET)
01841     {
01842       /* Clear Autoreload match flag */
01843       __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARRM);
01844 
01845       /* Autoreload match Callback */
01846 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
01847       hlptim->AutoReloadMatchCallback(hlptim);
01848 #else
01849       HAL_LPTIM_AutoReloadMatchCallback(hlptim);
01850 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
01851     }
01852   }
01853 
01854   /* Trigger detected interrupt */
01855   if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_EXTTRIG) != RESET)
01856   {
01857     if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_EXTTRIG) != RESET)
01858     {
01859       /* Clear Trigger detected flag */
01860       __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_EXTTRIG);
01861 
01862       /* Trigger detected callback */
01863 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
01864       hlptim->TriggerCallback(hlptim);
01865 #else
01866       HAL_LPTIM_TriggerCallback(hlptim);
01867 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
01868     }
01869   }
01870 
01871   /* Compare write interrupt */
01872   if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_CMPOK) != RESET)
01873   {
01874     if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_CMPOK) != RESET)
01875     {
01876       /* Clear Compare write flag */
01877       __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
01878 
01879       /* Compare write Callback */
01880 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
01881       hlptim->CompareWriteCallback(hlptim);
01882 #else
01883       HAL_LPTIM_CompareWriteCallback(hlptim);
01884 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
01885     }
01886   }
01887 
01888   /* Autoreload write interrupt */
01889   if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_ARROK) != RESET)
01890   {
01891     if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_ARROK) != RESET)
01892     {
01893       /* Clear Autoreload write flag */
01894       __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
01895 
01896       /* Autoreload write Callback */
01897 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
01898       hlptim->AutoReloadWriteCallback(hlptim);
01899 #else
01900       HAL_LPTIM_AutoReloadWriteCallback(hlptim);
01901 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
01902     }
01903   }
01904 
01905   /* Direction counter changed from Down to Up interrupt */
01906   if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_UP) != RESET)
01907   {
01908     if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_UP) != RESET)
01909     {
01910       /* Clear Direction counter changed from Down to Up flag */
01911       __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_UP);
01912 
01913       /* Direction counter changed from Down to Up Callback */
01914 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
01915       hlptim->DirectionUpCallback(hlptim);
01916 #else
01917       HAL_LPTIM_DirectionUpCallback(hlptim);
01918 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
01919     }
01920   }
01921 
01922   /* Direction counter changed from Up to Down interrupt */
01923   if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_DOWN) != RESET)
01924   {
01925     if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_DOWN) != RESET)
01926     {
01927       /* Clear Direction counter changed from Up to Down flag */
01928       __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_DOWN);
01929 
01930       /* Direction counter changed from Up to Down Callback */
01931 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
01932       hlptim->DirectionDownCallback(hlptim);
01933 #else
01934       HAL_LPTIM_DirectionDownCallback(hlptim);
01935 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
01936     }
01937   }
01938 #if defined(EXTI_IMR_MR23)
01939   __HAL_LPTIM_WAKEUPTIMER_EXTI_CLEAR_FLAG();
01940 #endif /* EXTI_IMR_MR23 */
01941 }
01942 
01943 /**
01944   * @brief  Compare match callback in non-blocking mode.
01945   * @param  hlptim LPTIM handle
01946   * @retval None
01947   */
01948 __weak void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim)
01949 {
01950   /* Prevent unused argument(s) compilation warning */
01951   UNUSED(hlptim);
01952 
01953   /* NOTE : This function should not be modified, when the callback is needed,
01954             the HAL_LPTIM_CompareMatchCallback could be implemented in the user file
01955    */
01956 }
01957 
01958 /**
01959   * @brief  Autoreload match callback in non-blocking mode.
01960   * @param  hlptim LPTIM handle
01961   * @retval None
01962   */
01963 __weak void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim)
01964 {
01965   /* Prevent unused argument(s) compilation warning */
01966   UNUSED(hlptim);
01967 
01968   /* NOTE : This function should not be modified, when the callback is needed,
01969             the HAL_LPTIM_AutoReloadMatchCallback could be implemented in the user file
01970    */
01971 }
01972 
01973 /**
01974   * @brief  Trigger detected callback in non-blocking mode.
01975   * @param  hlptim LPTIM handle
01976   * @retval None
01977   */
01978 __weak void HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef *hlptim)
01979 {
01980   /* Prevent unused argument(s) compilation warning */
01981   UNUSED(hlptim);
01982 
01983   /* NOTE : This function should not be modified, when the callback is needed,
01984             the HAL_LPTIM_TriggerCallback could be implemented in the user file
01985    */
01986 }
01987 
01988 /**
01989   * @brief  Compare write callback in non-blocking mode.
01990   * @param  hlptim LPTIM handle
01991   * @retval None
01992   */
01993 __weak void HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef *hlptim)
01994 {
01995   /* Prevent unused argument(s) compilation warning */
01996   UNUSED(hlptim);
01997 
01998   /* NOTE : This function should not be modified, when the callback is needed,
01999             the HAL_LPTIM_CompareWriteCallback could be implemented in the user file
02000    */
02001 }
02002 
02003 /**
02004   * @brief  Autoreload write callback in non-blocking mode.
02005   * @param  hlptim LPTIM handle
02006   * @retval None
02007   */
02008 __weak void HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef *hlptim)
02009 {
02010   /* Prevent unused argument(s) compilation warning */
02011   UNUSED(hlptim);
02012 
02013   /* NOTE : This function should not be modified, when the callback is needed,
02014             the HAL_LPTIM_AutoReloadWriteCallback could be implemented in the user file
02015    */
02016 }
02017 
02018 /**
02019   * @brief  Direction counter changed from Down to Up callback in non-blocking mode.
02020   * @param  hlptim LPTIM handle
02021   * @retval None
02022   */
02023 __weak void HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef *hlptim)
02024 {
02025   /* Prevent unused argument(s) compilation warning */
02026   UNUSED(hlptim);
02027 
02028   /* NOTE : This function should not be modified, when the callback is needed,
02029             the HAL_LPTIM_DirectionUpCallback could be implemented in the user file
02030    */
02031 }
02032 
02033 /**
02034   * @brief  Direction counter changed from Up to Down callback in non-blocking mode.
02035   * @param  hlptim LPTIM handle
02036   * @retval None
02037   */
02038 __weak void HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef *hlptim)
02039 {
02040   /* Prevent unused argument(s) compilation warning */
02041   UNUSED(hlptim);
02042 
02043   /* NOTE : This function should not be modified, when the callback is needed,
02044             the HAL_LPTIM_DirectionDownCallback could be implemented in the user file
02045    */
02046 }
02047 
02048 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
02049 /**
02050   * @brief  Register a User LPTIM callback to be used instead of the weak predefined callback
02051   * @param hlptim LPTIM handle
02052   * @param CallbackID ID of the callback to be registered
02053   *        This parameter can be one of the following values:
02054   *          @arg @ref HAL_LPTIM_MSPINIT_CB_ID          LPTIM Base Msp Init Callback ID
02055   *          @arg @ref HAL_LPTIM_MSPDEINIT_CB_ID        LPTIM Base Msp DeInit Callback ID
02056   *          @arg @ref HAL_LPTIM_COMPARE_MATCH_CB_ID    Compare match Callback ID
02057   *          @arg @ref HAL_LPTIM_AUTORELOAD_MATCH_CB_ID Auto-reload match Callback ID
02058   *          @arg @ref HAL_LPTIM_TRIGGER_CB_ID          External trigger event detection Callback ID
02059   *          @arg @ref HAL_LPTIM_COMPARE_WRITE_CB_ID    Compare register write complete Callback ID
02060   *          @arg @ref HAL_LPTIM_AUTORELOAD_WRITE_CB_ID Auto-reload register write complete Callback ID
02061   *          @arg @ref HAL_LPTIM_DIRECTION_UP_CB_ID     Up-counting direction change Callback ID
02062   *          @arg @ref HAL_LPTIM_DIRECTION_DOWN_CB_ID   Down-counting direction change Callback ID
02063   * @param pCallback pointer to the callback function
02064   * @retval status
02065   */
02066 HAL_StatusTypeDef HAL_LPTIM_RegisterCallback(LPTIM_HandleTypeDef        *hlptim,
02067                                              HAL_LPTIM_CallbackIDTypeDef CallbackID,
02068                                              pLPTIM_CallbackTypeDef      pCallback)
02069 {
02070   HAL_StatusTypeDef status = HAL_OK;
02071 
02072   if (pCallback == NULL)
02073   {
02074     return HAL_ERROR;
02075   }
02076 
02077   /* Process locked */
02078   __HAL_LOCK(hlptim);
02079 
02080   if (hlptim->State == HAL_LPTIM_STATE_READY)
02081   {
02082     switch (CallbackID)
02083     {
02084       case HAL_LPTIM_MSPINIT_CB_ID :
02085         hlptim->MspInitCallback = pCallback;
02086         break;
02087 
02088       case HAL_LPTIM_MSPDEINIT_CB_ID :
02089         hlptim->MspDeInitCallback = pCallback;
02090         break;
02091 
02092       case HAL_LPTIM_COMPARE_MATCH_CB_ID :
02093         hlptim->CompareMatchCallback = pCallback;
02094         break;
02095 
02096       case HAL_LPTIM_AUTORELOAD_MATCH_CB_ID :
02097         hlptim->AutoReloadMatchCallback = pCallback;
02098         break;
02099 
02100       case HAL_LPTIM_TRIGGER_CB_ID :
02101         hlptim->TriggerCallback = pCallback;
02102         break;
02103 
02104       case HAL_LPTIM_COMPARE_WRITE_CB_ID :
02105         hlptim->CompareWriteCallback = pCallback;
02106         break;
02107 
02108       case HAL_LPTIM_AUTORELOAD_WRITE_CB_ID :
02109         hlptim->AutoReloadWriteCallback = pCallback;
02110         break;
02111 
02112       case HAL_LPTIM_DIRECTION_UP_CB_ID :
02113         hlptim->DirectionUpCallback = pCallback;
02114         break;
02115 
02116       case HAL_LPTIM_DIRECTION_DOWN_CB_ID :
02117         hlptim->DirectionDownCallback = pCallback;
02118         break;
02119 
02120       default :
02121         /* Return error status */
02122         status =  HAL_ERROR;
02123         break;
02124     }
02125   }
02126   else if (hlptim->State == HAL_LPTIM_STATE_RESET)
02127   {
02128     switch (CallbackID)
02129     {
02130       case HAL_LPTIM_MSPINIT_CB_ID :
02131         hlptim->MspInitCallback = pCallback;
02132         break;
02133 
02134       case HAL_LPTIM_MSPDEINIT_CB_ID :
02135         hlptim->MspDeInitCallback = pCallback;
02136         break;
02137 
02138       default :
02139         /* Return error status */
02140         status =  HAL_ERROR;
02141         break;
02142     }
02143   }
02144   else
02145   {
02146     /* Return error status */
02147     status =  HAL_ERROR;
02148   }
02149 
02150   /* Release Lock */
02151   __HAL_UNLOCK(hlptim);
02152 
02153   return status;
02154 }
02155 
02156 /**
02157   * @brief  Unregister a LPTIM callback
02158   *         LLPTIM callback is redirected to the weak predefined callback
02159   * @param hlptim LPTIM handle
02160   * @param CallbackID ID of the callback to be unregistered
02161   *        This parameter can be one of the following values:
02162   *          @arg @ref HAL_LPTIM_MSPINIT_CB_ID          LPTIM Base Msp Init Callback ID
02163   *          @arg @ref HAL_LPTIM_MSPDEINIT_CB_ID        LPTIM Base Msp DeInit Callback ID
02164   *          @arg @ref HAL_LPTIM_COMPARE_MATCH_CB_ID    Compare match Callback ID
02165   *          @arg @ref HAL_LPTIM_AUTORELOAD_MATCH_CB_ID Auto-reload match Callback ID
02166   *          @arg @ref HAL_LPTIM_TRIGGER_CB_ID          External trigger event detection Callback ID
02167   *          @arg @ref HAL_LPTIM_COMPARE_WRITE_CB_ID    Compare register write complete Callback ID
02168   *          @arg @ref HAL_LPTIM_AUTORELOAD_WRITE_CB_ID Auto-reload register write complete Callback ID
02169   *          @arg @ref HAL_LPTIM_DIRECTION_UP_CB_ID     Up-counting direction change Callback ID
02170   *          @arg @ref HAL_LPTIM_DIRECTION_DOWN_CB_ID   Down-counting direction change Callback ID
02171   * @retval status
02172   */
02173 HAL_StatusTypeDef HAL_LPTIM_UnRegisterCallback(LPTIM_HandleTypeDef        *hlptim,
02174                                                HAL_LPTIM_CallbackIDTypeDef CallbackID)
02175 {
02176   HAL_StatusTypeDef status = HAL_OK;
02177 
02178   /* Process locked */
02179   __HAL_LOCK(hlptim);
02180 
02181   if (hlptim->State == HAL_LPTIM_STATE_READY)
02182   {
02183     switch (CallbackID)
02184     {
02185       case HAL_LPTIM_MSPINIT_CB_ID :
02186         /* Legacy weak MspInit Callback */
02187         hlptim->MspInitCallback = HAL_LPTIM_MspInit;
02188         break;
02189 
02190       case HAL_LPTIM_MSPDEINIT_CB_ID :
02191         /* Legacy weak Msp DeInit Callback */
02192         hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit;
02193         break;
02194 
02195       case HAL_LPTIM_COMPARE_MATCH_CB_ID :
02196         /* Legacy weak Compare match Callback */
02197         hlptim->CompareMatchCallback = HAL_LPTIM_CompareMatchCallback;
02198         break;
02199 
02200       case HAL_LPTIM_AUTORELOAD_MATCH_CB_ID :
02201         /* Legacy weak Auto-reload match Callback */
02202         hlptim->AutoReloadMatchCallback = HAL_LPTIM_AutoReloadMatchCallback;
02203         break;
02204 
02205       case HAL_LPTIM_TRIGGER_CB_ID :
02206         /* Legacy weak External trigger event detection Callback */
02207         hlptim->TriggerCallback = HAL_LPTIM_TriggerCallback;
02208         break;
02209 
02210       case HAL_LPTIM_COMPARE_WRITE_CB_ID :
02211         /* Legacy weak Compare register write complete Callback */
02212         hlptim->CompareWriteCallback = HAL_LPTIM_CompareWriteCallback;
02213         break;
02214 
02215       case HAL_LPTIM_AUTORELOAD_WRITE_CB_ID :
02216         /* Legacy weak Auto-reload register write complete Callback */
02217         hlptim->AutoReloadWriteCallback = HAL_LPTIM_AutoReloadWriteCallback;
02218         break;
02219 
02220       case HAL_LPTIM_DIRECTION_UP_CB_ID :
02221         /* Legacy weak Up-counting direction change Callback */
02222         hlptim->DirectionUpCallback = HAL_LPTIM_DirectionUpCallback;
02223         break;
02224 
02225       case HAL_LPTIM_DIRECTION_DOWN_CB_ID :
02226         /* Legacy weak Down-counting direction change Callback */
02227         hlptim->DirectionDownCallback = HAL_LPTIM_DirectionDownCallback;
02228         break;
02229 
02230       default :
02231         /* Return error status */
02232         status =  HAL_ERROR;
02233         break;
02234     }
02235   }
02236   else if (hlptim->State == HAL_LPTIM_STATE_RESET)
02237   {
02238     switch (CallbackID)
02239     {
02240       case HAL_LPTIM_MSPINIT_CB_ID :
02241         /* Legacy weak MspInit Callback */
02242         hlptim->MspInitCallback = HAL_LPTIM_MspInit;
02243         break;
02244 
02245       case HAL_LPTIM_MSPDEINIT_CB_ID :
02246         /* Legacy weak Msp DeInit Callback */
02247         hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit;
02248         break;
02249 
02250       default :
02251         /* Return error status */
02252         status =  HAL_ERROR;
02253         break;
02254     }
02255   }
02256   else
02257   {
02258     /* Return error status */
02259     status =  HAL_ERROR;
02260   }
02261 
02262   /* Release Lock */
02263   __HAL_UNLOCK(hlptim);
02264 
02265   return status;
02266 }
02267 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
02268 
02269 /**
02270   * @}
02271   */
02272 
02273 /** @defgroup LPTIM_Group5 Peripheral State functions
02274   *  @brief   Peripheral State functions.
02275   *
02276 @verbatim
02277   ==============================================================================
02278                       ##### Peripheral State functions #####
02279   ==============================================================================
02280     [..]
02281     This subsection permits to get in run-time the status of the peripheral.
02282 
02283 @endverbatim
02284   * @{
02285   */
02286 
02287 /**
02288   * @brief  Return the LPTIM handle state.
02289   * @param  hlptim LPTIM handle
02290   * @retval HAL state
02291   */
02292 HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(LPTIM_HandleTypeDef *hlptim)
02293 {
02294   /* Return LPTIM handle state */
02295   return hlptim->State;
02296 }
02297 
02298 /**
02299   * @}
02300   */
02301 
02302 
02303 /**
02304   * @}
02305   */
02306 
02307 /* Private functions ---------------------------------------------------------*/
02308 
02309 /** @defgroup LPTIM_Private_Functions LPTIM Private Functions
02310   * @{
02311   */
02312 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
02313 /**
02314   * @brief  Reset interrupt callbacks to the legacy weak callbacks.
02315   * @param  lptim pointer to a LPTIM_HandleTypeDef structure that contains
02316   *                the configuration information for LPTIM module.
02317   * @retval None
02318   */
02319 static void LPTIM_ResetCallback(LPTIM_HandleTypeDef *lptim)
02320 {
02321   /* Reset the LPTIM callback to the legacy weak callbacks */
02322   lptim->CompareMatchCallback    = HAL_LPTIM_CompareMatchCallback;
02323   lptim->AutoReloadMatchCallback = HAL_LPTIM_AutoReloadMatchCallback;
02324   lptim->TriggerCallback         = HAL_LPTIM_TriggerCallback;
02325   lptim->CompareWriteCallback    = HAL_LPTIM_CompareWriteCallback;
02326   lptim->AutoReloadWriteCallback = HAL_LPTIM_AutoReloadWriteCallback;
02327   lptim->DirectionUpCallback     = HAL_LPTIM_DirectionUpCallback;
02328   lptim->DirectionDownCallback   = HAL_LPTIM_DirectionDownCallback;
02329 }
02330 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
02331 
02332 /**
02333   * @brief  LPTimer Wait for flag set
02334   * @param  hlptim pointer to a LPTIM_HandleTypeDef structure that contains
02335   *                the configuration information for LPTIM module.
02336   * @param  flag   The lptim flag
02337   * @retval HAL status
02338   */
02339 static HAL_StatusTypeDef LPTIM_WaitForFlag(LPTIM_HandleTypeDef *hlptim, uint32_t flag)
02340 {
02341   HAL_StatusTypeDef result = HAL_OK;
02342   uint32_t count = TIMEOUT * (SystemCoreClock / 20UL / 1000UL);
02343   do
02344   {
02345     count--;
02346     if (count == 0UL)
02347     {
02348       result = HAL_TIMEOUT;
02349     }
02350   } while ((!(__HAL_LPTIM_GET_FLAG((hlptim), (flag)))) && (count != 0UL));
02351 
02352   return result;
02353 }
02354 
02355 /**
02356   * @brief  Disable LPTIM HW instance.
02357   * @param  hlptim pointer to a LPTIM_HandleTypeDef structure that contains
02358   *                the configuration information for LPTIM module.
02359   * @note   The following sequence is required to solve LPTIM disable HW limitation.
02360   *         Please check Errata Sheet ES0335 for more details under "MCU may remain
02361   *         stuck in LPTIM interrupt when entering Stop mode" section.
02362   * @retval None
02363   */
02364 void LPTIM_Disable(LPTIM_HandleTypeDef *hlptim)
02365 {
02366   uint32_t tmpclksource = 0;
02367   uint32_t tmpIER;
02368   uint32_t tmpCFGR;
02369   uint32_t tmpCMP;
02370   uint32_t tmpARR;
02371   uint32_t tmpOR;
02372 
02373   __disable_irq();
02374 
02375   /*********** Save LPTIM Config ***********/
02376   /* Save LPTIM source clock */
02377   switch ((uint32_t)hlptim->Instance)
02378   {
02379     case LPTIM1_BASE:
02380       tmpclksource = __HAL_RCC_GET_LPTIM1_SOURCE();
02381       break;
02382     default:
02383       break;
02384   }
02385 
02386   /* Save LPTIM configuration registers */
02387   tmpIER = hlptim->Instance->IER;
02388   tmpCFGR = hlptim->Instance->CFGR;
02389   tmpCMP = hlptim->Instance->CMP;
02390   tmpARR = hlptim->Instance->ARR;
02391   tmpOR = hlptim->Instance->OR;
02392 
02393   /*********** Reset LPTIM ***********/
02394   switch ((uint32_t)hlptim->Instance)
02395   {
02396     case LPTIM1_BASE:
02397       __HAL_RCC_LPTIM1_FORCE_RESET();
02398       __HAL_RCC_LPTIM1_RELEASE_RESET();
02399       break;
02400     default:
02401       break;
02402   }
02403 
02404   /*********** Restore LPTIM Config ***********/
02405   if ((tmpCMP != 0UL) || (tmpARR != 0UL))
02406   {
02407     /* Force LPTIM source kernel clock from APB */
02408     switch ((uint32_t)hlptim->Instance)
02409     {
02410       case LPTIM1_BASE:
02411         __HAL_RCC_LPTIM1_CONFIG(RCC_LPTIM1CLKSOURCE_PCLK1);
02412         break;
02413       default:
02414         break;
02415     }
02416 
02417     if (tmpCMP != 0UL)
02418     {
02419       /* Restore CMP register (LPTIM should be enabled first) */
02420       hlptim->Instance->CR |= LPTIM_CR_ENABLE;
02421       hlptim->Instance->CMP = tmpCMP;
02422 
02423       /* Wait for the completion of the write operation to the LPTIM_CMP register */
02424       if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
02425       {
02426         hlptim->State = HAL_LPTIM_STATE_TIMEOUT;
02427       }
02428       __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
02429     }
02430 
02431     if (tmpARR != 0UL)
02432     {
02433       /* Restore ARR register (LPTIM should be enabled first) */
02434       hlptim->Instance->CR |= LPTIM_CR_ENABLE;
02435       hlptim->Instance->ARR = tmpARR;
02436 
02437       /* Wait for the completion of the write operation to the LPTIM_ARR register */
02438       if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
02439       {
02440         hlptim->State = HAL_LPTIM_STATE_TIMEOUT;
02441       }
02442 
02443       __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
02444     }
02445 
02446     /* Restore LPTIM source kernel clock */
02447     switch ((uint32_t)hlptim->Instance)
02448     {
02449       case LPTIM1_BASE:
02450         __HAL_RCC_LPTIM1_CONFIG(tmpclksource);
02451         break;
02452       default:
02453         break;
02454     }
02455   }
02456 
02457   /* Restore configuration registers (LPTIM should be disabled first) */
02458   hlptim->Instance->CR &= ~(LPTIM_CR_ENABLE);
02459   hlptim->Instance->IER = tmpIER;
02460   hlptim->Instance->CFGR = tmpCFGR;
02461   hlptim->Instance->OR = tmpOR;
02462 
02463   __enable_irq();
02464 }
02465 /**
02466   * @}
02467   */
02468 #endif /* LPTIM1 */
02469 
02470 #endif /* HAL_LPTIM_MODULE_ENABLED */
02471 /**
02472   * @}
02473   */
02474 
02475 /**
02476   * @}
02477   */
02478 
02479 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/