|
STM32F479xx HAL User Manual
|
00001 /** 00002 ****************************************************************************** 00003 * @file stm32f4xx_hal_pwr.h 00004 * @author MCD Application Team 00005 * @brief Header file of PWR HAL module. 00006 ****************************************************************************** 00007 * @attention 00008 * 00009 * <h2><center>© Copyright (c) 2017 STMicroelectronics. 00010 * All rights reserved.</center></h2> 00011 * 00012 * This software component is licensed by ST under BSD 3-Clause license, 00013 * the "License"; You may not use this file except in compliance with the 00014 * License. You may obtain a copy of the License at: 00015 * opensource.org/licenses/BSD-3-Clause 00016 * 00017 ****************************************************************************** 00018 */ 00019 00020 /* Define to prevent recursive inclusion -------------------------------------*/ 00021 #ifndef __STM32F4xx_HAL_PWR_H 00022 #define __STM32F4xx_HAL_PWR_H 00023 00024 #ifdef __cplusplus 00025 extern "C" { 00026 #endif 00027 00028 /* Includes ------------------------------------------------------------------*/ 00029 #include "stm32f4xx_hal_def.h" 00030 00031 /** @addtogroup STM32F4xx_HAL_Driver 00032 * @{ 00033 */ 00034 00035 /** @addtogroup PWR 00036 * @{ 00037 */ 00038 00039 /* Exported types ------------------------------------------------------------*/ 00040 00041 /** @defgroup PWR_Exported_Types PWR Exported Types 00042 * @{ 00043 */ 00044 00045 /** 00046 * @brief PWR PVD configuration structure definition 00047 */ 00048 typedef struct 00049 { 00050 uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level. 00051 This parameter can be a value of @ref PWR_PVD_detection_level */ 00052 00053 uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins. 00054 This parameter can be a value of @ref PWR_PVD_Mode */ 00055 }PWR_PVDTypeDef; 00056 00057 /** 00058 * @} 00059 */ 00060 00061 /* Exported constants --------------------------------------------------------*/ 00062 /** @defgroup PWR_Exported_Constants PWR Exported Constants 00063 * @{ 00064 */ 00065 00066 /** @defgroup PWR_WakeUp_Pins PWR WakeUp Pins 00067 * @{ 00068 */ 00069 #define PWR_WAKEUP_PIN1 0x00000100U 00070 /** 00071 * @} 00072 */ 00073 00074 /** @defgroup PWR_PVD_detection_level PWR PVD detection level 00075 * @{ 00076 */ 00077 #define PWR_PVDLEVEL_0 PWR_CR_PLS_LEV0 00078 #define PWR_PVDLEVEL_1 PWR_CR_PLS_LEV1 00079 #define PWR_PVDLEVEL_2 PWR_CR_PLS_LEV2 00080 #define PWR_PVDLEVEL_3 PWR_CR_PLS_LEV3 00081 #define PWR_PVDLEVEL_4 PWR_CR_PLS_LEV4 00082 #define PWR_PVDLEVEL_5 PWR_CR_PLS_LEV5 00083 #define PWR_PVDLEVEL_6 PWR_CR_PLS_LEV6 00084 #define PWR_PVDLEVEL_7 PWR_CR_PLS_LEV7/* External input analog voltage 00085 (Compare internally to VREFINT) */ 00086 /** 00087 * @} 00088 */ 00089 00090 /** @defgroup PWR_PVD_Mode PWR PVD Mode 00091 * @{ 00092 */ 00093 #define PWR_PVD_MODE_NORMAL 0x00000000U /*!< basic mode is used */ 00094 #define PWR_PVD_MODE_IT_RISING 0x00010001U /*!< External Interrupt Mode with Rising edge trigger detection */ 00095 #define PWR_PVD_MODE_IT_FALLING 0x00010002U /*!< External Interrupt Mode with Falling edge trigger detection */ 00096 #define PWR_PVD_MODE_IT_RISING_FALLING 0x00010003U /*!< External Interrupt Mode with Rising/Falling edge trigger detection */ 00097 #define PWR_PVD_MODE_EVENT_RISING 0x00020001U /*!< Event Mode with Rising edge trigger detection */ 00098 #define PWR_PVD_MODE_EVENT_FALLING 0x00020002U /*!< Event Mode with Falling edge trigger detection */ 00099 #define PWR_PVD_MODE_EVENT_RISING_FALLING 0x00020003U /*!< Event Mode with Rising/Falling edge trigger detection */ 00100 /** 00101 * @} 00102 */ 00103 00104 00105 /** @defgroup PWR_Regulator_state_in_STOP_mode PWR Regulator state in SLEEP/STOP mode 00106 * @{ 00107 */ 00108 #define PWR_MAINREGULATOR_ON 0x00000000U 00109 #define PWR_LOWPOWERREGULATOR_ON PWR_CR_LPDS 00110 /** 00111 * @} 00112 */ 00113 00114 /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry 00115 * @{ 00116 */ 00117 #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01) 00118 #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02) 00119 /** 00120 * @} 00121 */ 00122 00123 /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry 00124 * @{ 00125 */ 00126 #define PWR_STOPENTRY_WFI ((uint8_t)0x01) 00127 #define PWR_STOPENTRY_WFE ((uint8_t)0x02) 00128 /** 00129 * @} 00130 */ 00131 00132 /** @defgroup PWR_Flag PWR Flag 00133 * @{ 00134 */ 00135 #define PWR_FLAG_WU PWR_CSR_WUF 00136 #define PWR_FLAG_SB PWR_CSR_SBF 00137 #define PWR_FLAG_PVDO PWR_CSR_PVDO 00138 #define PWR_FLAG_BRR PWR_CSR_BRR 00139 #define PWR_FLAG_VOSRDY PWR_CSR_VOSRDY 00140 /** 00141 * @} 00142 */ 00143 00144 /** 00145 * @} 00146 */ 00147 00148 /* Exported macro ------------------------------------------------------------*/ 00149 /** @defgroup PWR_Exported_Macro PWR Exported Macro 00150 * @{ 00151 */ 00152 00153 /** @brief Check PWR flag is set or not. 00154 * @param __FLAG__ specifies the flag to check. 00155 * This parameter can be one of the following values: 00156 * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event 00157 * was received from the WKUP pin or from the RTC alarm (Alarm A 00158 * or Alarm B), RTC Tamper event, RTC TimeStamp event or RTC Wakeup. 00159 * An additional wakeup event is detected if the WKUP pin is enabled 00160 * (by setting the EWUP bit) when the WKUP pin level is already high. 00161 * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was 00162 * resumed from StandBy mode. 00163 * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled 00164 * by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode 00165 * For this reason, this bit is equal to 0 after Standby or reset 00166 * until the PVDE bit is set. 00167 * @arg PWR_FLAG_BRR: Backup regulator ready flag. This bit is not reset 00168 * when the device wakes up from Standby mode or by a system reset 00169 * or power reset. 00170 * @arg PWR_FLAG_VOSRDY: This flag indicates that the Regulator voltage 00171 * scaling output selection is ready. 00172 * @retval The new state of __FLAG__ (TRUE or FALSE). 00173 */ 00174 #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__)) 00175 00176 /** @brief Clear the PWR's pending flags. 00177 * @param __FLAG__ specifies the flag to clear. 00178 * This parameter can be one of the following values: 00179 * @arg PWR_FLAG_WU: Wake Up flag 00180 * @arg PWR_FLAG_SB: StandBy flag 00181 */ 00182 #define __HAL_PWR_CLEAR_FLAG(__FLAG__) (PWR->CR |= (__FLAG__) << 2U) 00183 00184 /** 00185 * @brief Enable the PVD Exti Line 16. 00186 * @retval None. 00187 */ 00188 #define __HAL_PWR_PVD_EXTI_ENABLE_IT() (EXTI->IMR |= (PWR_EXTI_LINE_PVD)) 00189 00190 /** 00191 * @brief Disable the PVD EXTI Line 16. 00192 * @retval None. 00193 */ 00194 #define __HAL_PWR_PVD_EXTI_DISABLE_IT() (EXTI->IMR &= ~(PWR_EXTI_LINE_PVD)) 00195 00196 /** 00197 * @brief Enable event on PVD Exti Line 16. 00198 * @retval None. 00199 */ 00200 #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() (EXTI->EMR |= (PWR_EXTI_LINE_PVD)) 00201 00202 /** 00203 * @brief Disable event on PVD Exti Line 16. 00204 * @retval None. 00205 */ 00206 #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~(PWR_EXTI_LINE_PVD)) 00207 00208 /** 00209 * @brief Enable the PVD Extended Interrupt Rising Trigger. 00210 * @retval None. 00211 */ 00212 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD) 00213 00214 /** 00215 * @brief Disable the PVD Extended Interrupt Rising Trigger. 00216 * @retval None. 00217 */ 00218 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD) 00219 00220 /** 00221 * @brief Enable the PVD Extended Interrupt Falling Trigger. 00222 * @retval None. 00223 */ 00224 #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD) 00225 00226 00227 /** 00228 * @brief Disable the PVD Extended Interrupt Falling Trigger. 00229 * @retval None. 00230 */ 00231 #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD) 00232 00233 00234 /** 00235 * @brief PVD EXTI line configuration: set rising & falling edge trigger. 00236 * @retval None. 00237 */ 00238 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() do{__HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();\ 00239 __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();\ 00240 }while(0U) 00241 00242 /** 00243 * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger. 00244 * This parameter can be: 00245 * @retval None. 00246 */ 00247 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() do{__HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();\ 00248 __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE();\ 00249 }while(0U) 00250 00251 /** 00252 * @brief checks whether the specified PVD Exti interrupt flag is set or not. 00253 * @retval EXTI PVD Line Status. 00254 */ 00255 #define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_PVD)) 00256 00257 /** 00258 * @brief Clear the PVD Exti flag. 00259 * @retval None. 00260 */ 00261 #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_PVD)) 00262 00263 /** 00264 * @brief Generates a Software interrupt on PVD EXTI line. 00265 * @retval None 00266 */ 00267 #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() (EXTI->SWIER |= (PWR_EXTI_LINE_PVD)) 00268 00269 /** 00270 * @} 00271 */ 00272 00273 /* Include PWR HAL Extension module */ 00274 #include "stm32f4xx_hal_pwr_ex.h" 00275 00276 /* Exported functions --------------------------------------------------------*/ 00277 /** @addtogroup PWR_Exported_Functions PWR Exported Functions 00278 * @{ 00279 */ 00280 00281 /** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions 00282 * @{ 00283 */ 00284 /* Initialization and de-initialization functions *****************************/ 00285 void HAL_PWR_DeInit(void); 00286 void HAL_PWR_EnableBkUpAccess(void); 00287 void HAL_PWR_DisableBkUpAccess(void); 00288 /** 00289 * @} 00290 */ 00291 00292 /** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions 00293 * @{ 00294 */ 00295 /* Peripheral Control functions **********************************************/ 00296 /* PVD configuration */ 00297 void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD); 00298 void HAL_PWR_EnablePVD(void); 00299 void HAL_PWR_DisablePVD(void); 00300 00301 /* WakeUp pins configuration */ 00302 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx); 00303 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx); 00304 00305 /* Low Power modes entry */ 00306 void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry); 00307 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry); 00308 void HAL_PWR_EnterSTANDBYMode(void); 00309 00310 /* Power PVD IRQ Handler */ 00311 void HAL_PWR_PVD_IRQHandler(void); 00312 void HAL_PWR_PVDCallback(void); 00313 00314 /* Cortex System Control functions *******************************************/ 00315 void HAL_PWR_EnableSleepOnExit(void); 00316 void HAL_PWR_DisableSleepOnExit(void); 00317 void HAL_PWR_EnableSEVOnPend(void); 00318 void HAL_PWR_DisableSEVOnPend(void); 00319 /** 00320 * @} 00321 */ 00322 00323 /** 00324 * @} 00325 */ 00326 00327 /* Private types -------------------------------------------------------------*/ 00328 /* Private variables ---------------------------------------------------------*/ 00329 /* Private constants ---------------------------------------------------------*/ 00330 /** @defgroup PWR_Private_Constants PWR Private Constants 00331 * @{ 00332 */ 00333 00334 /** @defgroup PWR_PVD_EXTI_Line PWR PVD EXTI Line 00335 * @{ 00336 */ 00337 #define PWR_EXTI_LINE_PVD ((uint32_t)EXTI_IMR_MR16) /*!< External interrupt line 16 Connected to the PVD EXTI Line */ 00338 /** 00339 * @} 00340 */ 00341 00342 /** @defgroup PWR_register_alias_address PWR Register alias address 00343 * @{ 00344 */ 00345 /* ------------- PWR registers bit address in the alias region ---------------*/ 00346 #define PWR_OFFSET (PWR_BASE - PERIPH_BASE) 00347 #define PWR_CR_OFFSET 0x00U 00348 #define PWR_CSR_OFFSET 0x04U 00349 #define PWR_CR_OFFSET_BB (PWR_OFFSET + PWR_CR_OFFSET) 00350 #define PWR_CSR_OFFSET_BB (PWR_OFFSET + PWR_CSR_OFFSET) 00351 /** 00352 * @} 00353 */ 00354 00355 /** @defgroup PWR_CR_register_alias PWR CR Register alias address 00356 * @{ 00357 */ 00358 /* --- CR Register ---*/ 00359 /* Alias word address of DBP bit */ 00360 #define DBP_BIT_NUMBER PWR_CR_DBP_Pos 00361 #define CR_DBP_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (DBP_BIT_NUMBER * 4U)) 00362 00363 /* Alias word address of PVDE bit */ 00364 #define PVDE_BIT_NUMBER PWR_CR_PVDE_Pos 00365 #define CR_PVDE_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (PVDE_BIT_NUMBER * 4U)) 00366 00367 /* Alias word address of VOS bit */ 00368 #define VOS_BIT_NUMBER PWR_CR_VOS_Pos 00369 #define CR_VOS_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (VOS_BIT_NUMBER * 4U)) 00370 /** 00371 * @} 00372 */ 00373 00374 /** @defgroup PWR_CSR_register_alias PWR CSR Register alias address 00375 * @{ 00376 */ 00377 /* --- CSR Register ---*/ 00378 /* Alias word address of EWUP bit */ 00379 #define EWUP_BIT_NUMBER PWR_CSR_EWUP_Pos 00380 #define CSR_EWUP_BB (PERIPH_BB_BASE + (PWR_CSR_OFFSET_BB * 32U) + (EWUP_BIT_NUMBER * 4U)) 00381 /** 00382 * @} 00383 */ 00384 00385 /** 00386 * @} 00387 */ 00388 /* Private macros ------------------------------------------------------------*/ 00389 /** @defgroup PWR_Private_Macros PWR Private Macros 00390 * @{ 00391 */ 00392 00393 /** @defgroup PWR_IS_PWR_Definitions PWR Private macros to check input parameters 00394 * @{ 00395 */ 00396 #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \ 00397 ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \ 00398 ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \ 00399 ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7)) 00400 #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \ 00401 ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \ 00402 ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \ 00403 ((MODE) == PWR_PVD_MODE_NORMAL)) 00404 #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \ 00405 ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON)) 00406 #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE)) 00407 #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE)) 00408 /** 00409 * @} 00410 */ 00411 00412 /** 00413 * @} 00414 */ 00415 00416 /** 00417 * @} 00418 */ 00419 00420 /** 00421 * @} 00422 */ 00423 00424 #ifdef __cplusplus 00425 } 00426 #endif 00427 00428 00429 #endif /* __STM32F4xx_HAL_PWR_H */ 00430 00431 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
1.7.6.1