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STM32F479xx HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32f4xx_hal_smbus.h 00004 * @author MCD Application Team 00005 * @brief Header file of SMBUS HAL module. 00006 ****************************************************************************** 00007 * @attention 00008 * 00009 * <h2><center>© Copyright (c) 2016 STMicroelectronics. 00010 * All rights reserved.</center></h2> 00011 * 00012 * This software component is licensed by ST under BSD 3-Clause license, 00013 * the "License"; You may not use this file except in compliance with the 00014 * License. You may obtain a copy of the License at: 00015 * opensource.org/licenses/BSD-3-Clause 00016 * 00017 ****************************************************************************** 00018 */ 00019 00020 /* Define to prevent recursive inclusion -------------------------------------*/ 00021 #ifndef __STM32F4xx_HAL_SMBUS_H 00022 #define __STM32F4xx_HAL_SMBUS_H 00023 00024 #ifdef __cplusplus 00025 extern "C" { 00026 #endif 00027 00028 /* Includes ------------------------------------------------------------------*/ 00029 #include "stm32f4xx_hal_def.h" 00030 00031 /** @addtogroup STM32F4xx_HAL_Driver 00032 * @{ 00033 */ 00034 00035 /** @addtogroup SMBUS 00036 * @{ 00037 */ 00038 00039 /* Exported types ------------------------------------------------------------*/ 00040 /** @defgroup SMBUS_Exported_Types SMBUS Exported Types 00041 * @{ 00042 */ 00043 00044 /** 00045 * @brief SMBUS Configuration Structure definition 00046 */ 00047 typedef struct 00048 { 00049 uint32_t ClockSpeed; /*!< Specifies the clock frequency. 00050 This parameter must be set to a value lower than 100kHz */ 00051 00052 uint32_t AnalogFilter; /*!< Specifies if Analog Filter is enable or not. 00053 This parameter can be a value of @ref SMBUS_Analog_Filter */ 00054 00055 uint32_t OwnAddress1; /*!< Specifies the first device own address. 00056 This parameter can be a 7-bit or 10-bit address. */ 00057 00058 uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode is selected. 00059 This parameter can be a value of @ref SMBUS_addressing_mode */ 00060 00061 uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected. 00062 This parameter can be a value of @ref SMBUS_dual_addressing_mode */ 00063 00064 uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is 00065 selected. This parameter can be a 7-bit address. */ 00066 00067 uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected. 00068 This parameter can be a value of @ref SMBUS_general_call_addressing_mode */ 00069 00070 uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected. 00071 This parameter can be a value of @ref SMBUS_nostretch_mode */ 00072 00073 uint32_t PacketErrorCheckMode; /*!< Specifies if Packet Error Check mode is selected. 00074 This parameter can be a value of @ref SMBUS_packet_error_check_mode */ 00075 00076 uint32_t PeripheralMode; /*!< Specifies which mode of Periphal is selected. 00077 This parameter can be a value of @ref SMBUS_peripheral_mode */ 00078 00079 } SMBUS_InitTypeDef; 00080 00081 /** 00082 * @brief HAL State structure definition 00083 * @note HAL SMBUS State value coding follow below described bitmap : 00084 * b7-b6 Error information 00085 * 00 : No Error 00086 * 01 : Abort (Abort user request on going) 00087 * 10 : Timeout 00088 * 11 : Error 00089 * b5 IP initialisation status 00090 * 0 : Reset (IP not initialized) 00091 * 1 : Init done (IP initialized and ready to use. HAL SMBUS Init function called) 00092 * b4 (not used) 00093 * x : Should be set to 0 00094 * b3 00095 * 0 : Ready or Busy (No Listen mode ongoing) 00096 * 1 : Listen (IP in Address Listen Mode) 00097 * b2 Intrinsic process state 00098 * 0 : Ready 00099 * 1 : Busy (IP busy with some configuration or internal operations) 00100 * b1 Rx state 00101 * 0 : Ready (no Rx operation ongoing) 00102 * 1 : Busy (Rx operation ongoing) 00103 * b0 Tx state 00104 * 0 : Ready (no Tx operation ongoing) 00105 * 1 : Busy (Tx operation ongoing) 00106 */ 00107 typedef enum 00108 { 00109 00110 HAL_SMBUS_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized */ 00111 HAL_SMBUS_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use */ 00112 HAL_SMBUS_STATE_BUSY = 0x24U, /*!< An internal process is ongoing */ 00113 HAL_SMBUS_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing */ 00114 HAL_SMBUS_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */ 00115 HAL_SMBUS_STATE_LISTEN = 0x28U, /*!< Address Listen Mode is ongoing */ 00116 HAL_SMBUS_STATE_BUSY_TX_LISTEN = 0x29U, /*!< Address Listen Mode and Data Transmission 00117 process is ongoing */ 00118 HAL_SMBUS_STATE_BUSY_RX_LISTEN = 0x2AU, /*!< Address Listen Mode and Data Reception 00119 process is ongoing */ 00120 HAL_SMBUS_STATE_ABORT = 0x60U, /*!< Abort user request ongoing */ 00121 HAL_SMBUS_STATE_TIMEOUT = 0xA0U, /*!< Timeout state */ 00122 HAL_SMBUS_STATE_ERROR = 0xE0U /*!< Error */ 00123 } HAL_SMBUS_StateTypeDef; 00124 00125 /** 00126 * @brief HAL Mode structure definition 00127 * @note HAL SMBUS Mode value coding follow below described bitmap : 00128 * b7 (not used) 00129 * x : Should be set to 0 00130 * b6 (not used) 00131 * x : Should be set to 0 00132 * b5 00133 * 0 : None 00134 * 1 : Slave (HAL SMBUS communication is in Slave/Device Mode) 00135 * b4 00136 * 0 : None 00137 * 1 : Master (HAL SMBUS communication is in Master/Host Mode) 00138 * b3-b2-b1-b0 (not used) 00139 * xxxx : Should be set to 0000 00140 */ 00141 typedef enum 00142 { 00143 HAL_SMBUS_MODE_NONE = 0x00U, /*!< No SMBUS communication on going */ 00144 HAL_SMBUS_MODE_MASTER = 0x10U, /*!< SMBUS communication is in Master Mode */ 00145 HAL_SMBUS_MODE_SLAVE = 0x20U, /*!< SMBUS communication is in Slave Mode */ 00146 00147 } HAL_SMBUS_ModeTypeDef; 00148 00149 /** 00150 * @brief SMBUS handle Structure definition 00151 */ 00152 typedef struct __SMBUS_HandleTypeDef 00153 { 00154 I2C_TypeDef *Instance; /*!< SMBUS registers base address */ 00155 00156 SMBUS_InitTypeDef Init; /*!< SMBUS communication parameters */ 00157 00158 uint8_t *pBuffPtr; /*!< Pointer to SMBUS transfer buffer */ 00159 00160 uint16_t XferSize; /*!< SMBUS transfer size */ 00161 00162 __IO uint16_t XferCount; /*!< SMBUS transfer counter */ 00163 00164 __IO uint32_t XferOptions; /*!< SMBUS transfer options this parameter can 00165 be a value of @ref SMBUS_OPTIONS */ 00166 00167 __IO uint32_t PreviousState; /*!< SMBUS communication Previous state and mode 00168 context for internal usage */ 00169 00170 HAL_LockTypeDef Lock; /*!< SMBUS locking object */ 00171 00172 __IO HAL_SMBUS_StateTypeDef State; /*!< SMBUS communication state */ 00173 00174 __IO HAL_SMBUS_ModeTypeDef Mode; /*!< SMBUS communication mode */ 00175 00176 __IO uint32_t ErrorCode; /*!< SMBUS Error code */ 00177 00178 __IO uint32_t Devaddress; /*!< SMBUS Target device address */ 00179 00180 __IO uint32_t EventCount; /*!< SMBUS Event counter */ 00181 00182 uint8_t XferPEC; /*!< SMBUS PEC data in reception mode */ 00183 00184 #if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1) 00185 void (* MasterTxCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus); /*!< SMBUS Master Tx Transfer completed callback */ 00186 void (* MasterRxCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus); /*!< SMBUS Master Rx Transfer completed callback */ 00187 void (* SlaveTxCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus); /*!< SMBUS Slave Tx Transfer completed callback */ 00188 void (* SlaveRxCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus); /*!< SMBUS Slave Rx Transfer completed callback */ 00189 void (* ListenCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus); /*!< SMBUS Listen Complete callback */ 00190 void (* MemTxCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus); /*!< SMBUS Memory Tx Transfer completed callback */ 00191 void (* MemRxCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus); /*!< SMBUS Memory Rx Transfer completed callback */ 00192 void (* ErrorCallback)(struct __SMBUS_HandleTypeDef *hsmbus); /*!< SMBUS Error callback */ 00193 void (* AbortCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus); /*!< SMBUS Abort callback */ 00194 void (* AddrCallback)(struct __SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode); /*!< SMBUS Slave Address Match callback */ 00195 void (* MspInitCallback)(struct __SMBUS_HandleTypeDef *hsmbus); /*!< SMBUS Msp Init callback */ 00196 void (* MspDeInitCallback)(struct __SMBUS_HandleTypeDef *hsmbus); /*!< SMBUS Msp DeInit callback */ 00197 00198 #endif /* USE_HAL_SMBUS_REGISTER_CALLBACKS */ 00199 } SMBUS_HandleTypeDef; 00200 00201 #if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1) 00202 /** 00203 * @brief HAL SMBUS Callback ID enumeration definition 00204 */ 00205 typedef enum 00206 { 00207 HAL_SMBUS_MASTER_TX_COMPLETE_CB_ID = 0x00U, /*!< SMBUS Master Tx Transfer completed callback ID */ 00208 HAL_SMBUS_MASTER_RX_COMPLETE_CB_ID = 0x01U, /*!< SMBUS Master Rx Transfer completed callback ID */ 00209 HAL_SMBUS_SLAVE_TX_COMPLETE_CB_ID = 0x02U, /*!< SMBUS Slave Tx Transfer completed callback ID */ 00210 HAL_SMBUS_SLAVE_RX_COMPLETE_CB_ID = 0x03U, /*!< SMBUS Slave Rx Transfer completed callback ID */ 00211 HAL_SMBUS_LISTEN_COMPLETE_CB_ID = 0x04U, /*!< SMBUS Listen Complete callback ID */ 00212 HAL_SMBUS_ERROR_CB_ID = 0x07U, /*!< SMBUS Error callback ID */ 00213 HAL_SMBUS_ABORT_CB_ID = 0x08U, /*!< SMBUS Abort callback ID */ 00214 HAL_SMBUS_MSPINIT_CB_ID = 0x09U, /*!< SMBUS Msp Init callback ID */ 00215 HAL_SMBUS_MSPDEINIT_CB_ID = 0x0AU /*!< SMBUS Msp DeInit callback ID */ 00216 00217 } HAL_SMBUS_CallbackIDTypeDef; 00218 00219 /** 00220 * @brief HAL SMBUS Callback pointer definition 00221 */ 00222 typedef void (*pSMBUS_CallbackTypeDef)(SMBUS_HandleTypeDef *hsmbus); /*!< pointer to an I2C callback function */ 00223 typedef void (*pSMBUS_AddrCallbackTypeDef)(SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode); /*!< pointer to an I2C Address Match callback function */ 00224 00225 #endif /* USE_HAL_SMBUS_REGISTER_CALLBACKS */ 00226 00227 /** 00228 * @} 00229 */ 00230 00231 /* Exported constants --------------------------------------------------------*/ 00232 /** @defgroup SMBUS_Exported_Constants SMBUS Exported Constants 00233 * @{ 00234 */ 00235 00236 /** @defgroup SMBUS_Error_Code_definition SMBUS Error Code 00237 * @brief SMBUS Error Code 00238 * @{ 00239 */ 00240 #define HAL_SMBUS_ERROR_NONE 0x00000000U /*!< No error */ 00241 #define HAL_SMBUS_ERROR_BERR 0x00000001U /*!< BERR error */ 00242 #define HAL_SMBUS_ERROR_ARLO 0x00000002U /*!< ARLO error */ 00243 #define HAL_SMBUS_ERROR_AF 0x00000004U /*!< AF error */ 00244 #define HAL_SMBUS_ERROR_OVR 0x00000008U /*!< OVR error */ 00245 #define HAL_SMBUS_ERROR_TIMEOUT 0x00000010U /*!< Timeout Error */ 00246 #define HAL_SMBUS_ERROR_ALERT 0x00000020U /*!< Alert error */ 00247 #define HAL_SMBUS_ERROR_PECERR 0x00000040U /*!< PEC error */ 00248 #if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1) 00249 #define HAL_SMBUS_ERROR_INVALID_CALLBACK 0x00000080U /*!< Invalid Callback error */ 00250 #endif /* USE_HAL_SMBUS_REGISTER_CALLBACKS */ 00251 00252 /** 00253 * @} 00254 */ 00255 00256 /** @defgroup SMBUS_Analog_Filter SMBUS Analog Filter 00257 * @{ 00258 */ 00259 #define SMBUS_ANALOGFILTER_ENABLE 0x00000000U 00260 #define SMBUS_ANALOGFILTER_DISABLE I2C_FLTR_ANOFF 00261 /** 00262 * @} 00263 */ 00264 00265 /** @defgroup SMBUS_addressing_mode SMBUS addressing mode 00266 * @{ 00267 */ 00268 #define SMBUS_ADDRESSINGMODE_7BIT 0x00004000U 00269 #define SMBUS_ADDRESSINGMODE_10BIT (I2C_OAR1_ADDMODE | 0x00004000U) 00270 /** 00271 * @} 00272 */ 00273 00274 /** @defgroup SMBUS_dual_addressing_mode SMBUS dual addressing mode 00275 * @{ 00276 */ 00277 #define SMBUS_DUALADDRESS_DISABLE 0x00000000U 00278 #define SMBUS_DUALADDRESS_ENABLE I2C_OAR2_ENDUAL 00279 /** 00280 * @} 00281 */ 00282 00283 /** @defgroup SMBUS_general_call_addressing_mode SMBUS general call addressing mode 00284 * @{ 00285 */ 00286 #define SMBUS_GENERALCALL_DISABLE 0x00000000U 00287 #define SMBUS_GENERALCALL_ENABLE I2C_CR1_ENGC 00288 /** 00289 * @} 00290 */ 00291 00292 /** @defgroup SMBUS_nostretch_mode SMBUS nostretch mode 00293 * @{ 00294 */ 00295 #define SMBUS_NOSTRETCH_DISABLE 0x00000000U 00296 #define SMBUS_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH 00297 /** 00298 * @} 00299 */ 00300 00301 /** @defgroup SMBUS_packet_error_check_mode SMBUS packet error check mode 00302 * @{ 00303 */ 00304 #define SMBUS_PEC_DISABLE 0x00000000U 00305 #define SMBUS_PEC_ENABLE I2C_CR1_ENPEC 00306 /** 00307 * @} 00308 */ 00309 00310 /** @defgroup SMBUS_peripheral_mode SMBUS peripheral mode 00311 * @{ 00312 */ 00313 #define SMBUS_PERIPHERAL_MODE_SMBUS_HOST (uint32_t)(I2C_CR1_SMBUS | I2C_CR1_SMBTYPE | I2C_CR1_ENARP) 00314 #define SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE I2C_CR1_SMBUS 00315 #define SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP (uint32_t)(I2C_CR1_SMBUS | I2C_CR1_ENARP) 00316 /** 00317 * @} 00318 */ 00319 00320 /** @defgroup SMBUS_XferDirection_definition SMBUS XferDirection definition 00321 * @{ 00322 */ 00323 #define SMBUS_DIRECTION_RECEIVE 0x00000000U 00324 #define SMBUS_DIRECTION_TRANSMIT 0x00000001U 00325 /** 00326 * @} 00327 */ 00328 00329 /** @defgroup SMBUS_XferOptions_definition SMBUS XferOptions definition 00330 * @{ 00331 */ 00332 #define SMBUS_FIRST_FRAME 0x00000001U 00333 #define SMBUS_NEXT_FRAME 0x00000002U 00334 #define SMBUS_FIRST_AND_LAST_FRAME_NO_PEC 0x00000003U 00335 #define SMBUS_LAST_FRAME_NO_PEC 0x00000004U 00336 #define SMBUS_FIRST_AND_LAST_FRAME_WITH_PEC 0x00000005U 00337 #define SMBUS_LAST_FRAME_WITH_PEC 0x00000006U 00338 /** 00339 * @} 00340 */ 00341 00342 /** @defgroup SMBUS_Interrupt_configuration_definition SMBUS Interrupt configuration definition 00343 * @{ 00344 */ 00345 #define SMBUS_IT_BUF I2C_CR2_ITBUFEN 00346 #define SMBUS_IT_EVT I2C_CR2_ITEVTEN 00347 #define SMBUS_IT_ERR I2C_CR2_ITERREN 00348 /** 00349 * @} 00350 */ 00351 00352 /** @defgroup SMBUS_Flag_definition SMBUS Flag definition 00353 * @{ 00354 */ 00355 #define SMBUS_FLAG_SMBALERT 0x00018000U 00356 #define SMBUS_FLAG_TIMEOUT 0x00014000U 00357 #define SMBUS_FLAG_PECERR 0x00011000U 00358 #define SMBUS_FLAG_OVR 0x00010800U 00359 #define SMBUS_FLAG_AF 0x00010400U 00360 #define SMBUS_FLAG_ARLO 0x00010200U 00361 #define SMBUS_FLAG_BERR 0x00010100U 00362 #define SMBUS_FLAG_TXE 0x00010080U 00363 #define SMBUS_FLAG_RXNE 0x00010040U 00364 #define SMBUS_FLAG_STOPF 0x00010010U 00365 #define SMBUS_FLAG_ADD10 0x00010008U 00366 #define SMBUS_FLAG_BTF 0x00010004U 00367 #define SMBUS_FLAG_ADDR 0x00010002U 00368 #define SMBUS_FLAG_SB 0x00010001U 00369 #define SMBUS_FLAG_DUALF 0x00100080U 00370 #define SMBUS_FLAG_SMBHOST 0x00100040U 00371 #define SMBUS_FLAG_SMBDEFAULT 0x00100020U 00372 #define SMBUS_FLAG_GENCALL 0x00100010U 00373 #define SMBUS_FLAG_TRA 0x00100004U 00374 #define SMBUS_FLAG_BUSY 0x00100002U 00375 #define SMBUS_FLAG_MSL 0x00100001U 00376 /** 00377 * @} 00378 */ 00379 00380 /** 00381 * @} 00382 */ 00383 00384 /* Exported macro ------------------------------------------------------------*/ 00385 /** @defgroup SMBUS_Exported_Macros SMBUS Exported Macros 00386 * @{ 00387 */ 00388 00389 /** @brief Reset SMBUS handle state 00390 * @param __HANDLE__ specifies the SMBUS Handle. 00391 * This parameter can be SMBUS where x: 1, 2, or 3 to select the SMBUS peripheral. 00392 * @retval None 00393 */ 00394 #if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1) 00395 #define __HAL_SMBUS_RESET_HANDLE_STATE(__HANDLE__) do{ \ 00396 (__HANDLE__)->State = HAL_SMBUS_STATE_RESET; \ 00397 (__HANDLE__)->MspInitCallback = NULL; \ 00398 (__HANDLE__)->MspDeInitCallback = NULL; \ 00399 } while(0) 00400 #else 00401 #define __HAL_SMBUS_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SMBUS_STATE_RESET) 00402 #endif 00403 00404 /** @brief Enable or disable the specified SMBUS interrupts. 00405 * @param __HANDLE__ specifies the SMBUS Handle. 00406 * This parameter can be SMBUS where x: 1, 2, or 3 to select the SMBUS peripheral. 00407 * @param __INTERRUPT__ specifies the interrupt source to enable or disable. 00408 * This parameter can be one of the following values: 00409 * @arg SMBUS_IT_BUF: Buffer interrupt enable 00410 * @arg SMBUS_IT_EVT: Event interrupt enable 00411 * @arg SMBUS_IT_ERR: Error interrupt enable 00412 * @retval None 00413 */ 00414 #define __HAL_SMBUS_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__)) 00415 #define __HAL_SMBUS_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &= (~(__INTERRUPT__))) 00416 00417 /** @brief Checks if the specified SMBUS interrupt source is enabled or disabled. 00418 * @param __HANDLE__ specifies the SMBUS Handle. 00419 * This parameter can be SMBUS where x: 1, 2, or 3 to select the SMBUS peripheral. 00420 * @param __INTERRUPT__ specifies the SMBUS interrupt source to check. 00421 * This parameter can be one of the following values: 00422 * @arg SMBUS_IT_BUF: Buffer interrupt enable 00423 * @arg SMBUS_IT_EVT: Event interrupt enable 00424 * @arg SMBUS_IT_ERR: Error interrupt enable 00425 * @retval The new state of __INTERRUPT__ (TRUE or FALSE). 00426 */ 00427 #define __HAL_SMBUS_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 00428 00429 /** @brief Checks whether the specified SMBUS flag is set or not. 00430 * @param __HANDLE__ specifies the SMBUS Handle. 00431 * This parameter can be SMBUS where x: 1, 2, or 3 to select the SMBUS peripheral. 00432 * @param __FLAG__ specifies the flag to check. 00433 * This parameter can be one of the following values: 00434 * @arg SMBUS_FLAG_SMBALERT: SMBus Alert flag 00435 * @arg SMBUS_FLAG_TIMEOUT: Timeout or Tlow error flag 00436 * @arg SMBUS_FLAG_PECERR: PEC error in reception flag 00437 * @arg SMBUS_FLAG_OVR: Overrun/Underrun flag 00438 * @arg SMBUS_FLAG_AF: Acknowledge failure flag 00439 * @arg SMBUS_FLAG_ARLO: Arbitration lost flag 00440 * @arg SMBUS_FLAG_BERR: Bus error flag 00441 * @arg SMBUS_FLAG_TXE: Data register empty flag 00442 * @arg SMBUS_FLAG_RXNE: Data register not empty flag 00443 * @arg SMBUS_FLAG_STOPF: Stop detection flag 00444 * @arg SMBUS_FLAG_ADD10: 10-bit header sent flag 00445 * @arg SMBUS_FLAG_BTF: Byte transfer finished flag 00446 * @arg SMBUS_FLAG_ADDR: Address sent flag 00447 * Address matched flag 00448 * @arg SMBUS_FLAG_SB: Start bit flag 00449 * @arg SMBUS_FLAG_DUALF: Dual flag 00450 * @arg SMBUS_FLAG_SMBHOST: SMBus host header 00451 * @arg SMBUS_FLAG_SMBDEFAULT: SMBus default header 00452 * @arg SMBUS_FLAG_GENCALL: General call header flag 00453 * @arg SMBUS_FLAG_TRA: Transmitter/Receiver flag 00454 * @arg SMBUS_FLAG_BUSY: Bus busy flag 00455 * @arg SMBUS_FLAG_MSL: Master/Slave flag 00456 * @retval The new state of __FLAG__ (TRUE or FALSE). 00457 */ 00458 #define __HAL_SMBUS_GET_FLAG(__HANDLE__, __FLAG__) ((((uint8_t)((__FLAG__) >> 16U)) == 0x01U)?((((__HANDLE__)->Instance->SR1) & ((__FLAG__) & SMBUS_FLAG_MASK)) == ((__FLAG__) & SMBUS_FLAG_MASK)): \ 00459 ((((__HANDLE__)->Instance->SR2) & ((__FLAG__) & SMBUS_FLAG_MASK)) == ((__FLAG__) & SMBUS_FLAG_MASK))) 00460 00461 /** @brief Clears the SMBUS pending flags which are cleared by writing 0 in a specific bit. 00462 * @param __HANDLE__ specifies the SMBUS Handle. 00463 * This parameter can be SMBUS where x: 1, 2, or 3 to select the SMBUS peripheral. 00464 * @param __FLAG__ specifies the flag to clear. 00465 * This parameter can be any combination of the following values: 00466 * @arg SMBUS_FLAG_SMBALERT: SMBus Alert flag 00467 * @arg SMBUS_FLAG_TIMEOUT: Timeout or Tlow error flag 00468 * @arg SMBUS_FLAG_PECERR: PEC error in reception flag 00469 * @arg SMBUS_FLAG_OVR: Overrun/Underrun flag (Slave mode) 00470 * @arg SMBUS_FLAG_AF: Acknowledge failure flag 00471 * @arg SMBUS_FLAG_ARLO: Arbitration lost flag (Master mode) 00472 * @arg SMBUS_FLAG_BERR: Bus error flag 00473 * @retval None 00474 */ 00475 #define __HAL_SMBUS_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR1 = ~((__FLAG__) & SMBUS_FLAG_MASK)) 00476 00477 /** @brief Clears the SMBUS ADDR pending flag. 00478 * @param __HANDLE__ specifies the SMBUS Handle. 00479 * This parameter can be SMBUS where x: 1, 2, or 3 to select the SMBUS peripheral. 00480 * @retval None 00481 */ 00482 #define __HAL_SMBUS_CLEAR_ADDRFLAG(__HANDLE__) \ 00483 do{ \ 00484 __IO uint32_t tmpreg = 0x00U; \ 00485 tmpreg = (__HANDLE__)->Instance->SR1; \ 00486 tmpreg = (__HANDLE__)->Instance->SR2; \ 00487 UNUSED(tmpreg); \ 00488 } while(0) 00489 00490 /** @brief Clears the SMBUS STOPF pending flag. 00491 * @param __HANDLE__ specifies the SMBUS Handle. 00492 * This parameter can be SMBUS where x: 1, 2, or 3 to select the SMBUS peripheral. 00493 * @retval None 00494 */ 00495 #define __HAL_SMBUS_CLEAR_STOPFLAG(__HANDLE__) \ 00496 do{ \ 00497 __IO uint32_t tmpreg = 0x00U; \ 00498 tmpreg = (__HANDLE__)->Instance->SR1; \ 00499 (__HANDLE__)->Instance->CR1 |= I2C_CR1_PE; \ 00500 UNUSED(tmpreg); \ 00501 } while(0) 00502 00503 /** @brief Enable the SMBUS peripheral. 00504 * @param __HANDLE__ specifies the SMBUS Handle. 00505 * This parameter can be SMBUSx where x: 1 or 2 to select the SMBUS peripheral. 00506 * @retval None 00507 */ 00508 #define __HAL_SMBUS_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= I2C_CR1_PE) 00509 00510 /** @brief Disable the SMBUS peripheral. 00511 * @param __HANDLE__ specifies the SMBUS Handle. 00512 * This parameter can be SMBUSx where x: 1 or 2 to select the SMBUS peripheral. 00513 * @retval None 00514 */ 00515 #define __HAL_SMBUS_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~I2C_CR1_PE) 00516 00517 /** @brief Generate a Non-Acknowledge SMBUS peripheral in Slave mode. 00518 * @param __HANDLE__ specifies the SMBUS Handle. 00519 * @retval None 00520 */ 00521 #define __HAL_SMBUS_GENERATE_NACK(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_ACK)) 00522 00523 /** 00524 * @} 00525 */ 00526 00527 /* Exported functions --------------------------------------------------------*/ 00528 /** @addtogroup SMBUS_Exported_Functions 00529 * @{ 00530 */ 00531 00532 /** @addtogroup SMBUS_Exported_Functions_Group1 Initialization and de-initialization functions 00533 * @{ 00534 */ 00535 00536 /* Initialization/de-initialization functions **********************************/ 00537 HAL_StatusTypeDef HAL_SMBUS_Init(SMBUS_HandleTypeDef *hsmbus); 00538 HAL_StatusTypeDef HAL_SMBUS_DeInit(SMBUS_HandleTypeDef *hsmbus); 00539 void HAL_SMBUS_MspInit(SMBUS_HandleTypeDef *hsmbus); 00540 void HAL_SMBUS_MspDeInit(SMBUS_HandleTypeDef *hsmbus); 00541 00542 /* Callbacks Register/UnRegister functions ************************************/ 00543 #if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1) 00544 HAL_StatusTypeDef HAL_SMBUS_RegisterCallback(SMBUS_HandleTypeDef *hsmbus, HAL_SMBUS_CallbackIDTypeDef CallbackID, pSMBUS_CallbackTypeDef pCallback); 00545 HAL_StatusTypeDef HAL_SMBUS_UnRegisterCallback(SMBUS_HandleTypeDef *hsmbus, HAL_SMBUS_CallbackIDTypeDef CallbackID); 00546 00547 HAL_StatusTypeDef HAL_SMBUS_RegisterAddrCallback(SMBUS_HandleTypeDef *hsmbus, pSMBUS_AddrCallbackTypeDef pCallback); 00548 HAL_StatusTypeDef HAL_SMBUS_UnRegisterAddrCallback(SMBUS_HandleTypeDef *hsmbus); 00549 #endif /* USE_HAL_SMBUS_REGISTER_CALLBACKS */ 00550 00551 /** 00552 * @} 00553 */ 00554 00555 /** @addtogroup SMBUS_Exported_Functions_Group2 Input and Output operation functions 00556 * @{ 00557 */ 00558 00559 /* IO operation functions *****************************************************/ 00560 /** @addtogroup Blocking_mode_Polling Blocking mode Polling 00561 * @{ 00562 */ 00563 /******* Blocking mode: Polling */ 00564 HAL_StatusTypeDef HAL_SMBUS_IsDeviceReady(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout); 00565 /** 00566 * @} 00567 */ 00568 00569 /** @addtogroup Non-Blocking_mode_Interrupt Non-Blocking mode Interrupt 00570 * @{ 00571 */ 00572 /******* Non-Blocking mode: Interrupt */ 00573 HAL_StatusTypeDef HAL_SMBUS_Master_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); 00574 HAL_StatusTypeDef HAL_SMBUS_Master_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); 00575 HAL_StatusTypeDef HAL_SMBUS_Master_Abort_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress); 00576 HAL_StatusTypeDef HAL_SMBUS_Slave_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions); 00577 HAL_StatusTypeDef HAL_SMBUS_Slave_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions); 00578 00579 HAL_StatusTypeDef HAL_SMBUS_EnableAlert_IT(SMBUS_HandleTypeDef *hsmbus); 00580 HAL_StatusTypeDef HAL_SMBUS_DisableAlert_IT(SMBUS_HandleTypeDef *hsmbus); 00581 HAL_StatusTypeDef HAL_SMBUS_EnableListen_IT(SMBUS_HandleTypeDef *hsmbus); 00582 HAL_StatusTypeDef HAL_SMBUS_DisableListen_IT(SMBUS_HandleTypeDef *hsmbus); 00583 00584 /****** Filter Configuration functions */ 00585 #if defined(I2C_FLTR_ANOFF)&&defined(I2C_FLTR_DNF) 00586 HAL_StatusTypeDef HAL_SMBUS_ConfigAnalogFilter(SMBUS_HandleTypeDef *hsmbus, uint32_t AnalogFilter); 00587 HAL_StatusTypeDef HAL_SMBUS_ConfigDigitalFilter(SMBUS_HandleTypeDef *hsmbus, uint32_t DigitalFilter); 00588 #endif 00589 /** 00590 * @} 00591 */ 00592 00593 /** @addtogroup SMBUS_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks 00594 * @{ 00595 */ 00596 /******* SMBUS IRQHandler and Callbacks used in non blocking modes (Interrupt) */ 00597 void HAL_SMBUS_EV_IRQHandler(SMBUS_HandleTypeDef *hsmbus); 00598 void HAL_SMBUS_ER_IRQHandler(SMBUS_HandleTypeDef *hsmbus); 00599 void HAL_SMBUS_MasterTxCpltCallback(SMBUS_HandleTypeDef *hsmbus); 00600 void HAL_SMBUS_MasterRxCpltCallback(SMBUS_HandleTypeDef *hsmbus); 00601 void HAL_SMBUS_SlaveTxCpltCallback(SMBUS_HandleTypeDef *hsmbus); 00602 void HAL_SMBUS_SlaveRxCpltCallback(SMBUS_HandleTypeDef *hsmbus); 00603 void HAL_SMBUS_AddrCallback(SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode); 00604 void HAL_SMBUS_ListenCpltCallback(SMBUS_HandleTypeDef *hsmbus); 00605 void HAL_SMBUS_ErrorCallback(SMBUS_HandleTypeDef *hsmbus); 00606 void HAL_SMBUS_AbortCpltCallback(SMBUS_HandleTypeDef *hsmbus); 00607 00608 /** 00609 * @} 00610 */ 00611 00612 /** @addtogroup SMBUS_Exported_Functions_Group3 Peripheral State, Mode and Error functions 00613 * @{ 00614 */ 00615 00616 /* Peripheral State, mode and Errors functions **************************************************/ 00617 HAL_SMBUS_StateTypeDef HAL_SMBUS_GetState(SMBUS_HandleTypeDef *hsmbus); 00618 HAL_SMBUS_ModeTypeDef HAL_SMBUS_GetMode(SMBUS_HandleTypeDef *hsmbus); 00619 uint32_t HAL_SMBUS_GetError(SMBUS_HandleTypeDef *hsmbus); 00620 00621 /** 00622 * @} 00623 */ 00624 00625 /** 00626 * @} 00627 */ 00628 /* Private types -------------------------------------------------------------*/ 00629 /* Private variables ---------------------------------------------------------*/ 00630 /* Private constants ---------------------------------------------------------*/ 00631 /** @defgroup SMBUS_Private_Constants SMBUS Private Constants 00632 * @{ 00633 */ 00634 #define SMBUS_FLAG_MASK 0x0000FFFFU 00635 /** 00636 * @} 00637 */ 00638 00639 /* Private macros ------------------------------------------------------------*/ 00640 /** @defgroup SMBUS_Private_Macros SMBUS Private Macros 00641 * @{ 00642 */ 00643 00644 #define SMBUS_FREQRANGE(__PCLK__) ((__PCLK__)/1000000U) 00645 00646 #define SMBUS_RISE_TIME(__FREQRANGE__) ( ((__FREQRANGE__) + 1U)) 00647 00648 #define SMBUS_SPEED_STANDARD(__PCLK__, __SPEED__) (((((__PCLK__)/((__SPEED__) << 1U)) & I2C_CCR_CCR) < 4U)? 4U:((__PCLK__) / ((__SPEED__) << 1U))) 00649 00650 #define SMBUS_7BIT_ADD_WRITE(__ADDRESS__) ((uint8_t)((__ADDRESS__) & (~I2C_OAR1_ADD0))) 00651 00652 #define SMBUS_7BIT_ADD_READ(__ADDRESS__) ((uint8_t)((__ADDRESS__) | I2C_OAR1_ADD0)) 00653 00654 #define SMBUS_10BIT_ADDRESS(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)0x00FF))) 00655 00656 #define SMBUS_10BIT_HEADER_WRITE(__ADDRESS__) ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0x0300)) >> 7) | (uint16_t)0x00F0))) 00657 00658 #define SMBUS_10BIT_HEADER_READ(__ADDRESS__) ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0x0300)) >> 7) | (uint16_t)(0x00F1)))) 00659 00660 #define SMBUS_GET_PEC_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR1 & I2C_CR1_ENPEC) 00661 00662 #define SMBUS_GET_PEC_VALUE(__HANDLE__) ((__HANDLE__)->XferPEC) 00663 00664 #if defined(I2C_FLTR_ANOFF)&&defined(I2C_FLTR_DNF) 00665 #define IS_SMBUS_ANALOG_FILTER(FILTER) (((FILTER) == SMBUS_ANALOGFILTER_ENABLE) || \ 00666 ((FILTER) == SMBUS_ANALOGFILTER_DISABLE)) 00667 #define IS_SMBUS_DIGITAL_FILTER(FILTER) ((FILTER) <= 0x0000000FU) 00668 #endif 00669 #define IS_SMBUS_ADDRESSING_MODE(ADDRESS) (((ADDRESS) == SMBUS_ADDRESSINGMODE_7BIT) || \ 00670 ((ADDRESS) == SMBUS_ADDRESSINGMODE_10BIT)) 00671 00672 #define IS_SMBUS_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == SMBUS_DUALADDRESS_DISABLE) || \ 00673 ((ADDRESS) == SMBUS_DUALADDRESS_ENABLE)) 00674 00675 #define IS_SMBUS_GENERAL_CALL(CALL) (((CALL) == SMBUS_GENERALCALL_DISABLE) || \ 00676 ((CALL) == SMBUS_GENERALCALL_ENABLE)) 00677 00678 #define IS_SMBUS_NO_STRETCH(STRETCH) (((STRETCH) == SMBUS_NOSTRETCH_DISABLE) || \ 00679 ((STRETCH) == SMBUS_NOSTRETCH_ENABLE)) 00680 00681 #define IS_SMBUS_PEC(PEC) (((PEC) == SMBUS_PEC_DISABLE) || \ 00682 ((PEC) == SMBUS_PEC_ENABLE)) 00683 00684 #define IS_SMBUS_PERIPHERAL_MODE(MODE) (((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_HOST) || \ 00685 ((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE) || \ 00686 ((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP)) 00687 00688 #define IS_SMBUS_CLOCK_SPEED(SPEED) (((SPEED) > 0U) && ((SPEED) <= 100000U)) 00689 00690 #define IS_SMBUS_OWN_ADDRESS1(ADDRESS1) (((ADDRESS1) & 0xFFFFFC00U) == 0U) 00691 00692 #define IS_SMBUS_OWN_ADDRESS2(ADDRESS2) (((ADDRESS2) & 0xFFFFFF01U) == 0U) 00693 00694 #define IS_SMBUS_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == SMBUS_FIRST_FRAME) || \ 00695 ((REQUEST) == SMBUS_NEXT_FRAME) || \ 00696 ((REQUEST) == SMBUS_FIRST_AND_LAST_FRAME_NO_PEC) || \ 00697 ((REQUEST) == SMBUS_LAST_FRAME_NO_PEC) || \ 00698 ((REQUEST) == SMBUS_FIRST_AND_LAST_FRAME_WITH_PEC) || \ 00699 ((REQUEST) == SMBUS_LAST_FRAME_WITH_PEC)) 00700 00701 /** 00702 * @} 00703 */ 00704 00705 /* Private Functions ---------------------------------------------------------*/ 00706 /** @defgroup SMBUS_Private_Functions SMBUS Private Functions 00707 * @{ 00708 */ 00709 00710 /** 00711 * @} 00712 */ 00713 00714 /** 00715 * @} 00716 */ 00717 00718 /** 00719 * @} 00720 */ 00721 00722 /** 00723 * @} 00724 */ 00725 00726 #ifdef __cplusplus 00727 } 00728 #endif 00729 00730 00731 #endif /* __STM32F4xx_HAL_SMBUS_H */ 00732 00733 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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