STM32F479xx HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32f4xx_hal_spdifrx.c 00004 * @author MCD Application Team 00005 * @brief This file provides firmware functions to manage the following 00006 * functionalities of the SPDIFRX audio interface: 00007 * + Initialization and Configuration 00008 * + Data transfers functions 00009 * + DMA transfers management 00010 * + Interrupts and flags management 00011 @verbatim 00012 =============================================================================== 00013 ##### How to use this driver ##### 00014 =============================================================================== 00015 [..] 00016 The SPDIFRX HAL driver can be used as follow: 00017 00018 (#) Declare SPDIFRX_HandleTypeDef handle structure. 00019 (#) Initialize the SPDIFRX low level resources by implement the HAL_SPDIFRX_MspInit() API: 00020 (##) Enable the SPDIFRX interface clock. 00021 (##) SPDIFRX pins configuration: 00022 (+++) Enable the clock for the SPDIFRX GPIOs. 00023 (+++) Configure these SPDIFRX pins as alternate function pull-up. 00024 (##) NVIC configuration if you need to use interrupt process (HAL_SPDIFRX_ReceiveControlFlow_IT() and HAL_SPDIFRX_ReceiveDataFlow_IT() API's). 00025 (+++) Configure the SPDIFRX interrupt priority. 00026 (+++) Enable the NVIC SPDIFRX IRQ handle. 00027 (##) DMA Configuration if you need to use DMA process (HAL_SPDIFRX_ReceiveDataFlow_DMA() and HAL_SPDIFRX_ReceiveControlFlow_DMA() API's). 00028 (+++) Declare a DMA handle structure for the reception of the Data Flow channel. 00029 (+++) Declare a DMA handle structure for the reception of the Control Flow channel. 00030 (+++) Enable the DMAx interface clock. 00031 (+++) Configure the declared DMA handle structure CtrlRx/DataRx with the required parameters. 00032 (+++) Configure the DMA Channel. 00033 (+++) Associate the initialized DMA handle to the SPDIFRX DMA CtrlRx/DataRx handle. 00034 (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the 00035 DMA CtrlRx/DataRx channel. 00036 00037 (#) Program the input selection, re-tries number, wait for activity, channel status selection, data format, stereo mode and masking of user bits 00038 using HAL_SPDIFRX_Init() function. 00039 00040 -@- The specific SPDIFRX interrupts (RXNE/CSRNE and Error Interrupts) will be managed using the macros 00041 __SPDIFRX_ENABLE_IT() and __SPDIFRX_DISABLE_IT() inside the receive process. 00042 -@- Make sure that ck_spdif clock is configured. 00043 00044 (#) Three operation modes are available within this driver : 00045 00046 *** Polling mode for reception operation (for debug purpose) *** 00047 ================================================================ 00048 [..] 00049 (+) Receive data flow in blocking mode using HAL_SPDIFRX_ReceiveDataFlow() 00050 (+) Receive control flow of data in blocking mode using HAL_SPDIFRX_ReceiveControlFlow() 00051 00052 *** Interrupt mode for reception operation *** 00053 ========================================= 00054 [..] 00055 (+) Receive an amount of data (Data Flow) in non blocking mode using HAL_SPDIFRX_ReceiveDataFlow_IT() 00056 (+) Receive an amount of data (Control Flow) in non blocking mode using HAL_SPDIFRX_ReceiveControlFlow_IT() 00057 (+) At reception end of half transfer HAL_SPDIFRX_RxHalfCpltCallback is executed and user can 00058 add his own code by customization of function pointer HAL_SPDIFRX_RxHalfCpltCallback 00059 (+) At reception end of transfer HAL_SPDIFRX_RxCpltCallback is executed and user can 00060 add his own code by customization of function pointer HAL_SPDIFRX_RxCpltCallback 00061 (+) In case of transfer Error, HAL_SPDIFRX_ErrorCallback() function is executed and user can 00062 add his own code by customization of function pointer HAL_SPDIFRX_ErrorCallback 00063 00064 *** DMA mode for reception operation *** 00065 ======================================== 00066 [..] 00067 (+) Receive an amount of data (Data Flow) in non blocking mode (DMA) using HAL_SPDIFRX_ReceiveDataFlow_DMA() 00068 (+) Receive an amount of data (Control Flow) in non blocking mode (DMA) using HAL_SPDIFRX_ReceiveControlFlow_DMA() 00069 (+) At reception end of half transfer HAL_SPDIFRX_RxHalfCpltCallback is executed and user can 00070 add his own code by customization of function pointer HAL_SPDIFRX_RxHalfCpltCallback 00071 (+) At reception end of transfer HAL_SPDIFRX_RxCpltCallback is executed and user can 00072 add his own code by customization of function pointer HAL_SPDIFRX_RxCpltCallback 00073 (+) In case of transfer Error, HAL_SPDIFRX_ErrorCallback() function is executed and user can 00074 add his own code by customization of function pointer HAL_SPDIFRX_ErrorCallback 00075 (+) Stop the DMA Transfer using HAL_SPDIFRX_DMAStop() 00076 00077 *** SPDIFRX HAL driver macros list *** 00078 ============================================= 00079 [..] 00080 Below the list of most used macros in SPDIFRX HAL driver. 00081 (+) __HAL_SPDIFRX_IDLE: Disable the specified SPDIFRX peripheral (IDEL State) 00082 (+) __HAL_SPDIFRX_SYNC: Enable the synchronization state of the specified SPDIFRX peripheral (SYNC State) 00083 (+) __HAL_SPDIFRX_RCV: Enable the receive state of the specified SPDIFRX peripheral (RCV State) 00084 (+) __HAL_SPDIFRX_ENABLE_IT : Enable the specified SPDIFRX interrupts 00085 (+) __HAL_SPDIFRX_DISABLE_IT : Disable the specified SPDIFRX interrupts 00086 (+) __HAL_SPDIFRX_GET_FLAG: Check whether the specified SPDIFRX flag is set or not. 00087 00088 [..] 00089 (@) You can refer to the SPDIFRX HAL driver header file for more useful macros 00090 00091 *** Callback registration *** 00092 ============================================= 00093 00094 The compilation define USE_HAL_SPDIFRX_REGISTER_CALLBACKS when set to 1 00095 allows the user to configure dynamically the driver callbacks. 00096 Use HAL_SPDIFRX_RegisterCallback() function to register an interrupt callback. 00097 00098 The HAL_SPDIFRX_RegisterCallback() function allows to register the following callbacks: 00099 (+) RxHalfCpltCallback : SPDIFRX Data flow half completed callback. 00100 (+) RxCpltCallback : SPDIFRX Data flow completed callback. 00101 (+) CxHalfCpltCallback : SPDIFRX Control flow half completed callback. 00102 (+) CxCpltCallback : SPDIFRX Control flow completed callback. 00103 (+) ErrorCallback : SPDIFRX error callback. 00104 (+) MspInitCallback : SPDIFRX MspInit. 00105 (+) MspDeInitCallback : SPDIFRX MspDeInit. 00106 This function takes as parameters the HAL peripheral handle, the Callback ID 00107 and a pointer to the user callback function. 00108 00109 Use HAL_SPDIFRX_UnRegisterCallback() function to reset a callback to the default 00110 weak function. 00111 The HAL_SPDIFRX_UnRegisterCallback() function takes as parameters the HAL peripheral handle, 00112 and the Callback ID. 00113 This function allows to reset the following callbacks: 00114 (+) RxHalfCpltCallback : SPDIFRX Data flow half completed callback. 00115 (+) RxCpltCallback : SPDIFRX Data flow completed callback. 00116 (+) CxHalfCpltCallback : SPDIFRX Control flow half completed callback. 00117 (+) CxCpltCallback : SPDIFRX Control flow completed callback. 00118 (+) ErrorCallback : SPDIFRX error callback. 00119 (+) MspInitCallback : SPDIFRX MspInit. 00120 (+) MspDeInitCallback : SPDIFRX MspDeInit. 00121 00122 By default, after the HAL_SPDIFRX_Init() and when the state is HAL_SPDIFRX_STATE_RESET 00123 all callbacks are set to the corresponding weak functions : 00124 HAL_SPDIFRX_RxHalfCpltCallback() , HAL_SPDIFRX_RxCpltCallback(), HAL_SPDIFRX_CxHalfCpltCallback(), 00125 HAL_SPDIFRX_CxCpltCallback() and HAL_SPDIFRX_ErrorCallback() 00126 Exception done for MspInit and MspDeInit functions that are 00127 reset to the legacy weak function in the HAL_SPDIFRX_Init()/ HAL_SPDIFRX_DeInit() only when 00128 these callbacks pointers are NULL (not registered beforehand). 00129 If not, MspInit or MspDeInit callbacks pointers are not null, the HAL_SPDIFRX_Init() / HAL_SPDIFRX_DeInit() 00130 keep and use the user MspInit/MspDeInit functions (registered beforehand) 00131 00132 Callbacks can be registered/unregistered in HAL_SPDIFRX_STATE_READY state only. 00133 Exception done MspInit/MspDeInit callbacks that can be registered/unregistered 00134 in HAL_SPDIFRX_STATE_READY or HAL_SPDIFRX_STATE_RESET state, 00135 thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit. 00136 In that case first register the MspInit/MspDeInit user callbacks 00137 using HAL_SPDIFRX_RegisterCallback() before calling HAL_SPDIFRX_DeInit() 00138 or HAL_SPDIFRX_Init() function. 00139 00140 When The compilation define USE_HAL_SPDIFRX_REGISTER_CALLBACKS is set to 0 or 00141 not defined, the callback registration feature is not available and all callbacks 00142 are set to the corresponding weak functions. 00143 00144 @endverbatim 00145 ****************************************************************************** 00146 * @attention 00147 * 00148 * <h2><center>© Copyright (c) 2016 STMicroelectronics. 00149 * All rights reserved.</center></h2> 00150 * 00151 * This software component is licensed by ST under BSD 3-Clause license, 00152 * the "License"; You may not use this file except in compliance with the 00153 * License. You may obtain a copy of the License at: 00154 * opensource.org/licenses/BSD-3-Clause 00155 * 00156 ****************************************************************************** 00157 */ 00158 00159 /* Includes ------------------------------------------------------------------*/ 00160 #include "stm32f4xx_hal.h" 00161 00162 /** @addtogroup STM32F4xx_HAL_Driver 00163 * @{ 00164 */ 00165 00166 /** @defgroup SPDIFRX SPDIFRX 00167 * @brief SPDIFRX HAL module driver 00168 * @{ 00169 */ 00170 00171 #ifdef HAL_SPDIFRX_MODULE_ENABLED 00172 #if defined (SPDIFRX) 00173 #if defined(STM32F446xx) 00174 /* Private typedef -----------------------------------------------------------*/ 00175 /* Private define ------------------------------------------------------------*/ 00176 #define SPDIFRX_TIMEOUT_VALUE 0xFFFFU 00177 00178 /* Private macro -------------------------------------------------------------*/ 00179 /* Private variables ---------------------------------------------------------*/ 00180 /* Private function prototypes -----------------------------------------------*/ 00181 /** @addtogroup SPDIFRX_Private_Functions 00182 * @{ 00183 */ 00184 static void SPDIFRX_DMARxCplt(DMA_HandleTypeDef *hdma); 00185 static void SPDIFRX_DMARxHalfCplt(DMA_HandleTypeDef *hdma); 00186 static void SPDIFRX_DMACxCplt(DMA_HandleTypeDef *hdma); 00187 static void SPDIFRX_DMACxHalfCplt(DMA_HandleTypeDef *hdma); 00188 static void SPDIFRX_DMAError(DMA_HandleTypeDef *hdma); 00189 static void SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif); 00190 static void SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif); 00191 static HAL_StatusTypeDef SPDIFRX_WaitOnFlagUntilTimeout(SPDIFRX_HandleTypeDef *hspdif, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t tickstart); 00192 /** 00193 * @} 00194 */ 00195 /* Exported functions ---------------------------------------------------------*/ 00196 00197 /** @defgroup SPDIFRX_Exported_Functions SPDIFRX Exported Functions 00198 * @{ 00199 */ 00200 00201 /** @defgroup SPDIFRX_Exported_Functions_Group1 Initialization and de-initialization functions 00202 * @brief Initialization and Configuration functions 00203 * 00204 @verbatim 00205 =============================================================================== 00206 ##### Initialization and de-initialization functions ##### 00207 =============================================================================== 00208 [..] This subsection provides a set of functions allowing to initialize and 00209 de-initialize the SPDIFRX peripheral: 00210 00211 (+) User must Implement HAL_SPDIFRX_MspInit() function in which he configures 00212 all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ). 00213 00214 (+) Call the function HAL_SPDIFRX_Init() to configure the SPDIFRX peripheral with 00215 the selected configuration: 00216 (++) Input Selection (IN0, IN1,...) 00217 (++) Maximum allowed re-tries during synchronization phase 00218 (++) Wait for activity on SPDIF selected input 00219 (++) Channel status selection (from channel A or B) 00220 (++) Data format (LSB, MSB, ...) 00221 (++) Stereo mode 00222 (++) User bits masking (PT,C,U,V,...) 00223 00224 (+) Call the function HAL_SPDIFRX_DeInit() to restore the default configuration 00225 of the selected SPDIFRXx peripheral. 00226 @endverbatim 00227 * @{ 00228 */ 00229 00230 /** 00231 * @brief Initializes the SPDIFRX according to the specified parameters 00232 * in the SPDIFRX_InitTypeDef and create the associated handle. 00233 * @param hspdif SPDIFRX handle 00234 * @retval HAL status 00235 */ 00236 HAL_StatusTypeDef HAL_SPDIFRX_Init(SPDIFRX_HandleTypeDef *hspdif) 00237 { 00238 uint32_t tmpreg; 00239 00240 /* Check the SPDIFRX handle allocation */ 00241 if(hspdif == NULL) 00242 { 00243 return HAL_ERROR; 00244 } 00245 00246 /* Check the SPDIFRX parameters */ 00247 assert_param(IS_STEREO_MODE(hspdif->Init.StereoMode)); 00248 assert_param(IS_SPDIFRX_INPUT_SELECT(hspdif->Init.InputSelection)); 00249 assert_param(IS_SPDIFRX_MAX_RETRIES(hspdif->Init.Retries)); 00250 assert_param(IS_SPDIFRX_WAIT_FOR_ACTIVITY(hspdif->Init.WaitForActivity)); 00251 assert_param(IS_SPDIFRX_CHANNEL(hspdif->Init.ChannelSelection)); 00252 assert_param(IS_SPDIFRX_DATA_FORMAT(hspdif->Init.DataFormat)); 00253 assert_param(IS_PREAMBLE_TYPE_MASK(hspdif->Init.PreambleTypeMask)); 00254 assert_param(IS_CHANNEL_STATUS_MASK(hspdif->Init.ChannelStatusMask)); 00255 assert_param(IS_VALIDITY_MASK(hspdif->Init.ValidityBitMask)); 00256 assert_param(IS_PARITY_ERROR_MASK(hspdif->Init.ParityErrorMask)); 00257 00258 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1) 00259 if(hspdif->State == HAL_SPDIFRX_STATE_RESET) 00260 { 00261 /* Allocate lock resource and initialize it */ 00262 hspdif->Lock = HAL_UNLOCKED; 00263 00264 hspdif->RxHalfCpltCallback = HAL_SPDIFRX_RxHalfCpltCallback; /* Legacy weak RxHalfCpltCallback */ 00265 hspdif->RxCpltCallback = HAL_SPDIFRX_RxCpltCallback; /* Legacy weak RxCpltCallback */ 00266 hspdif->CxHalfCpltCallback = HAL_SPDIFRX_CxHalfCpltCallback; /* Legacy weak CxHalfCpltCallback */ 00267 hspdif->CxCpltCallback = HAL_SPDIFRX_CxCpltCallback; /* Legacy weak CxCpltCallback */ 00268 hspdif->ErrorCallback = HAL_SPDIFRX_ErrorCallback; /* Legacy weak ErrorCallback */ 00269 00270 if(hspdif->MspInitCallback == NULL) 00271 { 00272 hspdif->MspInitCallback = HAL_SPDIFRX_MspInit; /* Legacy weak MspInit */ 00273 } 00274 00275 /* Init the low level hardware */ 00276 hspdif->MspInitCallback(hspdif); 00277 } 00278 #else 00279 if(hspdif->State == HAL_SPDIFRX_STATE_RESET) 00280 { 00281 /* Allocate lock resource and initialize it */ 00282 hspdif->Lock = HAL_UNLOCKED; 00283 /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */ 00284 HAL_SPDIFRX_MspInit(hspdif); 00285 } 00286 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */ 00287 00288 /* SPDIFRX peripheral state is BUSY */ 00289 hspdif->State = HAL_SPDIFRX_STATE_BUSY; 00290 00291 /* Disable SPDIFRX interface (IDLE State) */ 00292 __HAL_SPDIFRX_IDLE(hspdif); 00293 00294 /* Reset the old SPDIFRX CR configuration */ 00295 tmpreg = hspdif->Instance->CR; 00296 00297 tmpreg &= ~(SPDIFRX_CR_RXSTEO | SPDIFRX_CR_DRFMT | SPDIFRX_CR_PMSK | 00298 SPDIFRX_CR_VMSK | SPDIFRX_CR_CUMSK | SPDIFRX_CR_PTMSK | 00299 SPDIFRX_CR_CHSEL | SPDIFRX_CR_NBTR | SPDIFRX_CR_WFA | 00300 SPDIFRX_CR_INSEL); 00301 00302 /* Sets the new configuration of the SPDIFRX peripheral */ 00303 tmpreg |= (hspdif->Init.StereoMode | 00304 hspdif->Init.InputSelection | 00305 hspdif->Init.Retries | 00306 hspdif->Init.WaitForActivity | 00307 hspdif->Init.ChannelSelection | 00308 hspdif->Init.DataFormat | 00309 hspdif->Init.PreambleTypeMask | 00310 hspdif->Init.ChannelStatusMask | 00311 hspdif->Init.ValidityBitMask | 00312 hspdif->Init.ParityErrorMask 00313 ); 00314 00315 00316 hspdif->Instance->CR = tmpreg; 00317 00318 hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE; 00319 00320 /* SPDIFRX peripheral state is READY*/ 00321 hspdif->State = HAL_SPDIFRX_STATE_READY; 00322 00323 return HAL_OK; 00324 } 00325 00326 /** 00327 * @brief DeInitializes the SPDIFRX peripheral 00328 * @param hspdif SPDIFRX handle 00329 * @retval HAL status 00330 */ 00331 HAL_StatusTypeDef HAL_SPDIFRX_DeInit(SPDIFRX_HandleTypeDef *hspdif) 00332 { 00333 /* Check the SPDIFRX handle allocation */ 00334 if(hspdif == NULL) 00335 { 00336 return HAL_ERROR; 00337 } 00338 00339 /* Check the parameters */ 00340 assert_param(IS_SPDIFRX_ALL_INSTANCE(hspdif->Instance)); 00341 00342 hspdif->State = HAL_SPDIFRX_STATE_BUSY; 00343 00344 /* Disable SPDIFRX interface (IDLE state) */ 00345 __HAL_SPDIFRX_IDLE(hspdif); 00346 00347 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1) 00348 if(hspdif->MspDeInitCallback == NULL) 00349 { 00350 hspdif->MspDeInitCallback = HAL_SPDIFRX_MspDeInit; /* Legacy weak MspDeInit */ 00351 } 00352 00353 /* DeInit the low level hardware */ 00354 hspdif->MspDeInitCallback(hspdif); 00355 #else 00356 /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */ 00357 HAL_SPDIFRX_MspDeInit(hspdif); 00358 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */ 00359 00360 hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE; 00361 00362 /* SPDIFRX peripheral state is RESET*/ 00363 hspdif->State = HAL_SPDIFRX_STATE_RESET; 00364 00365 /* Release Lock */ 00366 __HAL_UNLOCK(hspdif); 00367 00368 return HAL_OK; 00369 } 00370 00371 /** 00372 * @brief SPDIFRX MSP Init 00373 * @param hspdif SPDIFRX handle 00374 * @retval None 00375 */ 00376 __weak void HAL_SPDIFRX_MspInit(SPDIFRX_HandleTypeDef *hspdif) 00377 { 00378 /* Prevent unused argument(s) compilation warning */ 00379 UNUSED(hspdif); 00380 00381 /* NOTE : This function Should not be modified, when the callback is needed, 00382 the HAL_SPDIFRX_MspInit could be implemented in the user file 00383 */ 00384 } 00385 00386 /** 00387 * @brief SPDIFRX MSP DeInit 00388 * @param hspdif SPDIFRX handle 00389 * @retval None 00390 */ 00391 __weak void HAL_SPDIFRX_MspDeInit(SPDIFRX_HandleTypeDef *hspdif) 00392 { 00393 /* Prevent unused argument(s) compilation warning */ 00394 UNUSED(hspdif); 00395 00396 /* NOTE : This function Should not be modified, when the callback is needed, 00397 the HAL_SPDIFRX_MspDeInit could be implemented in the user file 00398 */ 00399 } 00400 00401 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1) 00402 /** 00403 * @brief Register a User SPDIFRX Callback 00404 * To be used instead of the weak predefined callback 00405 * @param hspdif SPDIFRX handle 00406 * @param CallbackID ID of the callback to be registered 00407 * This parameter can be one of the following values: 00408 * @arg @ref HAL_SPDIFRX_RX_HALF_CB_ID SPDIFRX Data flow half completed callback ID 00409 * @arg @ref HAL_SPDIFRX_RX_CPLT_CB_ID SPDIFRX Data flow completed callback ID 00410 * @arg @ref HAL_SPDIFRX_CX_HALF_CB_ID SPDIFRX Control flow half completed callback ID 00411 * @arg @ref HAL_SPDIFRX_CX_CPLT_CB_ID SPDIFRX Control flow completed callback ID 00412 * @arg @ref HAL_SPDIFRX_ERROR_CB_ID SPDIFRX error callback ID 00413 * @arg @ref HAL_SPDIFRX_MSPINIT_CB_ID MspInit callback ID 00414 * @arg @ref HAL_SPDIFRX_MSPDEINIT_CB_ID MspDeInit callback ID 00415 * @param pCallback pointer to the Callback function 00416 * @retval HAL status 00417 */ 00418 HAL_StatusTypeDef HAL_SPDIFRX_RegisterCallback(SPDIFRX_HandleTypeDef *hspdif, HAL_SPDIFRX_CallbackIDTypeDef CallbackID, pSPDIFRX_CallbackTypeDef pCallback) 00419 { 00420 HAL_StatusTypeDef status = HAL_OK; 00421 00422 if(pCallback == NULL) 00423 { 00424 /* Update the error code */ 00425 hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_INVALID_CALLBACK; 00426 return HAL_ERROR; 00427 } 00428 /* Process locked */ 00429 __HAL_LOCK(hspdif); 00430 00431 if(HAL_SPDIFRX_STATE_READY == hspdif->State) 00432 { 00433 switch (CallbackID) 00434 { 00435 case HAL_SPDIFRX_RX_HALF_CB_ID : 00436 hspdif->RxHalfCpltCallback = pCallback; 00437 break; 00438 00439 case HAL_SPDIFRX_RX_CPLT_CB_ID : 00440 hspdif->RxCpltCallback = pCallback; 00441 break; 00442 00443 case HAL_SPDIFRX_CX_HALF_CB_ID : 00444 hspdif->CxHalfCpltCallback = pCallback; 00445 break; 00446 00447 case HAL_SPDIFRX_CX_CPLT_CB_ID : 00448 hspdif->CxCpltCallback = pCallback; 00449 break; 00450 00451 case HAL_SPDIFRX_ERROR_CB_ID : 00452 hspdif->ErrorCallback = pCallback; 00453 break; 00454 00455 case HAL_SPDIFRX_MSPINIT_CB_ID : 00456 hspdif->MspInitCallback = pCallback; 00457 break; 00458 00459 case HAL_SPDIFRX_MSPDEINIT_CB_ID : 00460 hspdif->MspDeInitCallback = pCallback; 00461 break; 00462 00463 default : 00464 /* Update the error code */ 00465 hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_INVALID_CALLBACK; 00466 /* Return error status */ 00467 status = HAL_ERROR; 00468 break; 00469 } 00470 } 00471 else if(HAL_SPDIFRX_STATE_RESET == hspdif->State) 00472 { 00473 switch (CallbackID) 00474 { 00475 case HAL_SPDIFRX_MSPINIT_CB_ID : 00476 hspdif->MspInitCallback = pCallback; 00477 break; 00478 00479 case HAL_SPDIFRX_MSPDEINIT_CB_ID : 00480 hspdif->MspDeInitCallback = pCallback; 00481 break; 00482 00483 default : 00484 /* Update the error code */ 00485 hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_INVALID_CALLBACK; 00486 /* Return error status */ 00487 status = HAL_ERROR; 00488 break; 00489 } 00490 } 00491 else 00492 { 00493 /* Update the error code */ 00494 hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_INVALID_CALLBACK; 00495 /* Return error status */ 00496 status = HAL_ERROR; 00497 } 00498 00499 /* Release Lock */ 00500 __HAL_UNLOCK(hspdif); 00501 return status; 00502 } 00503 00504 /** 00505 * @brief Unregister a SPDIFRX Callback 00506 * SPDIFRX callabck is redirected to the weak predefined callback 00507 * @param hspdif SPDIFRX handle 00508 * @param CallbackID ID of the callback to be unregistered 00509 * This parameter can be one of the following values: 00510 * @arg @ref HAL_SPDIFRX_RX_HALF_CB_ID SPDIFRX Data flow half completed callback ID 00511 * @arg @ref HAL_SPDIFRX_RX_CPLT_CB_ID SPDIFRX Data flow completed callback ID 00512 * @arg @ref HAL_SPDIFRX_CX_HALF_CB_ID SPDIFRX Control flow half completed callback ID 00513 * @arg @ref HAL_SPDIFRX_CX_CPLT_CB_ID SPDIFRX Control flow completed callback ID 00514 * @arg @ref HAL_SPDIFRX_ERROR_CB_ID SPDIFRX error callback ID 00515 * @arg @ref HAL_SPDIFRX_MSPINIT_CB_ID MspInit callback ID 00516 * @arg @ref HAL_SPDIFRX_MSPDEINIT_CB_ID MspDeInit callback ID 00517 * @retval HAL status 00518 */ 00519 HAL_StatusTypeDef HAL_SPDIFRX_UnRegisterCallback(SPDIFRX_HandleTypeDef *hspdif, HAL_SPDIFRX_CallbackIDTypeDef CallbackID) 00520 { 00521 HAL_StatusTypeDef status = HAL_OK; 00522 00523 /* Process locked */ 00524 __HAL_LOCK(hspdif); 00525 00526 if(HAL_SPDIFRX_STATE_READY == hspdif->State) 00527 { 00528 switch (CallbackID) 00529 { 00530 case HAL_SPDIFRX_RX_HALF_CB_ID : 00531 hspdif->RxHalfCpltCallback = HAL_SPDIFRX_RxHalfCpltCallback; 00532 break; 00533 00534 case HAL_SPDIFRX_RX_CPLT_CB_ID : 00535 hspdif->RxCpltCallback = HAL_SPDIFRX_RxCpltCallback; 00536 break; 00537 00538 case HAL_SPDIFRX_CX_HALF_CB_ID : 00539 hspdif->CxHalfCpltCallback = HAL_SPDIFRX_CxHalfCpltCallback; 00540 break; 00541 00542 case HAL_SPDIFRX_CX_CPLT_CB_ID : 00543 hspdif->CxCpltCallback = HAL_SPDIFRX_CxCpltCallback; 00544 break; 00545 00546 case HAL_SPDIFRX_ERROR_CB_ID : 00547 hspdif->ErrorCallback = HAL_SPDIFRX_ErrorCallback; 00548 break; 00549 00550 default : 00551 /* Update the error code */ 00552 hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_INVALID_CALLBACK; 00553 /* Return error status */ 00554 status = HAL_ERROR; 00555 break; 00556 } 00557 } 00558 else if(HAL_SPDIFRX_STATE_RESET == hspdif->State) 00559 { 00560 switch (CallbackID) 00561 { 00562 case HAL_SPDIFRX_MSPINIT_CB_ID : 00563 hspdif->MspInitCallback = HAL_SPDIFRX_MspInit; /* Legacy weak MspInit */ 00564 break; 00565 00566 case HAL_SPDIFRX_MSPDEINIT_CB_ID : 00567 hspdif->MspDeInitCallback = HAL_SPDIFRX_MspDeInit; /* Legacy weak MspInit */ 00568 break; 00569 00570 default : 00571 /* Update the error code */ 00572 hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_INVALID_CALLBACK; 00573 /* Return error status */ 00574 status = HAL_ERROR; 00575 break; 00576 } 00577 } 00578 else 00579 { 00580 /* Update the error code */ 00581 hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_INVALID_CALLBACK; 00582 /* Return error status */ 00583 status = HAL_ERROR; 00584 } 00585 00586 /* Release Lock */ 00587 __HAL_UNLOCK(hspdif); 00588 return status; 00589 } 00590 00591 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */ 00592 00593 /** 00594 * @brief Set the SPDIFRX data format according to the specified parameters in the SPDIFRX_InitTypeDef. 00595 * @param hspdif SPDIFRX handle 00596 * @param sDataFormat SPDIFRX data format 00597 * @retval HAL status 00598 */ 00599 HAL_StatusTypeDef HAL_SPDIFRX_SetDataFormat(SPDIFRX_HandleTypeDef *hspdif, SPDIFRX_SetDataFormatTypeDef sDataFormat) 00600 { 00601 uint32_t tmpreg; 00602 00603 /* Check the SPDIFRX handle allocation */ 00604 if(hspdif == NULL) 00605 { 00606 return HAL_ERROR; 00607 } 00608 00609 /* Check the SPDIFRX parameters */ 00610 assert_param(IS_STEREO_MODE(sDataFormat.StereoMode)); 00611 assert_param(IS_SPDIFRX_DATA_FORMAT(sDataFormat.DataFormat)); 00612 assert_param(IS_PREAMBLE_TYPE_MASK(sDataFormat.PreambleTypeMask)); 00613 assert_param(IS_CHANNEL_STATUS_MASK(sDataFormat.ChannelStatusMask)); 00614 assert_param(IS_VALIDITY_MASK(sDataFormat.ValidityBitMask)); 00615 assert_param(IS_PARITY_ERROR_MASK(sDataFormat.ParityErrorMask)); 00616 00617 /* Reset the old SPDIFRX CR configuration */ 00618 tmpreg = hspdif->Instance->CR; 00619 00620 if(((tmpreg & SPDIFRX_STATE_RCV) == SPDIFRX_STATE_RCV) && 00621 (((tmpreg & SPDIFRX_CR_DRFMT) != sDataFormat.DataFormat) || 00622 ((tmpreg & SPDIFRX_CR_RXSTEO) != sDataFormat.StereoMode))) 00623 { 00624 return HAL_ERROR; 00625 } 00626 00627 tmpreg &= ~(SPDIFRX_CR_RXSTEO | SPDIFRX_CR_DRFMT | SPDIFRX_CR_PMSK | 00628 SPDIFRX_CR_VMSK | SPDIFRX_CR_CUMSK | SPDIFRX_CR_PTMSK); 00629 00630 /* Configure the new data format */ 00631 tmpreg |= (sDataFormat.StereoMode | 00632 sDataFormat.DataFormat | 00633 sDataFormat.PreambleTypeMask | 00634 sDataFormat.ChannelStatusMask | 00635 sDataFormat.ValidityBitMask | 00636 sDataFormat.ParityErrorMask); 00637 00638 hspdif->Instance->CR = tmpreg; 00639 00640 return HAL_OK; 00641 } 00642 00643 /** 00644 * @} 00645 */ 00646 00647 /** @defgroup SPDIFRX_Exported_Functions_Group2 IO operation functions 00648 * @brief Data transfers functions 00649 * 00650 @verbatim 00651 =============================================================================== 00652 ##### IO operation functions ##### 00653 =============================================================================== 00654 [..] 00655 This subsection provides a set of functions allowing to manage the SPDIFRX data 00656 transfers. 00657 00658 (#) There is two mode of transfer: 00659 (++) Blocking mode : The communication is performed in the polling mode. 00660 The status of all data processing is returned by the same function 00661 after finishing transfer. 00662 (++) No-Blocking mode : The communication is performed using Interrupts 00663 or DMA. These functions return the status of the transfer start-up. 00664 The end of the data processing will be indicated through the 00665 dedicated SPDIFRX IRQ when using Interrupt mode or the DMA IRQ when 00666 using DMA mode. 00667 00668 (#) Blocking mode functions are : 00669 (++) HAL_SPDIFRX_ReceiveDataFlow() 00670 (++) HAL_SPDIFRX_ReceiveControlFlow() 00671 (+@) Do not use blocking mode to receive both control and data flow at the same time. 00672 00673 (#) No-Blocking mode functions with Interrupt are : 00674 (++) HAL_SPDIFRX_ReceiveControlFlow_IT() 00675 (++) HAL_SPDIFRX_ReceiveDataFlow_IT() 00676 00677 (#) No-Blocking mode functions with DMA are : 00678 (++) HAL_SPDIFRX_ReceiveControlFlow_DMA() 00679 (++) HAL_SPDIFRX_ReceiveDataFlow_DMA() 00680 00681 (#) A set of Transfer Complete Callbacks are provided in No_Blocking mode: 00682 (++) HAL_SPDIFRX_RxCpltCallback() 00683 (++) HAL_SPDIFRX_CxCpltCallback() 00684 00685 @endverbatim 00686 * @{ 00687 */ 00688 00689 /** 00690 * @brief Receives an amount of data (Data Flow) in blocking mode. 00691 * @param hspdif pointer to SPDIFRX_HandleTypeDef structure that contains 00692 * the configuration information for SPDIFRX module. 00693 * @param pData Pointer to data buffer 00694 * @param Size Amount of data to be received 00695 * @param Timeout Timeout duration 00696 * @retval HAL status 00697 */ 00698 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size, uint32_t Timeout) 00699 { 00700 uint32_t tickstart; 00701 uint16_t sizeCounter = Size; 00702 uint32_t *pTmpBuf = pData; 00703 00704 if((pData == NULL ) || (Size == 0U)) 00705 { 00706 return HAL_ERROR; 00707 } 00708 00709 if(hspdif->State == HAL_SPDIFRX_STATE_READY) 00710 { 00711 /* Process Locked */ 00712 __HAL_LOCK(hspdif); 00713 00714 hspdif->State = HAL_SPDIFRX_STATE_BUSY; 00715 00716 /* Start synchronisation */ 00717 __HAL_SPDIFRX_SYNC(hspdif); 00718 00719 /* Get tick */ 00720 tickstart = HAL_GetTick(); 00721 00722 /* Wait until SYNCD flag is set */ 00723 if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, Timeout, tickstart) != HAL_OK) 00724 { 00725 return HAL_TIMEOUT; 00726 } 00727 00728 /* Start reception */ 00729 __HAL_SPDIFRX_RCV(hspdif); 00730 00731 /* Receive data flow */ 00732 while(sizeCounter > 0U) 00733 { 00734 /* Get tick */ 00735 tickstart = HAL_GetTick(); 00736 00737 /* Wait until RXNE flag is set */ 00738 if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_RXNE, RESET, Timeout, tickstart) != HAL_OK) 00739 { 00740 return HAL_TIMEOUT; 00741 } 00742 00743 (*pTmpBuf) = hspdif->Instance->DR; 00744 pTmpBuf++; 00745 sizeCounter--; 00746 } 00747 00748 /* SPDIFRX ready */ 00749 hspdif->State = HAL_SPDIFRX_STATE_READY; 00750 00751 /* Process Unlocked */ 00752 __HAL_UNLOCK(hspdif); 00753 00754 return HAL_OK; 00755 } 00756 else 00757 { 00758 return HAL_BUSY; 00759 } 00760 } 00761 00762 /** 00763 * @brief Receives an amount of data (Control Flow) in blocking mode. 00764 * @param hspdif pointer to a SPDIFRX_HandleTypeDef structure that contains 00765 * the configuration information for SPDIFRX module. 00766 * @param pData Pointer to data buffer 00767 * @param Size Amount of data to be received 00768 * @param Timeout Timeout duration 00769 * @retval HAL status 00770 */ 00771 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size, uint32_t Timeout) 00772 { 00773 uint32_t tickstart; 00774 uint16_t sizeCounter = Size; 00775 uint32_t *pTmpBuf = pData; 00776 00777 if((pData == NULL ) || (Size == 0U)) 00778 { 00779 return HAL_ERROR; 00780 } 00781 00782 if(hspdif->State == HAL_SPDIFRX_STATE_READY) 00783 { 00784 /* Process Locked */ 00785 __HAL_LOCK(hspdif); 00786 00787 hspdif->State = HAL_SPDIFRX_STATE_BUSY; 00788 00789 /* Start synchronization */ 00790 __HAL_SPDIFRX_SYNC(hspdif); 00791 00792 /* Get tick */ 00793 tickstart = HAL_GetTick(); 00794 00795 /* Wait until SYNCD flag is set */ 00796 if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, Timeout, tickstart) != HAL_OK) 00797 { 00798 return HAL_TIMEOUT; 00799 } 00800 00801 /* Start reception */ 00802 __HAL_SPDIFRX_RCV(hspdif); 00803 00804 /* Receive control flow */ 00805 while(sizeCounter > 0U) 00806 { 00807 /* Get tick */ 00808 tickstart = HAL_GetTick(); 00809 00810 /* Wait until CSRNE flag is set */ 00811 if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_CSRNE, RESET, Timeout, tickstart) != HAL_OK) 00812 { 00813 return HAL_TIMEOUT; 00814 } 00815 00816 (*pTmpBuf) = hspdif->Instance->CSR; 00817 pTmpBuf++; 00818 sizeCounter--; 00819 } 00820 00821 /* SPDIFRX ready */ 00822 hspdif->State = HAL_SPDIFRX_STATE_READY; 00823 00824 /* Process Unlocked */ 00825 __HAL_UNLOCK(hspdif); 00826 00827 return HAL_OK; 00828 } 00829 else 00830 { 00831 return HAL_BUSY; 00832 } 00833 } 00834 00835 /** 00836 * @brief Receive an amount of data (Data Flow) in non-blocking mode with Interrupt 00837 * @param hspdif SPDIFRX handle 00838 * @param pData a 32-bit pointer to the Receive data buffer. 00839 * @param Size number of data sample to be received . 00840 * @retval HAL status 00841 */ 00842 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size) 00843 { 00844 uint32_t count = SPDIFRX_TIMEOUT_VALUE * (SystemCoreClock / 24U / 1000U); 00845 00846 const HAL_SPDIFRX_StateTypeDef tempState = hspdif->State; 00847 00848 if((tempState == HAL_SPDIFRX_STATE_READY) || (tempState == HAL_SPDIFRX_STATE_BUSY_CX)) 00849 { 00850 if((pData == NULL) || (Size == 0U)) 00851 { 00852 return HAL_ERROR; 00853 } 00854 00855 /* Process Locked */ 00856 __HAL_LOCK(hspdif); 00857 00858 hspdif->pRxBuffPtr = pData; 00859 hspdif->RxXferSize = Size; 00860 hspdif->RxXferCount = Size; 00861 00862 hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE; 00863 00864 /* Check if a receive process is ongoing or not */ 00865 hspdif->State = HAL_SPDIFRX_STATE_BUSY_RX; 00866 00867 /* Enable the SPDIFRX PE Error Interrupt */ 00868 __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_PERRIE); 00869 00870 /* Enable the SPDIFRX OVR Error Interrupt */ 00871 __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_OVRIE); 00872 00873 /* Enable the SPDIFRX RXNE interrupt */ 00874 __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_RXNE); 00875 00876 if((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_RCV) 00877 { 00878 /* Start synchronization */ 00879 __HAL_SPDIFRX_SYNC(hspdif); 00880 00881 /* Wait until SYNCD flag is set */ 00882 do 00883 { 00884 if (count == 0U) 00885 { 00886 /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */ 00887 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE); 00888 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE); 00889 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE); 00890 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE); 00891 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE); 00892 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE); 00893 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE); 00894 00895 hspdif->State= HAL_SPDIFRX_STATE_READY; 00896 00897 /* Process Unlocked */ 00898 __HAL_UNLOCK(hspdif); 00899 00900 return HAL_TIMEOUT; 00901 } 00902 count--; 00903 } while (__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_SYNCD) == RESET); 00904 00905 /* Start reception */ 00906 __HAL_SPDIFRX_RCV(hspdif); 00907 } 00908 00909 /* Process Unlocked */ 00910 __HAL_UNLOCK(hspdif); 00911 00912 return HAL_OK; 00913 } 00914 else 00915 { 00916 return HAL_BUSY; 00917 } 00918 } 00919 00920 /** 00921 * @brief Receive an amount of data (Control Flow) with Interrupt 00922 * @param hspdif SPDIFRX handle 00923 * @param pData a 32-bit pointer to the Receive data buffer. 00924 * @param Size number of data sample (Control Flow) to be received 00925 * @retval HAL status 00926 */ 00927 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size) 00928 { 00929 uint32_t count = SPDIFRX_TIMEOUT_VALUE * (SystemCoreClock / 24U / 1000U); 00930 00931 const HAL_SPDIFRX_StateTypeDef tempState = hspdif->State; 00932 00933 if((tempState == HAL_SPDIFRX_STATE_READY) || (tempState == HAL_SPDIFRX_STATE_BUSY_RX)) 00934 { 00935 if((pData == NULL ) || (Size == 0U)) 00936 { 00937 return HAL_ERROR; 00938 } 00939 00940 /* Process Locked */ 00941 __HAL_LOCK(hspdif); 00942 00943 hspdif->pCsBuffPtr = pData; 00944 hspdif->CsXferSize = Size; 00945 hspdif->CsXferCount = Size; 00946 00947 hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE; 00948 00949 /* Check if a receive process is ongoing or not */ 00950 hspdif->State = HAL_SPDIFRX_STATE_BUSY_CX; 00951 00952 /* Enable the SPDIFRX PE Error Interrupt */ 00953 __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_PERRIE); 00954 00955 /* Enable the SPDIFRX OVR Error Interrupt */ 00956 __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_OVRIE); 00957 00958 /* Enable the SPDIFRX CSRNE interrupt */ 00959 __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_CSRNE); 00960 00961 if((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_RCV) 00962 { 00963 /* Start synchronization */ 00964 __HAL_SPDIFRX_SYNC(hspdif); 00965 00966 /* Wait until SYNCD flag is set */ 00967 do 00968 { 00969 if (count == 0U) 00970 { 00971 /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */ 00972 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE); 00973 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE); 00974 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE); 00975 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE); 00976 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE); 00977 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE); 00978 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE); 00979 00980 hspdif->State= HAL_SPDIFRX_STATE_READY; 00981 00982 /* Process Unlocked */ 00983 __HAL_UNLOCK(hspdif); 00984 00985 return HAL_TIMEOUT; 00986 } 00987 count--; 00988 } while (__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_SYNCD) == RESET); 00989 00990 /* Start reception */ 00991 __HAL_SPDIFRX_RCV(hspdif); 00992 } 00993 00994 /* Process Unlocked */ 00995 __HAL_UNLOCK(hspdif); 00996 00997 return HAL_OK; 00998 } 00999 else 01000 { 01001 return HAL_BUSY; 01002 } 01003 } 01004 01005 /** 01006 * @brief Receive an amount of data (Data Flow) mode with DMA 01007 * @param hspdif SPDIFRX handle 01008 * @param pData a 32-bit pointer to the Receive data buffer. 01009 * @param Size number of data sample to be received 01010 * @retval HAL status 01011 */ 01012 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size) 01013 { 01014 uint32_t count = SPDIFRX_TIMEOUT_VALUE * (SystemCoreClock / 24U / 1000U); 01015 01016 const HAL_SPDIFRX_StateTypeDef tempState = hspdif->State; 01017 01018 if((pData == NULL) || (Size == 0U)) 01019 { 01020 return HAL_ERROR; 01021 } 01022 01023 if((tempState == HAL_SPDIFRX_STATE_READY) || (tempState == HAL_SPDIFRX_STATE_BUSY_CX)) 01024 { 01025 /* Process Locked */ 01026 __HAL_LOCK(hspdif); 01027 01028 hspdif->pRxBuffPtr = pData; 01029 hspdif->RxXferSize = Size; 01030 hspdif->RxXferCount = Size; 01031 01032 hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE; 01033 hspdif->State = HAL_SPDIFRX_STATE_BUSY_RX; 01034 01035 /* Set the SPDIFRX Rx DMA Half transfer complete callback */ 01036 hspdif->hdmaDrRx->XferHalfCpltCallback = SPDIFRX_DMARxHalfCplt; 01037 01038 /* Set the SPDIFRX Rx DMA transfer complete callback */ 01039 hspdif->hdmaDrRx->XferCpltCallback = SPDIFRX_DMARxCplt; 01040 01041 /* Set the DMA error callback */ 01042 hspdif->hdmaDrRx->XferErrorCallback = SPDIFRX_DMAError; 01043 01044 /* Enable the DMA request */ 01045 if(HAL_DMA_Start_IT(hspdif->hdmaDrRx, (uint32_t)&hspdif->Instance->DR, (uint32_t)hspdif->pRxBuffPtr, Size) != HAL_OK) 01046 { 01047 /* Set SPDIFRX error */ 01048 hspdif->ErrorCode = HAL_SPDIFRX_ERROR_DMA; 01049 01050 /* Set SPDIFRX state */ 01051 hspdif->State = HAL_SPDIFRX_STATE_ERROR; 01052 01053 /* Process Unlocked */ 01054 __HAL_UNLOCK(hspdif); 01055 01056 return HAL_ERROR; 01057 } 01058 01059 /* Enable RXDMAEN bit in SPDIFRX CR register for data flow reception*/ 01060 hspdif->Instance->CR |= SPDIFRX_CR_RXDMAEN; 01061 01062 if((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_RCV) 01063 { 01064 /* Start synchronization */ 01065 __HAL_SPDIFRX_SYNC(hspdif); 01066 01067 /* Wait until SYNCD flag is set */ 01068 do 01069 { 01070 if (count == 0U) 01071 { 01072 /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */ 01073 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE); 01074 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE); 01075 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE); 01076 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE); 01077 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE); 01078 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE); 01079 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE); 01080 01081 hspdif->State= HAL_SPDIFRX_STATE_READY; 01082 01083 /* Process Unlocked */ 01084 __HAL_UNLOCK(hspdif); 01085 01086 return HAL_TIMEOUT; 01087 } 01088 count--; 01089 } while (__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_SYNCD) == RESET); 01090 01091 /* Start reception */ 01092 __HAL_SPDIFRX_RCV(hspdif); 01093 } 01094 01095 /* Process Unlocked */ 01096 __HAL_UNLOCK(hspdif); 01097 01098 return HAL_OK; 01099 } 01100 else 01101 { 01102 return HAL_BUSY; 01103 } 01104 } 01105 01106 /** 01107 * @brief Receive an amount of data (Control Flow) with DMA 01108 * @param hspdif SPDIFRX handle 01109 * @param pData a 32-bit pointer to the Receive data buffer. 01110 * @param Size number of data (Control Flow) sample to be received 01111 * @retval HAL status 01112 */ 01113 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size) 01114 { 01115 uint32_t count = SPDIFRX_TIMEOUT_VALUE * (SystemCoreClock / 24U / 1000U); 01116 01117 const HAL_SPDIFRX_StateTypeDef tempState = hspdif->State; 01118 01119 if((pData == NULL) || (Size == 0U)) 01120 { 01121 return HAL_ERROR; 01122 } 01123 01124 if((tempState == HAL_SPDIFRX_STATE_READY) || (tempState == HAL_SPDIFRX_STATE_BUSY_RX)) 01125 { 01126 hspdif->pCsBuffPtr = pData; 01127 hspdif->CsXferSize = Size; 01128 hspdif->CsXferCount = Size; 01129 01130 /* Process Locked */ 01131 __HAL_LOCK(hspdif); 01132 01133 hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE; 01134 hspdif->State = HAL_SPDIFRX_STATE_BUSY_CX; 01135 01136 /* Set the SPDIFRX Rx DMA Half transfer complete callback */ 01137 hspdif->hdmaCsRx->XferHalfCpltCallback = SPDIFRX_DMACxHalfCplt; 01138 01139 /* Set the SPDIFRX Rx DMA transfer complete callback */ 01140 hspdif->hdmaCsRx->XferCpltCallback = SPDIFRX_DMACxCplt; 01141 01142 /* Set the DMA error callback */ 01143 hspdif->hdmaCsRx->XferErrorCallback = SPDIFRX_DMAError; 01144 01145 /* Enable the DMA request */ 01146 if(HAL_DMA_Start_IT(hspdif->hdmaCsRx, (uint32_t)&hspdif->Instance->CSR, (uint32_t)hspdif->pCsBuffPtr, Size) != HAL_OK) 01147 { 01148 /* Set SPDIFRX error */ 01149 hspdif->ErrorCode = HAL_SPDIFRX_ERROR_DMA; 01150 01151 /* Set SPDIFRX state */ 01152 hspdif->State = HAL_SPDIFRX_STATE_ERROR; 01153 01154 /* Process Unlocked */ 01155 __HAL_UNLOCK(hspdif); 01156 01157 return HAL_ERROR; 01158 } 01159 01160 /* Enable CBDMAEN bit in SPDIFRX CR register for control flow reception*/ 01161 hspdif->Instance->CR |= SPDIFRX_CR_CBDMAEN; 01162 01163 if((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_RCV) 01164 { 01165 /* Start synchronization */ 01166 __HAL_SPDIFRX_SYNC(hspdif); 01167 01168 /* Wait until SYNCD flag is set */ 01169 do 01170 { 01171 if (count == 0U) 01172 { 01173 /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */ 01174 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE); 01175 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE); 01176 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE); 01177 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE); 01178 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE); 01179 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE); 01180 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE); 01181 01182 hspdif->State= HAL_SPDIFRX_STATE_READY; 01183 01184 /* Process Unlocked */ 01185 __HAL_UNLOCK(hspdif); 01186 01187 return HAL_TIMEOUT; 01188 } 01189 count--; 01190 } while (__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_SYNCD) == RESET); 01191 01192 /* Start reception */ 01193 __HAL_SPDIFRX_RCV(hspdif); 01194 } 01195 01196 /* Process Unlocked */ 01197 __HAL_UNLOCK(hspdif); 01198 01199 return HAL_OK; 01200 } 01201 else 01202 { 01203 return HAL_BUSY; 01204 } 01205 } 01206 01207 /** 01208 * @brief stop the audio stream receive from the Media. 01209 * @param hspdif SPDIFRX handle 01210 * @retval None 01211 */ 01212 HAL_StatusTypeDef HAL_SPDIFRX_DMAStop(SPDIFRX_HandleTypeDef *hspdif) 01213 { 01214 /* Process Locked */ 01215 __HAL_LOCK(hspdif); 01216 01217 /* Disable the SPDIFRX DMA requests */ 01218 hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_RXDMAEN); 01219 hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_CBDMAEN); 01220 01221 /* Disable the SPDIFRX DMA channel */ 01222 __HAL_DMA_DISABLE(hspdif->hdmaDrRx); 01223 __HAL_DMA_DISABLE(hspdif->hdmaCsRx); 01224 01225 /* Disable SPDIFRX peripheral */ 01226 __HAL_SPDIFRX_IDLE(hspdif); 01227 01228 hspdif->State = HAL_SPDIFRX_STATE_READY; 01229 01230 /* Process Unlocked */ 01231 __HAL_UNLOCK(hspdif); 01232 01233 return HAL_OK; 01234 } 01235 01236 /** 01237 * @brief This function handles SPDIFRX interrupt request. 01238 * @param hspdif SPDIFRX handle 01239 * @retval HAL status 01240 */ 01241 void HAL_SPDIFRX_IRQHandler(SPDIFRX_HandleTypeDef *hspdif) 01242 { 01243 uint32_t itFlag = hspdif->Instance->SR; 01244 uint32_t itSource = hspdif->Instance->IMR; 01245 01246 /* SPDIFRX in mode Data Flow Reception */ 01247 if(((itFlag & SPDIFRX_FLAG_RXNE) == SPDIFRX_FLAG_RXNE) && ((itSource & SPDIFRX_IT_RXNE) == SPDIFRX_IT_RXNE)) 01248 { 01249 __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_IT_RXNE); 01250 SPDIFRX_ReceiveDataFlow_IT(hspdif); 01251 } 01252 01253 /* SPDIFRX in mode Control Flow Reception */ 01254 if(((itFlag & SPDIFRX_FLAG_CSRNE) == SPDIFRX_FLAG_CSRNE) && ((itSource & SPDIFRX_IT_CSRNE) == SPDIFRX_IT_CSRNE)) 01255 { 01256 __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_IT_CSRNE); 01257 SPDIFRX_ReceiveControlFlow_IT(hspdif); 01258 } 01259 01260 /* SPDIFRX Overrun error interrupt occurred */ 01261 if(((itFlag & SPDIFRX_FLAG_OVR) == SPDIFRX_FLAG_OVR) && ((itSource & SPDIFRX_IT_OVRIE) == SPDIFRX_IT_OVRIE)) 01262 { 01263 __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_IT_OVRIE); 01264 01265 /* Change the SPDIFRX error code */ 01266 hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_OVR; 01267 01268 /* the transfer is not stopped */ 01269 HAL_SPDIFRX_ErrorCallback(hspdif); 01270 } 01271 01272 /* SPDIFRX Parity error interrupt occurred */ 01273 if(((itFlag & SPDIFRX_FLAG_PERR) == SPDIFRX_FLAG_PERR) && ((itSource & SPDIFRX_IT_PERRIE) == SPDIFRX_IT_PERRIE)) 01274 { 01275 __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_IT_PERRIE); 01276 01277 /* Change the SPDIFRX error code */ 01278 hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_PE; 01279 01280 /* the transfer is not stopped */ 01281 HAL_SPDIFRX_ErrorCallback(hspdif); 01282 } 01283 } 01284 01285 /** 01286 * @brief Rx Transfer (Data flow) half completed callbacks 01287 * @param hspdif SPDIFRX handle 01288 * @retval None 01289 */ 01290 __weak void HAL_SPDIFRX_RxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif) 01291 { 01292 /* Prevent unused argument(s) compilation warning */ 01293 UNUSED(hspdif); 01294 01295 /* NOTE : This function Should not be modified, when the callback is needed, 01296 the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file 01297 */ 01298 } 01299 01300 /** 01301 * @brief Rx Transfer (Data flow) completed callbacks 01302 * @param hspdif SPDIFRX handle 01303 * @retval None 01304 */ 01305 __weak void HAL_SPDIFRX_RxCpltCallback(SPDIFRX_HandleTypeDef *hspdif) 01306 { 01307 /* Prevent unused argument(s) compilation warning */ 01308 UNUSED(hspdif); 01309 01310 /* NOTE : This function Should not be modified, when the callback is needed, 01311 the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file 01312 */ 01313 } 01314 01315 /** 01316 * @brief Rx (Control flow) Transfer half completed callbacks 01317 * @param hspdif SPDIFRX handle 01318 * @retval None 01319 */ 01320 __weak void HAL_SPDIFRX_CxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif) 01321 { 01322 /* Prevent unused argument(s) compilation warning */ 01323 UNUSED(hspdif); 01324 01325 /* NOTE : This function Should not be modified, when the callback is needed, 01326 the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file 01327 */ 01328 } 01329 01330 /** 01331 * @brief Rx Transfer (Control flow) completed callbacks 01332 * @param hspdif SPDIFRX handle 01333 * @retval None 01334 */ 01335 __weak void HAL_SPDIFRX_CxCpltCallback(SPDIFRX_HandleTypeDef *hspdif) 01336 { 01337 /* Prevent unused argument(s) compilation warning */ 01338 UNUSED(hspdif); 01339 01340 /* NOTE : This function Should not be modified, when the callback is needed, 01341 the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file 01342 */ 01343 } 01344 01345 /** 01346 * @brief SPDIFRX error callbacks 01347 * @param hspdif SPDIFRX handle 01348 * @retval None 01349 */ 01350 __weak void HAL_SPDIFRX_ErrorCallback(SPDIFRX_HandleTypeDef *hspdif) 01351 { 01352 /* Prevent unused argument(s) compilation warning */ 01353 UNUSED(hspdif); 01354 01355 /* NOTE : This function Should not be modified, when the callback is needed, 01356 the HAL_SPDIFRX_ErrorCallback could be implemented in the user file 01357 */ 01358 } 01359 01360 /** 01361 * @} 01362 */ 01363 01364 /** @defgroup SPDIFRX_Exported_Functions_Group3 Peripheral State and Errors functions 01365 * @brief Peripheral State functions 01366 * 01367 @verbatim 01368 =============================================================================== 01369 ##### Peripheral State and Errors functions ##### 01370 =============================================================================== 01371 [..] 01372 This subsection permit to get in run-time the status of the peripheral 01373 and the data flow. 01374 01375 @endverbatim 01376 * @{ 01377 */ 01378 01379 /** 01380 * @brief Return the SPDIFRX state 01381 * @param hspdif SPDIFRX handle 01382 * @retval HAL state 01383 */ 01384 HAL_SPDIFRX_StateTypeDef HAL_SPDIFRX_GetState(SPDIFRX_HandleTypeDef const * const hspdif) 01385 { 01386 return hspdif->State; 01387 } 01388 01389 /** 01390 * @brief Return the SPDIFRX error code 01391 * @param hspdif SPDIFRX handle 01392 * @retval SPDIFRX Error Code 01393 */ 01394 uint32_t HAL_SPDIFRX_GetError(SPDIFRX_HandleTypeDef const * const hspdif) 01395 { 01396 return hspdif->ErrorCode; 01397 } 01398 01399 /** 01400 * @} 01401 */ 01402 01403 /** 01404 * @brief DMA SPDIFRX receive process (Data flow) complete callback 01405 * @param hdma DMA handle 01406 * @retval None 01407 */ 01408 static void SPDIFRX_DMARxCplt(DMA_HandleTypeDef *hdma) 01409 { 01410 SPDIFRX_HandleTypeDef* hspdif = ( SPDIFRX_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 01411 01412 /* Disable Rx DMA Request */ 01413 if(hdma->Init.Mode != DMA_CIRCULAR) 01414 { 01415 hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_RXDMAEN); 01416 hspdif->RxXferCount = 0; 01417 hspdif->State = HAL_SPDIFRX_STATE_READY; 01418 } 01419 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1) 01420 hspdif->RxCpltCallback(hspdif); 01421 #else 01422 HAL_SPDIFRX_RxCpltCallback(hspdif); 01423 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */ 01424 } 01425 01426 /** 01427 * @brief DMA SPDIFRX receive process (Data flow) half complete callback 01428 * @param hdma DMA handle 01429 * @retval None 01430 */ 01431 static void SPDIFRX_DMARxHalfCplt(DMA_HandleTypeDef *hdma) 01432 { 01433 SPDIFRX_HandleTypeDef* hspdif = (SPDIFRX_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; 01434 01435 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1) 01436 hspdif->RxHalfCpltCallback(hspdif); 01437 #else 01438 HAL_SPDIFRX_RxHalfCpltCallback(hspdif); 01439 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */ 01440 } 01441 01442 01443 /** 01444 * @brief DMA SPDIFRX receive process (Control flow) complete callback 01445 * @param hdma DMA handle 01446 * @retval None 01447 */ 01448 static void SPDIFRX_DMACxCplt(DMA_HandleTypeDef *hdma) 01449 { 01450 SPDIFRX_HandleTypeDef* hspdif = ( SPDIFRX_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 01451 01452 /* Disable Cb DMA Request */ 01453 hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_CBDMAEN); 01454 hspdif->CsXferCount = 0; 01455 01456 hspdif->State = HAL_SPDIFRX_STATE_READY; 01457 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1) 01458 hspdif->CxCpltCallback(hspdif); 01459 #else 01460 HAL_SPDIFRX_CxCpltCallback(hspdif); 01461 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */ 01462 } 01463 01464 /** 01465 * @brief DMA SPDIFRX receive process (Control flow) half complete callback 01466 * @param hdma DMA handle 01467 * @retval None 01468 */ 01469 static void SPDIFRX_DMACxHalfCplt(DMA_HandleTypeDef *hdma) 01470 { 01471 SPDIFRX_HandleTypeDef* hspdif = (SPDIFRX_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; 01472 01473 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1) 01474 hspdif->CxHalfCpltCallback(hspdif); 01475 #else 01476 HAL_SPDIFRX_CxHalfCpltCallback(hspdif); 01477 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */ 01478 } 01479 01480 /** 01481 * @brief DMA SPDIFRX communication error callback 01482 * @param hdma DMA handle 01483 * @retval None 01484 */ 01485 static void SPDIFRX_DMAError(DMA_HandleTypeDef *hdma) 01486 { 01487 SPDIFRX_HandleTypeDef* hspdif = ( SPDIFRX_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 01488 01489 /* Disable Rx and Cb DMA Request */ 01490 hspdif->Instance->CR &= (uint16_t)(~(SPDIFRX_CR_RXDMAEN | SPDIFRX_CR_CBDMAEN)); 01491 hspdif->RxXferCount = 0; 01492 01493 hspdif->State= HAL_SPDIFRX_STATE_READY; 01494 01495 /* Set the error code and execute error callback*/ 01496 hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_DMA; 01497 01498 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1) 01499 /* The transfer is not stopped */ 01500 hspdif->ErrorCallback(hspdif); 01501 #else 01502 /* The transfer is not stopped */ 01503 HAL_SPDIFRX_ErrorCallback(hspdif); 01504 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */ 01505 } 01506 01507 /** 01508 * @brief Receive an amount of data (Data Flow) with Interrupt 01509 * @param hspdif SPDIFRX handle 01510 * @retval None 01511 */ 01512 static void SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif) 01513 { 01514 /* Receive data */ 01515 (*hspdif->pRxBuffPtr) = hspdif->Instance->DR; 01516 hspdif->pRxBuffPtr++; 01517 hspdif->RxXferCount--; 01518 01519 if(hspdif->RxXferCount == 0U) 01520 { 01521 /* Disable RXNE/PE and OVR interrupts */ 01522 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE | SPDIFRX_IT_PERRIE | SPDIFRX_IT_RXNE); 01523 01524 hspdif->State = HAL_SPDIFRX_STATE_READY; 01525 01526 /* Process Unlocked */ 01527 __HAL_UNLOCK(hspdif); 01528 01529 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1) 01530 hspdif->RxCpltCallback(hspdif); 01531 #else 01532 HAL_SPDIFRX_RxCpltCallback(hspdif); 01533 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */ 01534 } 01535 } 01536 01537 /** 01538 * @brief Receive an amount of data (Control Flow) with Interrupt 01539 * @param hspdif SPDIFRX handle 01540 * @retval None 01541 */ 01542 static void SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif) 01543 { 01544 /* Receive data */ 01545 (*hspdif->pCsBuffPtr) = hspdif->Instance->CSR; 01546 hspdif->pCsBuffPtr++; 01547 hspdif->CsXferCount--; 01548 01549 if(hspdif->CsXferCount == 0U) 01550 { 01551 /* Disable CSRNE interrupt */ 01552 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE); 01553 01554 hspdif->State = HAL_SPDIFRX_STATE_READY; 01555 01556 /* Process Unlocked */ 01557 __HAL_UNLOCK(hspdif); 01558 01559 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1) 01560 hspdif->CxCpltCallback(hspdif); 01561 #else 01562 HAL_SPDIFRX_CxCpltCallback(hspdif); 01563 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */ 01564 } 01565 } 01566 01567 /** 01568 * @brief This function handles SPDIFRX Communication Timeout. 01569 * @param hspdif SPDIFRX handle 01570 * @param Flag Flag checked 01571 * @param Status Value of the flag expected 01572 * @param Timeout Duration of the timeout 01573 * @param tickstart Tick start value 01574 * @retval HAL status 01575 */ 01576 static HAL_StatusTypeDef SPDIFRX_WaitOnFlagUntilTimeout(SPDIFRX_HandleTypeDef *hspdif, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t tickstart) 01577 { 01578 /* Wait until flag is set */ 01579 while(__HAL_SPDIFRX_GET_FLAG(hspdif, Flag) == Status) 01580 { 01581 /* Check for the Timeout */ 01582 if(Timeout != HAL_MAX_DELAY) 01583 { 01584 if(((HAL_GetTick() - tickstart ) > Timeout) || (Timeout == 0U)) 01585 { 01586 /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */ 01587 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE); 01588 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE); 01589 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE); 01590 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE); 01591 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE); 01592 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE); 01593 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE); 01594 01595 hspdif->State= HAL_SPDIFRX_STATE_READY; 01596 01597 /* Process Unlocked */ 01598 __HAL_UNLOCK(hspdif); 01599 01600 return HAL_TIMEOUT; 01601 } 01602 } 01603 } 01604 01605 return HAL_OK; 01606 } 01607 01608 /** 01609 * @} 01610 */ 01611 #endif /* STM32F446xx */ 01612 01613 #endif /* SPDIFRX */ 01614 #endif /* HAL_SPDIFRX_MODULE_ENABLED */ 01615 /** 01616 * @} 01617 */ 01618 01619 /** 01620 * @} 01621 */ 01622 01623 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/