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STM32F479xx HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32f4xx_hal_spdifrx.h 00004 * @author MCD Application Team 00005 * @brief Header file of SPDIFRX HAL module. 00006 ****************************************************************************** 00007 * @attention 00008 * 00009 * <h2><center>© Copyright (c) 2016 STMicroelectronics. 00010 * All rights reserved.</center></h2> 00011 * 00012 * This software component is licensed by ST under BSD 3-Clause license, 00013 * the "License"; You may not use this file except in compliance with the 00014 * License. You may obtain a copy of the License at: 00015 * opensource.org/licenses/BSD-3-Clause 00016 * 00017 ****************************************************************************** 00018 */ 00019 00020 /* Define to prevent recursive inclusion -------------------------------------*/ 00021 #ifndef STM32F4xx_HAL_SPDIFRX_H 00022 #define STM32F4xx_HAL_SPDIFRX_H 00023 00024 #ifdef __cplusplus 00025 extern "C" { 00026 #endif 00027 00028 /* Includes ------------------------------------------------------------------*/ 00029 #include "stm32f4xx_hal_def.h" 00030 00031 #if defined(STM32F446xx) 00032 /** @addtogroup STM32F4xx_HAL_Driver 00033 * @{ 00034 */ 00035 #if defined (SPDIFRX) 00036 00037 /** @addtogroup SPDIFRX 00038 * @{ 00039 */ 00040 00041 /* Exported types ------------------------------------------------------------*/ 00042 /** @defgroup SPDIFRX_Exported_Types SPDIFRX Exported Types 00043 * @{ 00044 */ 00045 00046 /** 00047 * @brief SPDIFRX Init structure definition 00048 */ 00049 typedef struct 00050 { 00051 uint32_t InputSelection; /*!< Specifies the SPDIF input selection. 00052 This parameter can be a value of @ref SPDIFRX_Input_Selection */ 00053 00054 uint32_t Retries; /*!< Specifies the Maximum allowed re-tries during synchronization phase. 00055 This parameter can be a value of @ref SPDIFRX_Max_Retries */ 00056 00057 uint32_t WaitForActivity; /*!< Specifies the wait for activity on SPDIF selected input. 00058 This parameter can be a value of @ref SPDIFRX_Wait_For_Activity. */ 00059 00060 uint32_t ChannelSelection; /*!< Specifies whether the control flow will take the channel status from channel A or B. 00061 This parameter can be a value of @ref SPDIFRX_Channel_Selection */ 00062 00063 uint32_t DataFormat; /*!< Specifies the Data samples format (LSB, MSB, ...). 00064 This parameter can be a value of @ref SPDIFRX_Data_Format */ 00065 00066 uint32_t StereoMode; /*!< Specifies whether the peripheral is in stereo or mono mode. 00067 This parameter can be a value of @ref SPDIFRX_Stereo_Mode */ 00068 00069 uint32_t PreambleTypeMask; /*!< Specifies whether The preamble type bits are copied or not into the received frame. 00070 This parameter can be a value of @ref SPDIFRX_PT_Mask */ 00071 00072 uint32_t ChannelStatusMask; /*!< Specifies whether the channel status and user bits are copied or not into the received frame. 00073 This parameter can be a value of @ref SPDIFRX_ChannelStatus_Mask */ 00074 00075 uint32_t ValidityBitMask; /*!< Specifies whether the validity bit is copied or not into the received frame. 00076 This parameter can be a value of @ref SPDIFRX_V_Mask */ 00077 00078 uint32_t ParityErrorMask; /*!< Specifies whether the parity error bit is copied or not into the received frame. 00079 This parameter can be a value of @ref SPDIFRX_PE_Mask */ 00080 } SPDIFRX_InitTypeDef; 00081 00082 /** 00083 * @brief SPDIFRX SetDataFormat structure definition 00084 */ 00085 typedef struct 00086 { 00087 uint32_t DataFormat; /*!< Specifies the Data samples format (LSB, MSB, ...). 00088 This parameter can be a value of @ref SPDIFRX_Data_Format */ 00089 00090 uint32_t StereoMode; /*!< Specifies whether the peripheral is in stereo or mono mode. 00091 This parameter can be a value of @ref SPDIFRX_Stereo_Mode */ 00092 00093 uint32_t PreambleTypeMask; /*!< Specifies whether The preamble type bits are copied or not into the received frame. 00094 This parameter can be a value of @ref SPDIFRX_PT_Mask */ 00095 00096 uint32_t ChannelStatusMask; /*!< Specifies whether the channel status and user bits are copied or not into the received frame. 00097 This parameter can be a value of @ref SPDIFRX_ChannelStatus_Mask */ 00098 00099 uint32_t ValidityBitMask; /*!< Specifies whether the validity bit is copied or not into the received frame. 00100 This parameter can be a value of @ref SPDIFRX_V_Mask */ 00101 00102 uint32_t ParityErrorMask; /*!< Specifies whether the parity error bit is copied or not into the received frame. 00103 This parameter can be a value of @ref SPDIFRX_PE_Mask */ 00104 00105 } SPDIFRX_SetDataFormatTypeDef; 00106 00107 /** 00108 * @brief HAL State structures definition 00109 */ 00110 typedef enum 00111 { 00112 HAL_SPDIFRX_STATE_RESET = 0x00U, /*!< SPDIFRX not yet initialized or disabled */ 00113 HAL_SPDIFRX_STATE_READY = 0x01U, /*!< SPDIFRX initialized and ready for use */ 00114 HAL_SPDIFRX_STATE_BUSY = 0x02U, /*!< SPDIFRX internal process is ongoing */ 00115 HAL_SPDIFRX_STATE_BUSY_RX = 0x03U, /*!< SPDIFRX internal Data Flow RX process is ongoing */ 00116 HAL_SPDIFRX_STATE_BUSY_CX = 0x04U, /*!< SPDIFRX internal Control Flow RX process is ongoing */ 00117 HAL_SPDIFRX_STATE_ERROR = 0x07U /*!< SPDIFRX error state */ 00118 } HAL_SPDIFRX_StateTypeDef; 00119 00120 /** 00121 * @brief SPDIFRX handle Structure definition 00122 */ 00123 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1) 00124 typedef struct __SPDIFRX_HandleTypeDef 00125 #else 00126 typedef struct 00127 #endif 00128 { 00129 SPDIFRX_TypeDef *Instance; /* SPDIFRX registers base address */ 00130 00131 SPDIFRX_InitTypeDef Init; /* SPDIFRX communication parameters */ 00132 00133 uint32_t *pRxBuffPtr; /* Pointer to SPDIFRX Rx transfer buffer */ 00134 00135 uint32_t *pCsBuffPtr; /* Pointer to SPDIFRX Cx transfer buffer */ 00136 00137 __IO uint16_t RxXferSize; /* SPDIFRX Rx transfer size */ 00138 00139 __IO uint16_t RxXferCount; /* SPDIFRX Rx transfer counter 00140 (This field is initialized at the 00141 same value as transfer size at the 00142 beginning of the transfer and 00143 decremented when a sample is received. 00144 NbSamplesReceived = RxBufferSize-RxBufferCount) */ 00145 00146 __IO uint16_t CsXferSize; /* SPDIFRX Rx transfer size */ 00147 00148 __IO uint16_t CsXferCount; /* SPDIFRX Rx transfer counter 00149 (This field is initialized at the 00150 same value as transfer size at the 00151 beginning of the transfer and 00152 decremented when a sample is received. 00153 NbSamplesReceived = RxBufferSize-RxBufferCount) */ 00154 00155 DMA_HandleTypeDef *hdmaCsRx; /* SPDIFRX EC60958_channel_status and user_information DMA handle parameters */ 00156 00157 DMA_HandleTypeDef *hdmaDrRx; /* SPDIFRX Rx DMA handle parameters */ 00158 00159 __IO HAL_LockTypeDef Lock; /* SPDIFRX locking object */ 00160 00161 __IO HAL_SPDIFRX_StateTypeDef State; /* SPDIFRX communication state */ 00162 00163 __IO uint32_t ErrorCode; /* SPDIFRX Error code */ 00164 00165 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1) 00166 void (*RxHalfCpltCallback)(struct __SPDIFRX_HandleTypeDef *hspdif); /*!< SPDIFRX Data flow half completed callback */ 00167 void (*RxCpltCallback)(struct __SPDIFRX_HandleTypeDef *hspdif); /*!< SPDIFRX Data flow completed callback */ 00168 void (*CxHalfCpltCallback)(struct __SPDIFRX_HandleTypeDef *hspdif); /*!< SPDIFRX Control flow half completed callback */ 00169 void (*CxCpltCallback)(struct __SPDIFRX_HandleTypeDef *hspdif); /*!< SPDIFRX Control flow completed callback */ 00170 void (*ErrorCallback)(struct __SPDIFRX_HandleTypeDef *hspdif); /*!< SPDIFRX error callback */ 00171 void (* MspInitCallback)( struct __SPDIFRX_HandleTypeDef * hspdif); /*!< SPDIFRX Msp Init callback */ 00172 void (* MspDeInitCallback)( struct __SPDIFRX_HandleTypeDef * hspdif); /*!< SPDIFRX Msp DeInit callback */ 00173 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */ 00174 00175 } SPDIFRX_HandleTypeDef; 00176 /** 00177 * @} 00178 */ 00179 00180 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1) 00181 /** 00182 * @brief HAL SPDIFRX Callback ID enumeration definition 00183 */ 00184 typedef enum 00185 { 00186 HAL_SPDIFRX_RX_HALF_CB_ID = 0x00U, /*!< SPDIFRX Data flow half completed callback ID */ 00187 HAL_SPDIFRX_RX_CPLT_CB_ID = 0x01U, /*!< SPDIFRX Data flow completed callback */ 00188 HAL_SPDIFRX_CX_HALF_CB_ID = 0x02U, /*!< SPDIFRX Control flow half completed callback */ 00189 HAL_SPDIFRX_CX_CPLT_CB_ID = 0x03U, /*!< SPDIFRX Control flow completed callback */ 00190 HAL_SPDIFRX_ERROR_CB_ID = 0x04U, /*!< SPDIFRX error callback */ 00191 HAL_SPDIFRX_MSPINIT_CB_ID = 0x05U, /*!< SPDIFRX Msp Init callback ID */ 00192 HAL_SPDIFRX_MSPDEINIT_CB_ID = 0x06U /*!< SPDIFRX Msp DeInit callback ID */ 00193 }HAL_SPDIFRX_CallbackIDTypeDef; 00194 00195 /** 00196 * @brief HAL SPDIFRX Callback pointer definition 00197 */ 00198 typedef void (*pSPDIFRX_CallbackTypeDef)(SPDIFRX_HandleTypeDef * hspdif); /*!< pointer to an SPDIFRX callback function */ 00199 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */ 00200 00201 /* Exported constants --------------------------------------------------------*/ 00202 /** @defgroup SPDIFRX_Exported_Constants SPDIFRX Exported Constants 00203 * @{ 00204 */ 00205 /** @defgroup SPDIFRX_ErrorCode SPDIFRX Error Code 00206 * @{ 00207 */ 00208 #define HAL_SPDIFRX_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */ 00209 #define HAL_SPDIFRX_ERROR_TIMEOUT ((uint32_t)0x00000001U) /*!< Timeout error */ 00210 #define HAL_SPDIFRX_ERROR_OVR ((uint32_t)0x00000002U) /*!< OVR error */ 00211 #define HAL_SPDIFRX_ERROR_PE ((uint32_t)0x00000004U) /*!< Parity error */ 00212 #define HAL_SPDIFRX_ERROR_DMA ((uint32_t)0x00000008U) /*!< DMA transfer error */ 00213 #define HAL_SPDIFRX_ERROR_UNKNOWN ((uint32_t)0x00000010U) /*!< Unknown Error error */ 00214 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1) 00215 #define HAL_SPDIFRX_ERROR_INVALID_CALLBACK ((uint32_t)0x00000020U) /*!< Invalid Callback error */ 00216 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */ 00217 /** 00218 * @} 00219 */ 00220 00221 /** @defgroup SPDIFRX_Input_Selection SPDIFRX Input Selection 00222 * @{ 00223 */ 00224 #define SPDIFRX_INPUT_IN0 ((uint32_t)0x00000000U) 00225 #define SPDIFRX_INPUT_IN1 ((uint32_t)0x00010000U) 00226 #define SPDIFRX_INPUT_IN2 ((uint32_t)0x00020000U) 00227 #define SPDIFRX_INPUT_IN3 ((uint32_t)0x00030000U) 00228 /** 00229 * @} 00230 */ 00231 00232 /** @defgroup SPDIFRX_Max_Retries SPDIFRX Maximum Retries 00233 * @{ 00234 */ 00235 #define SPDIFRX_MAXRETRIES_NONE ((uint32_t)0x00000000U) 00236 #define SPDIFRX_MAXRETRIES_3 ((uint32_t)0x00001000U) 00237 #define SPDIFRX_MAXRETRIES_15 ((uint32_t)0x00002000U) 00238 #define SPDIFRX_MAXRETRIES_63 ((uint32_t)0x00003000U) 00239 /** 00240 * @} 00241 */ 00242 00243 /** @defgroup SPDIFRX_Wait_For_Activity SPDIFRX Wait For Activity 00244 * @{ 00245 */ 00246 #define SPDIFRX_WAITFORACTIVITY_OFF ((uint32_t)0x00000000U) 00247 #define SPDIFRX_WAITFORACTIVITY_ON ((uint32_t)SPDIFRX_CR_WFA) 00248 /** 00249 * @} 00250 */ 00251 00252 /** @defgroup SPDIFRX_PT_Mask SPDIFRX Preamble Type Mask 00253 * @{ 00254 */ 00255 #define SPDIFRX_PREAMBLETYPEMASK_OFF ((uint32_t)0x00000000U) 00256 #define SPDIFRX_PREAMBLETYPEMASK_ON ((uint32_t)SPDIFRX_CR_PTMSK) 00257 /** 00258 * @} 00259 */ 00260 00261 /** @defgroup SPDIFRX_ChannelStatus_Mask SPDIFRX Channel Status Mask 00262 * @{ 00263 */ 00264 #define SPDIFRX_CHANNELSTATUS_OFF ((uint32_t)0x00000000U) /* The channel status and user bits are copied into the SPDIF_DR */ 00265 #define SPDIFRX_CHANNELSTATUS_ON ((uint32_t)SPDIFRX_CR_CUMSK) /* The channel status and user bits are not copied into the SPDIF_DR, zeros are written instead*/ 00266 /** 00267 * @} 00268 */ 00269 00270 /** @defgroup SPDIFRX_V_Mask SPDIFRX Validity Mask 00271 * @{ 00272 */ 00273 #define SPDIFRX_VALIDITYMASK_OFF ((uint32_t)0x00000000U) 00274 #define SPDIFRX_VALIDITYMASK_ON ((uint32_t)SPDIFRX_CR_VMSK) 00275 /** 00276 * @} 00277 */ 00278 00279 /** @defgroup SPDIFRX_PE_Mask SPDIFRX Parity Error Mask 00280 * @{ 00281 */ 00282 #define SPDIFRX_PARITYERRORMASK_OFF ((uint32_t)0x00000000U) 00283 #define SPDIFRX_PARITYERRORMASK_ON ((uint32_t)SPDIFRX_CR_PMSK) 00284 /** 00285 * @} 00286 */ 00287 00288 /** @defgroup SPDIFRX_Channel_Selection SPDIFRX Channel Selection 00289 * @{ 00290 */ 00291 #define SPDIFRX_CHANNEL_A ((uint32_t)0x00000000U) 00292 #define SPDIFRX_CHANNEL_B ((uint32_t)SPDIFRX_CR_CHSEL) 00293 /** 00294 * @} 00295 */ 00296 00297 /** @defgroup SPDIFRX_Data_Format SPDIFRX Data Format 00298 * @{ 00299 */ 00300 #define SPDIFRX_DATAFORMAT_LSB ((uint32_t)0x00000000U) 00301 #define SPDIFRX_DATAFORMAT_MSB ((uint32_t)0x00000010U) 00302 #define SPDIFRX_DATAFORMAT_32BITS ((uint32_t)0x00000020U) 00303 /** 00304 * @} 00305 */ 00306 00307 /** @defgroup SPDIFRX_Stereo_Mode SPDIFRX Stereo Mode 00308 * @{ 00309 */ 00310 #define SPDIFRX_STEREOMODE_DISABLE ((uint32_t)0x00000000U) 00311 #define SPDIFRX_STEREOMODE_ENABLE ((uint32_t)SPDIFRX_CR_RXSTEO) 00312 /** 00313 * @} 00314 */ 00315 00316 /** @defgroup SPDIFRX_State SPDIFRX State 00317 * @{ 00318 */ 00319 00320 #define SPDIFRX_STATE_IDLE ((uint32_t)0xFFFFFFFCU) 00321 #define SPDIFRX_STATE_SYNC ((uint32_t)0x00000001U) 00322 #define SPDIFRX_STATE_RCV ((uint32_t)SPDIFRX_CR_SPDIFEN) 00323 /** 00324 * @} 00325 */ 00326 00327 /** @defgroup SPDIFRX_Interrupts_Definition SPDIFRX Interrupts Definition 00328 * @{ 00329 */ 00330 #define SPDIFRX_IT_RXNE ((uint32_t)SPDIFRX_IMR_RXNEIE) 00331 #define SPDIFRX_IT_CSRNE ((uint32_t)SPDIFRX_IMR_CSRNEIE) 00332 #define SPDIFRX_IT_PERRIE ((uint32_t)SPDIFRX_IMR_PERRIE) 00333 #define SPDIFRX_IT_OVRIE ((uint32_t)SPDIFRX_IMR_OVRIE) 00334 #define SPDIFRX_IT_SBLKIE ((uint32_t)SPDIFRX_IMR_SBLKIE) 00335 #define SPDIFRX_IT_SYNCDIE ((uint32_t)SPDIFRX_IMR_SYNCDIE) 00336 #define SPDIFRX_IT_IFEIE ((uint32_t)SPDIFRX_IMR_IFEIE ) 00337 /** 00338 * @} 00339 */ 00340 00341 /** @defgroup SPDIFRX_Flags_Definition SPDIFRX Flags Definition 00342 * @{ 00343 */ 00344 #define SPDIFRX_FLAG_RXNE ((uint32_t)SPDIFRX_SR_RXNE) 00345 #define SPDIFRX_FLAG_CSRNE ((uint32_t)SPDIFRX_SR_CSRNE) 00346 #define SPDIFRX_FLAG_PERR ((uint32_t)SPDIFRX_SR_PERR) 00347 #define SPDIFRX_FLAG_OVR ((uint32_t)SPDIFRX_SR_OVR) 00348 #define SPDIFRX_FLAG_SBD ((uint32_t)SPDIFRX_SR_SBD) 00349 #define SPDIFRX_FLAG_SYNCD ((uint32_t)SPDIFRX_SR_SYNCD) 00350 #define SPDIFRX_FLAG_FERR ((uint32_t)SPDIFRX_SR_FERR) 00351 #define SPDIFRX_FLAG_SERR ((uint32_t)SPDIFRX_SR_SERR) 00352 #define SPDIFRX_FLAG_TERR ((uint32_t)SPDIFRX_SR_TERR) 00353 /** 00354 * @} 00355 */ 00356 00357 /** 00358 * @} 00359 */ 00360 00361 /* Exported macros -----------------------------------------------------------*/ 00362 /** @defgroup SPDIFRX_Exported_macros SPDIFRX Exported Macros 00363 * @{ 00364 */ 00365 00366 /** @brief Reset SPDIFRX handle state 00367 * @param __HANDLE__ SPDIFRX handle. 00368 * @retval None 00369 */ 00370 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1) 00371 #define __HAL_SPDIFRX_RESET_HANDLE_STATE(__HANDLE__) do{\ 00372 (__HANDLE__)->State = HAL_SPDIFRX_STATE_RESET;\ 00373 (__HANDLE__)->MspInitCallback = NULL;\ 00374 (__HANDLE__)->MspDeInitCallback = NULL;\ 00375 }while(0) 00376 #else 00377 #define __HAL_SPDIFRX_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPDIFRX_STATE_RESET) 00378 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */ 00379 00380 /** @brief Disable the specified SPDIFRX peripheral (IDLE State). 00381 * @param __HANDLE__ specifies the SPDIFRX Handle. 00382 * @retval None 00383 */ 00384 #define __HAL_SPDIFRX_IDLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= SPDIFRX_STATE_IDLE) 00385 00386 /** @brief Enable the specified SPDIFRX peripheral (SYNC State). 00387 * @param __HANDLE__ specifies the SPDIFRX Handle. 00388 * @retval None 00389 */ 00390 #define __HAL_SPDIFRX_SYNC(__HANDLE__) ((__HANDLE__)->Instance->CR |= SPDIFRX_STATE_SYNC) 00391 00392 00393 /** @brief Enable the specified SPDIFRX peripheral (RCV State). 00394 * @param __HANDLE__ specifies the SPDIFRX Handle. 00395 * @retval None 00396 */ 00397 #define __HAL_SPDIFRX_RCV(__HANDLE__) ((__HANDLE__)->Instance->CR |= SPDIFRX_STATE_RCV) 00398 00399 00400 /** @brief Enable or disable the specified SPDIFRX interrupts. 00401 * @param __HANDLE__ specifies the SPDIFRX Handle. 00402 * @param __INTERRUPT__ specifies the interrupt source to enable or disable. 00403 * This parameter can be one of the following values: 00404 * @arg SPDIFRX_IT_RXNE 00405 * @arg SPDIFRX_IT_CSRNE 00406 * @arg SPDIFRX_IT_PERRIE 00407 * @arg SPDIFRX_IT_OVRIE 00408 * @arg SPDIFRX_IT_SBLKIE 00409 * @arg SPDIFRX_IT_SYNCDIE 00410 * @arg SPDIFRX_IT_IFEIE 00411 * @retval None 00412 */ 00413 #define __HAL_SPDIFRX_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR |= (__INTERRUPT__)) 00414 #define __HAL_SPDIFRX_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR &= (uint16_t)(~(__INTERRUPT__))) 00415 00416 /** @brief Checks if the specified SPDIFRX interrupt source is enabled or disabled. 00417 * @param __HANDLE__ specifies the SPDIFRX Handle. 00418 * @param __INTERRUPT__ specifies the SPDIFRX interrupt source to check. 00419 * This parameter can be one of the following values: 00420 * @arg SPDIFRX_IT_RXNE 00421 * @arg SPDIFRX_IT_CSRNE 00422 * @arg SPDIFRX_IT_PERRIE 00423 * @arg SPDIFRX_IT_OVRIE 00424 * @arg SPDIFRX_IT_SBLKIE 00425 * @arg SPDIFRX_IT_SYNCDIE 00426 * @arg SPDIFRX_IT_IFEIE 00427 * @retval The new state of __IT__ (TRUE or FALSE). 00428 */ 00429 #define __HAL_SPDIFRX_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IMR & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 00430 00431 /** @brief Checks whether the specified SPDIFRX flag is set or not. 00432 * @param __HANDLE__ specifies the SPDIFRX Handle. 00433 * @param __FLAG__ specifies the flag to check. 00434 * This parameter can be one of the following values: 00435 * @arg SPDIFRX_FLAG_RXNE 00436 * @arg SPDIFRX_FLAG_CSRNE 00437 * @arg SPDIFRX_FLAG_PERR 00438 * @arg SPDIFRX_FLAG_OVR 00439 * @arg SPDIFRX_FLAG_SBD 00440 * @arg SPDIFRX_FLAG_SYNCD 00441 * @arg SPDIFRX_FLAG_FERR 00442 * @arg SPDIFRX_FLAG_SERR 00443 * @arg SPDIFRX_FLAG_TERR 00444 * @retval The new state of __FLAG__ (TRUE or FALSE). 00445 */ 00446 #define __HAL_SPDIFRX_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) ? SET : RESET) 00447 00448 /** @brief Clears the specified SPDIFRX SR flag, in setting the proper IFCR register bit. 00449 * @param __HANDLE__ specifies the USART Handle. 00450 * @param __IT_CLEAR__ specifies the interrupt clear register flag that needs to be set 00451 * to clear the corresponding interrupt 00452 * This parameter can be one of the following values: 00453 * @arg SPDIFRX_FLAG_PERR 00454 * @arg SPDIFRX_FLAG_OVR 00455 * @arg SPDIFRX_SR_SBD 00456 * @arg SPDIFRX_SR_SYNCD 00457 * @retval None 00458 */ 00459 #define __HAL_SPDIFRX_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->IFCR = (uint32_t)(__IT_CLEAR__)) 00460 00461 /** 00462 * @} 00463 */ 00464 00465 /* Exported functions --------------------------------------------------------*/ 00466 /** @addtogroup SPDIFRX_Exported_Functions 00467 * @{ 00468 */ 00469 00470 /** @addtogroup SPDIFRX_Exported_Functions_Group1 00471 * @{ 00472 */ 00473 /* Initialization/de-initialization functions **********************************/ 00474 HAL_StatusTypeDef HAL_SPDIFRX_Init(SPDIFRX_HandleTypeDef *hspdif); 00475 HAL_StatusTypeDef HAL_SPDIFRX_DeInit (SPDIFRX_HandleTypeDef *hspdif); 00476 void HAL_SPDIFRX_MspInit(SPDIFRX_HandleTypeDef *hspdif); 00477 void HAL_SPDIFRX_MspDeInit(SPDIFRX_HandleTypeDef *hspdif); 00478 HAL_StatusTypeDef HAL_SPDIFRX_SetDataFormat(SPDIFRX_HandleTypeDef *hspdif, SPDIFRX_SetDataFormatTypeDef sDataFormat); 00479 00480 /* Callbacks Register/UnRegister functions ***********************************/ 00481 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1) 00482 HAL_StatusTypeDef HAL_SPDIFRX_RegisterCallback(SPDIFRX_HandleTypeDef *hspdif, HAL_SPDIFRX_CallbackIDTypeDef CallbackID, pSPDIFRX_CallbackTypeDef pCallback); 00483 HAL_StatusTypeDef HAL_SPDIFRX_UnRegisterCallback(SPDIFRX_HandleTypeDef *hspdif, HAL_SPDIFRX_CallbackIDTypeDef CallbackID); 00484 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */ 00485 /** 00486 * @} 00487 */ 00488 00489 /** @addtogroup SPDIFRX_Exported_Functions_Group2 00490 * @{ 00491 */ 00492 /* I/O operation functions ***************************************************/ 00493 /* Blocking mode: Polling */ 00494 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size, uint32_t Timeout); 00495 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size, uint32_t Timeout); 00496 00497 /* Non-Blocking mode: Interrupt */ 00498 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size); 00499 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size); 00500 void HAL_SPDIFRX_IRQHandler(SPDIFRX_HandleTypeDef *hspdif); 00501 00502 /* Non-Blocking mode: DMA */ 00503 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size); 00504 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size); 00505 HAL_StatusTypeDef HAL_SPDIFRX_DMAStop(SPDIFRX_HandleTypeDef *hspdif); 00506 00507 /* Callbacks used in non blocking modes (Interrupt and DMA) *******************/ 00508 void HAL_SPDIFRX_RxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif); 00509 void HAL_SPDIFRX_RxCpltCallback(SPDIFRX_HandleTypeDef *hspdif); 00510 void HAL_SPDIFRX_ErrorCallback(SPDIFRX_HandleTypeDef *hspdif); 00511 void HAL_SPDIFRX_CxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif); 00512 void HAL_SPDIFRX_CxCpltCallback(SPDIFRX_HandleTypeDef *hspdif); 00513 /** 00514 * @} 00515 */ 00516 00517 /** @addtogroup SPDIFRX_Exported_Functions_Group3 00518 * @{ 00519 */ 00520 /* Peripheral Control and State functions ************************************/ 00521 HAL_SPDIFRX_StateTypeDef HAL_SPDIFRX_GetState(SPDIFRX_HandleTypeDef const * const hspdif); 00522 uint32_t HAL_SPDIFRX_GetError(SPDIFRX_HandleTypeDef const * const hspdif); 00523 /** 00524 * @} 00525 */ 00526 00527 /** 00528 * @} 00529 */ 00530 /* Private types -------------------------------------------------------------*/ 00531 /* Private variables ---------------------------------------------------------*/ 00532 /* Private constants ---------------------------------------------------------*/ 00533 /* Private macros ------------------------------------------------------------*/ 00534 /** @defgroup SPDIFRX_Private_Macros SPDIFRX Private Macros 00535 * @{ 00536 */ 00537 #define IS_SPDIFRX_INPUT_SELECT(INPUT) (((INPUT) == SPDIFRX_INPUT_IN1) || \ 00538 ((INPUT) == SPDIFRX_INPUT_IN2) || \ 00539 ((INPUT) == SPDIFRX_INPUT_IN3) || \ 00540 ((INPUT) == SPDIFRX_INPUT_IN0)) 00541 00542 #define IS_SPDIFRX_MAX_RETRIES(RET) (((RET) == SPDIFRX_MAXRETRIES_NONE) || \ 00543 ((RET) == SPDIFRX_MAXRETRIES_3) || \ 00544 ((RET) == SPDIFRX_MAXRETRIES_15) || \ 00545 ((RET) == SPDIFRX_MAXRETRIES_63)) 00546 00547 #define IS_SPDIFRX_WAIT_FOR_ACTIVITY(VAL) (((VAL) == SPDIFRX_WAITFORACTIVITY_ON) || \ 00548 ((VAL) == SPDIFRX_WAITFORACTIVITY_OFF)) 00549 00550 #define IS_PREAMBLE_TYPE_MASK(VAL) (((VAL) == SPDIFRX_PREAMBLETYPEMASK_ON) || \ 00551 ((VAL) == SPDIFRX_PREAMBLETYPEMASK_OFF)) 00552 00553 #define IS_VALIDITY_MASK(VAL) (((VAL) == SPDIFRX_VALIDITYMASK_OFF) || \ 00554 ((VAL) == SPDIFRX_VALIDITYMASK_ON)) 00555 00556 #define IS_PARITY_ERROR_MASK(VAL) (((VAL) == SPDIFRX_PARITYERRORMASK_OFF) || \ 00557 ((VAL) == SPDIFRX_PARITYERRORMASK_ON)) 00558 00559 #define IS_SPDIFRX_CHANNEL(CHANNEL) (((CHANNEL) == SPDIFRX_CHANNEL_A) || \ 00560 ((CHANNEL) == SPDIFRX_CHANNEL_B)) 00561 00562 #define IS_SPDIFRX_DATA_FORMAT(FORMAT) (((FORMAT) == SPDIFRX_DATAFORMAT_LSB) || \ 00563 ((FORMAT) == SPDIFRX_DATAFORMAT_MSB) || \ 00564 ((FORMAT) == SPDIFRX_DATAFORMAT_32BITS)) 00565 00566 #define IS_STEREO_MODE(MODE) (((MODE) == SPDIFRX_STEREOMODE_DISABLE) || \ 00567 ((MODE) == SPDIFRX_STEREOMODE_ENABLE)) 00568 00569 #define IS_CHANNEL_STATUS_MASK(VAL) (((VAL) == SPDIFRX_CHANNELSTATUS_ON) || \ 00570 ((VAL) == SPDIFRX_CHANNELSTATUS_OFF)) 00571 00572 /** 00573 * @} 00574 */ 00575 00576 /* Private functions ---------------------------------------------------------*/ 00577 /** @defgroup SPDIFRX_Private_Functions SPDIFRX Private Functions 00578 * @{ 00579 */ 00580 /** 00581 * @} 00582 */ 00583 00584 /** 00585 * @} 00586 */ 00587 #endif /* SPDIFRX */ 00588 /** 00589 * @} 00590 */ 00591 #endif /* STM32F446xx */ 00592 00593 #ifdef __cplusplus 00594 } 00595 #endif 00596 00597 00598 #endif /* __STM32F4xx_HAL_SPDIFRX_H */ 00599 00600 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
1.7.6.1