STM32F479xx HAL User Manual
stm32f4xx_hal_tim_ex.c
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00001 /**
00002   ******************************************************************************
00003   * @file    stm32f4xx_hal_tim_ex.c
00004   * @author  MCD Application Team
00005   * @brief   TIM HAL module driver.
00006   *          This file provides firmware functions to manage the following
00007   *          functionalities of the Timer Extended peripheral:
00008   *           + Time Hall Sensor Interface Initialization
00009   *           + Time Hall Sensor Interface Start
00010   *           + Time Complementary signal break and dead time configuration
00011   *           + Time Master and Slave synchronization configuration
00012   *           + Timer remapping capabilities configuration
00013   @verbatim
00014   ==============================================================================
00015                       ##### TIMER Extended features #####
00016   ==============================================================================
00017   [..]
00018     The Timer Extended features include:
00019     (#) Complementary outputs with programmable dead-time for :
00020         (++) Output Compare
00021         (++) PWM generation (Edge and Center-aligned Mode)
00022         (++) One-pulse mode output
00023     (#) Synchronization circuit to control the timer with external signals and to
00024         interconnect several timers together.
00025     (#) Break input to put the timer output signals in reset state or in a known state.
00026     (#) Supports incremental (quadrature) encoder and hall-sensor circuitry for
00027         positioning purposes
00028 
00029             ##### How to use this driver #####
00030   ==============================================================================
00031     [..]
00032      (#) Initialize the TIM low level resources by implementing the following functions
00033          depending on the selected feature:
00034            (++) Hall Sensor output : HAL_TIMEx_HallSensor_MspInit()
00035 
00036      (#) Initialize the TIM low level resources :
00037         (##) Enable the TIM interface clock using __HAL_RCC_TIMx_CLK_ENABLE();
00038         (##) TIM pins configuration
00039             (+++) Enable the clock for the TIM GPIOs using the following function:
00040               __HAL_RCC_GPIOx_CLK_ENABLE();
00041             (+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init();
00042 
00043      (#) The external Clock can be configured, if needed (the default clock is the
00044          internal clock from the APBx), using the following function:
00045          HAL_TIM_ConfigClockSource, the clock configuration should be done before
00046          any start function.
00047 
00048      (#) Configure the TIM in the desired functioning mode using one of the
00049          initialization function of this driver:
00050           (++) HAL_TIMEx_HallSensor_Init() and HAL_TIMEx_ConfigCommutEvent(): to use the
00051                Timer Hall Sensor Interface and the commutation event with the corresponding
00052                Interrupt and DMA request if needed (Note that One Timer is used to interface
00053                with the Hall sensor Interface and another Timer should be used to use
00054                the commutation event).
00055 
00056      (#) Activate the TIM peripheral using one of the start functions:
00057            (++) Complementary Output Compare : HAL_TIMEx_OCN_Start(), HAL_TIMEx_OCN_Start_DMA(),
00058                 HAL_TIMEx_OCN_Start_IT()
00059            (++) Complementary PWM generation : HAL_TIMEx_PWMN_Start(), HAL_TIMEx_PWMN_Start_DMA(),
00060                 HAL_TIMEx_PWMN_Start_IT()
00061            (++) Complementary One-pulse mode output : HAL_TIMEx_OnePulseN_Start(), HAL_TIMEx_OnePulseN_Start_IT()
00062            (++) Hall Sensor output : HAL_TIMEx_HallSensor_Start(), HAL_TIMEx_HallSensor_Start_DMA(),
00063                 HAL_TIMEx_HallSensor_Start_IT().
00064 
00065   @endverbatim
00066   ******************************************************************************
00067   * @attention
00068   *
00069   * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
00070   * All rights reserved.</center></h2>
00071   *
00072   * This software component is licensed by ST under BSD 3-Clause license,
00073   * the "License"; You may not use this file except in compliance with the
00074   * License. You may obtain a copy of the License at:
00075   *                        opensource.org/licenses/BSD-3-Clause
00076   *
00077   ******************************************************************************
00078   */
00079 
00080 /* Includes ------------------------------------------------------------------*/
00081 #include "stm32f4xx_hal.h"
00082 
00083 /** @addtogroup STM32F4xx_HAL_Driver
00084   * @{
00085   */
00086 
00087 /** @defgroup TIMEx TIMEx
00088   * @brief TIM Extended HAL module driver
00089   * @{
00090   */
00091 
00092 #ifdef HAL_TIM_MODULE_ENABLED
00093 
00094 /* Private typedef -----------------------------------------------------------*/
00095 /* Private define ------------------------------------------------------------*/
00096 /* Private macros ------------------------------------------------------------*/
00097 /* Private variables ---------------------------------------------------------*/
00098 /* Private function prototypes -----------------------------------------------*/
00099 static void TIM_DMADelayPulseNCplt(DMA_HandleTypeDef *hdma);
00100 static void TIM_DMAErrorCCxN(DMA_HandleTypeDef *hdma);
00101 static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelNState);
00102 
00103 /* Exported functions --------------------------------------------------------*/
00104 /** @defgroup TIMEx_Exported_Functions TIM Extended Exported Functions
00105   * @{
00106   */
00107 
00108 /** @defgroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions
00109   * @brief    Timer Hall Sensor functions
00110   *
00111 @verbatim
00112   ==============================================================================
00113                       ##### Timer Hall Sensor functions #####
00114   ==============================================================================
00115   [..]
00116     This section provides functions allowing to:
00117     (+) Initialize and configure TIM HAL Sensor.
00118     (+) De-initialize TIM HAL Sensor.
00119     (+) Start the Hall Sensor Interface.
00120     (+) Stop the Hall Sensor Interface.
00121     (+) Start the Hall Sensor Interface and enable interrupts.
00122     (+) Stop the Hall Sensor Interface and disable interrupts.
00123     (+) Start the Hall Sensor Interface and enable DMA transfers.
00124     (+) Stop the Hall Sensor Interface and disable DMA transfers.
00125 
00126 @endverbatim
00127   * @{
00128   */
00129 /**
00130   * @brief  Initializes the TIM Hall Sensor Interface and initialize the associated handle.
00131   * @note   When the timer instance is initialized in Hall Sensor Interface mode,
00132   *         timer channels 1 and channel 2 are reserved and cannot be used for
00133   *         other purpose.
00134   * @param  htim TIM Hall Sensor Interface handle
00135   * @param  sConfig TIM Hall Sensor configuration structure
00136   * @retval HAL status
00137   */
00138 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef *sConfig)
00139 {
00140   TIM_OC_InitTypeDef OC_Config;
00141 
00142   /* Check the TIM handle allocation */
00143   if (htim == NULL)
00144   {
00145     return HAL_ERROR;
00146   }
00147 
00148   /* Check the parameters */
00149   assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
00150   assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
00151   assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
00152   assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
00153   assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity));
00154   assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler));
00155   assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter));
00156 
00157   if (htim->State == HAL_TIM_STATE_RESET)
00158   {
00159     /* Allocate lock resource and initialize it */
00160     htim->Lock = HAL_UNLOCKED;
00161 
00162 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
00163     /* Reset interrupt callbacks to legacy week callbacks */
00164     TIM_ResetCallback(htim);
00165 
00166     if (htim->HallSensor_MspInitCallback == NULL)
00167     {
00168       htim->HallSensor_MspInitCallback = HAL_TIMEx_HallSensor_MspInit;
00169     }
00170     /* Init the low level hardware : GPIO, CLOCK, NVIC */
00171     htim->HallSensor_MspInitCallback(htim);
00172 #else
00173     /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
00174     HAL_TIMEx_HallSensor_MspInit(htim);
00175 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
00176   }
00177 
00178   /* Set the TIM state */
00179   htim->State = HAL_TIM_STATE_BUSY;
00180 
00181   /* Configure the Time base in the Encoder Mode */
00182   TIM_Base_SetConfig(htim->Instance, &htim->Init);
00183 
00184   /* Configure the Channel 1 as Input Channel to interface with the three Outputs of the  Hall sensor */
00185   TIM_TI1_SetConfig(htim->Instance, sConfig->IC1Polarity, TIM_ICSELECTION_TRC, sConfig->IC1Filter);
00186 
00187   /* Reset the IC1PSC Bits */
00188   htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC;
00189   /* Set the IC1PSC value */
00190   htim->Instance->CCMR1 |= sConfig->IC1Prescaler;
00191 
00192   /* Enable the Hall sensor interface (XOR function of the three inputs) */
00193   htim->Instance->CR2 |= TIM_CR2_TI1S;
00194 
00195   /* Select the TIM_TS_TI1F_ED signal as Input trigger for the TIM */
00196   htim->Instance->SMCR &= ~TIM_SMCR_TS;
00197   htim->Instance->SMCR |= TIM_TS_TI1F_ED;
00198 
00199   /* Use the TIM_TS_TI1F_ED signal to reset the TIM counter each edge detection */
00200   htim->Instance->SMCR &= ~TIM_SMCR_SMS;
00201   htim->Instance->SMCR |= TIM_SLAVEMODE_RESET;
00202 
00203   /* Program channel 2 in PWM 2 mode with the desired Commutation_Delay*/
00204   OC_Config.OCFastMode = TIM_OCFAST_DISABLE;
00205   OC_Config.OCIdleState = TIM_OCIDLESTATE_RESET;
00206   OC_Config.OCMode = TIM_OCMODE_PWM2;
00207   OC_Config.OCNIdleState = TIM_OCNIDLESTATE_RESET;
00208   OC_Config.OCNPolarity = TIM_OCNPOLARITY_HIGH;
00209   OC_Config.OCPolarity = TIM_OCPOLARITY_HIGH;
00210   OC_Config.Pulse = sConfig->Commutation_Delay;
00211 
00212   TIM_OC2_SetConfig(htim->Instance, &OC_Config);
00213 
00214   /* Select OC2REF as trigger output on TRGO: write the MMS bits in the TIMx_CR2
00215     register to 101 */
00216   htim->Instance->CR2 &= ~TIM_CR2_MMS;
00217   htim->Instance->CR2 |= TIM_TRGO_OC2REF;
00218 
00219   /* Initialize the DMA burst operation state */
00220   htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
00221 
00222   /* Initialize the TIM channels state */
00223   TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
00224   TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
00225   TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
00226   TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
00227 
00228   /* Initialize the TIM state*/
00229   htim->State = HAL_TIM_STATE_READY;
00230 
00231   return HAL_OK;
00232 }
00233 
00234 /**
00235   * @brief  DeInitializes the TIM Hall Sensor interface
00236   * @param  htim TIM Hall Sensor Interface handle
00237   * @retval HAL status
00238   */
00239 HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim)
00240 {
00241   /* Check the parameters */
00242   assert_param(IS_TIM_INSTANCE(htim->Instance));
00243 
00244   htim->State = HAL_TIM_STATE_BUSY;
00245 
00246   /* Disable the TIM Peripheral Clock */
00247   __HAL_TIM_DISABLE(htim);
00248 
00249 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
00250   if (htim->HallSensor_MspDeInitCallback == NULL)
00251   {
00252     htim->HallSensor_MspDeInitCallback = HAL_TIMEx_HallSensor_MspDeInit;
00253   }
00254   /* DeInit the low level hardware */
00255   htim->HallSensor_MspDeInitCallback(htim);
00256 #else
00257   /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
00258   HAL_TIMEx_HallSensor_MspDeInit(htim);
00259 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
00260 
00261   /* Change the DMA burst operation state */
00262   htim->DMABurstState = HAL_DMA_BURST_STATE_RESET;
00263 
00264   /* Change the TIM channels state */
00265   TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET);
00266   TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET);
00267   TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET);
00268   TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET);
00269 
00270   /* Change TIM state */
00271   htim->State = HAL_TIM_STATE_RESET;
00272 
00273   /* Release Lock */
00274   __HAL_UNLOCK(htim);
00275 
00276   return HAL_OK;
00277 }
00278 
00279 /**
00280   * @brief  Initializes the TIM Hall Sensor MSP.
00281   * @param  htim TIM Hall Sensor Interface handle
00282   * @retval None
00283   */
00284 __weak void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim)
00285 {
00286   /* Prevent unused argument(s) compilation warning */
00287   UNUSED(htim);
00288 
00289   /* NOTE : This function should not be modified, when the callback is needed,
00290             the HAL_TIMEx_HallSensor_MspInit could be implemented in the user file
00291    */
00292 }
00293 
00294 /**
00295   * @brief  DeInitializes TIM Hall Sensor MSP.
00296   * @param  htim TIM Hall Sensor Interface handle
00297   * @retval None
00298   */
00299 __weak void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim)
00300 {
00301   /* Prevent unused argument(s) compilation warning */
00302   UNUSED(htim);
00303 
00304   /* NOTE : This function should not be modified, when the callback is needed,
00305             the HAL_TIMEx_HallSensor_MspDeInit could be implemented in the user file
00306    */
00307 }
00308 
00309 /**
00310   * @brief  Starts the TIM Hall Sensor Interface.
00311   * @param  htim TIM Hall Sensor Interface handle
00312   * @retval HAL status
00313   */
00314 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim)
00315 {
00316   uint32_t tmpsmcr;
00317   HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
00318   HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
00319   HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
00320   HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2);
00321 
00322   /* Check the parameters */
00323   assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
00324 
00325   /* Check the TIM channels state */
00326   if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
00327       || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
00328       || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
00329       || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY))
00330   {
00331     return HAL_ERROR;
00332   }
00333 
00334   /* Set the TIM channels state */
00335   TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
00336   TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
00337   TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
00338   TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
00339 
00340   /* Enable the Input Capture channel 1
00341   (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
00342   TIM_CHANNEL_2 and TIM_CHANNEL_3) */
00343   TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
00344 
00345   /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
00346   if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
00347   {
00348     tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
00349     if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
00350     {
00351       __HAL_TIM_ENABLE(htim);
00352     }
00353   }
00354   else
00355   {
00356     __HAL_TIM_ENABLE(htim);
00357   }
00358 
00359   /* Return function status */
00360   return HAL_OK;
00361 }
00362 
00363 /**
00364   * @brief  Stops the TIM Hall sensor Interface.
00365   * @param  htim TIM Hall Sensor Interface handle
00366   * @retval HAL status
00367   */
00368 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim)
00369 {
00370   /* Check the parameters */
00371   assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
00372 
00373   /* Disable the Input Capture channels 1, 2 and 3
00374   (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
00375   TIM_CHANNEL_2 and TIM_CHANNEL_3) */
00376   TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
00377 
00378   /* Disable the Peripheral */
00379   __HAL_TIM_DISABLE(htim);
00380 
00381   /* Set the TIM channels state */
00382   TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
00383   TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
00384   TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
00385   TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
00386 
00387   /* Return function status */
00388   return HAL_OK;
00389 }
00390 
00391 /**
00392   * @brief  Starts the TIM Hall Sensor Interface in interrupt mode.
00393   * @param  htim TIM Hall Sensor Interface handle
00394   * @retval HAL status
00395   */
00396 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim)
00397 {
00398   uint32_t tmpsmcr;
00399   HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
00400   HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
00401   HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
00402   HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2);
00403 
00404   /* Check the parameters */
00405   assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
00406 
00407   /* Check the TIM channels state */
00408   if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
00409       || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
00410       || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
00411       || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY))
00412   {
00413     return HAL_ERROR;
00414   }
00415 
00416   /* Set the TIM channels state */
00417   TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
00418   TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
00419   TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
00420   TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
00421 
00422   /* Enable the capture compare Interrupts 1 event */
00423   __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
00424 
00425   /* Enable the Input Capture channel 1
00426   (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
00427   TIM_CHANNEL_2 and TIM_CHANNEL_3) */
00428   TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
00429 
00430   /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
00431   if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
00432   {
00433     tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
00434     if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
00435     {
00436       __HAL_TIM_ENABLE(htim);
00437     }
00438   }
00439   else
00440   {
00441     __HAL_TIM_ENABLE(htim);
00442   }
00443 
00444   /* Return function status */
00445   return HAL_OK;
00446 }
00447 
00448 /**
00449   * @brief  Stops the TIM Hall Sensor Interface in interrupt mode.
00450   * @param  htim TIM Hall Sensor Interface handle
00451   * @retval HAL status
00452   */
00453 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim)
00454 {
00455   /* Check the parameters */
00456   assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
00457 
00458   /* Disable the Input Capture channel 1
00459   (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
00460   TIM_CHANNEL_2 and TIM_CHANNEL_3) */
00461   TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
00462 
00463   /* Disable the capture compare Interrupts event */
00464   __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
00465 
00466   /* Disable the Peripheral */
00467   __HAL_TIM_DISABLE(htim);
00468 
00469   /* Set the TIM channels state */
00470   TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
00471   TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
00472   TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
00473   TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
00474 
00475   /* Return function status */
00476   return HAL_OK;
00477 }
00478 
00479 /**
00480   * @brief  Starts the TIM Hall Sensor Interface in DMA mode.
00481   * @param  htim TIM Hall Sensor Interface handle
00482   * @param  pData The destination Buffer address.
00483   * @param  Length The length of data to be transferred from TIM peripheral to memory.
00484   * @retval HAL status
00485   */
00486 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length)
00487 {
00488   uint32_t tmpsmcr;
00489   HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
00490   HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
00491 
00492   /* Check the parameters */
00493   assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
00494 
00495   /* Set the TIM channel state */
00496   if ((channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY)
00497       || (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY))
00498   {
00499     return HAL_BUSY;
00500   }
00501   else if ((channel_1_state == HAL_TIM_CHANNEL_STATE_READY)
00502            && (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_READY))
00503   {
00504     if ((pData == NULL) && (Length > 0U))
00505     {
00506       return HAL_ERROR;
00507     }
00508     else
00509     {
00510       TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
00511       TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
00512     }
00513   }
00514   else
00515   {
00516     return HAL_ERROR;
00517   }
00518 
00519   /* Enable the Input Capture channel 1
00520   (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
00521   TIM_CHANNEL_2 and TIM_CHANNEL_3) */
00522   TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
00523 
00524   /* Set the DMA Input Capture 1 Callbacks */
00525   htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt;
00526   htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt;
00527   /* Set the DMA error callback */
00528   htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
00529 
00530   /* Enable the DMA stream for Capture 1*/
00531   if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData, Length) != HAL_OK)
00532   {
00533     /* Return error status */
00534     return HAL_ERROR;
00535   }
00536   /* Enable the capture compare 1 Interrupt */
00537   __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
00538 
00539   /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
00540   if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
00541   {
00542     tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
00543     if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
00544     {
00545       __HAL_TIM_ENABLE(htim);
00546     }
00547   }
00548   else
00549   {
00550     __HAL_TIM_ENABLE(htim);
00551   }
00552 
00553   /* Return function status */
00554   return HAL_OK;
00555 }
00556 
00557 /**
00558   * @brief  Stops the TIM Hall Sensor Interface in DMA mode.
00559   * @param  htim TIM Hall Sensor Interface handle
00560   * @retval HAL status
00561   */
00562 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim)
00563 {
00564   /* Check the parameters */
00565   assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
00566 
00567   /* Disable the Input Capture channel 1
00568   (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
00569   TIM_CHANNEL_2 and TIM_CHANNEL_3) */
00570   TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
00571 
00572 
00573   /* Disable the capture compare Interrupts 1 event */
00574   __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
00575 
00576   (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
00577 
00578   /* Disable the Peripheral */
00579   __HAL_TIM_DISABLE(htim);
00580 
00581   /* Set the TIM channel state */
00582   TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
00583   TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
00584 
00585   /* Return function status */
00586   return HAL_OK;
00587 }
00588 
00589 /**
00590   * @}
00591   */
00592 
00593 /** @defgroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions
00594   *  @brief   Timer Complementary Output Compare functions
00595   *
00596 @verbatim
00597   ==============================================================================
00598               ##### Timer Complementary Output Compare functions #####
00599   ==============================================================================
00600   [..]
00601     This section provides functions allowing to:
00602     (+) Start the Complementary Output Compare/PWM.
00603     (+) Stop the Complementary Output Compare/PWM.
00604     (+) Start the Complementary Output Compare/PWM and enable interrupts.
00605     (+) Stop the Complementary Output Compare/PWM and disable interrupts.
00606     (+) Start the Complementary Output Compare/PWM and enable DMA transfers.
00607     (+) Stop the Complementary Output Compare/PWM and disable DMA transfers.
00608 
00609 @endverbatim
00610   * @{
00611   */
00612 
00613 /**
00614   * @brief  Starts the TIM Output Compare signal generation on the complementary
00615   *         output.
00616   * @param  htim TIM Output Compare handle
00617   * @param  Channel TIM Channel to be enabled
00618   *          This parameter can be one of the following values:
00619   *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
00620   *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
00621   *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
00622   * @retval HAL status
00623   */
00624 HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
00625 {
00626   uint32_t tmpsmcr;
00627 
00628   /* Check the parameters */
00629   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
00630 
00631   /* Check the TIM complementary channel state */
00632   if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
00633   {
00634     return HAL_ERROR;
00635   }
00636 
00637   /* Set the TIM complementary channel state */
00638   TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
00639 
00640   /* Enable the Capture compare channel N */
00641   TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
00642 
00643   /* Enable the Main Output */
00644   __HAL_TIM_MOE_ENABLE(htim);
00645 
00646   /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
00647   if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
00648   {
00649     tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
00650     if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
00651     {
00652       __HAL_TIM_ENABLE(htim);
00653     }
00654   }
00655   else
00656   {
00657     __HAL_TIM_ENABLE(htim);
00658   }
00659 
00660   /* Return function status */
00661   return HAL_OK;
00662 }
00663 
00664 /**
00665   * @brief  Stops the TIM Output Compare signal generation on the complementary
00666   *         output.
00667   * @param  htim TIM handle
00668   * @param  Channel TIM Channel to be disabled
00669   *          This parameter can be one of the following values:
00670   *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
00671   *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
00672   *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
00673   * @retval HAL status
00674   */
00675 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
00676 {
00677   /* Check the parameters */
00678   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
00679 
00680   /* Disable the Capture compare channel N */
00681   TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
00682 
00683   /* Disable the Main Output */
00684   __HAL_TIM_MOE_DISABLE(htim);
00685 
00686   /* Disable the Peripheral */
00687   __HAL_TIM_DISABLE(htim);
00688 
00689   /* Set the TIM complementary channel state */
00690   TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
00691 
00692   /* Return function status */
00693   return HAL_OK;
00694 }
00695 
00696 /**
00697   * @brief  Starts the TIM Output Compare signal generation in interrupt mode
00698   *         on the complementary output.
00699   * @param  htim TIM OC handle
00700   * @param  Channel TIM Channel to be enabled
00701   *          This parameter can be one of the following values:
00702   *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
00703   *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
00704   *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
00705   * @retval HAL status
00706   */
00707 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
00708 {
00709   HAL_StatusTypeDef status = HAL_OK;
00710   uint32_t tmpsmcr;
00711 
00712   /* Check the parameters */
00713   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
00714 
00715   /* Check the TIM complementary channel state */
00716   if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
00717   {
00718     return HAL_ERROR;
00719   }
00720 
00721   /* Set the TIM complementary channel state */
00722   TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
00723 
00724   switch (Channel)
00725   {
00726     case TIM_CHANNEL_1:
00727     {
00728       /* Enable the TIM Output Compare interrupt */
00729       __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
00730       break;
00731     }
00732 
00733     case TIM_CHANNEL_2:
00734     {
00735       /* Enable the TIM Output Compare interrupt */
00736       __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
00737       break;
00738     }
00739 
00740     case TIM_CHANNEL_3:
00741     {
00742       /* Enable the TIM Output Compare interrupt */
00743       __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
00744       break;
00745     }
00746 
00747 
00748     default:
00749       status = HAL_ERROR;
00750       break;
00751   }
00752 
00753   if (status == HAL_OK)
00754   {
00755     /* Enable the TIM Break interrupt */
00756     __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
00757 
00758     /* Enable the Capture compare channel N */
00759     TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
00760 
00761     /* Enable the Main Output */
00762     __HAL_TIM_MOE_ENABLE(htim);
00763 
00764     /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
00765     if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
00766     {
00767       tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
00768       if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
00769       {
00770         __HAL_TIM_ENABLE(htim);
00771       }
00772     }
00773     else
00774     {
00775       __HAL_TIM_ENABLE(htim);
00776     }
00777   }
00778 
00779   /* Return function status */
00780   return status;
00781 }
00782 
00783 /**
00784   * @brief  Stops the TIM Output Compare signal generation in interrupt mode
00785   *         on the complementary output.
00786   * @param  htim TIM Output Compare handle
00787   * @param  Channel TIM Channel to be disabled
00788   *          This parameter can be one of the following values:
00789   *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
00790   *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
00791   *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
00792   * @retval HAL status
00793   */
00794 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
00795 {
00796   HAL_StatusTypeDef status = HAL_OK;
00797   uint32_t tmpccer;
00798 
00799   /* Check the parameters */
00800   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
00801 
00802   switch (Channel)
00803   {
00804     case TIM_CHANNEL_1:
00805     {
00806       /* Disable the TIM Output Compare interrupt */
00807       __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
00808       break;
00809     }
00810 
00811     case TIM_CHANNEL_2:
00812     {
00813       /* Disable the TIM Output Compare interrupt */
00814       __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
00815       break;
00816     }
00817 
00818     case TIM_CHANNEL_3:
00819     {
00820       /* Disable the TIM Output Compare interrupt */
00821       __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
00822       break;
00823     }
00824 
00825     default:
00826       status = HAL_ERROR;
00827       break;
00828   }
00829 
00830   if (status == HAL_OK)
00831   {
00832     /* Disable the Capture compare channel N */
00833     TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
00834 
00835     /* Disable the TIM Break interrupt (only if no more channel is active) */
00836     tmpccer = htim->Instance->CCER;
00837     if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET)
00838     {
00839       __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
00840     }
00841 
00842     /* Disable the Main Output */
00843     __HAL_TIM_MOE_DISABLE(htim);
00844 
00845     /* Disable the Peripheral */
00846     __HAL_TIM_DISABLE(htim);
00847 
00848     /* Set the TIM complementary channel state */
00849     TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
00850   }
00851 
00852   /* Return function status */
00853   return status;
00854 }
00855 
00856 /**
00857   * @brief  Starts the TIM Output Compare signal generation in DMA mode
00858   *         on the complementary output.
00859   * @param  htim TIM Output Compare handle
00860   * @param  Channel TIM Channel to be enabled
00861   *          This parameter can be one of the following values:
00862   *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
00863   *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
00864   *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
00865   * @param  pData The source Buffer address.
00866   * @param  Length The length of data to be transferred from memory to TIM peripheral
00867   * @retval HAL status
00868   */
00869 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
00870 {
00871   HAL_StatusTypeDef status = HAL_OK;
00872   uint32_t tmpsmcr;
00873 
00874   /* Check the parameters */
00875   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
00876 
00877   /* Set the TIM complementary channel state */
00878   if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_BUSY)
00879   {
00880     return HAL_BUSY;
00881   }
00882   else if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY)
00883   {
00884     if ((pData == NULL) && (Length > 0U))
00885     {
00886       return HAL_ERROR;
00887     }
00888     else
00889     {
00890       TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
00891     }
00892   }
00893   else
00894   {
00895     return HAL_ERROR;
00896   }
00897 
00898   switch (Channel)
00899   {
00900     case TIM_CHANNEL_1:
00901     {
00902       /* Set the DMA compare callbacks */
00903       htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseNCplt;
00904       htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
00905 
00906       /* Set the DMA error callback */
00907       htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAErrorCCxN ;
00908 
00909       /* Enable the DMA stream */
00910       if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1,
00911                            Length) != HAL_OK)
00912       {
00913         /* Return error status */
00914         return HAL_ERROR;
00915       }
00916       /* Enable the TIM Output Compare DMA request */
00917       __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
00918       break;
00919     }
00920 
00921     case TIM_CHANNEL_2:
00922     {
00923       /* Set the DMA compare callbacks */
00924       htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseNCplt;
00925       htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
00926 
00927       /* Set the DMA error callback */
00928       htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAErrorCCxN ;
00929 
00930       /* Enable the DMA stream */
00931       if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2,
00932                            Length) != HAL_OK)
00933       {
00934         /* Return error status */
00935         return HAL_ERROR;
00936       }
00937       /* Enable the TIM Output Compare DMA request */
00938       __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
00939       break;
00940     }
00941 
00942     case TIM_CHANNEL_3:
00943     {
00944       /* Set the DMA compare callbacks */
00945       htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseNCplt;
00946       htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
00947 
00948       /* Set the DMA error callback */
00949       htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAErrorCCxN ;
00950 
00951       /* Enable the DMA stream */
00952       if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,
00953                            Length) != HAL_OK)
00954       {
00955         /* Return error status */
00956         return HAL_ERROR;
00957       }
00958       /* Enable the TIM Output Compare DMA request */
00959       __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
00960       break;
00961     }
00962 
00963     default:
00964       status = HAL_ERROR;
00965       break;
00966   }
00967 
00968   if (status == HAL_OK)
00969   {
00970     /* Enable the Capture compare channel N */
00971     TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
00972 
00973     /* Enable the Main Output */
00974     __HAL_TIM_MOE_ENABLE(htim);
00975 
00976     /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
00977     if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
00978     {
00979       tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
00980       if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
00981       {
00982         __HAL_TIM_ENABLE(htim);
00983       }
00984     }
00985     else
00986     {
00987       __HAL_TIM_ENABLE(htim);
00988     }
00989   }
00990 
00991   /* Return function status */
00992   return status;
00993 }
00994 
00995 /**
00996   * @brief  Stops the TIM Output Compare signal generation in DMA mode
00997   *         on the complementary output.
00998   * @param  htim TIM Output Compare handle
00999   * @param  Channel TIM Channel to be disabled
01000   *          This parameter can be one of the following values:
01001   *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
01002   *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
01003   *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
01004   * @retval HAL status
01005   */
01006 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
01007 {
01008   HAL_StatusTypeDef status = HAL_OK;
01009 
01010   /* Check the parameters */
01011   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
01012 
01013   switch (Channel)
01014   {
01015     case TIM_CHANNEL_1:
01016     {
01017       /* Disable the TIM Output Compare DMA request */
01018       __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
01019       (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
01020       break;
01021     }
01022 
01023     case TIM_CHANNEL_2:
01024     {
01025       /* Disable the TIM Output Compare DMA request */
01026       __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
01027       (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]);
01028       break;
01029     }
01030 
01031     case TIM_CHANNEL_3:
01032     {
01033       /* Disable the TIM Output Compare DMA request */
01034       __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
01035       (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]);
01036       break;
01037     }
01038 
01039     default:
01040       status = HAL_ERROR;
01041       break;
01042   }
01043 
01044   if (status == HAL_OK)
01045   {
01046     /* Disable the Capture compare channel N */
01047     TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
01048 
01049     /* Disable the Main Output */
01050     __HAL_TIM_MOE_DISABLE(htim);
01051 
01052     /* Disable the Peripheral */
01053     __HAL_TIM_DISABLE(htim);
01054 
01055     /* Set the TIM complementary channel state */
01056     TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
01057   }
01058 
01059   /* Return function status */
01060   return status;
01061 }
01062 
01063 /**
01064   * @}
01065   */
01066 
01067 /** @defgroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions
01068   * @brief    Timer Complementary PWM functions
01069   *
01070 @verbatim
01071   ==============================================================================
01072                  ##### Timer Complementary PWM functions #####
01073   ==============================================================================
01074   [..]
01075     This section provides functions allowing to:
01076     (+) Start the Complementary PWM.
01077     (+) Stop the Complementary PWM.
01078     (+) Start the Complementary PWM and enable interrupts.
01079     (+) Stop the Complementary PWM and disable interrupts.
01080     (+) Start the Complementary PWM and enable DMA transfers.
01081     (+) Stop the Complementary PWM and disable DMA transfers.
01082     (+) Start the Complementary Input Capture measurement.
01083     (+) Stop the Complementary Input Capture.
01084     (+) Start the Complementary Input Capture and enable interrupts.
01085     (+) Stop the Complementary Input Capture and disable interrupts.
01086     (+) Start the Complementary Input Capture and enable DMA transfers.
01087     (+) Stop the Complementary Input Capture and disable DMA transfers.
01088     (+) Start the Complementary One Pulse generation.
01089     (+) Stop the Complementary One Pulse.
01090     (+) Start the Complementary One Pulse and enable interrupts.
01091     (+) Stop the Complementary One Pulse and disable interrupts.
01092 
01093 @endverbatim
01094   * @{
01095   */
01096 
01097 /**
01098   * @brief  Starts the PWM signal generation on the complementary output.
01099   * @param  htim TIM handle
01100   * @param  Channel TIM Channel to be enabled
01101   *          This parameter can be one of the following values:
01102   *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
01103   *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
01104   *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
01105   * @retval HAL status
01106   */
01107 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
01108 {
01109   uint32_t tmpsmcr;
01110 
01111   /* Check the parameters */
01112   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
01113 
01114   /* Check the TIM complementary channel state */
01115   if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
01116   {
01117     return HAL_ERROR;
01118   }
01119 
01120   /* Set the TIM complementary channel state */
01121   TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
01122 
01123   /* Enable the complementary PWM output  */
01124   TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
01125 
01126   /* Enable the Main Output */
01127   __HAL_TIM_MOE_ENABLE(htim);
01128 
01129   /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
01130   if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
01131   {
01132     tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
01133     if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
01134     {
01135       __HAL_TIM_ENABLE(htim);
01136     }
01137   }
01138   else
01139   {
01140     __HAL_TIM_ENABLE(htim);
01141   }
01142 
01143   /* Return function status */
01144   return HAL_OK;
01145 }
01146 
01147 /**
01148   * @brief  Stops the PWM signal generation on the complementary output.
01149   * @param  htim TIM handle
01150   * @param  Channel TIM Channel to be disabled
01151   *          This parameter can be one of the following values:
01152   *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
01153   *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
01154   *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
01155   * @retval HAL status
01156   */
01157 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
01158 {
01159   /* Check the parameters */
01160   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
01161 
01162   /* Disable the complementary PWM output  */
01163   TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
01164 
01165   /* Disable the Main Output */
01166   __HAL_TIM_MOE_DISABLE(htim);
01167 
01168   /* Disable the Peripheral */
01169   __HAL_TIM_DISABLE(htim);
01170 
01171   /* Set the TIM complementary channel state */
01172   TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
01173 
01174   /* Return function status */
01175   return HAL_OK;
01176 }
01177 
01178 /**
01179   * @brief  Starts the PWM signal generation in interrupt mode on the
01180   *         complementary output.
01181   * @param  htim TIM handle
01182   * @param  Channel TIM Channel to be disabled
01183   *          This parameter can be one of the following values:
01184   *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
01185   *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
01186   *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
01187   * @retval HAL status
01188   */
01189 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
01190 {
01191   HAL_StatusTypeDef status = HAL_OK;
01192   uint32_t tmpsmcr;
01193 
01194   /* Check the parameters */
01195   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
01196 
01197   /* Check the TIM complementary channel state */
01198   if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
01199   {
01200     return HAL_ERROR;
01201   }
01202 
01203   /* Set the TIM complementary channel state */
01204   TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
01205 
01206   switch (Channel)
01207   {
01208     case TIM_CHANNEL_1:
01209     {
01210       /* Enable the TIM Capture/Compare 1 interrupt */
01211       __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
01212       break;
01213     }
01214 
01215     case TIM_CHANNEL_2:
01216     {
01217       /* Enable the TIM Capture/Compare 2 interrupt */
01218       __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
01219       break;
01220     }
01221 
01222     case TIM_CHANNEL_3:
01223     {
01224       /* Enable the TIM Capture/Compare 3 interrupt */
01225       __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
01226       break;
01227     }
01228 
01229     default:
01230       status = HAL_ERROR;
01231       break;
01232   }
01233 
01234   if (status == HAL_OK)
01235   {
01236     /* Enable the TIM Break interrupt */
01237     __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
01238 
01239     /* Enable the complementary PWM output  */
01240     TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
01241 
01242     /* Enable the Main Output */
01243     __HAL_TIM_MOE_ENABLE(htim);
01244 
01245     /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
01246     if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
01247     {
01248       tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
01249       if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
01250       {
01251         __HAL_TIM_ENABLE(htim);
01252       }
01253     }
01254     else
01255     {
01256       __HAL_TIM_ENABLE(htim);
01257     }
01258   }
01259 
01260   /* Return function status */
01261   return status;
01262 }
01263 
01264 /**
01265   * @brief  Stops the PWM signal generation in interrupt mode on the
01266   *         complementary output.
01267   * @param  htim TIM handle
01268   * @param  Channel TIM Channel to be disabled
01269   *          This parameter can be one of the following values:
01270   *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
01271   *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
01272   *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
01273   * @retval HAL status
01274   */
01275 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
01276 {
01277   HAL_StatusTypeDef status = HAL_OK;
01278   uint32_t tmpccer;
01279 
01280   /* Check the parameters */
01281   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
01282 
01283   switch (Channel)
01284   {
01285     case TIM_CHANNEL_1:
01286     {
01287       /* Disable the TIM Capture/Compare 1 interrupt */
01288       __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
01289       break;
01290     }
01291 
01292     case TIM_CHANNEL_2:
01293     {
01294       /* Disable the TIM Capture/Compare 2 interrupt */
01295       __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
01296       break;
01297     }
01298 
01299     case TIM_CHANNEL_3:
01300     {
01301       /* Disable the TIM Capture/Compare 3 interrupt */
01302       __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
01303       break;
01304     }
01305 
01306     default:
01307       status = HAL_ERROR;
01308       break;
01309   }
01310 
01311   if (status == HAL_OK)
01312   {
01313     /* Disable the complementary PWM output  */
01314     TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
01315 
01316     /* Disable the TIM Break interrupt (only if no more channel is active) */
01317     tmpccer = htim->Instance->CCER;
01318     if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET)
01319     {
01320       __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
01321     }
01322 
01323     /* Disable the Main Output */
01324     __HAL_TIM_MOE_DISABLE(htim);
01325 
01326     /* Disable the Peripheral */
01327     __HAL_TIM_DISABLE(htim);
01328 
01329     /* Set the TIM complementary channel state */
01330     TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
01331   }
01332 
01333   /* Return function status */
01334   return status;
01335 }
01336 
01337 /**
01338   * @brief  Starts the TIM PWM signal generation in DMA mode on the
01339   *         complementary output
01340   * @param  htim TIM handle
01341   * @param  Channel TIM Channel to be enabled
01342   *          This parameter can be one of the following values:
01343   *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
01344   *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
01345   *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
01346   * @param  pData The source Buffer address.
01347   * @param  Length The length of data to be transferred from memory to TIM peripheral
01348   * @retval HAL status
01349   */
01350 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
01351 {
01352   HAL_StatusTypeDef status = HAL_OK;
01353   uint32_t tmpsmcr;
01354 
01355   /* Check the parameters */
01356   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
01357 
01358   /* Set the TIM complementary channel state */
01359   if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_BUSY)
01360   {
01361     return HAL_BUSY;
01362   }
01363   else if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY)
01364   {
01365     if ((pData == NULL) && (Length > 0U))
01366     {
01367       return HAL_ERROR;
01368     }
01369     else
01370     {
01371       TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
01372     }
01373   }
01374   else
01375   {
01376     return HAL_ERROR;
01377   }
01378 
01379   switch (Channel)
01380   {
01381     case TIM_CHANNEL_1:
01382     {
01383       /* Set the DMA compare callbacks */
01384       htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseNCplt;
01385       htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
01386 
01387       /* Set the DMA error callback */
01388       htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAErrorCCxN ;
01389 
01390       /* Enable the DMA stream */
01391       if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1,
01392                            Length) != HAL_OK)
01393       {
01394         /* Return error status */
01395         return HAL_ERROR;
01396       }
01397       /* Enable the TIM Capture/Compare 1 DMA request */
01398       __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
01399       break;
01400     }
01401 
01402     case TIM_CHANNEL_2:
01403     {
01404       /* Set the DMA compare callbacks */
01405       htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseNCplt;
01406       htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
01407 
01408       /* Set the DMA error callback */
01409       htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAErrorCCxN ;
01410 
01411       /* Enable the DMA stream */
01412       if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2,
01413                            Length) != HAL_OK)
01414       {
01415         /* Return error status */
01416         return HAL_ERROR;
01417       }
01418       /* Enable the TIM Capture/Compare 2 DMA request */
01419       __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
01420       break;
01421     }
01422 
01423     case TIM_CHANNEL_3:
01424     {
01425       /* Set the DMA compare callbacks */
01426       htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseNCplt;
01427       htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
01428 
01429       /* Set the DMA error callback */
01430       htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAErrorCCxN ;
01431 
01432       /* Enable the DMA stream */
01433       if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,
01434                            Length) != HAL_OK)
01435       {
01436         /* Return error status */
01437         return HAL_ERROR;
01438       }
01439       /* Enable the TIM Capture/Compare 3 DMA request */
01440       __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
01441       break;
01442     }
01443 
01444     default:
01445       status = HAL_ERROR;
01446       break;
01447   }
01448 
01449   if (status == HAL_OK)
01450   {
01451     /* Enable the complementary PWM output  */
01452     TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
01453 
01454     /* Enable the Main Output */
01455     __HAL_TIM_MOE_ENABLE(htim);
01456 
01457     /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
01458     if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
01459     {
01460       tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
01461       if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
01462       {
01463         __HAL_TIM_ENABLE(htim);
01464       }
01465     }
01466     else
01467     {
01468       __HAL_TIM_ENABLE(htim);
01469     }
01470   }
01471 
01472   /* Return function status */
01473   return status;
01474 }
01475 
01476 /**
01477   * @brief  Stops the TIM PWM signal generation in DMA mode on the complementary
01478   *         output
01479   * @param  htim TIM handle
01480   * @param  Channel TIM Channel to be disabled
01481   *          This parameter can be one of the following values:
01482   *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
01483   *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
01484   *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
01485   * @retval HAL status
01486   */
01487 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
01488 {
01489   HAL_StatusTypeDef status = HAL_OK;
01490 
01491   /* Check the parameters */
01492   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
01493 
01494   switch (Channel)
01495   {
01496     case TIM_CHANNEL_1:
01497     {
01498       /* Disable the TIM Capture/Compare 1 DMA request */
01499       __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
01500       (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
01501       break;
01502     }
01503 
01504     case TIM_CHANNEL_2:
01505     {
01506       /* Disable the TIM Capture/Compare 2 DMA request */
01507       __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
01508       (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]);
01509       break;
01510     }
01511 
01512     case TIM_CHANNEL_3:
01513     {
01514       /* Disable the TIM Capture/Compare 3 DMA request */
01515       __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
01516       (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]);
01517       break;
01518     }
01519 
01520     default:
01521       status = HAL_ERROR;
01522       break;
01523   }
01524 
01525   if (status == HAL_OK)
01526   {
01527     /* Disable the complementary PWM output */
01528     TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
01529 
01530     /* Disable the Main Output */
01531     __HAL_TIM_MOE_DISABLE(htim);
01532 
01533     /* Disable the Peripheral */
01534     __HAL_TIM_DISABLE(htim);
01535 
01536     /* Set the TIM complementary channel state */
01537     TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
01538   }
01539 
01540   /* Return function status */
01541   return status;
01542 }
01543 
01544 /**
01545   * @}
01546   */
01547 
01548 /** @defgroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions
01549   * @brief    Timer Complementary One Pulse functions
01550   *
01551 @verbatim
01552   ==============================================================================
01553                 ##### Timer Complementary One Pulse functions #####
01554   ==============================================================================
01555   [..]
01556     This section provides functions allowing to:
01557     (+) Start the Complementary One Pulse generation.
01558     (+) Stop the Complementary One Pulse.
01559     (+) Start the Complementary One Pulse and enable interrupts.
01560     (+) Stop the Complementary One Pulse and disable interrupts.
01561 
01562 @endverbatim
01563   * @{
01564   */
01565 
01566 /**
01567   * @brief  Starts the TIM One Pulse signal generation on the complementary
01568   *         output.
01569   * @note OutputChannel must match the pulse output channel chosen when calling
01570   *       @ref HAL_TIM_OnePulse_ConfigChannel().
01571   * @param  htim TIM One Pulse handle
01572   * @param  OutputChannel pulse output channel to enable
01573   *          This parameter can be one of the following values:
01574   *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
01575   *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
01576   * @retval HAL status
01577   */
01578 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
01579 {
01580   uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1;
01581   HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
01582   HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
01583   HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
01584   HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2);
01585 
01586   /* Check the parameters */
01587   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
01588 
01589   /* Check the TIM channels state */
01590   if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
01591       || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
01592       || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
01593       || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY))
01594   {
01595     return HAL_ERROR;
01596   }
01597 
01598   /* Set the TIM channels state */
01599   TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
01600   TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
01601   TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
01602   TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
01603 
01604   /* Enable the complementary One Pulse output channel and the Input Capture channel */
01605   TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE);
01606   TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_ENABLE);
01607 
01608   /* Enable the Main Output */
01609   __HAL_TIM_MOE_ENABLE(htim);
01610 
01611   /* Return function status */
01612   return HAL_OK;
01613 }
01614 
01615 /**
01616   * @brief  Stops the TIM One Pulse signal generation on the complementary
01617   *         output.
01618   * @note OutputChannel must match the pulse output channel chosen when calling
01619   *       @ref HAL_TIM_OnePulse_ConfigChannel().
01620   * @param  htim TIM One Pulse handle
01621   * @param  OutputChannel pulse output channel to disable
01622   *          This parameter can be one of the following values:
01623   *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
01624   *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
01625   * @retval HAL status
01626   */
01627 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
01628 {
01629   uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1;
01630 
01631   /* Check the parameters */
01632   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
01633 
01634   /* Disable the complementary One Pulse output channel and the Input Capture channel */
01635   TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);
01636   TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_DISABLE);
01637 
01638   /* Disable the Main Output */
01639   __HAL_TIM_MOE_DISABLE(htim);
01640 
01641   /* Disable the Peripheral */
01642   __HAL_TIM_DISABLE(htim);
01643 
01644   /* Set the TIM  channels state */
01645   TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
01646   TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
01647   TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
01648   TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
01649 
01650   /* Return function status */
01651   return HAL_OK;
01652 }
01653 
01654 /**
01655   * @brief  Starts the TIM One Pulse signal generation in interrupt mode on the
01656   *         complementary channel.
01657   * @note OutputChannel must match the pulse output channel chosen when calling
01658   *       @ref HAL_TIM_OnePulse_ConfigChannel().
01659   * @param  htim TIM One Pulse handle
01660   * @param  OutputChannel pulse output channel to enable
01661   *          This parameter can be one of the following values:
01662   *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
01663   *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
01664   * @retval HAL status
01665   */
01666 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
01667 {
01668   uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1;
01669   HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
01670   HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
01671   HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
01672   HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2);
01673 
01674   /* Check the parameters */
01675   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
01676 
01677   /* Check the TIM channels state */
01678   if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
01679       || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
01680       || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
01681       || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY))
01682   {
01683     return HAL_ERROR;
01684   }
01685 
01686   /* Set the TIM channels state */
01687   TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
01688   TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
01689   TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
01690   TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
01691 
01692   /* Enable the TIM Capture/Compare 1 interrupt */
01693   __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
01694 
01695   /* Enable the TIM Capture/Compare 2 interrupt */
01696   __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
01697 
01698   /* Enable the complementary One Pulse output channel and the Input Capture channel */
01699   TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE);
01700   TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_ENABLE);
01701 
01702   /* Enable the Main Output */
01703   __HAL_TIM_MOE_ENABLE(htim);
01704 
01705   /* Return function status */
01706   return HAL_OK;
01707 }
01708 
01709 /**
01710   * @brief  Stops the TIM One Pulse signal generation in interrupt mode on the
01711   *         complementary channel.
01712   * @note OutputChannel must match the pulse output channel chosen when calling
01713   *       @ref HAL_TIM_OnePulse_ConfigChannel().
01714   * @param  htim TIM One Pulse handle
01715   * @param  OutputChannel pulse output channel to disable
01716   *          This parameter can be one of the following values:
01717   *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
01718   *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
01719   * @retval HAL status
01720   */
01721 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
01722 {
01723   uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1;
01724 
01725   /* Check the parameters */
01726   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
01727 
01728   /* Disable the TIM Capture/Compare 1 interrupt */
01729   __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
01730 
01731   /* Disable the TIM Capture/Compare 2 interrupt */
01732   __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
01733 
01734   /* Disable the complementary One Pulse output channel and the Input Capture channel */
01735   TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);
01736   TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_DISABLE);
01737 
01738   /* Disable the Main Output */
01739   __HAL_TIM_MOE_DISABLE(htim);
01740 
01741   /* Disable the Peripheral */
01742   __HAL_TIM_DISABLE(htim);
01743 
01744   /* Set the TIM  channels state */
01745   TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
01746   TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
01747   TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
01748   TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
01749 
01750   /* Return function status */
01751   return HAL_OK;
01752 }
01753 
01754 /**
01755   * @}
01756   */
01757 
01758 /** @defgroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions
01759   * @brief    Peripheral Control functions
01760   *
01761 @verbatim
01762   ==============================================================================
01763                     ##### Peripheral Control functions #####
01764   ==============================================================================
01765   [..]
01766     This section provides functions allowing to:
01767       (+) Configure the commutation event in case of use of the Hall sensor interface.
01768       (+) Configure Output channels for OC and PWM mode.
01769 
01770       (+) Configure Complementary channels, break features and dead time.
01771       (+) Configure Master synchronization.
01772       (+) Configure timer remapping capabilities.
01773 
01774 @endverbatim
01775   * @{
01776   */
01777 
01778 /**
01779   * @brief  Configure the TIM commutation event sequence.
01780   * @note  This function is mandatory to use the commutation event in order to
01781   *        update the configuration at each commutation detection on the TRGI input of the Timer,
01782   *        the typical use of this feature is with the use of another Timer(interface Timer)
01783   *        configured in Hall sensor interface, this interface Timer will generate the
01784   *        commutation at its TRGO output (connected to Timer used in this function) each time
01785   *        the TI1 of the Interface Timer detect a commutation at its input TI1.
01786   * @param  htim TIM handle
01787   * @param  InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
01788   *          This parameter can be one of the following values:
01789   *            @arg TIM_TS_ITR0: Internal trigger 0 selected
01790   *            @arg TIM_TS_ITR1: Internal trigger 1 selected
01791   *            @arg TIM_TS_ITR2: Internal trigger 2 selected
01792   *            @arg TIM_TS_ITR3: Internal trigger 3 selected
01793   *            @arg TIM_TS_NONE: No trigger is needed
01794   * @param  CommutationSource the Commutation Event source
01795   *          This parameter can be one of the following values:
01796   *            @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
01797   *            @arg TIM_COMMUTATION_SOFTWARE:  Commutation source is set by software using the COMG bit
01798   * @retval HAL status
01799   */
01800 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef *htim, uint32_t  InputTrigger,
01801                                               uint32_t  CommutationSource)
01802 {
01803   /* Check the parameters */
01804   assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
01805   assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
01806 
01807   __HAL_LOCK(htim);
01808 
01809   if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
01810       (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
01811   {
01812     /* Select the Input trigger */
01813     htim->Instance->SMCR &= ~TIM_SMCR_TS;
01814     htim->Instance->SMCR |= InputTrigger;
01815   }
01816 
01817   /* Select the Capture Compare preload feature */
01818   htim->Instance->CR2 |= TIM_CR2_CCPC;
01819   /* Select the Commutation event source */
01820   htim->Instance->CR2 &= ~TIM_CR2_CCUS;
01821   htim->Instance->CR2 |= CommutationSource;
01822 
01823   /* Disable Commutation Interrupt */
01824   __HAL_TIM_DISABLE_IT(htim, TIM_IT_COM);
01825 
01826   /* Disable Commutation DMA request */
01827   __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_COM);
01828 
01829   __HAL_UNLOCK(htim);
01830 
01831   return HAL_OK;
01832 }
01833 
01834 /**
01835   * @brief  Configure the TIM commutation event sequence with interrupt.
01836   * @note  This function is mandatory to use the commutation event in order to
01837   *        update the configuration at each commutation detection on the TRGI input of the Timer,
01838   *        the typical use of this feature is with the use of another Timer(interface Timer)
01839   *        configured in Hall sensor interface, this interface Timer will generate the
01840   *        commutation at its TRGO output (connected to Timer used in this function) each time
01841   *        the TI1 of the Interface Timer detect a commutation at its input TI1.
01842   * @param  htim TIM handle
01843   * @param  InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
01844   *          This parameter can be one of the following values:
01845   *            @arg TIM_TS_ITR0: Internal trigger 0 selected
01846   *            @arg TIM_TS_ITR1: Internal trigger 1 selected
01847   *            @arg TIM_TS_ITR2: Internal trigger 2 selected
01848   *            @arg TIM_TS_ITR3: Internal trigger 3 selected
01849   *            @arg TIM_TS_NONE: No trigger is needed
01850   * @param  CommutationSource the Commutation Event source
01851   *          This parameter can be one of the following values:
01852   *            @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
01853   *            @arg TIM_COMMUTATION_SOFTWARE:  Commutation source is set by software using the COMG bit
01854   * @retval HAL status
01855   */
01856 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef *htim, uint32_t  InputTrigger,
01857                                                  uint32_t  CommutationSource)
01858 {
01859   /* Check the parameters */
01860   assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
01861   assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
01862 
01863   __HAL_LOCK(htim);
01864 
01865   if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
01866       (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
01867   {
01868     /* Select the Input trigger */
01869     htim->Instance->SMCR &= ~TIM_SMCR_TS;
01870     htim->Instance->SMCR |= InputTrigger;
01871   }
01872 
01873   /* Select the Capture Compare preload feature */
01874   htim->Instance->CR2 |= TIM_CR2_CCPC;
01875   /* Select the Commutation event source */
01876   htim->Instance->CR2 &= ~TIM_CR2_CCUS;
01877   htim->Instance->CR2 |= CommutationSource;
01878 
01879   /* Disable Commutation DMA request */
01880   __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_COM);
01881 
01882   /* Enable the Commutation Interrupt */
01883   __HAL_TIM_ENABLE_IT(htim, TIM_IT_COM);
01884 
01885   __HAL_UNLOCK(htim);
01886 
01887   return HAL_OK;
01888 }
01889 
01890 /**
01891   * @brief  Configure the TIM commutation event sequence with DMA.
01892   * @note  This function is mandatory to use the commutation event in order to
01893   *        update the configuration at each commutation detection on the TRGI input of the Timer,
01894   *        the typical use of this feature is with the use of another Timer(interface Timer)
01895   *        configured in Hall sensor interface, this interface Timer will generate the
01896   *        commutation at its TRGO output (connected to Timer used in this function) each time
01897   *        the TI1 of the Interface Timer detect a commutation at its input TI1.
01898   * @note  The user should configure the DMA in his own software, in This function only the COMDE bit is set
01899   * @param  htim TIM handle
01900   * @param  InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
01901   *          This parameter can be one of the following values:
01902   *            @arg TIM_TS_ITR0: Internal trigger 0 selected
01903   *            @arg TIM_TS_ITR1: Internal trigger 1 selected
01904   *            @arg TIM_TS_ITR2: Internal trigger 2 selected
01905   *            @arg TIM_TS_ITR3: Internal trigger 3 selected
01906   *            @arg TIM_TS_NONE: No trigger is needed
01907   * @param  CommutationSource the Commutation Event source
01908   *          This parameter can be one of the following values:
01909   *            @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
01910   *            @arg TIM_COMMUTATION_SOFTWARE:  Commutation source is set by software using the COMG bit
01911   * @retval HAL status
01912   */
01913 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef *htim, uint32_t  InputTrigger,
01914                                                   uint32_t  CommutationSource)
01915 {
01916   /* Check the parameters */
01917   assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
01918   assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
01919 
01920   __HAL_LOCK(htim);
01921 
01922   if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
01923       (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
01924   {
01925     /* Select the Input trigger */
01926     htim->Instance->SMCR &= ~TIM_SMCR_TS;
01927     htim->Instance->SMCR |= InputTrigger;
01928   }
01929 
01930   /* Select the Capture Compare preload feature */
01931   htim->Instance->CR2 |= TIM_CR2_CCPC;
01932   /* Select the Commutation event source */
01933   htim->Instance->CR2 &= ~TIM_CR2_CCUS;
01934   htim->Instance->CR2 |= CommutationSource;
01935 
01936   /* Enable the Commutation DMA Request */
01937   /* Set the DMA Commutation Callback */
01938   htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt;
01939   htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt;
01940   /* Set the DMA error callback */
01941   htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError;
01942 
01943   /* Disable Commutation Interrupt */
01944   __HAL_TIM_DISABLE_IT(htim, TIM_IT_COM);
01945 
01946   /* Enable the Commutation DMA Request */
01947   __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_COM);
01948 
01949   __HAL_UNLOCK(htim);
01950 
01951   return HAL_OK;
01952 }
01953 
01954 /**
01955   * @brief  Configures the TIM in master mode.
01956   * @param  htim TIM handle.
01957   * @param  sMasterConfig pointer to a TIM_MasterConfigTypeDef structure that
01958   *         contains the selected trigger output (TRGO) and the Master/Slave
01959   *         mode.
01960   * @retval HAL status
01961   */
01962 HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
01963                                                         TIM_MasterConfigTypeDef *sMasterConfig)
01964 {
01965   uint32_t tmpcr2;
01966   uint32_t tmpsmcr;
01967 
01968   /* Check the parameters */
01969   assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
01970   assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
01971   assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
01972 
01973   /* Check input state */
01974   __HAL_LOCK(htim);
01975 
01976   /* Change the handler state */
01977   htim->State = HAL_TIM_STATE_BUSY;
01978 
01979   /* Get the TIMx CR2 register value */
01980   tmpcr2 = htim->Instance->CR2;
01981 
01982   /* Get the TIMx SMCR register value */
01983   tmpsmcr = htim->Instance->SMCR;
01984 
01985   /* Reset the MMS Bits */
01986   tmpcr2 &= ~TIM_CR2_MMS;
01987   /* Select the TRGO source */
01988   tmpcr2 |=  sMasterConfig->MasterOutputTrigger;
01989 
01990   /* Update TIMx CR2 */
01991   htim->Instance->CR2 = tmpcr2;
01992 
01993   if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
01994   {
01995     /* Reset the MSM Bit */
01996     tmpsmcr &= ~TIM_SMCR_MSM;
01997     /* Set master mode */
01998     tmpsmcr |= sMasterConfig->MasterSlaveMode;
01999 
02000     /* Update TIMx SMCR */
02001     htim->Instance->SMCR = tmpsmcr;
02002   }
02003 
02004   /* Change the htim state */
02005   htim->State = HAL_TIM_STATE_READY;
02006 
02007   __HAL_UNLOCK(htim);
02008 
02009   return HAL_OK;
02010 }
02011 
02012 /**
02013   * @brief  Configures the Break feature, dead time, Lock level, OSSI/OSSR State
02014   *         and the AOE(automatic output enable).
02015   * @param  htim TIM handle
02016   * @param  sBreakDeadTimeConfig pointer to a TIM_ConfigBreakDeadConfigTypeDef structure that
02017   *         contains the BDTR Register configuration  information for the TIM peripheral.
02018   * @note   Interrupts can be generated when an active level is detected on the
02019   *         break input, the break 2 input or the system break input. Break
02020   *         interrupt can be enabled by calling the @ref __HAL_TIM_ENABLE_IT macro.
02021   * @retval HAL status
02022   */
02023 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim,
02024                                                 TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig)
02025 {
02026   /* Keep this variable initialized to 0 as it is used to configure BDTR register */
02027   uint32_t tmpbdtr = 0U;
02028 
02029   /* Check the parameters */
02030   assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance));
02031   assert_param(IS_TIM_OSSR_STATE(sBreakDeadTimeConfig->OffStateRunMode));
02032   assert_param(IS_TIM_OSSI_STATE(sBreakDeadTimeConfig->OffStateIDLEMode));
02033   assert_param(IS_TIM_LOCK_LEVEL(sBreakDeadTimeConfig->LockLevel));
02034   assert_param(IS_TIM_DEADTIME(sBreakDeadTimeConfig->DeadTime));
02035   assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState));
02036   assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity));
02037   assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput));
02038 
02039   /* Check input state */
02040   __HAL_LOCK(htim);
02041 
02042   /* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State,
02043      the OSSI State, the dead time value and the Automatic Output Enable Bit */
02044 
02045   /* Set the BDTR bits */
02046   MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, sBreakDeadTimeConfig->DeadTime);
02047   MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel);
02048   MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode);
02049   MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode);
02050   MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState);
02051   MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity);
02052   MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput);
02053 
02054 
02055   /* Set TIMx_BDTR */
02056   htim->Instance->BDTR = tmpbdtr;
02057 
02058   __HAL_UNLOCK(htim);
02059 
02060   return HAL_OK;
02061 }
02062 
02063 /**
02064   * @brief  Configures the TIMx Remapping input capabilities.
02065   * @param  htim TIM handle.
02066   * @param  Remap specifies the TIM remapping source.
02067   *         For TIM1, the parameter can have the following values:                   (**)
02068   *           @arg TIM_TIM1_TIM3_TRGO:  TIM1 ITR2 is connected to TIM3 TRGO
02069   *           @arg TIM_TIM1_LPTIM:      TIM1 ITR2 is connected to LPTIM1 output
02070   *
02071   *         For TIM2, the parameter can have the following values:                   (**)
02072   *           @arg TIM_TIM2_TIM8_TRGO:  TIM2 ITR1 is connected to TIM8 TRGO          (*)
02073   *           @arg TIM_TIM2_ETH_PTP:    TIM2 ITR1 is connected to PTP trigger output (*)
02074   *           @arg TIM_TIM2_USBFS_SOF:  TIM2 ITR1 is connected to OTG FS SOF
02075   *           @arg TIM_TIM2_USBHS_SOF:  TIM2 ITR1 is connected to OTG FS SOF
02076   *
02077   *         For TIM5, the parameter can have the following values:
02078   *           @arg TIM_TIM5_GPIO:       TIM5 TI4 is connected to GPIO
02079   *           @arg TIM_TIM5_LSI:        TIM5 TI4 is connected to LSI
02080   *           @arg TIM_TIM5_LSE:        TIM5 TI4 is connected to LSE
02081   *           @arg TIM_TIM5_RTC:        TIM5 TI4 is connected to the RTC wakeup interrupt
02082   *           @arg TIM_TIM5_TIM3_TRGO:  TIM5 ITR1 is connected to TIM3 TRGO          (*)
02083   *           @arg TIM_TIM5_LPTIM:      TIM5 ITR1 is connected to LPTIM1 output      (*)
02084   *
02085   *         For TIM9, the parameter can have the following values:                   (**)
02086   *           @arg TIM_TIM9_TIM3_TRGO:  TIM9 ITR1 is connected to TIM3 TRGO
02087   *           @arg TIM_TIM9_LPTIM:      TIM9 ITR1 is connected to LPTIM1 output
02088   *
02089   *         For TIM11, the parameter can have the following values:
02090   *           @arg TIM_TIM11_GPIO:     TIM11 TI1 is connected to GPIO
02091   *           @arg TIM_TIM11_HSE:      TIM11 TI1 is connected to HSE_RTC clock
02092   *           @arg TIM_TIM11_SPDIFRX:  TIM11 TI1 is connected to SPDIFRX_FRAME_SYNC  (*)
02093   *
02094   *         (*)  Value not defined in all devices. \n
02095   *         (**) Register not available in all devices.
02096   *
02097   * @retval HAL status
02098   */
02099 HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap)
02100 {
02101   __HAL_LOCK(htim);
02102 
02103   /* Check parameters */
02104   assert_param(IS_TIM_REMAP(htim->Instance, Remap));
02105 
02106 #if defined(LPTIM_OR_TIM1_ITR2_RMP) && defined(LPTIM_OR_TIM5_ITR1_RMP) && defined(LPTIM_OR_TIM9_ITR1_RMP)
02107   if ((Remap & LPTIM_REMAP_MASK) == LPTIM_REMAP_MASK)
02108   {
02109     /* Connect TIMx internal trigger to LPTIM1 output */
02110     __HAL_RCC_LPTIM1_CLK_ENABLE();
02111     MODIFY_REG(LPTIM1->OR,
02112                (LPTIM_OR_TIM1_ITR2_RMP | LPTIM_OR_TIM5_ITR1_RMP | LPTIM_OR_TIM9_ITR1_RMP),
02113                Remap & ~(LPTIM_REMAP_MASK));
02114   }
02115   else
02116   {
02117     /* Set the Timer remapping configuration */
02118     WRITE_REG(htim->Instance->OR, Remap);
02119   }
02120 #else
02121   /* Set the Timer remapping configuration */
02122   WRITE_REG(htim->Instance->OR, Remap);
02123 #endif /* LPTIM_OR_TIM1_ITR2_RMP &&  LPTIM_OR_TIM5_ITR1_RMP && LPTIM_OR_TIM9_ITR1_RMP */
02124 
02125   __HAL_UNLOCK(htim);
02126 
02127   return HAL_OK;
02128 }
02129 
02130 /**
02131   * @}
02132   */
02133 
02134 /** @defgroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions
02135   * @brief    Extended Callbacks functions
02136   *
02137 @verbatim
02138   ==============================================================================
02139                     ##### Extended Callbacks functions #####
02140   ==============================================================================
02141   [..]
02142     This section provides Extended TIM callback functions:
02143     (+) Timer Commutation callback
02144     (+) Timer Break callback
02145 
02146 @endverbatim
02147   * @{
02148   */
02149 
02150 /**
02151   * @brief  Hall commutation changed callback in non-blocking mode
02152   * @param  htim TIM handle
02153   * @retval None
02154   */
02155 __weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim)
02156 {
02157   /* Prevent unused argument(s) compilation warning */
02158   UNUSED(htim);
02159 
02160   /* NOTE : This function should not be modified, when the callback is needed,
02161             the HAL_TIMEx_CommutCallback could be implemented in the user file
02162    */
02163 }
02164 /**
02165   * @brief  Hall commutation changed half complete callback in non-blocking mode
02166   * @param  htim TIM handle
02167   * @retval None
02168   */
02169 __weak void HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef *htim)
02170 {
02171   /* Prevent unused argument(s) compilation warning */
02172   UNUSED(htim);
02173 
02174   /* NOTE : This function should not be modified, when the callback is needed,
02175             the HAL_TIMEx_CommutHalfCpltCallback could be implemented in the user file
02176    */
02177 }
02178 
02179 /**
02180   * @brief  Hall Break detection callback in non-blocking mode
02181   * @param  htim TIM handle
02182   * @retval None
02183   */
02184 __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
02185 {
02186   /* Prevent unused argument(s) compilation warning */
02187   UNUSED(htim);
02188 
02189   /* NOTE : This function should not be modified, when the callback is needed,
02190             the HAL_TIMEx_BreakCallback could be implemented in the user file
02191    */
02192 }
02193 /**
02194   * @}
02195   */
02196 
02197 /** @defgroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions
02198   * @brief    Extended Peripheral State functions
02199   *
02200 @verbatim
02201   ==============================================================================
02202                 ##### Extended Peripheral State functions #####
02203   ==============================================================================
02204   [..]
02205     This subsection permits to get in run-time the status of the peripheral
02206     and the data flow.
02207 
02208 @endverbatim
02209   * @{
02210   */
02211 
02212 /**
02213   * @brief  Return the TIM Hall Sensor interface handle state.
02214   * @param  htim TIM Hall Sensor handle
02215   * @retval HAL state
02216   */
02217 HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim)
02218 {
02219   return htim->State;
02220 }
02221 
02222 /**
02223   * @brief  Return actual state of the TIM complementary channel.
02224   * @param  htim TIM handle
02225   * @param  ChannelN TIM Complementary channel
02226   *          This parameter can be one of the following values:
02227   *            @arg TIM_CHANNEL_1: TIM Channel 1
02228   *            @arg TIM_CHANNEL_2: TIM Channel 2
02229   *            @arg TIM_CHANNEL_3: TIM Channel 3
02230   * @retval TIM Complementary channel state
02231   */
02232 HAL_TIM_ChannelStateTypeDef HAL_TIMEx_GetChannelNState(TIM_HandleTypeDef *htim,  uint32_t ChannelN)
02233 {
02234   HAL_TIM_ChannelStateTypeDef channel_state;
02235 
02236   /* Check the parameters */
02237   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, ChannelN));
02238 
02239   channel_state = TIM_CHANNEL_N_STATE_GET(htim, ChannelN);
02240 
02241   return channel_state;
02242 }
02243 /**
02244   * @}
02245   */
02246 
02247 /**
02248   * @}
02249   */
02250 
02251 /* Private functions ---------------------------------------------------------*/
02252 /** @defgroup TIMEx_Private_Functions TIMEx Private Functions
02253   * @{
02254   */
02255 
02256 /**
02257   * @brief  TIM DMA Commutation callback.
02258   * @param  hdma pointer to DMA handle.
02259   * @retval None
02260   */
02261 void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma)
02262 {
02263   TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
02264 
02265   /* Change the htim state */
02266   htim->State = HAL_TIM_STATE_READY;
02267 
02268 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
02269   htim->CommutationCallback(htim);
02270 #else
02271   HAL_TIMEx_CommutCallback(htim);
02272 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
02273 }
02274 
02275 /**
02276   * @brief  TIM DMA Commutation half complete callback.
02277   * @param  hdma pointer to DMA handle.
02278   * @retval None
02279   */
02280 void TIMEx_DMACommutationHalfCplt(DMA_HandleTypeDef *hdma)
02281 {
02282   TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
02283 
02284   /* Change the htim state */
02285   htim->State = HAL_TIM_STATE_READY;
02286 
02287 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
02288   htim->CommutationHalfCpltCallback(htim);
02289 #else
02290   HAL_TIMEx_CommutHalfCpltCallback(htim);
02291 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
02292 }
02293 
02294 
02295 /**
02296   * @brief  TIM DMA Delay Pulse complete callback (complementary channel).
02297   * @param  hdma pointer to DMA handle.
02298   * @retval None
02299   */
02300 static void TIM_DMADelayPulseNCplt(DMA_HandleTypeDef *hdma)
02301 {
02302   TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
02303 
02304   if (hdma == htim->hdma[TIM_DMA_ID_CC1])
02305   {
02306     htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
02307 
02308     if (hdma->Init.Mode == DMA_NORMAL)
02309     {
02310       TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
02311     }
02312   }
02313   else if (hdma == htim->hdma[TIM_DMA_ID_CC2])
02314   {
02315     htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
02316 
02317     if (hdma->Init.Mode == DMA_NORMAL)
02318     {
02319       TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
02320     }
02321   }
02322   else if (hdma == htim->hdma[TIM_DMA_ID_CC3])
02323   {
02324     htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
02325 
02326     if (hdma->Init.Mode == DMA_NORMAL)
02327     {
02328       TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY);
02329     }
02330   }
02331   else if (hdma == htim->hdma[TIM_DMA_ID_CC4])
02332   {
02333     htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
02334 
02335     if (hdma->Init.Mode == DMA_NORMAL)
02336     {
02337       TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_4, HAL_TIM_CHANNEL_STATE_READY);
02338     }
02339   }
02340   else
02341   {
02342     /* nothing to do */
02343   }
02344 
02345 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
02346   htim->PWM_PulseFinishedCallback(htim);
02347 #else
02348   HAL_TIM_PWM_PulseFinishedCallback(htim);
02349 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
02350 
02351   htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
02352 }
02353 
02354 /**
02355   * @brief  TIM DMA error callback (complementary channel)
02356   * @param  hdma pointer to DMA handle.
02357   * @retval None
02358   */
02359 static void TIM_DMAErrorCCxN(DMA_HandleTypeDef *hdma)
02360 {
02361   TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
02362 
02363   if (hdma == htim->hdma[TIM_DMA_ID_CC1])
02364   {
02365     htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
02366     TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
02367   }
02368   else if (hdma == htim->hdma[TIM_DMA_ID_CC2])
02369   {
02370     htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
02371     TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
02372   }
02373   else if (hdma == htim->hdma[TIM_DMA_ID_CC3])
02374   {
02375     htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
02376     TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY);
02377   }
02378   else
02379   {
02380     /* nothing to do */
02381   }
02382 
02383 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
02384   htim->ErrorCallback(htim);
02385 #else
02386   HAL_TIM_ErrorCallback(htim);
02387 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
02388 
02389   htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
02390 }
02391 
02392 /**
02393   * @brief  Enables or disables the TIM Capture Compare Channel xN.
02394   * @param  TIMx to select the TIM peripheral
02395   * @param  Channel specifies the TIM Channel
02396   *          This parameter can be one of the following values:
02397   *            @arg TIM_CHANNEL_1: TIM Channel 1
02398   *            @arg TIM_CHANNEL_2: TIM Channel 2
02399   *            @arg TIM_CHANNEL_3: TIM Channel 3
02400   * @param  ChannelNState specifies the TIM Channel CCxNE bit new state.
02401   *          This parameter can be: TIM_CCxN_ENABLE or TIM_CCxN_Disable.
02402   * @retval None
02403   */
02404 static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelNState)
02405 {
02406   uint32_t tmp;
02407 
02408   tmp = TIM_CCER_CC1NE << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */
02409 
02410   /* Reset the CCxNE Bit */
02411   TIMx->CCER &=  ~tmp;
02412 
02413   /* Set or reset the CCxNE Bit */
02414   TIMx->CCER |= (uint32_t)(ChannelNState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */
02415 }
02416 /**
02417   * @}
02418   */
02419 
02420 #endif /* HAL_TIM_MODULE_ENABLED */
02421 /**
02422   * @}
02423   */
02424 
02425 /**
02426   * @}
02427   */
02428 
02429 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/