STM32F479xx HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32f4xx_ll_dma2d.h 00004 * @author MCD Application Team 00005 * @brief Header file of DMA2D LL module. 00006 ****************************************************************************** 00007 * @attention 00008 * 00009 * <h2><center>© Copyright (c) 2016 STMicroelectronics. 00010 * All rights reserved.</center></h2> 00011 * 00012 * This software component is licensed by ST under BSD 3-Clause license, 00013 * the "License"; You may not use this file except in compliance with the 00014 * License. You may obtain a copy of the License at: 00015 * opensource.org/licenses/BSD-3-Clause 00016 * 00017 ****************************************************************************** 00018 */ 00019 00020 /* Define to prevent recursive inclusion -------------------------------------*/ 00021 #ifndef STM32F4xx_LL_DMA2D_H 00022 #define STM32F4xx_LL_DMA2D_H 00023 00024 #ifdef __cplusplus 00025 extern "C" { 00026 #endif 00027 00028 /* Includes ------------------------------------------------------------------*/ 00029 #include "stm32f4xx.h" 00030 00031 /** @addtogroup STM32F4xx_LL_Driver 00032 * @{ 00033 */ 00034 00035 #if defined (DMA2D) 00036 00037 /** @defgroup DMA2D_LL DMA2D 00038 * @{ 00039 */ 00040 00041 /* Private types -------------------------------------------------------------*/ 00042 /* Private variables ---------------------------------------------------------*/ 00043 /* Private constants ---------------------------------------------------------*/ 00044 /* Private macros ------------------------------------------------------------*/ 00045 #if defined(USE_FULL_LL_DRIVER) 00046 /** @defgroup DMA2D_LL_Private_Macros DMA2D Private Macros 00047 * @{ 00048 */ 00049 00050 /** 00051 * @} 00052 */ 00053 #endif /*USE_FULL_LL_DRIVER*/ 00054 00055 /* Exported types ------------------------------------------------------------*/ 00056 #if defined(USE_FULL_LL_DRIVER) 00057 /** @defgroup DMA2D_LL_ES_Init_Struct DMA2D Exported Init structures 00058 * @{ 00059 */ 00060 00061 /** 00062 * @brief LL DMA2D Init Structure Definition 00063 */ 00064 typedef struct 00065 { 00066 uint32_t Mode; /*!< Specifies the DMA2D transfer mode. 00067 - This parameter can be one value of @ref DMA2D_LL_EC_MODE. 00068 00069 This parameter can be modified afterwards, 00070 using unitary function @ref LL_DMA2D_SetMode(). */ 00071 00072 uint32_t ColorMode; /*!< Specifies the color format of the output image. 00073 - This parameter can be one value of @ref DMA2D_LL_EC_OUTPUT_COLOR_MODE. 00074 00075 This parameter can be modified afterwards using, 00076 unitary function @ref LL_DMA2D_SetOutputColorMode(). */ 00077 00078 uint32_t OutputBlue; /*!< Specifies the Blue value of the output image. 00079 - This parameter must be a number between: 00080 Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected. 00081 - This parameter must be a number between: 00082 Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected. 00083 - This parameter must be a number between: 00084 Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected. 00085 - This parameter must be a number between: 00086 Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected. 00087 - This parameter must be a number between: 00088 Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected. 00089 00090 This parameter can be modified afterwards, 00091 using unitary function @ref LL_DMA2D_SetOutputColor() or configuration 00092 function @ref LL_DMA2D_ConfigOutputColor(). */ 00093 00094 uint32_t OutputGreen; /*!< Specifies the Green value of the output image. 00095 - This parameter must be a number between: 00096 Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected. 00097 - This parameter must be a number between: 00098 Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected. 00099 - This parameter must be a number between: 00100 Min_Data = 0x00 and Max_Data = 0x3F if RGB565 color mode is selected. 00101 - This parameter must be a number between: 00102 Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected. 00103 - This parameter must be a number between: 00104 Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected. 00105 00106 This parameter can be modified afterwards 00107 using unitary function @ref LL_DMA2D_SetOutputColor() or configuration 00108 function @ref LL_DMA2D_ConfigOutputColor(). */ 00109 00110 uint32_t OutputRed; /*!< Specifies the Red value of the output image. 00111 - This parameter must be a number between: 00112 Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected. 00113 - This parameter must be a number between: 00114 Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected. 00115 - This parameter must be a number between: 00116 Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected. 00117 - This parameter must be a number between: 00118 Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected. 00119 - This parameter must be a number between: 00120 Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected. 00121 00122 This parameter can be modified afterwards 00123 using unitary function @ref LL_DMA2D_SetOutputColor() or configuration 00124 function @ref LL_DMA2D_ConfigOutputColor(). */ 00125 00126 uint32_t OutputAlpha; /*!< Specifies the Alpha channel of the output image. 00127 - This parameter must be a number between: 00128 Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected. 00129 - This parameter must be a number between: 00130 Min_Data = 0x00 and Max_Data = 0x01 if ARGB1555 color mode is selected. 00131 - This parameter must be a number between: 00132 Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected. 00133 - This parameter is not considered if RGB888 or RGB565 color mode is selected. 00134 00135 This parameter can be modified afterwards using, 00136 unitary function @ref LL_DMA2D_SetOutputColor() or configuration 00137 function @ref LL_DMA2D_ConfigOutputColor(). */ 00138 00139 uint32_t OutputMemoryAddress; /*!< Specifies the memory address. 00140 - This parameter must be a number between: 00141 Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF. 00142 00143 This parameter can be modified afterwards, 00144 using unitary function @ref LL_DMA2D_SetOutputMemAddr(). */ 00145 00146 00147 00148 uint32_t LineOffset; /*!< Specifies the output line offset value. 00149 - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF. 00150 00151 This parameter can be modified afterwards, 00152 using unitary function @ref LL_DMA2D_SetLineOffset(). */ 00153 00154 uint32_t NbrOfLines; /*!< Specifies the number of lines of the area to be transferred. 00155 - This parameter must be a number between: 00156 Min_Data = 0x0000 and Max_Data = 0xFFFF. 00157 00158 This parameter can be modified afterwards, 00159 using unitary function @ref LL_DMA2D_SetNbrOfLines(). */ 00160 00161 uint32_t NbrOfPixelsPerLines; /*!< Specifies the number of pixels per lines of the area to be transferred. 00162 - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF. 00163 00164 This parameter can be modified afterwards using, 00165 unitary function @ref LL_DMA2D_SetNbrOfPixelsPerLines(). */ 00166 00167 00168 } LL_DMA2D_InitTypeDef; 00169 00170 /** 00171 * @brief LL DMA2D Layer Configuration Structure Definition 00172 */ 00173 typedef struct 00174 { 00175 uint32_t MemoryAddress; /*!< Specifies the foreground or background memory address. 00176 - This parameter must be a number between: 00177 Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF. 00178 00179 This parameter can be modified afterwards using unitary functions 00180 - @ref LL_DMA2D_FGND_SetMemAddr() for foreground layer, 00181 - @ref LL_DMA2D_BGND_SetMemAddr() for background layer. */ 00182 00183 uint32_t LineOffset; /*!< Specifies the foreground or background line offset value. 00184 - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF. 00185 00186 This parameter can be modified afterwards using unitary functions 00187 - @ref LL_DMA2D_FGND_SetLineOffset() for foreground layer, 00188 - @ref LL_DMA2D_BGND_SetLineOffset() for background layer. */ 00189 00190 uint32_t ColorMode; /*!< Specifies the foreground or background color mode. 00191 - This parameter can be one value of @ref DMA2D_LL_EC_INPUT_COLOR_MODE. 00192 00193 This parameter can be modified afterwards using unitary functions 00194 - @ref LL_DMA2D_FGND_SetColorMode() for foreground layer, 00195 - @ref LL_DMA2D_BGND_SetColorMode() for background layer. */ 00196 00197 uint32_t CLUTColorMode; /*!< Specifies the foreground or background CLUT color mode. 00198 - This parameter can be one value of @ref DMA2D_LL_EC_CLUT_COLOR_MODE. 00199 00200 This parameter can be modified afterwards using unitary functions 00201 - @ref LL_DMA2D_FGND_SetCLUTColorMode() for foreground layer, 00202 - @ref LL_DMA2D_BGND_SetCLUTColorMode() for background layer. */ 00203 00204 uint32_t CLUTSize; /*!< Specifies the foreground or background CLUT size. 00205 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. 00206 00207 This parameter can be modified afterwards using unitary functions 00208 - @ref LL_DMA2D_FGND_SetCLUTSize() for foreground layer, 00209 - @ref LL_DMA2D_BGND_SetCLUTSize() for background layer. */ 00210 00211 uint32_t AlphaMode; /*!< Specifies the foreground or background alpha mode. 00212 - This parameter can be one value of @ref DMA2D_LL_EC_ALPHA_MODE. 00213 00214 This parameter can be modified afterwards using unitary functions 00215 - @ref LL_DMA2D_FGND_SetAlphaMode() for foreground layer, 00216 - @ref LL_DMA2D_BGND_SetAlphaMode() for background layer. */ 00217 00218 uint32_t Alpha; /*!< Specifies the foreground or background Alpha value. 00219 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. 00220 00221 This parameter can be modified afterwards using unitary functions 00222 - @ref LL_DMA2D_FGND_SetAlpha() for foreground layer, 00223 - @ref LL_DMA2D_BGND_SetAlpha() for background layer. */ 00224 00225 uint32_t Blue; /*!< Specifies the foreground or background Blue color value. 00226 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. 00227 00228 This parameter can be modified afterwards using unitary functions 00229 - @ref LL_DMA2D_FGND_SetBlueColor() for foreground layer, 00230 - @ref LL_DMA2D_BGND_SetBlueColor() for background layer. */ 00231 00232 uint32_t Green; /*!< Specifies the foreground or background Green color value. 00233 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. 00234 00235 This parameter can be modified afterwards using unitary functions 00236 - @ref LL_DMA2D_FGND_SetGreenColor() for foreground layer, 00237 - @ref LL_DMA2D_BGND_SetGreenColor() for background layer. */ 00238 00239 uint32_t Red; /*!< Specifies the foreground or background Red color value. 00240 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. 00241 00242 This parameter can be modified afterwards using unitary functions 00243 - @ref LL_DMA2D_FGND_SetRedColor() for foreground layer, 00244 - @ref LL_DMA2D_BGND_SetRedColor() for background layer. */ 00245 00246 uint32_t CLUTMemoryAddress; /*!< Specifies the foreground or background CLUT memory address. 00247 - This parameter must be a number between: 00248 Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF. 00249 00250 This parameter can be modified afterwards using unitary functions 00251 - @ref LL_DMA2D_FGND_SetCLUTMemAddr() for foreground layer, 00252 - @ref LL_DMA2D_BGND_SetCLUTMemAddr() for background layer. */ 00253 00254 00255 00256 } LL_DMA2D_LayerCfgTypeDef; 00257 00258 /** 00259 * @brief LL DMA2D Output Color Structure Definition 00260 */ 00261 typedef struct 00262 { 00263 uint32_t ColorMode; /*!< Specifies the color format of the output image. 00264 - This parameter can be one value of @ref DMA2D_LL_EC_OUTPUT_COLOR_MODE. 00265 00266 This parameter can be modified afterwards using 00267 unitary function @ref LL_DMA2D_SetOutputColorMode(). */ 00268 00269 uint32_t OutputBlue; /*!< Specifies the Blue value of the output image. 00270 - This parameter must be a number between: 00271 Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected. 00272 - This parameter must be a number between: 00273 Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected. 00274 - This parameter must be a number between: 00275 Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected. 00276 - This parameter must be a number between: 00277 Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected. 00278 - This parameter must be a number between: 00279 Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected. 00280 00281 This parameter can be modified afterwards using, 00282 unitary function @ref LL_DMA2D_SetOutputColor() or configuration 00283 function @ref LL_DMA2D_ConfigOutputColor(). */ 00284 00285 uint32_t OutputGreen; /*!< Specifies the Green value of the output image. 00286 - This parameter must be a number between: 00287 Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected. 00288 - This parameter must be a number between 00289 Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected. 00290 - This parameter must be a number between: 00291 Min_Data = 0x00 and Max_Data = 0x3F if RGB565 color mode is selected. 00292 - This parameter must be a number between: 00293 Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected. 00294 - This parameter must be a number between: 00295 Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected. 00296 00297 This parameter can be modified afterwards, 00298 using unitary function @ref LL_DMA2D_SetOutputColor() or configuration 00299 function @ref LL_DMA2D_ConfigOutputColor(). */ 00300 00301 uint32_t OutputRed; /*!< Specifies the Red value of the output image. 00302 - This parameter must be a number between: 00303 Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected. 00304 - This parameter must be a number between: 00305 Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected. 00306 - This parameter must be a number between: 00307 Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected. 00308 - This parameter must be a number between: 00309 Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected. 00310 - This parameter must be a number between: 00311 Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected. 00312 00313 This parameter can be modified afterwards, 00314 using unitary function @ref LL_DMA2D_SetOutputColor() or configuration 00315 function @ref LL_DMA2D_ConfigOutputColor(). */ 00316 00317 uint32_t OutputAlpha; /*!< Specifies the Alpha channel of the output image. 00318 - This parameter must be a number between: 00319 Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected. 00320 - This parameter must be a number between: 00321 Min_Data = 0x00 and Max_Data = 0x01 if ARGB1555 color mode is selected. 00322 - This parameter must be a number between: 00323 Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected. 00324 - This parameter is not considered if RGB888 or RGB565 color mode is selected. 00325 00326 This parameter can be modified afterwards, 00327 using unitary function @ref LL_DMA2D_SetOutputColor() or configuration 00328 function @ref LL_DMA2D_ConfigOutputColor(). */ 00329 00330 } LL_DMA2D_ColorTypeDef; 00331 00332 /** 00333 * @} 00334 */ 00335 #endif /* USE_FULL_LL_DRIVER */ 00336 00337 /* Exported constants --------------------------------------------------------*/ 00338 /** @defgroup DMA2D_LL_Exported_Constants DMA2D Exported Constants 00339 * @{ 00340 */ 00341 00342 /** @defgroup DMA2D_LL_EC_GET_FLAG Get Flags Defines 00343 * @brief Flags defines which can be used with LL_DMA2D_ReadReg function 00344 * @{ 00345 */ 00346 #define LL_DMA2D_FLAG_CEIF DMA2D_ISR_CEIF /*!< Configuration Error Interrupt Flag */ 00347 #define LL_DMA2D_FLAG_CTCIF DMA2D_ISR_CTCIF /*!< CLUT Transfer Complete Interrupt Flag */ 00348 #define LL_DMA2D_FLAG_CAEIF DMA2D_ISR_CAEIF /*!< CLUT Access Error Interrupt Flag */ 00349 #define LL_DMA2D_FLAG_TWIF DMA2D_ISR_TWIF /*!< Transfer Watermark Interrupt Flag */ 00350 #define LL_DMA2D_FLAG_TCIF DMA2D_ISR_TCIF /*!< Transfer Complete Interrupt Flag */ 00351 #define LL_DMA2D_FLAG_TEIF DMA2D_ISR_TEIF /*!< Transfer Error Interrupt Flag */ 00352 /** 00353 * @} 00354 */ 00355 00356 /** @defgroup DMA2D_LL_EC_IT IT Defines 00357 * @brief IT defines which can be used with LL_DMA2D_ReadReg and LL_DMA2D_WriteReg functions 00358 * @{ 00359 */ 00360 #define LL_DMA2D_IT_CEIE DMA2D_CR_CEIE /*!< Configuration Error Interrupt */ 00361 #define LL_DMA2D_IT_CTCIE DMA2D_CR_CTCIE /*!< CLUT Transfer Complete Interrupt */ 00362 #define LL_DMA2D_IT_CAEIE DMA2D_CR_CAEIE /*!< CLUT Access Error Interrupt */ 00363 #define LL_DMA2D_IT_TWIE DMA2D_CR_TWIE /*!< Transfer Watermark Interrupt */ 00364 #define LL_DMA2D_IT_TCIE DMA2D_CR_TCIE /*!< Transfer Complete Interrupt */ 00365 #define LL_DMA2D_IT_TEIE DMA2D_CR_TEIE /*!< Transfer Error Interrupt */ 00366 /** 00367 * @} 00368 */ 00369 00370 /** @defgroup DMA2D_LL_EC_MODE Mode 00371 * @{ 00372 */ 00373 #define LL_DMA2D_MODE_M2M 0x00000000U /*!< DMA2D memory to memory transfer mode */ 00374 #define LL_DMA2D_MODE_M2M_PFC DMA2D_CR_MODE_0 /*!< DMA2D memory to memory with pixel format conversion transfer mode */ 00375 #define LL_DMA2D_MODE_M2M_BLEND DMA2D_CR_MODE_1 /*!< DMA2D memory to memory with blending transfer mode */ 00376 #define LL_DMA2D_MODE_R2M DMA2D_CR_MODE /*!< DMA2D register to memory transfer mode */ 00377 /** 00378 * @} 00379 */ 00380 00381 /** @defgroup DMA2D_LL_EC_OUTPUT_COLOR_MODE Output Color Mode 00382 * @{ 00383 */ 00384 #define LL_DMA2D_OUTPUT_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */ 00385 #define LL_DMA2D_OUTPUT_MODE_RGB888 DMA2D_OPFCCR_CM_0 /*!< RGB888 */ 00386 #define LL_DMA2D_OUTPUT_MODE_RGB565 DMA2D_OPFCCR_CM_1 /*!< RGB565 */ 00387 #define LL_DMA2D_OUTPUT_MODE_ARGB1555 (DMA2D_OPFCCR_CM_0|DMA2D_OPFCCR_CM_1) /*!< ARGB1555 */ 00388 #define LL_DMA2D_OUTPUT_MODE_ARGB4444 DMA2D_OPFCCR_CM_2 /*!< ARGB4444 */ 00389 /** 00390 * @} 00391 */ 00392 00393 /** @defgroup DMA2D_LL_EC_INPUT_COLOR_MODE Input Color Mode 00394 * @{ 00395 */ 00396 #define LL_DMA2D_INPUT_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */ 00397 #define LL_DMA2D_INPUT_MODE_RGB888 DMA2D_FGPFCCR_CM_0 /*!< RGB888 */ 00398 #define LL_DMA2D_INPUT_MODE_RGB565 DMA2D_FGPFCCR_CM_1 /*!< RGB565 */ 00399 #define LL_DMA2D_INPUT_MODE_ARGB1555 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_1) /*!< ARGB1555 */ 00400 #define LL_DMA2D_INPUT_MODE_ARGB4444 DMA2D_FGPFCCR_CM_2 /*!< ARGB4444 */ 00401 #define LL_DMA2D_INPUT_MODE_L8 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_2) /*!< L8 */ 00402 #define LL_DMA2D_INPUT_MODE_AL44 (DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_2) /*!< AL44 */ 00403 #define LL_DMA2D_INPUT_MODE_AL88 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_2) /*!< AL88 */ 00404 #define LL_DMA2D_INPUT_MODE_L4 DMA2D_FGPFCCR_CM_3 /*!< L4 */ 00405 #define LL_DMA2D_INPUT_MODE_A8 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_3) /*!< A8 */ 00406 #define LL_DMA2D_INPUT_MODE_A4 (DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_3) /*!< A4 */ 00407 /** 00408 * @} 00409 */ 00410 00411 /** @defgroup DMA2D_LL_EC_ALPHA_MODE Alpha Mode 00412 * @{ 00413 */ 00414 #define LL_DMA2D_ALPHA_MODE_NO_MODIF 0x00000000U /*!< No modification of the alpha channel value */ 00415 #define LL_DMA2D_ALPHA_MODE_REPLACE DMA2D_FGPFCCR_AM_0 /*!< Replace original alpha channel value by 00416 programmed alpha value */ 00417 #define LL_DMA2D_ALPHA_MODE_COMBINE DMA2D_FGPFCCR_AM_1 /*!< Replace original alpha channel value by 00418 programmed alpha value with, 00419 original alpha channel value */ 00420 /** 00421 * @} 00422 */ 00423 00424 00425 00426 00427 /** @defgroup DMA2D_LL_EC_CLUT_COLOR_MODE CLUT Color Mode 00428 * @{ 00429 */ 00430 #define LL_DMA2D_CLUT_COLOR_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */ 00431 #define LL_DMA2D_CLUT_COLOR_MODE_RGB888 DMA2D_FGPFCCR_CCM /*!< RGB888 */ 00432 /** 00433 * @} 00434 */ 00435 00436 00437 /** 00438 * @} 00439 */ 00440 00441 /* Exported macro ------------------------------------------------------------*/ 00442 /** @defgroup DMA2D_LL_Exported_Macros DMA2D Exported Macros 00443 * @{ 00444 */ 00445 00446 /** @defgroup DMA2D_LL_EM_WRITE_READ Common Write and read registers Macros 00447 * @{ 00448 */ 00449 00450 /** 00451 * @brief Write a value in DMA2D register. 00452 * @param __INSTANCE__ DMA2D Instance 00453 * @param __REG__ Register to be written 00454 * @param __VALUE__ Value to be written in the register 00455 * @retval None 00456 */ 00457 #define LL_DMA2D_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG((__INSTANCE__)->__REG__, (__VALUE__)) 00458 00459 /** 00460 * @brief Read a value in DMA2D register. 00461 * @param __INSTANCE__ DMA2D Instance 00462 * @param __REG__ Register to be read 00463 * @retval Register value 00464 */ 00465 #define LL_DMA2D_ReadReg(__INSTANCE__, __REG__) READ_REG((__INSTANCE__)->__REG__) 00466 /** 00467 * @} 00468 */ 00469 00470 /** 00471 * @} 00472 */ 00473 00474 /* Exported functions --------------------------------------------------------*/ 00475 /** @defgroup DMA2D_LL_Exported_Functions DMA2D Exported Functions 00476 * @{ 00477 */ 00478 00479 /** @defgroup DMA2D_LL_EF_Configuration Configuration Functions 00480 * @{ 00481 */ 00482 00483 /** 00484 * @brief Start a DMA2D transfer. 00485 * @rmtoll CR START LL_DMA2D_Start 00486 * @param DMA2Dx DMA2D Instance 00487 * @retval None 00488 */ 00489 __STATIC_INLINE void LL_DMA2D_Start(DMA2D_TypeDef *DMA2Dx) 00490 { 00491 SET_BIT(DMA2Dx->CR, DMA2D_CR_START); 00492 } 00493 00494 /** 00495 * @brief Indicate if a DMA2D transfer is ongoing. 00496 * @rmtoll CR START LL_DMA2D_IsTransferOngoing 00497 * @param DMA2Dx DMA2D Instance 00498 * @retval State of bit (1 or 0). 00499 */ 00500 __STATIC_INLINE uint32_t LL_DMA2D_IsTransferOngoing(DMA2D_TypeDef *DMA2Dx) 00501 { 00502 return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_START) == (DMA2D_CR_START)) ? 1UL : 0UL); 00503 } 00504 00505 /** 00506 * @brief Suspend DMA2D transfer. 00507 * @note This API can be used to suspend automatic foreground or background CLUT loading. 00508 * @rmtoll CR SUSP LL_DMA2D_Suspend 00509 * @param DMA2Dx DMA2D Instance 00510 * @retval None 00511 */ 00512 __STATIC_INLINE void LL_DMA2D_Suspend(DMA2D_TypeDef *DMA2Dx) 00513 { 00514 MODIFY_REG(DMA2Dx->CR, DMA2D_CR_SUSP | DMA2D_CR_START, DMA2D_CR_SUSP); 00515 } 00516 00517 /** 00518 * @brief Resume DMA2D transfer. 00519 * @note This API can be used to resume automatic foreground or background CLUT loading. 00520 * @rmtoll CR SUSP LL_DMA2D_Resume 00521 * @param DMA2Dx DMA2D Instance 00522 * @retval None 00523 */ 00524 __STATIC_INLINE void LL_DMA2D_Resume(DMA2D_TypeDef *DMA2Dx) 00525 { 00526 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_SUSP | DMA2D_CR_START); 00527 } 00528 00529 /** 00530 * @brief Indicate if DMA2D transfer is suspended. 00531 * @note This API can be used to indicate whether or not automatic foreground or 00532 * background CLUT loading is suspended. 00533 * @rmtoll CR SUSP LL_DMA2D_IsSuspended 00534 * @param DMA2Dx DMA2D Instance 00535 * @retval State of bit (1 or 0). 00536 */ 00537 __STATIC_INLINE uint32_t LL_DMA2D_IsSuspended(DMA2D_TypeDef *DMA2Dx) 00538 { 00539 return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_SUSP) == (DMA2D_CR_SUSP)) ? 1UL : 0UL); 00540 } 00541 00542 /** 00543 * @brief Abort DMA2D transfer. 00544 * @note This API can be used to abort automatic foreground or background CLUT loading. 00545 * @rmtoll CR ABORT LL_DMA2D_Abort 00546 * @param DMA2Dx DMA2D Instance 00547 * @retval None 00548 */ 00549 __STATIC_INLINE void LL_DMA2D_Abort(DMA2D_TypeDef *DMA2Dx) 00550 { 00551 MODIFY_REG(DMA2Dx->CR, DMA2D_CR_ABORT | DMA2D_CR_START, DMA2D_CR_ABORT); 00552 } 00553 00554 /** 00555 * @brief Indicate if DMA2D transfer is aborted. 00556 * @note This API can be used to indicate whether or not automatic foreground or 00557 * background CLUT loading is aborted. 00558 * @rmtoll CR ABORT LL_DMA2D_IsAborted 00559 * @param DMA2Dx DMA2D Instance 00560 * @retval State of bit (1 or 0). 00561 */ 00562 __STATIC_INLINE uint32_t LL_DMA2D_IsAborted(DMA2D_TypeDef *DMA2Dx) 00563 { 00564 return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_ABORT) == (DMA2D_CR_ABORT)) ? 1UL : 0UL); 00565 } 00566 00567 /** 00568 * @brief Set DMA2D mode. 00569 * @rmtoll CR MODE LL_DMA2D_SetMode 00570 * @param DMA2Dx DMA2D Instance 00571 * @param Mode This parameter can be one of the following values: 00572 * @arg @ref LL_DMA2D_MODE_M2M 00573 * @arg @ref LL_DMA2D_MODE_M2M_PFC 00574 * @arg @ref LL_DMA2D_MODE_M2M_BLEND 00575 * @arg @ref LL_DMA2D_MODE_R2M 00576 * @retval None 00577 */ 00578 __STATIC_INLINE void LL_DMA2D_SetMode(DMA2D_TypeDef *DMA2Dx, uint32_t Mode) 00579 { 00580 MODIFY_REG(DMA2Dx->CR, DMA2D_CR_MODE, Mode); 00581 } 00582 00583 /** 00584 * @brief Return DMA2D mode 00585 * @rmtoll CR MODE LL_DMA2D_GetMode 00586 * @param DMA2Dx DMA2D Instance 00587 * @retval Returned value can be one of the following values: 00588 * @arg @ref LL_DMA2D_MODE_M2M 00589 * @arg @ref LL_DMA2D_MODE_M2M_PFC 00590 * @arg @ref LL_DMA2D_MODE_M2M_BLEND 00591 * @arg @ref LL_DMA2D_MODE_R2M 00592 */ 00593 __STATIC_INLINE uint32_t LL_DMA2D_GetMode(DMA2D_TypeDef *DMA2Dx) 00594 { 00595 return (uint32_t)(READ_BIT(DMA2Dx->CR, DMA2D_CR_MODE)); 00596 } 00597 00598 /** 00599 * @brief Set DMA2D output color mode. 00600 * @rmtoll OPFCCR CM LL_DMA2D_SetOutputColorMode 00601 * @param DMA2Dx DMA2D Instance 00602 * @param ColorMode This parameter can be one of the following values: 00603 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB8888 00604 * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB888 00605 * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB565 00606 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB1555 00607 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444 00608 * @retval None 00609 */ 00610 __STATIC_INLINE void LL_DMA2D_SetOutputColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode) 00611 { 00612 MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM, ColorMode); 00613 } 00614 00615 /** 00616 * @brief Return DMA2D output color mode. 00617 * @rmtoll OPFCCR CM LL_DMA2D_GetOutputColorMode 00618 * @param DMA2Dx DMA2D Instance 00619 * @retval Returned value can be one of the following values: 00620 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB8888 00621 * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB888 00622 * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB565 00623 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB1555 00624 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444 00625 */ 00626 __STATIC_INLINE uint32_t LL_DMA2D_GetOutputColorMode(DMA2D_TypeDef *DMA2Dx) 00627 { 00628 return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM)); 00629 } 00630 00631 00632 00633 00634 /** 00635 * @brief Set DMA2D line offset, expressed on 14 bits ([13:0] bits). 00636 * @rmtoll OOR LO LL_DMA2D_SetLineOffset 00637 * @param DMA2Dx DMA2D Instance 00638 * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FFF 00639 * @retval None 00640 */ 00641 __STATIC_INLINE void LL_DMA2D_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset) 00642 { 00643 MODIFY_REG(DMA2Dx->OOR, DMA2D_OOR_LO, LineOffset); 00644 } 00645 00646 /** 00647 * @brief Return DMA2D line offset, expressed on 14 bits ([13:0] bits). 00648 * @rmtoll OOR LO LL_DMA2D_GetLineOffset 00649 * @param DMA2Dx DMA2D Instance 00650 * @retval Line offset value between Min_Data=0 and Max_Data=0x3FFF 00651 */ 00652 __STATIC_INLINE uint32_t LL_DMA2D_GetLineOffset(DMA2D_TypeDef *DMA2Dx) 00653 { 00654 return (uint32_t)(READ_BIT(DMA2Dx->OOR, DMA2D_OOR_LO)); 00655 } 00656 00657 /** 00658 * @brief Set DMA2D number of pixels per lines, expressed on 14 bits ([13:0] bits). 00659 * @rmtoll NLR PL LL_DMA2D_SetNbrOfPixelsPerLines 00660 * @param DMA2Dx DMA2D Instance 00661 * @param NbrOfPixelsPerLines Value between Min_Data=0 and Max_Data=0x3FFF 00662 * @retval None 00663 */ 00664 __STATIC_INLINE void LL_DMA2D_SetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfPixelsPerLines) 00665 { 00666 MODIFY_REG(DMA2Dx->NLR, DMA2D_NLR_PL, (NbrOfPixelsPerLines << DMA2D_NLR_PL_Pos)); 00667 } 00668 00669 /** 00670 * @brief Return DMA2D number of pixels per lines, expressed on 14 bits ([13:0] bits) 00671 * @rmtoll NLR PL LL_DMA2D_GetNbrOfPixelsPerLines 00672 * @param DMA2Dx DMA2D Instance 00673 * @retval Number of pixels per lines value between Min_Data=0 and Max_Data=0x3FFF 00674 */ 00675 __STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx) 00676 { 00677 return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_PL) >> DMA2D_NLR_PL_Pos); 00678 } 00679 00680 /** 00681 * @brief Set DMA2D number of lines, expressed on 16 bits ([15:0] bits). 00682 * @rmtoll NLR NL LL_DMA2D_SetNbrOfLines 00683 * @param DMA2Dx DMA2D Instance 00684 * @param NbrOfLines Value between Min_Data=0 and Max_Data=0xFFFF 00685 * @retval None 00686 */ 00687 __STATIC_INLINE void LL_DMA2D_SetNbrOfLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines) 00688 { 00689 MODIFY_REG(DMA2Dx->NLR, DMA2D_NLR_NL, NbrOfLines); 00690 } 00691 00692 /** 00693 * @brief Return DMA2D number of lines, expressed on 16 bits ([15:0] bits). 00694 * @rmtoll NLR NL LL_DMA2D_GetNbrOfLines 00695 * @param DMA2Dx DMA2D Instance 00696 * @retval Number of lines value between Min_Data=0 and Max_Data=0xFFFF 00697 */ 00698 __STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfLines(DMA2D_TypeDef *DMA2Dx) 00699 { 00700 return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_NL)); 00701 } 00702 00703 /** 00704 * @brief Set DMA2D output memory address, expressed on 32 bits ([31:0] bits). 00705 * @rmtoll OMAR MA LL_DMA2D_SetOutputMemAddr 00706 * @param DMA2Dx DMA2D Instance 00707 * @param OutputMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF 00708 * @retval None 00709 */ 00710 __STATIC_INLINE void LL_DMA2D_SetOutputMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t OutputMemoryAddress) 00711 { 00712 LL_DMA2D_WriteReg(DMA2Dx, OMAR, OutputMemoryAddress); 00713 } 00714 00715 /** 00716 * @brief Get DMA2D output memory address, expressed on 32 bits ([31:0] bits). 00717 * @rmtoll OMAR MA LL_DMA2D_GetOutputMemAddr 00718 * @param DMA2Dx DMA2D Instance 00719 * @retval Output memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF 00720 */ 00721 __STATIC_INLINE uint32_t LL_DMA2D_GetOutputMemAddr(DMA2D_TypeDef *DMA2Dx) 00722 { 00723 return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, OMAR)); 00724 } 00725 00726 /** 00727 * @brief Set DMA2D output color, expressed on 32 bits ([31:0] bits). 00728 * @note Output color format depends on output color mode, ARGB8888, RGB888, 00729 * RGB565, ARGB1555 or ARGB4444. 00730 * @note LL_DMA2D_ConfigOutputColor() API may be used instead if colors values formatting 00731 * with respect to color mode is not done by the user code. 00732 * @rmtoll OCOLR BLUE LL_DMA2D_SetOutputColor\n 00733 * OCOLR GREEN LL_DMA2D_SetOutputColor\n 00734 * OCOLR RED LL_DMA2D_SetOutputColor\n 00735 * OCOLR ALPHA LL_DMA2D_SetOutputColor 00736 * @param DMA2Dx DMA2D Instance 00737 * @param OutputColor Value between Min_Data=0 and Max_Data=0xFFFFFFFF 00738 * @retval None 00739 */ 00740 __STATIC_INLINE void LL_DMA2D_SetOutputColor(DMA2D_TypeDef *DMA2Dx, uint32_t OutputColor) 00741 { 00742 MODIFY_REG(DMA2Dx->OCOLR, (DMA2D_OCOLR_BLUE_1 | DMA2D_OCOLR_GREEN_1 | DMA2D_OCOLR_RED_1 | DMA2D_OCOLR_ALPHA_1), \ 00743 OutputColor); 00744 } 00745 00746 /** 00747 * @brief Get DMA2D output color, expressed on 32 bits ([31:0] bits). 00748 * @note Alpha channel and red, green, blue color values must be retrieved from the returned 00749 * value based on the output color mode (ARGB8888, RGB888, RGB565, ARGB1555 or ARGB4444) 00750 * as set by @ref LL_DMA2D_SetOutputColorMode. 00751 * @rmtoll OCOLR BLUE LL_DMA2D_GetOutputColor\n 00752 * OCOLR GREEN LL_DMA2D_GetOutputColor\n 00753 * OCOLR RED LL_DMA2D_GetOutputColor\n 00754 * OCOLR ALPHA LL_DMA2D_GetOutputColor 00755 * @param DMA2Dx DMA2D Instance 00756 * @retval Output color value between Min_Data=0 and Max_Data=0xFFFFFFFF 00757 */ 00758 __STATIC_INLINE uint32_t LL_DMA2D_GetOutputColor(DMA2D_TypeDef *DMA2Dx) 00759 { 00760 return (uint32_t)(READ_BIT(DMA2Dx->OCOLR, \ 00761 (DMA2D_OCOLR_BLUE_1 | DMA2D_OCOLR_GREEN_1 | DMA2D_OCOLR_RED_1 | DMA2D_OCOLR_ALPHA_1))); 00762 } 00763 00764 /** 00765 * @brief Set DMA2D line watermark, expressed on 16 bits ([15:0] bits). 00766 * @rmtoll LWR LW LL_DMA2D_SetLineWatermark 00767 * @param DMA2Dx DMA2D Instance 00768 * @param LineWatermark Value between Min_Data=0 and Max_Data=0xFFFF 00769 * @retval None 00770 */ 00771 __STATIC_INLINE void LL_DMA2D_SetLineWatermark(DMA2D_TypeDef *DMA2Dx, uint32_t LineWatermark) 00772 { 00773 MODIFY_REG(DMA2Dx->LWR, DMA2D_LWR_LW, LineWatermark); 00774 } 00775 00776 /** 00777 * @brief Return DMA2D line watermark, expressed on 16 bits ([15:0] bits). 00778 * @rmtoll LWR LW LL_DMA2D_GetLineWatermark 00779 * @param DMA2Dx DMA2D Instance 00780 * @retval Line watermark value between Min_Data=0 and Max_Data=0xFFFF 00781 */ 00782 __STATIC_INLINE uint32_t LL_DMA2D_GetLineWatermark(DMA2D_TypeDef *DMA2Dx) 00783 { 00784 return (uint32_t)(READ_BIT(DMA2Dx->LWR, DMA2D_LWR_LW)); 00785 } 00786 00787 /** 00788 * @brief Set DMA2D dead time, expressed on 8 bits ([7:0] bits). 00789 * @rmtoll AMTCR DT LL_DMA2D_SetDeadTime 00790 * @param DMA2Dx DMA2D Instance 00791 * @param DeadTime Value between Min_Data=0 and Max_Data=0xFF 00792 * @retval None 00793 */ 00794 __STATIC_INLINE void LL_DMA2D_SetDeadTime(DMA2D_TypeDef *DMA2Dx, uint32_t DeadTime) 00795 { 00796 MODIFY_REG(DMA2Dx->AMTCR, DMA2D_AMTCR_DT, (DeadTime << DMA2D_AMTCR_DT_Pos)); 00797 } 00798 00799 /** 00800 * @brief Return DMA2D dead time, expressed on 8 bits ([7:0] bits). 00801 * @rmtoll AMTCR DT LL_DMA2D_GetDeadTime 00802 * @param DMA2Dx DMA2D Instance 00803 * @retval Dead time value between Min_Data=0 and Max_Data=0xFF 00804 */ 00805 __STATIC_INLINE uint32_t LL_DMA2D_GetDeadTime(DMA2D_TypeDef *DMA2Dx) 00806 { 00807 return (uint32_t)(READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_DT) >> DMA2D_AMTCR_DT_Pos); 00808 } 00809 00810 /** 00811 * @brief Enable DMA2D dead time functionality. 00812 * @rmtoll AMTCR EN LL_DMA2D_EnableDeadTime 00813 * @param DMA2Dx DMA2D Instance 00814 * @retval None 00815 */ 00816 __STATIC_INLINE void LL_DMA2D_EnableDeadTime(DMA2D_TypeDef *DMA2Dx) 00817 { 00818 SET_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN); 00819 } 00820 00821 /** 00822 * @brief Disable DMA2D dead time functionality. 00823 * @rmtoll AMTCR EN LL_DMA2D_DisableDeadTime 00824 * @param DMA2Dx DMA2D Instance 00825 * @retval None 00826 */ 00827 __STATIC_INLINE void LL_DMA2D_DisableDeadTime(DMA2D_TypeDef *DMA2Dx) 00828 { 00829 CLEAR_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN); 00830 } 00831 00832 /** 00833 * @brief Indicate if DMA2D dead time functionality is enabled. 00834 * @rmtoll AMTCR EN LL_DMA2D_IsEnabledDeadTime 00835 * @param DMA2Dx DMA2D Instance 00836 * @retval State of bit (1 or 0). 00837 */ 00838 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledDeadTime(DMA2D_TypeDef *DMA2Dx) 00839 { 00840 return ((READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN) == (DMA2D_AMTCR_EN)) ? 1UL : 0UL); 00841 } 00842 00843 /** @defgroup DMA2D_LL_EF_FGND_Configuration Foreground Configuration Functions 00844 * @{ 00845 */ 00846 00847 /** 00848 * @brief Set DMA2D foreground memory address, expressed on 32 bits ([31:0] bits). 00849 * @rmtoll FGMAR MA LL_DMA2D_FGND_SetMemAddr 00850 * @param DMA2Dx DMA2D Instance 00851 * @param MemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF 00852 * @retval None 00853 */ 00854 __STATIC_INLINE void LL_DMA2D_FGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress) 00855 { 00856 LL_DMA2D_WriteReg(DMA2Dx, FGMAR, MemoryAddress); 00857 } 00858 00859 /** 00860 * @brief Get DMA2D foreground memory address, expressed on 32 bits ([31:0] bits). 00861 * @rmtoll FGMAR MA LL_DMA2D_FGND_GetMemAddr 00862 * @param DMA2Dx DMA2D Instance 00863 * @retval Foreground memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF 00864 */ 00865 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetMemAddr(DMA2D_TypeDef *DMA2Dx) 00866 { 00867 return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGMAR)); 00868 } 00869 00870 /** 00871 * @brief Enable DMA2D foreground CLUT loading. 00872 * @rmtoll FGPFCCR START LL_DMA2D_FGND_EnableCLUTLoad 00873 * @param DMA2Dx DMA2D Instance 00874 * @retval None 00875 */ 00876 __STATIC_INLINE void LL_DMA2D_FGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx) 00877 { 00878 SET_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START); 00879 } 00880 00881 /** 00882 * @brief Indicate if DMA2D foreground CLUT loading is enabled. 00883 * @rmtoll FGPFCCR START LL_DMA2D_FGND_IsEnabledCLUTLoad 00884 * @param DMA2Dx DMA2D Instance 00885 * @retval State of bit (1 or 0). 00886 */ 00887 __STATIC_INLINE uint32_t LL_DMA2D_FGND_IsEnabledCLUTLoad(DMA2D_TypeDef *DMA2Dx) 00888 { 00889 return ((READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START) == (DMA2D_FGPFCCR_START)) ? 1UL : 0UL); 00890 } 00891 00892 /** 00893 * @brief Set DMA2D foreground color mode. 00894 * @rmtoll FGPFCCR CM LL_DMA2D_FGND_SetColorMode 00895 * @param DMA2Dx DMA2D Instance 00896 * @param ColorMode This parameter can be one of the following values: 00897 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888 00898 * @arg @ref LL_DMA2D_INPUT_MODE_RGB888 00899 * @arg @ref LL_DMA2D_INPUT_MODE_RGB565 00900 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555 00901 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444 00902 * @arg @ref LL_DMA2D_INPUT_MODE_L8 00903 * @arg @ref LL_DMA2D_INPUT_MODE_AL44 00904 * @arg @ref LL_DMA2D_INPUT_MODE_AL88 00905 * @arg @ref LL_DMA2D_INPUT_MODE_L4 00906 * @arg @ref LL_DMA2D_INPUT_MODE_A8 00907 * @arg @ref LL_DMA2D_INPUT_MODE_A4 00908 * @retval None 00909 */ 00910 __STATIC_INLINE void LL_DMA2D_FGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode) 00911 { 00912 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM, ColorMode); 00913 } 00914 00915 /** 00916 * @brief Return DMA2D foreground color mode. 00917 * @rmtoll FGPFCCR CM LL_DMA2D_FGND_GetColorMode 00918 * @param DMA2Dx DMA2D Instance 00919 * @retval Returned value can be one of the following values: 00920 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888 00921 * @arg @ref LL_DMA2D_INPUT_MODE_RGB888 00922 * @arg @ref LL_DMA2D_INPUT_MODE_RGB565 00923 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555 00924 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444 00925 * @arg @ref LL_DMA2D_INPUT_MODE_L8 00926 * @arg @ref LL_DMA2D_INPUT_MODE_AL44 00927 * @arg @ref LL_DMA2D_INPUT_MODE_AL88 00928 * @arg @ref LL_DMA2D_INPUT_MODE_L4 00929 * @arg @ref LL_DMA2D_INPUT_MODE_A8 00930 * @arg @ref LL_DMA2D_INPUT_MODE_A4 00931 */ 00932 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetColorMode(DMA2D_TypeDef *DMA2Dx) 00933 { 00934 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM)); 00935 } 00936 00937 /** 00938 * @brief Set DMA2D foreground alpha mode. 00939 * @rmtoll FGPFCCR AM LL_DMA2D_FGND_SetAlphaMode 00940 * @param DMA2Dx DMA2D Instance 00941 * @param AphaMode This parameter can be one of the following values: 00942 * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF 00943 * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE 00944 * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE 00945 * @retval None 00946 */ 00947 __STATIC_INLINE void LL_DMA2D_FGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode) 00948 { 00949 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM, AphaMode); 00950 } 00951 00952 /** 00953 * @brief Return DMA2D foreground alpha mode. 00954 * @rmtoll FGPFCCR AM LL_DMA2D_FGND_GetAlphaMode 00955 * @param DMA2Dx DMA2D Instance 00956 * @retval Returned value can be one of the following values: 00957 * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF 00958 * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE 00959 * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE 00960 */ 00961 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlphaMode(DMA2D_TypeDef *DMA2Dx) 00962 { 00963 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM)); 00964 } 00965 00966 /** 00967 * @brief Set DMA2D foreground alpha value, expressed on 8 bits ([7:0] bits). 00968 * @rmtoll FGPFCCR ALPHA LL_DMA2D_FGND_SetAlpha 00969 * @param DMA2Dx DMA2D Instance 00970 * @param Alpha Value between Min_Data=0 and Max_Data=0xFF 00971 * @retval None 00972 */ 00973 __STATIC_INLINE void LL_DMA2D_FGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alpha) 00974 { 00975 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA, (Alpha << DMA2D_FGPFCCR_ALPHA_Pos)); 00976 } 00977 00978 /** 00979 * @brief Return DMA2D foreground alpha value, expressed on 8 bits ([7:0] bits). 00980 * @rmtoll FGPFCCR ALPHA LL_DMA2D_FGND_GetAlpha 00981 * @param DMA2Dx DMA2D Instance 00982 * @retval Alpha value between Min_Data=0 and Max_Data=0xFF 00983 */ 00984 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlpha(DMA2D_TypeDef *DMA2Dx) 00985 { 00986 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA) >> DMA2D_FGPFCCR_ALPHA_Pos); 00987 } 00988 00989 00990 /** 00991 * @brief Set DMA2D foreground line offset, expressed on 14 bits ([13:0] bits). 00992 * @rmtoll FGOR LO LL_DMA2D_FGND_SetLineOffset 00993 * @param DMA2Dx DMA2D Instance 00994 * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FF 00995 * @retval None 00996 */ 00997 __STATIC_INLINE void LL_DMA2D_FGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset) 00998 { 00999 MODIFY_REG(DMA2Dx->FGOR, DMA2D_FGOR_LO, LineOffset); 01000 } 01001 01002 /** 01003 * @brief Return DMA2D foreground line offset, expressed on 14 bits ([13:0] bits). 01004 * @rmtoll FGOR LO LL_DMA2D_FGND_GetLineOffset 01005 * @param DMA2Dx DMA2D Instance 01006 * @retval Foreground line offset value between Min_Data=0 and Max_Data=0x3FF 01007 */ 01008 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetLineOffset(DMA2D_TypeDef *DMA2Dx) 01009 { 01010 return (uint32_t)(READ_BIT(DMA2Dx->FGOR, DMA2D_FGOR_LO)); 01011 } 01012 01013 /** 01014 * @brief Set DMA2D foreground color values, expressed on 24 bits ([23:0] bits). 01015 * @rmtoll FGCOLR RED LL_DMA2D_FGND_SetColor 01016 * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_SetColor 01017 * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_SetColor 01018 * @param DMA2Dx DMA2D Instance 01019 * @param Red Value between Min_Data=0 and Max_Data=0xFF 01020 * @param Green Value between Min_Data=0 and Max_Data=0xFF 01021 * @param Blue Value between Min_Data=0 and Max_Data=0xFF 01022 * @retval None 01023 */ 01024 __STATIC_INLINE void LL_DMA2D_FGND_SetColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue) 01025 { 01026 MODIFY_REG(DMA2Dx->FGCOLR, (DMA2D_FGCOLR_RED | DMA2D_FGCOLR_GREEN | DMA2D_FGCOLR_BLUE), \ 01027 ((Red << DMA2D_FGCOLR_RED_Pos) | (Green << DMA2D_FGCOLR_GREEN_Pos) | Blue)); 01028 } 01029 01030 /** 01031 * @brief Set DMA2D foreground red color value, expressed on 8 bits ([7:0] bits). 01032 * @rmtoll FGCOLR RED LL_DMA2D_FGND_SetRedColor 01033 * @param DMA2Dx DMA2D Instance 01034 * @param Red Value between Min_Data=0 and Max_Data=0xFF 01035 * @retval None 01036 */ 01037 __STATIC_INLINE void LL_DMA2D_FGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red) 01038 { 01039 MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_RED, (Red << DMA2D_FGCOLR_RED_Pos)); 01040 } 01041 01042 /** 01043 * @brief Return DMA2D foreground red color value, expressed on 8 bits ([7:0] bits). 01044 * @rmtoll FGCOLR RED LL_DMA2D_FGND_GetRedColor 01045 * @param DMA2Dx DMA2D Instance 01046 * @retval Red color value between Min_Data=0 and Max_Data=0xFF 01047 */ 01048 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetRedColor(DMA2D_TypeDef *DMA2Dx) 01049 { 01050 return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_RED) >> DMA2D_FGCOLR_RED_Pos); 01051 } 01052 01053 /** 01054 * @brief Set DMA2D foreground green color value, expressed on 8 bits ([7:0] bits). 01055 * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_SetGreenColor 01056 * @param DMA2Dx DMA2D Instance 01057 * @param Green Value between Min_Data=0 and Max_Data=0xFF 01058 * @retval None 01059 */ 01060 __STATIC_INLINE void LL_DMA2D_FGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t Green) 01061 { 01062 MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_GREEN, (Green << DMA2D_FGCOLR_GREEN_Pos)); 01063 } 01064 01065 /** 01066 * @brief Return DMA2D foreground green color value, expressed on 8 bits ([7:0] bits). 01067 * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_GetGreenColor 01068 * @param DMA2Dx DMA2D Instance 01069 * @retval Green color value between Min_Data=0 and Max_Data=0xFF 01070 */ 01071 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetGreenColor(DMA2D_TypeDef *DMA2Dx) 01072 { 01073 return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_GREEN) >> DMA2D_FGCOLR_GREEN_Pos); 01074 } 01075 01076 /** 01077 * @brief Set DMA2D foreground blue color value, expressed on 8 bits ([7:0] bits). 01078 * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_SetBlueColor 01079 * @param DMA2Dx DMA2D Instance 01080 * @param Blue Value between Min_Data=0 and Max_Data=0xFF 01081 * @retval None 01082 */ 01083 __STATIC_INLINE void LL_DMA2D_FGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t Blue) 01084 { 01085 MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_BLUE, Blue); 01086 } 01087 01088 /** 01089 * @brief Return DMA2D foreground blue color value, expressed on 8 bits ([7:0] bits). 01090 * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_GetBlueColor 01091 * @param DMA2Dx DMA2D Instance 01092 * @retval Blue color value between Min_Data=0 and Max_Data=0xFF 01093 */ 01094 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetBlueColor(DMA2D_TypeDef *DMA2Dx) 01095 { 01096 return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_BLUE)); 01097 } 01098 01099 /** 01100 * @brief Set DMA2D foreground CLUT memory address, expressed on 32 bits ([31:0] bits). 01101 * @rmtoll FGCMAR MA LL_DMA2D_FGND_SetCLUTMemAddr 01102 * @param DMA2Dx DMA2D Instance 01103 * @param CLUTMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF 01104 * @retval None 01105 */ 01106 __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress) 01107 { 01108 LL_DMA2D_WriteReg(DMA2Dx, FGCMAR, CLUTMemoryAddress); 01109 } 01110 01111 /** 01112 * @brief Get DMA2D foreground CLUT memory address, expressed on 32 bits ([31:0] bits). 01113 * @rmtoll FGCMAR MA LL_DMA2D_FGND_GetCLUTMemAddr 01114 * @param DMA2Dx DMA2D Instance 01115 * @retval Foreground CLUT memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF 01116 */ 01117 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx) 01118 { 01119 return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGCMAR)); 01120 } 01121 01122 /** 01123 * @brief Set DMA2D foreground CLUT size, expressed on 8 bits ([7:0] bits). 01124 * @rmtoll FGPFCCR CS LL_DMA2D_FGND_SetCLUTSize 01125 * @param DMA2Dx DMA2D Instance 01126 * @param CLUTSize Value between Min_Data=0 and Max_Data=0xFF 01127 * @retval None 01128 */ 01129 __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize) 01130 { 01131 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS, (CLUTSize << DMA2D_FGPFCCR_CS_Pos)); 01132 } 01133 01134 /** 01135 * @brief Get DMA2D foreground CLUT size, expressed on 8 bits ([7:0] bits). 01136 * @rmtoll FGPFCCR CS LL_DMA2D_FGND_GetCLUTSize 01137 * @param DMA2Dx DMA2D Instance 01138 * @retval Foreground CLUT size value between Min_Data=0 and Max_Data=0xFF 01139 */ 01140 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTSize(DMA2D_TypeDef *DMA2Dx) 01141 { 01142 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS) >> DMA2D_FGPFCCR_CS_Pos); 01143 } 01144 01145 /** 01146 * @brief Set DMA2D foreground CLUT color mode. 01147 * @rmtoll FGPFCCR CCM LL_DMA2D_FGND_SetCLUTColorMode 01148 * @param DMA2Dx DMA2D Instance 01149 * @param CLUTColorMode This parameter can be one of the following values: 01150 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888 01151 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888 01152 * @retval None 01153 */ 01154 __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode) 01155 { 01156 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CCM, CLUTColorMode); 01157 } 01158 01159 /** 01160 * @brief Return DMA2D foreground CLUT color mode. 01161 * @rmtoll FGPFCCR CCM LL_DMA2D_FGND_GetCLUTColorMode 01162 * @param DMA2Dx DMA2D Instance 01163 * @retval Returned value can be one of the following values: 01164 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888 01165 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888 01166 */ 01167 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx) 01168 { 01169 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CCM)); 01170 } 01171 01172 /** 01173 * @} 01174 */ 01175 01176 /** @defgroup DMA2D_LL_EF_BGND_Configuration Background Configuration Functions 01177 * @{ 01178 */ 01179 01180 /** 01181 * @brief Set DMA2D background memory address, expressed on 32 bits ([31:0] bits). 01182 * @rmtoll BGMAR MA LL_DMA2D_BGND_SetMemAddr 01183 * @param DMA2Dx DMA2D Instance 01184 * @param MemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF 01185 * @retval None 01186 */ 01187 __STATIC_INLINE void LL_DMA2D_BGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress) 01188 { 01189 LL_DMA2D_WriteReg(DMA2Dx, BGMAR, MemoryAddress); 01190 } 01191 01192 /** 01193 * @brief Get DMA2D background memory address, expressed on 32 bits ([31:0] bits). 01194 * @rmtoll BGMAR MA LL_DMA2D_BGND_GetMemAddr 01195 * @param DMA2Dx DMA2D Instance 01196 * @retval Background memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF 01197 */ 01198 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetMemAddr(DMA2D_TypeDef *DMA2Dx) 01199 { 01200 return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGMAR)); 01201 } 01202 01203 /** 01204 * @brief Enable DMA2D background CLUT loading. 01205 * @rmtoll BGPFCCR START LL_DMA2D_BGND_EnableCLUTLoad 01206 * @param DMA2Dx DMA2D Instance 01207 * @retval None 01208 */ 01209 __STATIC_INLINE void LL_DMA2D_BGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx) 01210 { 01211 SET_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_START); 01212 } 01213 01214 /** 01215 * @brief Indicate if DMA2D background CLUT loading is enabled. 01216 * @rmtoll BGPFCCR START LL_DMA2D_BGND_IsEnabledCLUTLoad 01217 * @param DMA2Dx DMA2D Instance 01218 * @retval State of bit (1 or 0). 01219 */ 01220 __STATIC_INLINE uint32_t LL_DMA2D_BGND_IsEnabledCLUTLoad(DMA2D_TypeDef *DMA2Dx) 01221 { 01222 return ((READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_START) == (DMA2D_BGPFCCR_START)) ? 1UL : 0UL); 01223 } 01224 01225 /** 01226 * @brief Set DMA2D background color mode. 01227 * @rmtoll BGPFCCR CM LL_DMA2D_BGND_SetColorMode 01228 * @param DMA2Dx DMA2D Instance 01229 * @param ColorMode This parameter can be one of the following values: 01230 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888 01231 * @arg @ref LL_DMA2D_INPUT_MODE_RGB888 01232 * @arg @ref LL_DMA2D_INPUT_MODE_RGB565 01233 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555 01234 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444 01235 * @arg @ref LL_DMA2D_INPUT_MODE_L8 01236 * @arg @ref LL_DMA2D_INPUT_MODE_AL44 01237 * @arg @ref LL_DMA2D_INPUT_MODE_AL88 01238 * @arg @ref LL_DMA2D_INPUT_MODE_L4 01239 * @arg @ref LL_DMA2D_INPUT_MODE_A8 01240 * @arg @ref LL_DMA2D_INPUT_MODE_A4 01241 * @retval None 01242 */ 01243 __STATIC_INLINE void LL_DMA2D_BGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode) 01244 { 01245 MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CM, ColorMode); 01246 } 01247 01248 /** 01249 * @brief Return DMA2D background color mode. 01250 * @rmtoll BGPFCCR CM LL_DMA2D_BGND_GetColorMode 01251 * @param DMA2Dx DMA2D Instance 01252 * @retval Returned value can be one of the following values: 01253 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888 01254 * @arg @ref LL_DMA2D_INPUT_MODE_RGB888 01255 * @arg @ref LL_DMA2D_INPUT_MODE_RGB565 01256 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555 01257 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444 01258 * @arg @ref LL_DMA2D_INPUT_MODE_L8 01259 * @arg @ref LL_DMA2D_INPUT_MODE_AL44 01260 * @arg @ref LL_DMA2D_INPUT_MODE_AL88 01261 * @arg @ref LL_DMA2D_INPUT_MODE_L4 01262 * @arg @ref LL_DMA2D_INPUT_MODE_A8 01263 * @arg @ref LL_DMA2D_INPUT_MODE_A4 01264 */ 01265 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetColorMode(DMA2D_TypeDef *DMA2Dx) 01266 { 01267 return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CM)); 01268 } 01269 01270 /** 01271 * @brief Set DMA2D background alpha mode. 01272 * @rmtoll BGPFCCR AM LL_DMA2D_BGND_SetAlphaMode 01273 * @param DMA2Dx DMA2D Instance 01274 * @param AphaMode This parameter can be one of the following values: 01275 * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF 01276 * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE 01277 * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE 01278 * @retval None 01279 */ 01280 __STATIC_INLINE void LL_DMA2D_BGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode) 01281 { 01282 MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AM, AphaMode); 01283 } 01284 01285 /** 01286 * @brief Return DMA2D background alpha mode. 01287 * @rmtoll BGPFCCR AM LL_DMA2D_BGND_GetAlphaMode 01288 * @param DMA2Dx DMA2D Instance 01289 * @retval Returned value can be one of the following values: 01290 * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF 01291 * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE 01292 * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE 01293 */ 01294 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlphaMode(DMA2D_TypeDef *DMA2Dx) 01295 { 01296 return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AM)); 01297 } 01298 01299 /** 01300 * @brief Set DMA2D background alpha value, expressed on 8 bits ([7:0] bits). 01301 * @rmtoll BGPFCCR ALPHA LL_DMA2D_BGND_SetAlpha 01302 * @param DMA2Dx DMA2D Instance 01303 * @param Alpha Value between Min_Data=0 and Max_Data=0xFF 01304 * @retval None 01305 */ 01306 __STATIC_INLINE void LL_DMA2D_BGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alpha) 01307 { 01308 MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_ALPHA, (Alpha << DMA2D_BGPFCCR_ALPHA_Pos)); 01309 } 01310 01311 /** 01312 * @brief Return DMA2D background alpha value, expressed on 8 bits ([7:0] bits). 01313 * @rmtoll BGPFCCR ALPHA LL_DMA2D_BGND_GetAlpha 01314 * @param DMA2Dx DMA2D Instance 01315 * @retval Alpha value between Min_Data=0 and Max_Data=0xFF 01316 */ 01317 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlpha(DMA2D_TypeDef *DMA2Dx) 01318 { 01319 return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_ALPHA) >> DMA2D_BGPFCCR_ALPHA_Pos); 01320 } 01321 01322 01323 /** 01324 * @brief Set DMA2D background line offset, expressed on 14 bits ([13:0] bits). 01325 * @rmtoll BGOR LO LL_DMA2D_BGND_SetLineOffset 01326 * @param DMA2Dx DMA2D Instance 01327 * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FF 01328 * @retval None 01329 */ 01330 __STATIC_INLINE void LL_DMA2D_BGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset) 01331 { 01332 MODIFY_REG(DMA2Dx->BGOR, DMA2D_BGOR_LO, LineOffset); 01333 } 01334 01335 /** 01336 * @brief Return DMA2D background line offset, expressed on 14 bits ([13:0] bits). 01337 * @rmtoll BGOR LO LL_DMA2D_BGND_GetLineOffset 01338 * @param DMA2Dx DMA2D Instance 01339 * @retval Background line offset value between Min_Data=0 and Max_Data=0x3FF 01340 */ 01341 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetLineOffset(DMA2D_TypeDef *DMA2Dx) 01342 { 01343 return (uint32_t)(READ_BIT(DMA2Dx->BGOR, DMA2D_BGOR_LO)); 01344 } 01345 01346 /** 01347 * @brief Set DMA2D background color values, expressed on 24 bits ([23:0] bits). 01348 * @rmtoll BGCOLR RED LL_DMA2D_BGND_SetColor 01349 * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_SetColor 01350 * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_SetColor 01351 * @param DMA2Dx DMA2D Instance 01352 * @param Red Value between Min_Data=0 and Max_Data=0xFF 01353 * @param Green Value between Min_Data=0 and Max_Data=0xFF 01354 * @param Blue Value between Min_Data=0 and Max_Data=0xFF 01355 * @retval None 01356 */ 01357 __STATIC_INLINE void LL_DMA2D_BGND_SetColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue) 01358 { 01359 MODIFY_REG(DMA2Dx->BGCOLR, (DMA2D_BGCOLR_RED | DMA2D_BGCOLR_GREEN | DMA2D_BGCOLR_BLUE), \ 01360 ((Red << DMA2D_BGCOLR_RED_Pos) | (Green << DMA2D_BGCOLR_GREEN_Pos) | Blue)); 01361 } 01362 01363 /** 01364 * @brief Set DMA2D background red color value, expressed on 8 bits ([7:0] bits). 01365 * @rmtoll BGCOLR RED LL_DMA2D_BGND_SetRedColor 01366 * @param DMA2Dx DMA2D Instance 01367 * @param Red Value between Min_Data=0 and Max_Data=0xFF 01368 * @retval None 01369 */ 01370 __STATIC_INLINE void LL_DMA2D_BGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red) 01371 { 01372 MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_RED, (Red << DMA2D_BGCOLR_RED_Pos)); 01373 } 01374 01375 /** 01376 * @brief Return DMA2D background red color value, expressed on 8 bits ([7:0] bits). 01377 * @rmtoll BGCOLR RED LL_DMA2D_BGND_GetRedColor 01378 * @param DMA2Dx DMA2D Instance 01379 * @retval Red color value between Min_Data=0 and Max_Data=0xFF 01380 */ 01381 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetRedColor(DMA2D_TypeDef *DMA2Dx) 01382 { 01383 return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_RED) >> DMA2D_BGCOLR_RED_Pos); 01384 } 01385 01386 /** 01387 * @brief Set DMA2D background green color value, expressed on 8 bits ([7:0] bits). 01388 * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_SetGreenColor 01389 * @param DMA2Dx DMA2D Instance 01390 * @param Green Value between Min_Data=0 and Max_Data=0xFF 01391 * @retval None 01392 */ 01393 __STATIC_INLINE void LL_DMA2D_BGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t Green) 01394 { 01395 MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_GREEN, (Green << DMA2D_BGCOLR_GREEN_Pos)); 01396 } 01397 01398 /** 01399 * @brief Return DMA2D background green color value, expressed on 8 bits ([7:0] bits). 01400 * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_GetGreenColor 01401 * @param DMA2Dx DMA2D Instance 01402 * @retval Green color value between Min_Data=0 and Max_Data=0xFF 01403 */ 01404 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetGreenColor(DMA2D_TypeDef *DMA2Dx) 01405 { 01406 return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_GREEN) >> DMA2D_BGCOLR_GREEN_Pos); 01407 } 01408 01409 /** 01410 * @brief Set DMA2D background blue color value, expressed on 8 bits ([7:0] bits). 01411 * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_SetBlueColor 01412 * @param DMA2Dx DMA2D Instance 01413 * @param Blue Value between Min_Data=0 and Max_Data=0xFF 01414 * @retval None 01415 */ 01416 __STATIC_INLINE void LL_DMA2D_BGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t Blue) 01417 { 01418 MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_BLUE, Blue); 01419 } 01420 01421 /** 01422 * @brief Return DMA2D background blue color value, expressed on 8 bits ([7:0] bits). 01423 * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_GetBlueColor 01424 * @param DMA2Dx DMA2D Instance 01425 * @retval Blue color value between Min_Data=0 and Max_Data=0xFF 01426 */ 01427 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetBlueColor(DMA2D_TypeDef *DMA2Dx) 01428 { 01429 return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_BLUE)); 01430 } 01431 01432 /** 01433 * @brief Set DMA2D background CLUT memory address, expressed on 32 bits ([31:0] bits). 01434 * @rmtoll BGCMAR MA LL_DMA2D_BGND_SetCLUTMemAddr 01435 * @param DMA2Dx DMA2D Instance 01436 * @param CLUTMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF 01437 * @retval None 01438 */ 01439 __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress) 01440 { 01441 LL_DMA2D_WriteReg(DMA2Dx, BGCMAR, CLUTMemoryAddress); 01442 } 01443 01444 /** 01445 * @brief Get DMA2D background CLUT memory address, expressed on 32 bits ([31:0] bits). 01446 * @rmtoll BGCMAR MA LL_DMA2D_BGND_GetCLUTMemAddr 01447 * @param DMA2Dx DMA2D Instance 01448 * @retval Background CLUT memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF 01449 */ 01450 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx) 01451 { 01452 return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGCMAR)); 01453 } 01454 01455 /** 01456 * @brief Set DMA2D background CLUT size, expressed on 8 bits ([7:0] bits). 01457 * @rmtoll BGPFCCR CS LL_DMA2D_BGND_SetCLUTSize 01458 * @param DMA2Dx DMA2D Instance 01459 * @param CLUTSize Value between Min_Data=0 and Max_Data=0xFF 01460 * @retval None 01461 */ 01462 __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize) 01463 { 01464 MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CS, (CLUTSize << DMA2D_BGPFCCR_CS_Pos)); 01465 } 01466 01467 /** 01468 * @brief Get DMA2D background CLUT size, expressed on 8 bits ([7:0] bits). 01469 * @rmtoll BGPFCCR CS LL_DMA2D_BGND_GetCLUTSize 01470 * @param DMA2Dx DMA2D Instance 01471 * @retval Background CLUT size value between Min_Data=0 and Max_Data=0xFF 01472 */ 01473 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTSize(DMA2D_TypeDef *DMA2Dx) 01474 { 01475 return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CS) >> DMA2D_BGPFCCR_CS_Pos); 01476 } 01477 01478 /** 01479 * @brief Set DMA2D background CLUT color mode. 01480 * @rmtoll BGPFCCR CCM LL_DMA2D_BGND_SetCLUTColorMode 01481 * @param DMA2Dx DMA2D Instance 01482 * @param CLUTColorMode This parameter can be one of the following values: 01483 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888 01484 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888 01485 * @retval None 01486 */ 01487 __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode) 01488 { 01489 MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CCM, CLUTColorMode); 01490 } 01491 01492 /** 01493 * @brief Return DMA2D background CLUT color mode. 01494 * @rmtoll BGPFCCR CCM LL_DMA2D_BGND_GetCLUTColorMode 01495 * @param DMA2Dx DMA2D Instance 01496 * @retval Returned value can be one of the following values: 01497 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888 01498 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888 01499 */ 01500 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx) 01501 { 01502 return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CCM)); 01503 } 01504 01505 /** 01506 * @} 01507 */ 01508 01509 /** 01510 * @} 01511 */ 01512 01513 01514 /** @defgroup DMA2D_LL_EF_FLAG_MANAGEMENT Flag Management 01515 * @{ 01516 */ 01517 01518 /** 01519 * @brief Check if the DMA2D Configuration Error Interrupt Flag is set or not 01520 * @rmtoll ISR CEIF LL_DMA2D_IsActiveFlag_CE 01521 * @param DMA2Dx DMA2D Instance 01522 * @retval State of bit (1 or 0). 01523 */ 01524 __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CE(DMA2D_TypeDef *DMA2Dx) 01525 { 01526 return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CEIF) == (DMA2D_ISR_CEIF)) ? 1UL : 0UL); 01527 } 01528 01529 /** 01530 * @brief Check if the DMA2D CLUT Transfer Complete Interrupt Flag is set or not 01531 * @rmtoll ISR CTCIF LL_DMA2D_IsActiveFlag_CTC 01532 * @param DMA2Dx DMA2D Instance 01533 * @retval State of bit (1 or 0). 01534 */ 01535 __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CTC(DMA2D_TypeDef *DMA2Dx) 01536 { 01537 return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CTCIF) == (DMA2D_ISR_CTCIF)) ? 1UL : 0UL); 01538 } 01539 01540 /** 01541 * @brief Check if the DMA2D CLUT Access Error Interrupt Flag is set or not 01542 * @rmtoll ISR CAEIF LL_DMA2D_IsActiveFlag_CAE 01543 * @param DMA2Dx DMA2D Instance 01544 * @retval State of bit (1 or 0). 01545 */ 01546 __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CAE(DMA2D_TypeDef *DMA2Dx) 01547 { 01548 return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CAEIF) == (DMA2D_ISR_CAEIF)) ? 1UL : 0UL); 01549 } 01550 01551 /** 01552 * @brief Check if the DMA2D Transfer Watermark Interrupt Flag is set or not 01553 * @rmtoll ISR TWIF LL_DMA2D_IsActiveFlag_TW 01554 * @param DMA2Dx DMA2D Instance 01555 * @retval State of bit (1 or 0). 01556 */ 01557 __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TW(DMA2D_TypeDef *DMA2Dx) 01558 { 01559 return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TWIF) == (DMA2D_ISR_TWIF)) ? 1UL : 0UL); 01560 } 01561 01562 /** 01563 * @brief Check if the DMA2D Transfer Complete Interrupt Flag is set or not 01564 * @rmtoll ISR TCIF LL_DMA2D_IsActiveFlag_TC 01565 * @param DMA2Dx DMA2D Instance 01566 * @retval State of bit (1 or 0). 01567 */ 01568 __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TC(DMA2D_TypeDef *DMA2Dx) 01569 { 01570 return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TCIF) == (DMA2D_ISR_TCIF)) ? 1UL : 0UL); 01571 } 01572 01573 /** 01574 * @brief Check if the DMA2D Transfer Error Interrupt Flag is set or not 01575 * @rmtoll ISR TEIF LL_DMA2D_IsActiveFlag_TE 01576 * @param DMA2Dx DMA2D Instance 01577 * @retval State of bit (1 or 0). 01578 */ 01579 __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TE(DMA2D_TypeDef *DMA2Dx) 01580 { 01581 return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TEIF) == (DMA2D_ISR_TEIF)) ? 1UL : 0UL); 01582 } 01583 01584 /** 01585 * @brief Clear DMA2D Configuration Error Interrupt Flag 01586 * @rmtoll IFCR CCEIF LL_DMA2D_ClearFlag_CE 01587 * @param DMA2Dx DMA2D Instance 01588 * @retval None 01589 */ 01590 __STATIC_INLINE void LL_DMA2D_ClearFlag_CE(DMA2D_TypeDef *DMA2Dx) 01591 { 01592 WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CCEIF); 01593 } 01594 01595 /** 01596 * @brief Clear DMA2D CLUT Transfer Complete Interrupt Flag 01597 * @rmtoll IFCR CCTCIF LL_DMA2D_ClearFlag_CTC 01598 * @param DMA2Dx DMA2D Instance 01599 * @retval None 01600 */ 01601 __STATIC_INLINE void LL_DMA2D_ClearFlag_CTC(DMA2D_TypeDef *DMA2Dx) 01602 { 01603 WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CCTCIF); 01604 } 01605 01606 /** 01607 * @brief Clear DMA2D CLUT Access Error Interrupt Flag 01608 * @rmtoll IFCR CAECIF LL_DMA2D_ClearFlag_CAE 01609 * @param DMA2Dx DMA2D Instance 01610 * @retval None 01611 */ 01612 __STATIC_INLINE void LL_DMA2D_ClearFlag_CAE(DMA2D_TypeDef *DMA2Dx) 01613 { 01614 WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CAECIF); 01615 } 01616 01617 /** 01618 * @brief Clear DMA2D Transfer Watermark Interrupt Flag 01619 * @rmtoll IFCR CTWIF LL_DMA2D_ClearFlag_TW 01620 * @param DMA2Dx DMA2D Instance 01621 * @retval None 01622 */ 01623 __STATIC_INLINE void LL_DMA2D_ClearFlag_TW(DMA2D_TypeDef *DMA2Dx) 01624 { 01625 WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTWIF); 01626 } 01627 01628 /** 01629 * @brief Clear DMA2D Transfer Complete Interrupt Flag 01630 * @rmtoll IFCR CTCIF LL_DMA2D_ClearFlag_TC 01631 * @param DMA2Dx DMA2D Instance 01632 * @retval None 01633 */ 01634 __STATIC_INLINE void LL_DMA2D_ClearFlag_TC(DMA2D_TypeDef *DMA2Dx) 01635 { 01636 WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTCIF); 01637 } 01638 01639 /** 01640 * @brief Clear DMA2D Transfer Error Interrupt Flag 01641 * @rmtoll IFCR CTEIF LL_DMA2D_ClearFlag_TE 01642 * @param DMA2Dx DMA2D Instance 01643 * @retval None 01644 */ 01645 __STATIC_INLINE void LL_DMA2D_ClearFlag_TE(DMA2D_TypeDef *DMA2Dx) 01646 { 01647 WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTEIF); 01648 } 01649 01650 /** 01651 * @} 01652 */ 01653 01654 /** @defgroup DMA2D_LL_EF_IT_MANAGEMENT Interruption Management 01655 * @{ 01656 */ 01657 01658 /** 01659 * @brief Enable Configuration Error Interrupt 01660 * @rmtoll CR CEIE LL_DMA2D_EnableIT_CE 01661 * @param DMA2Dx DMA2D Instance 01662 * @retval None 01663 */ 01664 __STATIC_INLINE void LL_DMA2D_EnableIT_CE(DMA2D_TypeDef *DMA2Dx) 01665 { 01666 SET_BIT(DMA2Dx->CR, DMA2D_CR_CEIE); 01667 } 01668 01669 /** 01670 * @brief Enable CLUT Transfer Complete Interrupt 01671 * @rmtoll CR CTCIE LL_DMA2D_EnableIT_CTC 01672 * @param DMA2Dx DMA2D Instance 01673 * @retval None 01674 */ 01675 __STATIC_INLINE void LL_DMA2D_EnableIT_CTC(DMA2D_TypeDef *DMA2Dx) 01676 { 01677 SET_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE); 01678 } 01679 01680 /** 01681 * @brief Enable CLUT Access Error Interrupt 01682 * @rmtoll CR CAEIE LL_DMA2D_EnableIT_CAE 01683 * @param DMA2Dx DMA2D Instance 01684 * @retval None 01685 */ 01686 __STATIC_INLINE void LL_DMA2D_EnableIT_CAE(DMA2D_TypeDef *DMA2Dx) 01687 { 01688 SET_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE); 01689 } 01690 01691 /** 01692 * @brief Enable Transfer Watermark Interrupt 01693 * @rmtoll CR TWIE LL_DMA2D_EnableIT_TW 01694 * @param DMA2Dx DMA2D Instance 01695 * @retval None 01696 */ 01697 __STATIC_INLINE void LL_DMA2D_EnableIT_TW(DMA2D_TypeDef *DMA2Dx) 01698 { 01699 SET_BIT(DMA2Dx->CR, DMA2D_CR_TWIE); 01700 } 01701 01702 /** 01703 * @brief Enable Transfer Complete Interrupt 01704 * @rmtoll CR TCIE LL_DMA2D_EnableIT_TC 01705 * @param DMA2Dx DMA2D Instance 01706 * @retval None 01707 */ 01708 __STATIC_INLINE void LL_DMA2D_EnableIT_TC(DMA2D_TypeDef *DMA2Dx) 01709 { 01710 SET_BIT(DMA2Dx->CR, DMA2D_CR_TCIE); 01711 } 01712 01713 /** 01714 * @brief Enable Transfer Error Interrupt 01715 * @rmtoll CR TEIE LL_DMA2D_EnableIT_TE 01716 * @param DMA2Dx DMA2D Instance 01717 * @retval None 01718 */ 01719 __STATIC_INLINE void LL_DMA2D_EnableIT_TE(DMA2D_TypeDef *DMA2Dx) 01720 { 01721 SET_BIT(DMA2Dx->CR, DMA2D_CR_TEIE); 01722 } 01723 01724 /** 01725 * @brief Disable Configuration Error Interrupt 01726 * @rmtoll CR CEIE LL_DMA2D_DisableIT_CE 01727 * @param DMA2Dx DMA2D Instance 01728 * @retval None 01729 */ 01730 __STATIC_INLINE void LL_DMA2D_DisableIT_CE(DMA2D_TypeDef *DMA2Dx) 01731 { 01732 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CEIE); 01733 } 01734 01735 /** 01736 * @brief Disable CLUT Transfer Complete Interrupt 01737 * @rmtoll CR CTCIE LL_DMA2D_DisableIT_CTC 01738 * @param DMA2Dx DMA2D Instance 01739 * @retval None 01740 */ 01741 __STATIC_INLINE void LL_DMA2D_DisableIT_CTC(DMA2D_TypeDef *DMA2Dx) 01742 { 01743 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE); 01744 } 01745 01746 /** 01747 * @brief Disable CLUT Access Error Interrupt 01748 * @rmtoll CR CAEIE LL_DMA2D_DisableIT_CAE 01749 * @param DMA2Dx DMA2D Instance 01750 * @retval None 01751 */ 01752 __STATIC_INLINE void LL_DMA2D_DisableIT_CAE(DMA2D_TypeDef *DMA2Dx) 01753 { 01754 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE); 01755 } 01756 01757 /** 01758 * @brief Disable Transfer Watermark Interrupt 01759 * @rmtoll CR TWIE LL_DMA2D_DisableIT_TW 01760 * @param DMA2Dx DMA2D Instance 01761 * @retval None 01762 */ 01763 __STATIC_INLINE void LL_DMA2D_DisableIT_TW(DMA2D_TypeDef *DMA2Dx) 01764 { 01765 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TWIE); 01766 } 01767 01768 /** 01769 * @brief Disable Transfer Complete Interrupt 01770 * @rmtoll CR TCIE LL_DMA2D_DisableIT_TC 01771 * @param DMA2Dx DMA2D Instance 01772 * @retval None 01773 */ 01774 __STATIC_INLINE void LL_DMA2D_DisableIT_TC(DMA2D_TypeDef *DMA2Dx) 01775 { 01776 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TCIE); 01777 } 01778 01779 /** 01780 * @brief Disable Transfer Error Interrupt 01781 * @rmtoll CR TEIE LL_DMA2D_DisableIT_TE 01782 * @param DMA2Dx DMA2D Instance 01783 * @retval None 01784 */ 01785 __STATIC_INLINE void LL_DMA2D_DisableIT_TE(DMA2D_TypeDef *DMA2Dx) 01786 { 01787 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TEIE); 01788 } 01789 01790 /** 01791 * @brief Check if the DMA2D Configuration Error interrupt source is enabled or disabled. 01792 * @rmtoll CR CEIE LL_DMA2D_IsEnabledIT_CE 01793 * @param DMA2Dx DMA2D Instance 01794 * @retval State of bit (1 or 0). 01795 */ 01796 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CE(DMA2D_TypeDef *DMA2Dx) 01797 { 01798 return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_CEIE) == (DMA2D_CR_CEIE)) ? 1UL : 0UL); 01799 } 01800 01801 /** 01802 * @brief Check if the DMA2D CLUT Transfer Complete interrupt source is enabled or disabled. 01803 * @rmtoll CR CTCIE LL_DMA2D_IsEnabledIT_CTC 01804 * @param DMA2Dx DMA2D Instance 01805 * @retval State of bit (1 or 0). 01806 */ 01807 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CTC(DMA2D_TypeDef *DMA2Dx) 01808 { 01809 return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE) == (DMA2D_CR_CTCIE)) ? 1UL : 0UL); 01810 } 01811 01812 /** 01813 * @brief Check if the DMA2D CLUT Access Error interrupt source is enabled or disabled. 01814 * @rmtoll CR CAEIE LL_DMA2D_IsEnabledIT_CAE 01815 * @param DMA2Dx DMA2D Instance 01816 * @retval State of bit (1 or 0). 01817 */ 01818 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CAE(DMA2D_TypeDef *DMA2Dx) 01819 { 01820 return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE) == (DMA2D_CR_CAEIE)) ? 1UL : 0UL); 01821 } 01822 01823 /** 01824 * @brief Check if the DMA2D Transfer Watermark interrupt source is enabled or disabled. 01825 * @rmtoll CR TWIE LL_DMA2D_IsEnabledIT_TW 01826 * @param DMA2Dx DMA2D Instance 01827 * @retval State of bit (1 or 0). 01828 */ 01829 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TW(DMA2D_TypeDef *DMA2Dx) 01830 { 01831 return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TWIE) == (DMA2D_CR_TWIE)) ? 1UL : 0UL); 01832 } 01833 01834 /** 01835 * @brief Check if the DMA2D Transfer Complete interrupt source is enabled or disabled. 01836 * @rmtoll CR TCIE LL_DMA2D_IsEnabledIT_TC 01837 * @param DMA2Dx DMA2D Instance 01838 * @retval State of bit (1 or 0). 01839 */ 01840 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TC(DMA2D_TypeDef *DMA2Dx) 01841 { 01842 return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TCIE) == (DMA2D_CR_TCIE)) ? 1UL : 0UL); 01843 } 01844 01845 /** 01846 * @brief Check if the DMA2D Transfer Error interrupt source is enabled or disabled. 01847 * @rmtoll CR TEIE LL_DMA2D_IsEnabledIT_TE 01848 * @param DMA2Dx DMA2D Instance 01849 * @retval State of bit (1 or 0). 01850 */ 01851 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TE(DMA2D_TypeDef *DMA2Dx) 01852 { 01853 return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TEIE) == (DMA2D_CR_TEIE)) ? 1UL : 0UL); 01854 } 01855 01856 01857 01858 /** 01859 * @} 01860 */ 01861 01862 #if defined(USE_FULL_LL_DRIVER) 01863 /** @defgroup DMA2D_LL_EF_Init_Functions Initialization and De-initialization Functions 01864 * @{ 01865 */ 01866 01867 ErrorStatus LL_DMA2D_DeInit(DMA2D_TypeDef *DMA2Dx); 01868 ErrorStatus LL_DMA2D_Init(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_InitTypeDef *DMA2D_InitStruct); 01869 void LL_DMA2D_StructInit(LL_DMA2D_InitTypeDef *DMA2D_InitStruct); 01870 void LL_DMA2D_ConfigLayer(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg, uint32_t LayerIdx); 01871 void LL_DMA2D_LayerCfgStructInit(LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg); 01872 void LL_DMA2D_ConfigOutputColor(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_ColorTypeDef *DMA2D_ColorStruct); 01873 uint32_t LL_DMA2D_GetOutputBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode); 01874 uint32_t LL_DMA2D_GetOutputGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode); 01875 uint32_t LL_DMA2D_GetOutputRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode); 01876 uint32_t LL_DMA2D_GetOutputAlphaColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode); 01877 void LL_DMA2D_ConfigSize(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines, uint32_t NbrOfPixelsPerLines); 01878 01879 /** 01880 * @} 01881 */ 01882 #endif /* USE_FULL_LL_DRIVER */ 01883 01884 /** 01885 * @} 01886 */ 01887 01888 /** 01889 * @} 01890 */ 01891 01892 #endif /* defined (DMA2D) */ 01893 01894 /** 01895 * @} 01896 */ 01897 01898 #ifdef __cplusplus 01899 } 01900 #endif 01901 01902 #endif /* STM32F4xx_LL_DMA2D_H */ 01903 01904 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/