STM32F479xx HAL User Manual: stm32f4xx_ll

Header file of SYSTEM LL module. More...

#include "stm32f4xx.h"

Defines
#define	LL_SYSCFG_REMAP_FLASH (uint32_t)0x00000000
#define	LL_SYSCFG_REMAP_SYSTEMFLASH SYSCFG_MEMRMP_MEM_MODE_0
#define	LL_SYSCFG_REMAP_FMC SYSCFG_MEMRMP_MEM_MODE_1
#define	LL_SYSCFG_REMAP_SDRAM SYSCFG_MEMRMP_MEM_MODE_2
#define	LL_SYSCFG_REMAP_SRAM (SYSCFG_MEMRMP_MEM_MODE_1 \| SYSCFG_MEMRMP_MEM_MODE_0)
#define	LL_SYSCFG_PMC_ETHMII (uint32_t)0x00000000
#define	LL_SYSCFG_PMC_ETHRMII (uint32_t)SYSCFG_PMC_MII_RMII_SEL
#define	LL_SYSCFG_BANKMODE_BANK1 (uint32_t)0x00000000
#define	LL_SYSCFG_BANKMODE_BANK2 SYSCFG_MEMRMP_UFB_MODE
#define	LL_SYSCFG_EXTI_PORTA (uint32_t)0
#define	LL_SYSCFG_EXTI_PORTB (uint32_t)1
#define	LL_SYSCFG_EXTI_PORTC (uint32_t)2
#define	LL_SYSCFG_EXTI_PORTD (uint32_t)3
#define	LL_SYSCFG_EXTI_PORTE (uint32_t)4
#define	LL_SYSCFG_EXTI_PORTF (uint32_t)5
#define	LL_SYSCFG_EXTI_PORTG (uint32_t)6
#define	LL_SYSCFG_EXTI_PORTH (uint32_t)7
#define	LL_SYSCFG_EXTI_PORTI (uint32_t)8
#define	LL_SYSCFG_EXTI_PORTJ (uint32_t)9
#define	LL_SYSCFG_EXTI_PORTK (uint32_t)10
#define	LL_SYSCFG_EXTI_LINE0 (uint32_t)(0x000FU << 16 \| 0)
#define	LL_SYSCFG_EXTI_LINE1 (uint32_t)(0x00F0U << 16 \| 0)
#define	LL_SYSCFG_EXTI_LINE2 (uint32_t)(0x0F00U << 16 \| 0)
#define	LL_SYSCFG_EXTI_LINE3 (uint32_t)(0xF000U << 16 \| 0)
#define	LL_SYSCFG_EXTI_LINE4 (uint32_t)(0x000FU << 16 \| 1)
#define	LL_SYSCFG_EXTI_LINE5 (uint32_t)(0x00F0U << 16 \| 1)
#define	LL_SYSCFG_EXTI_LINE6 (uint32_t)(0x0F00U << 16 \| 1)
#define	LL_SYSCFG_EXTI_LINE7 (uint32_t)(0xF000U << 16 \| 1)
#define	LL_SYSCFG_EXTI_LINE8 (uint32_t)(0x000FU << 16 \| 2)
#define	LL_SYSCFG_EXTI_LINE9 (uint32_t)(0x00F0U << 16 \| 2)
#define	LL_SYSCFG_EXTI_LINE10 (uint32_t)(0x0F00U << 16 \| 2)
#define	LL_SYSCFG_EXTI_LINE11 (uint32_t)(0xF000U << 16 \| 2)
#define	LL_SYSCFG_EXTI_LINE12 (uint32_t)(0x000FU << 16 \| 3)
#define	LL_SYSCFG_EXTI_LINE13 (uint32_t)(0x00F0U << 16 \| 3)
#define	LL_SYSCFG_EXTI_LINE14 (uint32_t)(0x0F00U << 16 \| 3)
#define	LL_SYSCFG_EXTI_LINE15 (uint32_t)(0xF000U << 16 \| 3)
#define	LL_DBGMCU_TRACE_NONE 0x00000000U
#define	LL_DBGMCU_TRACE_ASYNCH DBGMCU_CR_TRACE_IOEN
#define	LL_DBGMCU_TRACE_SYNCH_SIZE1 (DBGMCU_CR_TRACE_IOEN \| DBGMCU_CR_TRACE_MODE_0)
#define	LL_DBGMCU_TRACE_SYNCH_SIZE2 (DBGMCU_CR_TRACE_IOEN \| DBGMCU_CR_TRACE_MODE_1)
#define	LL_DBGMCU_TRACE_SYNCH_SIZE4 (DBGMCU_CR_TRACE_IOEN \| DBGMCU_CR_TRACE_MODE)
#define	LL_DBGMCU_APB1_GRP1_TIM2_STOP DBGMCU_APB1_FZ_DBG_TIM2_STOP
#define	LL_DBGMCU_APB1_GRP1_TIM3_STOP DBGMCU_APB1_FZ_DBG_TIM3_STOP
#define	LL_DBGMCU_APB1_GRP1_TIM4_STOP DBGMCU_APB1_FZ_DBG_TIM4_STOP
#define	LL_DBGMCU_APB1_GRP1_TIM5_STOP DBGMCU_APB1_FZ_DBG_TIM5_STOP
#define	LL_DBGMCU_APB1_GRP1_TIM6_STOP DBGMCU_APB1_FZ_DBG_TIM6_STOP
#define	LL_DBGMCU_APB1_GRP1_TIM7_STOP DBGMCU_APB1_FZ_DBG_TIM7_STOP
#define	LL_DBGMCU_APB1_GRP1_TIM12_STOP DBGMCU_APB1_FZ_DBG_TIM12_STOP
#define	LL_DBGMCU_APB1_GRP1_TIM13_STOP DBGMCU_APB1_FZ_DBG_TIM13_STOP
#define	LL_DBGMCU_APB1_GRP1_TIM14_STOP DBGMCU_APB1_FZ_DBG_TIM14_STOP
#define	LL_DBGMCU_APB1_GRP1_RTC_STOP DBGMCU_APB1_FZ_DBG_RTC_STOP
#define	LL_DBGMCU_APB1_GRP1_WWDG_STOP DBGMCU_APB1_FZ_DBG_WWDG_STOP
#define	LL_DBGMCU_APB1_GRP1_IWDG_STOP DBGMCU_APB1_FZ_DBG_IWDG_STOP
#define	LL_DBGMCU_APB1_GRP1_I2C1_STOP DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT
#define	LL_DBGMCU_APB1_GRP1_I2C2_STOP DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT
#define	LL_DBGMCU_APB1_GRP1_I2C3_STOP DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT
#define	LL_DBGMCU_APB1_GRP1_I2C4_STOP DBGMCU_APB1_FZ_DBG_I2C4_SMBUS_TIMEOUT
#define	LL_DBGMCU_APB1_GRP1_CAN1_STOP DBGMCU_APB1_FZ_DBG_CAN1_STOP
#define	LL_DBGMCU_APB1_GRP1_CAN2_STOP DBGMCU_APB1_FZ_DBG_CAN2_STOP
#define	LL_DBGMCU_APB2_GRP1_TIM1_STOP DBGMCU_APB2_FZ_DBG_TIM1_STOP
#define	LL_DBGMCU_APB2_GRP1_TIM8_STOP DBGMCU_APB2_FZ_DBG_TIM8_STOP
#define	LL_DBGMCU_APB2_GRP1_TIM9_STOP DBGMCU_APB2_FZ_DBG_TIM9_STOP
#define	LL_DBGMCU_APB2_GRP1_TIM10_STOP DBGMCU_APB2_FZ_DBG_TIM10_STOP
#define	LL_DBGMCU_APB2_GRP1_TIM11_STOP DBGMCU_APB2_FZ_DBG_TIM11_STOP
#define	LL_FLASH_LATENCY_0 FLASH_ACR_LATENCY_0WS
#define	LL_FLASH_LATENCY_1 FLASH_ACR_LATENCY_1WS
#define	LL_FLASH_LATENCY_2 FLASH_ACR_LATENCY_2WS
#define	LL_FLASH_LATENCY_3 FLASH_ACR_LATENCY_3WS
#define	LL_FLASH_LATENCY_4 FLASH_ACR_LATENCY_4WS
#define	LL_FLASH_LATENCY_5 FLASH_ACR_LATENCY_5WS
#define	LL_FLASH_LATENCY_6 FLASH_ACR_LATENCY_6WS
#define	LL_FLASH_LATENCY_7 FLASH_ACR_LATENCY_7WS
#define	LL_FLASH_LATENCY_8 FLASH_ACR_LATENCY_8WS
#define	LL_FLASH_LATENCY_9 FLASH_ACR_LATENCY_9WS
#define	LL_FLASH_LATENCY_10 FLASH_ACR_LATENCY_10WS
#define	LL_FLASH_LATENCY_11 FLASH_ACR_LATENCY_11WS
#define	LL_FLASH_LATENCY_12 FLASH_ACR_LATENCY_12WS
#define	LL_FLASH_LATENCY_13 FLASH_ACR_LATENCY_13WS
#define	LL_FLASH_LATENCY_14 FLASH_ACR_LATENCY_14WS
#define	LL_FLASH_LATENCY_15 FLASH_ACR_LATENCY_15WS
Functions
__STATIC_INLINE void	LL_SYSCFG_SetRemapMemory (uint32_t Memory)
	Set memory mapping at address 0x00000000.
__STATIC_INLINE uint32_t	LL_SYSCFG_GetRemapMemory (void)
	Get memory mapping at address 0x00000000.
__STATIC_INLINE void	LL_SYSCFG_EnableFMCMemorySwapping (void)
	Enables the FMC Memory Mapping Swapping.
__STATIC_INLINE void	LL_SYSCFG_DisableFMCMemorySwapping (void)
	Disables the FMC Memory Mapping Swapping.
__STATIC_INLINE void	LL_SYSCFG_EnableCompensationCell (void)
	Enables the Compensation cell Power Down.
__STATIC_INLINE void	LL_SYSCFG_DisableCompensationCell (void)
	Disables the Compensation cell Power Down.
__STATIC_INLINE uint32_t	LL_SYSCFG_IsActiveFlag_CMPCR (void)
	Get Compensation Cell ready Flag.
__STATIC_INLINE void	LL_SYSCFG_SetPHYInterface (uint32_t Interface)
	Select Ethernet PHY interface.
__STATIC_INLINE uint32_t	LL_SYSCFG_GetPHYInterface (void)
	Get Ethernet PHY interface.
__STATIC_INLINE void	LL_SYSCFG_SetFlashBankMode (uint32_t Bank)
	Select Flash bank mode (Bank flashed at 0x08000000)
__STATIC_INLINE uint32_t	LL_SYSCFG_GetFlashBankMode (void)
	Get Flash bank mode (Bank flashed at 0x08000000)
__STATIC_INLINE void	LL_SYSCFG_SetEXTISource (uint32_t Port, uint32_t Line)
	Configure source input for the EXTI external interrupt.
__STATIC_INLINE uint32_t	LL_SYSCFG_GetEXTISource (uint32_t Line)
	Get the configured defined for specific EXTI Line.
__STATIC_INLINE uint32_t	LL_DBGMCU_GetDeviceID (void)
	Return the device identifier.
__STATIC_INLINE uint32_t	LL_DBGMCU_GetRevisionID (void)
	Return the device revision identifier.
__STATIC_INLINE void	LL_DBGMCU_EnableDBGSleepMode (void)
	Enable the Debug Module during SLEEP mode.
__STATIC_INLINE void	LL_DBGMCU_DisableDBGSleepMode (void)
	Disable the Debug Module during SLEEP mode.
__STATIC_INLINE void	LL_DBGMCU_EnableDBGStopMode (void)
	Enable the Debug Module during STOP mode.
__STATIC_INLINE void	LL_DBGMCU_DisableDBGStopMode (void)
	Disable the Debug Module during STOP mode.
__STATIC_INLINE void	LL_DBGMCU_EnableDBGStandbyMode (void)
	Enable the Debug Module during STANDBY mode.
__STATIC_INLINE void	LL_DBGMCU_DisableDBGStandbyMode (void)
	Disable the Debug Module during STANDBY mode.
__STATIC_INLINE void	LL_DBGMCU_SetTracePinAssignment (uint32_t PinAssignment)
	Set Trace pin assignment control.
__STATIC_INLINE uint32_t	LL_DBGMCU_GetTracePinAssignment (void)
	Get Trace pin assignment control.
__STATIC_INLINE void	LL_DBGMCU_APB1_GRP1_FreezePeriph (uint32_t Periphs)
	Freeze APB1 peripherals (group1 peripherals)
__STATIC_INLINE void	LL_DBGMCU_APB1_GRP1_UnFreezePeriph (uint32_t Periphs)
	Unfreeze APB1 peripherals (group1 peripherals)
__STATIC_INLINE void	LL_DBGMCU_APB2_GRP1_FreezePeriph (uint32_t Periphs)
	Freeze APB2 peripherals.
__STATIC_INLINE void	LL_DBGMCU_APB2_GRP1_UnFreezePeriph (uint32_t Periphs)
	Unfreeze APB2 peripherals.
__STATIC_INLINE void	LL_FLASH_SetLatency (uint32_t Latency)
	Set FLASH Latency.
__STATIC_INLINE uint32_t	LL_FLASH_GetLatency (void)
	Get FLASH Latency.
__STATIC_INLINE void	LL_FLASH_EnablePrefetch (void)
	Enable Prefetch.
__STATIC_INLINE void	LL_FLASH_DisablePrefetch (void)
	Disable Prefetch.
__STATIC_INLINE uint32_t	LL_FLASH_IsPrefetchEnabled (void)
	Check if Prefetch buffer is enabled.
__STATIC_INLINE void	LL_FLASH_EnableInstCache (void)
	Enable Instruction cache.
__STATIC_INLINE void	LL_FLASH_DisableInstCache (void)
	Disable Instruction cache.
__STATIC_INLINE void	LL_FLASH_EnableDataCache (void)
	Enable Data cache.
__STATIC_INLINE void	LL_FLASH_DisableDataCache (void)
	Disable Data cache.
__STATIC_INLINE void	LL_FLASH_EnableInstCacheReset (void)
	Enable Instruction cache reset.
__STATIC_INLINE void	LL_FLASH_DisableInstCacheReset (void)
	Disable Instruction cache reset.
__STATIC_INLINE void	LL_FLASH_EnableDataCacheReset (void)
	Enable Data cache reset.
__STATIC_INLINE void	LL_FLASH_DisableDataCacheReset (void)
	Disable Data cache reset.

Detailed Description

Header file of SYSTEM LL module.

Author:

MCD Application Team

  ==============================================================================
                     ##### How to use this driver #####
  ==============================================================================
    [..]
    The LL SYSTEM driver contains a set of generic APIs that can be
    used by user:
      (+) Some of the FLASH features need to be handled in the SYSTEM file.
      (+) Access to DBGCMU registers
      (+) Access to SYSCFG registers

Attention:

This software component is licensed by ST under BSD 3-Clause license, the "License"; You may not use this file except in compliance with the License. You may obtain a copy of the License at: opensource.org/licenses/BSD-3-Clause

Definition in file stm32f4xx_ll_system.h.

Defines

Functions

Detailed Description

© Copyright (c) 2017 STMicroelectronics. All rights reserved.