STM32H735xx HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32h7xx_hal_dac.c 00004 * @author MCD Application Team 00005 * @brief DAC HAL module driver. 00006 * This file provides firmware functions to manage the following 00007 * functionalities of the Digital to Analog Converter (DAC) peripheral: 00008 * + Initialization and de-initialization functions 00009 * + IO operation functions 00010 * + Peripheral Control functions 00011 * + Peripheral State and Errors functions 00012 * 00013 * 00014 ****************************************************************************** 00015 * @attention 00016 * 00017 * Copyright (c) 2017 STMicroelectronics. 00018 * All rights reserved. 00019 * 00020 * This software is licensed under terms that can be found in the LICENSE file 00021 * in the root directory of this software component. 00022 * If no LICENSE file comes with this software, it is provided AS-IS. 00023 * 00024 ****************************************************************************** 00025 @verbatim 00026 ============================================================================== 00027 ##### DAC Peripheral features ##### 00028 ============================================================================== 00029 [..] 00030 *** DAC Channels *** 00031 ==================== 00032 [..] 00033 STM32H7 devices integrate two 12-bit Digital Analog Converters 00034 00035 The 2 converters (i.e. channel1 & channel2) 00036 can be used independently or simultaneously (dual mode): 00037 (#) DAC channel1 with DAC_OUT1 (PA4) as output or connected to on-chip 00038 peripherals (ex. OPAMPs, comparators). 00039 (#) DAC channel2 with DAC_OUT2 (PA5) as output or connected to on-chip 00040 peripherals (ex. OPAMPs, comparators). 00041 00042 *** DAC Triggers *** 00043 ==================== 00044 [..] 00045 Digital to Analog conversion can be non-triggered using DAC_TRIGGER_NONE 00046 and DAC_OUT1/DAC_OUT2 is available once writing to DHRx register. 00047 [..] 00048 Digital to Analog conversion can be triggered by: 00049 (#) External event: EXTI Line 9 (any GPIOx_PIN_9) using DAC_TRIGGER_EXT_IT9. 00050 The used pin (GPIOx_PIN_9) must be configured in input mode. 00051 00052 (#) Timers TRGO: TIM1, TIM2, TIM4, TIM5, TIM6, TIM7, TIM8, TIM15, TIM23 and TIM24 00053 (DAC_TRIGGER_T1_TRGO, DAC_TRIGGER_T2_TRGO...) 00054 00055 (#) Low Power Timers TRGO: LPTIM1, LPTIM2 and LPTIM3 00056 (DAC_TRIGGER_LPTIM1_OUT, DAC_TRIGGER_LPTIM2_OUT) 00057 00058 (#) High Resolution Timer TRGO: HRTIM1 00059 (DAC_TRIGGER_HR1_TRGO1, DAC_TRIGGER_HR1_TRGO2) 00060 00061 (#) Software using DAC_TRIGGER_SOFTWARE 00062 00063 *** DAC Buffer mode feature *** 00064 =============================== 00065 [..] 00066 Each DAC channel integrates an output buffer that can be used to 00067 reduce the output impedance, and to drive external loads directly 00068 without having to add an external operational amplifier. 00069 To enable, the output buffer use 00070 sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE; 00071 [..] 00072 (@) Refer to the device datasheet for more details about output 00073 impedance value with and without output buffer. 00074 00075 *** GPIO configurations guidelines *** 00076 ===================== 00077 [..] 00078 When a DAC channel is used (ex channel1 on PA4) and the other is not 00079 (ex channel2 on PA5 is configured in Analog and disabled). 00080 Channel1 may disturb channel2 as coupling effect. 00081 Note that there is no coupling on channel2 as soon as channel2 is turned on. 00082 Coupling on adjacent channel could be avoided as follows: 00083 when unused PA5 is configured as INPUT PULL-UP or DOWN. 00084 PA5 is configured in ANALOG just before it is turned on. 00085 00086 *** DAC Sample and Hold feature *** 00087 ======================== 00088 [..] 00089 For each converter, 2 modes are supported: normal mode and 00090 "sample and hold" mode (i.e. low power mode). 00091 In the sample and hold mode, the DAC core converts data, then holds the 00092 converted voltage on a capacitor. When not converting, the DAC cores and 00093 buffer are completely turned off between samples and the DAC output is 00094 tri-stated, therefore reducing the overall power consumption. A new 00095 stabilization period is needed before each new conversion. 00096 00097 The sample and hold allow setting internal or external voltage @ 00098 low power consumption cost (output value can be at any given rate either 00099 by CPU or DMA). 00100 00101 The Sample and hold block and registers uses either LSI & run in 00102 several power modes: run mode, sleep mode, low power run, low power sleep 00103 mode & stop1 mode. 00104 00105 Low power stop1 mode allows only static conversion. 00106 00107 To enable Sample and Hold mode 00108 Enable LSI using HAL_RCC_OscConfig with RCC_OSCILLATORTYPE_LSI & 00109 RCC_LSI_ON parameters. 00110 00111 Use DAC_InitStructure.DAC_SampleAndHold = DAC_SAMPLEANDHOLD_ENABLE; 00112 & DAC_ChannelConfTypeDef.DAC_SampleAndHoldConfig.DAC_SampleTime, 00113 DAC_HoldTime & DAC_RefreshTime; 00114 00115 *** DAC calibration feature *** 00116 =================================== 00117 [..] 00118 (#) The 2 converters (channel1 & channel2) provide calibration capabilities. 00119 (++) Calibration aims at correcting some offset of output buffer. 00120 (++) The DAC uses either factory calibration settings OR user defined 00121 calibration (trimming) settings (i.e. trimming mode). 00122 (++) The user defined settings can be figured out using self calibration 00123 handled by HAL_DACEx_SelfCalibrate. 00124 (++) HAL_DACEx_SelfCalibrate: 00125 (+++) Runs automatically the calibration. 00126 (+++) Enables the user trimming mode 00127 (+++) Updates a structure with trimming values with fresh calibration 00128 results. 00129 The user may store the calibration results for larger 00130 (ex monitoring the trimming as a function of temperature 00131 for instance) 00132 00133 *** DAC wave generation feature *** 00134 =================================== 00135 [..] 00136 Both DAC channels can be used to generate 00137 (#) Noise wave 00138 (#) Triangle wave 00139 00140 *** DAC data format *** 00141 ======================= 00142 [..] 00143 The DAC data format can be: 00144 (#) 8-bit right alignment using DAC_ALIGN_8B_R 00145 (#) 12-bit left alignment using DAC_ALIGN_12B_L 00146 (#) 12-bit right alignment using DAC_ALIGN_12B_R 00147 00148 *** DAC data value to voltage correspondence *** 00149 ================================================ 00150 [..] 00151 The analog output voltage on each DAC channel pin is determined 00152 by the following equation: 00153 [..] 00154 DAC_OUTx = VREF+ * DOR / 4095 00155 (+) with DOR is the Data Output Register 00156 [..] 00157 VREF+ is the input voltage reference (refer to the device datasheet) 00158 [..] 00159 e.g. To set DAC_OUT1 to 0.7V, use 00160 (+) Assuming that VREF+ = 3.3V, DAC_OUT1 = (3.3 * 868) / 4095 = 0.7V 00161 00162 *** DMA requests *** 00163 ===================== 00164 [..] 00165 A DMA request can be generated when an external trigger (but not a software trigger) 00166 occurs if DMA requests are enabled using HAL_DAC_Start_DMA(). 00167 DMA requests are mapped as following: 00168 (#) DAC channel1: mapped on DMA_REQUEST_DAC1_CH1 00169 (#) DAC channel2: mapped on DMA_REQUEST_DAC1_CH2 00170 00171 [..] 00172 (@) For Dual mode and specific signal (Triangle and noise) generation please 00173 refer to Extended Features Driver description 00174 00175 ##### How to use this driver ##### 00176 ============================================================================== 00177 [..] 00178 (+) DAC APB clock must be enabled to get write access to DAC 00179 registers using HAL_DAC_Init() 00180 (+) Configure DAC_OUTx (DAC_OUT1: PA4, DAC_OUT2: PA5) in analog mode. 00181 (+) Configure the DAC channel using HAL_DAC_ConfigChannel() function. 00182 (+) Enable the DAC channel using HAL_DAC_Start() or HAL_DAC_Start_DMA() functions. 00183 00184 *** Calibration mode IO operation *** 00185 ====================================== 00186 [..] 00187 (+) Retrieve the factory trimming (calibration settings) using HAL_DACEx_GetTrimOffset() 00188 (+) Run the calibration using HAL_DACEx_SelfCalibrate() 00189 (+) Update the trimming while DAC running using HAL_DACEx_SetUserTrimming() 00190 00191 *** Polling mode IO operation *** 00192 ================================= 00193 [..] 00194 (+) Start the DAC peripheral using HAL_DAC_Start() 00195 (+) To read the DAC last data output value, use the HAL_DAC_GetValue() function. 00196 (+) Stop the DAC peripheral using HAL_DAC_Stop() 00197 00198 *** DMA mode IO operation *** 00199 ============================== 00200 [..] 00201 (+) Start the DAC peripheral using HAL_DAC_Start_DMA(), at this stage the user specify the length 00202 of data to be transferred at each end of conversion 00203 First issued trigger will start the conversion of the value previously set by HAL_DAC_SetValue(). 00204 (+) At the middle of data transfer HAL_DAC_ConvHalfCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2() 00205 function is executed and user can add his own code by customization of function pointer 00206 HAL_DAC_ConvHalfCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2() 00207 (+) At The end of data transfer HAL_DAC_ConvCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2() 00208 function is executed and user can add his own code by customization of function pointer 00209 HAL_DAC_ConvCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2() 00210 (+) In case of transfer Error, HAL_DAC_ErrorCallbackCh1() function is executed and user can 00211 add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1 00212 (+) In case of DMA underrun, DAC interruption triggers and execute internal function HAL_DAC_IRQHandler. 00213 HAL_DAC_DMAUnderrunCallbackCh1() or HAL_DACEx_DMAUnderrunCallbackCh2() 00214 function is executed and user can add his own code by customization of function pointer 00215 HAL_DAC_DMAUnderrunCallbackCh1() or HAL_DACEx_DMAUnderrunCallbackCh2() and 00216 add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1() 00217 (+) Stop the DAC peripheral using HAL_DAC_Stop_DMA() 00218 00219 *** Callback registration *** 00220 ============================================= 00221 [..] 00222 The compilation define USE_HAL_DAC_REGISTER_CALLBACKS when set to 1 00223 allows the user to configure dynamically the driver callbacks. 00224 00225 Use Functions HAL_DAC_RegisterCallback() to register a user callback, 00226 it allows to register following callbacks: 00227 (+) ConvCpltCallbackCh1 : callback when a half transfer is completed on Ch1. 00228 (+) ConvHalfCpltCallbackCh1 : callback when a transfer is completed on Ch1. 00229 (+) ErrorCallbackCh1 : callback when an error occurs on Ch1. 00230 (+) DMAUnderrunCallbackCh1 : callback when an underrun error occurs on Ch1. 00231 (+) ConvCpltCallbackCh2 : callback when a half transfer is completed on Ch2. 00232 (+) ConvHalfCpltCallbackCh2 : callback when a transfer is completed on Ch2. 00233 (+) ErrorCallbackCh2 : callback when an error occurs on Ch2. 00234 (+) DMAUnderrunCallbackCh2 : callback when an underrun error occurs on Ch2. 00235 (+) MspInitCallback : DAC MspInit. 00236 (+) MspDeInitCallback : DAC MspdeInit. 00237 This function takes as parameters the HAL peripheral handle, the Callback ID 00238 and a pointer to the user callback function. 00239 00240 Use function HAL_DAC_UnRegisterCallback() to reset a callback to the default 00241 weak (surcharged) function. It allows to reset following callbacks: 00242 (+) ConvCpltCallbackCh1 : callback when a half transfer is completed on Ch1. 00243 (+) ConvHalfCpltCallbackCh1 : callback when a transfer is completed on Ch1. 00244 (+) ErrorCallbackCh1 : callback when an error occurs on Ch1. 00245 (+) DMAUnderrunCallbackCh1 : callback when an underrun error occurs on Ch1. 00246 (+) ConvCpltCallbackCh2 : callback when a half transfer is completed on Ch2. 00247 (+) ConvHalfCpltCallbackCh2 : callback when a transfer is completed on Ch2. 00248 (+) ErrorCallbackCh2 : callback when an error occurs on Ch2. 00249 (+) DMAUnderrunCallbackCh2 : callback when an underrun error occurs on Ch2. 00250 (+) MspInitCallback : DAC MspInit. 00251 (+) MspDeInitCallback : DAC MspdeInit. 00252 (+) All Callbacks 00253 This function) takes as parameters the HAL peripheral handle and the Callback ID. 00254 00255 By default, after the HAL_DAC_Init and if the state is HAL_DAC_STATE_RESET 00256 all callbacks are reset to the corresponding legacy weak (surcharged) functions. 00257 Exception done for MspInit and MspDeInit callbacks that are respectively 00258 reset to the legacy weak (surcharged) functions in the HAL_DAC_Init 00259 and HAL_DAC_DeInit only when these callbacks are null (not registered beforehand). 00260 If not, MspInit or MspDeInit are not null, the HAL_DAC_Init and HAL_DAC_DeInit 00261 keep and use the user MspInit/MspDeInit callbacks (registered beforehand) 00262 00263 Callbacks can be registered/unregistered in READY state only. 00264 Exception done for MspInit/MspDeInit callbacks that can be registered/unregistered 00265 in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used 00266 during the Init/DeInit. 00267 In that case first register the MspInit/MspDeInit user callbacks 00268 using HAL_DAC_RegisterCallback before calling HAL_DAC_DeInit 00269 or HAL_DAC_Init function. 00270 00271 When The compilation define USE_HAL_DAC_REGISTER_CALLBACKS is set to 0 or 00272 not defined, the callback registering feature is not available 00273 and weak (surcharged) callbacks are used. 00274 00275 *** DAC HAL driver macros list *** 00276 ============================================= 00277 [..] 00278 Below the list of most used macros in DAC HAL driver. 00279 00280 (+) __HAL_DAC_ENABLE : Enable the DAC peripheral 00281 (+) __HAL_DAC_DISABLE : Disable the DAC peripheral 00282 (+) __HAL_DAC_CLEAR_FLAG: Clear the DAC's pending flags 00283 (+) __HAL_DAC_GET_FLAG: Get the selected DAC's flag status 00284 00285 [..] 00286 (@) You can refer to the DAC HAL driver header file for more useful macros 00287 00288 @endverbatim 00289 ****************************************************************************** 00290 */ 00291 00292 /* Includes ------------------------------------------------------------------*/ 00293 #include "stm32h7xx_hal.h" 00294 00295 /** @addtogroup STM32H7xx_HAL_Driver 00296 * @{ 00297 */ 00298 00299 #ifdef HAL_DAC_MODULE_ENABLED 00300 #if defined(DAC1) || defined(DAC2) 00301 00302 /** @defgroup DAC DAC 00303 * @brief DAC driver modules 00304 * @{ 00305 */ 00306 00307 /* Private typedef -----------------------------------------------------------*/ 00308 /* Private define ------------------------------------------------------------*/ 00309 /* Private constants ---------------------------------------------------------*/ 00310 /** @addtogroup DAC_Private_Constants DAC Private Constants 00311 * @{ 00312 */ 00313 #define TIMEOUT_DAC_CALIBCONFIG 1U /* 1 ms */ 00314 00315 /** 00316 * @} 00317 */ 00318 00319 /* Private macro -------------------------------------------------------------*/ 00320 /* Private variables ---------------------------------------------------------*/ 00321 /* Private function prototypes -----------------------------------------------*/ 00322 /* Exported functions -------------------------------------------------------*/ 00323 00324 /** @defgroup DAC_Exported_Functions DAC Exported Functions 00325 * @{ 00326 */ 00327 00328 /** @defgroup DAC_Exported_Functions_Group1 Initialization and de-initialization functions 00329 * @brief Initialization and Configuration functions 00330 * 00331 @verbatim 00332 ============================================================================== 00333 ##### Initialization and de-initialization functions ##### 00334 ============================================================================== 00335 [..] This section provides functions allowing to: 00336 (+) Initialize and configure the DAC. 00337 (+) De-initialize the DAC. 00338 00339 @endverbatim 00340 * @{ 00341 */ 00342 00343 /** 00344 * @brief Initialize the DAC peripheral according to the specified parameters 00345 * in the DAC_InitStruct and initialize the associated handle. 00346 * @param hdac pointer to a DAC_HandleTypeDef structure that contains 00347 * the configuration information for the specified DAC. 00348 * @retval HAL status 00349 */ 00350 HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef *hdac) 00351 { 00352 /* Check DAC handle */ 00353 if (hdac == NULL) 00354 { 00355 return HAL_ERROR; 00356 } 00357 /* Check the parameters */ 00358 assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance)); 00359 00360 if (hdac->State == HAL_DAC_STATE_RESET) 00361 { 00362 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 00363 /* Init the DAC Callback settings */ 00364 hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1; 00365 hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1; 00366 hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1; 00367 hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1; 00368 00369 hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2; 00370 hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2; 00371 hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2; 00372 hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2; 00373 00374 if (hdac->MspInitCallback == NULL) 00375 { 00376 hdac->MspInitCallback = HAL_DAC_MspInit; 00377 } 00378 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 00379 00380 /* Allocate lock resource and initialize it */ 00381 hdac->Lock = HAL_UNLOCKED; 00382 00383 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 00384 /* Init the low level hardware */ 00385 hdac->MspInitCallback(hdac); 00386 #else 00387 /* Init the low level hardware */ 00388 HAL_DAC_MspInit(hdac); 00389 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 00390 } 00391 00392 /* Initialize the DAC state*/ 00393 hdac->State = HAL_DAC_STATE_BUSY; 00394 00395 /* Set DAC error code to none */ 00396 hdac->ErrorCode = HAL_DAC_ERROR_NONE; 00397 00398 /* Initialize the DAC state*/ 00399 hdac->State = HAL_DAC_STATE_READY; 00400 00401 /* Return function status */ 00402 return HAL_OK; 00403 } 00404 00405 /** 00406 * @brief Deinitialize the DAC peripheral registers to their default reset values. 00407 * @param hdac pointer to a DAC_HandleTypeDef structure that contains 00408 * the configuration information for the specified DAC. 00409 * @retval HAL status 00410 */ 00411 HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef *hdac) 00412 { 00413 /* Check DAC handle */ 00414 if (hdac == NULL) 00415 { 00416 return HAL_ERROR; 00417 } 00418 00419 /* Check the parameters */ 00420 assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance)); 00421 00422 /* Change DAC state */ 00423 hdac->State = HAL_DAC_STATE_BUSY; 00424 00425 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 00426 if (hdac->MspDeInitCallback == NULL) 00427 { 00428 hdac->MspDeInitCallback = HAL_DAC_MspDeInit; 00429 } 00430 /* DeInit the low level hardware */ 00431 hdac->MspDeInitCallback(hdac); 00432 #else 00433 /* DeInit the low level hardware */ 00434 HAL_DAC_MspDeInit(hdac); 00435 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 00436 00437 /* Set DAC error code to none */ 00438 hdac->ErrorCode = HAL_DAC_ERROR_NONE; 00439 00440 /* Change DAC state */ 00441 hdac->State = HAL_DAC_STATE_RESET; 00442 00443 /* Release Lock */ 00444 __HAL_UNLOCK(hdac); 00445 00446 /* Return function status */ 00447 return HAL_OK; 00448 } 00449 00450 /** 00451 * @brief Initialize the DAC MSP. 00452 * @param hdac pointer to a DAC_HandleTypeDef structure that contains 00453 * the configuration information for the specified DAC. 00454 * @retval None 00455 */ 00456 __weak void HAL_DAC_MspInit(DAC_HandleTypeDef *hdac) 00457 { 00458 /* Prevent unused argument(s) compilation warning */ 00459 UNUSED(hdac); 00460 00461 /* NOTE : This function should not be modified, when the callback is needed, 00462 the HAL_DAC_MspInit could be implemented in the user file 00463 */ 00464 } 00465 00466 /** 00467 * @brief DeInitialize the DAC MSP. 00468 * @param hdac pointer to a DAC_HandleTypeDef structure that contains 00469 * the configuration information for the specified DAC. 00470 * @retval None 00471 */ 00472 __weak void HAL_DAC_MspDeInit(DAC_HandleTypeDef *hdac) 00473 { 00474 /* Prevent unused argument(s) compilation warning */ 00475 UNUSED(hdac); 00476 00477 /* NOTE : This function should not be modified, when the callback is needed, 00478 the HAL_DAC_MspDeInit could be implemented in the user file 00479 */ 00480 } 00481 00482 /** 00483 * @} 00484 */ 00485 00486 /** @defgroup DAC_Exported_Functions_Group2 IO operation functions 00487 * @brief IO operation functions 00488 * 00489 @verbatim 00490 ============================================================================== 00491 ##### IO operation functions ##### 00492 ============================================================================== 00493 [..] This section provides functions allowing to: 00494 (+) Start conversion. 00495 (+) Stop conversion. 00496 (+) Start conversion and enable DMA transfer. 00497 (+) Stop conversion and disable DMA transfer. 00498 (+) Get result of conversion. 00499 00500 @endverbatim 00501 * @{ 00502 */ 00503 00504 /** 00505 * @brief Enables DAC and starts conversion of channel. 00506 * @param hdac pointer to a DAC_HandleTypeDef structure that contains 00507 * the configuration information for the specified DAC. 00508 * @param Channel The selected DAC channel. 00509 * This parameter can be one of the following values: 00510 * @arg DAC_CHANNEL_1: DAC Channel1 selected 00511 * @arg DAC_CHANNEL_2: DAC Channel2 selected 00512 * @retval HAL status 00513 */ 00514 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef *hdac, uint32_t Channel) 00515 { 00516 /* Check the parameters */ 00517 assert_param(IS_DAC_CHANNEL(Channel)); 00518 00519 /* Process locked */ 00520 __HAL_LOCK(hdac); 00521 00522 /* Change DAC state */ 00523 hdac->State = HAL_DAC_STATE_BUSY; 00524 00525 /* Enable the Peripheral */ 00526 __HAL_DAC_ENABLE(hdac, Channel); 00527 00528 if (Channel == DAC_CHANNEL_1) 00529 { 00530 /* Check if software trigger enabled */ 00531 if ((hdac->Instance->CR & (DAC_CR_TEN1 | DAC_CR_TSEL1)) == DAC_TRIGGER_SOFTWARE) 00532 { 00533 /* Enable the selected DAC software conversion */ 00534 SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG1); 00535 } 00536 } 00537 00538 else 00539 { 00540 /* Check if software trigger enabled */ 00541 if ((hdac->Instance->CR & (DAC_CR_TEN2 | DAC_CR_TSEL2)) == (DAC_TRIGGER_SOFTWARE << (Channel & 0x10UL))) 00542 { 00543 /* Enable the selected DAC software conversion*/ 00544 SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG2); 00545 } 00546 } 00547 00548 00549 /* Change DAC state */ 00550 hdac->State = HAL_DAC_STATE_READY; 00551 00552 /* Process unlocked */ 00553 __HAL_UNLOCK(hdac); 00554 00555 /* Return function status */ 00556 return HAL_OK; 00557 } 00558 00559 /** 00560 * @brief Disables DAC and stop conversion of channel. 00561 * @param hdac pointer to a DAC_HandleTypeDef structure that contains 00562 * the configuration information for the specified DAC. 00563 * @param Channel The selected DAC channel. 00564 * This parameter can be one of the following values: 00565 * @arg DAC_CHANNEL_1: DAC Channel1 selected 00566 * @arg DAC_CHANNEL_2: DAC Channel2 selected 00567 * @retval HAL status 00568 */ 00569 HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef *hdac, uint32_t Channel) 00570 { 00571 /* Check the parameters */ 00572 assert_param(IS_DAC_CHANNEL(Channel)); 00573 00574 /* Disable the Peripheral */ 00575 __HAL_DAC_DISABLE(hdac, Channel); 00576 00577 /* Change DAC state */ 00578 hdac->State = HAL_DAC_STATE_READY; 00579 00580 /* Return function status */ 00581 return HAL_OK; 00582 } 00583 00584 /** 00585 * @brief Enables DAC and starts conversion of channel. 00586 * @param hdac pointer to a DAC_HandleTypeDef structure that contains 00587 * the configuration information for the specified DAC. 00588 * @param Channel The selected DAC channel. 00589 * This parameter can be one of the following values: 00590 * @arg DAC_CHANNEL_1: DAC Channel1 selected 00591 * @arg DAC_CHANNEL_2: DAC Channel2 selected 00592 * @param pData The source Buffer address. 00593 * @param Length The length of data to be transferred from memory to DAC peripheral 00594 * @param Alignment Specifies the data alignment for DAC channel. 00595 * This parameter can be one of the following values: 00596 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected 00597 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected 00598 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected 00599 * @retval HAL status 00600 */ 00601 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t *pData, uint32_t Length, 00602 uint32_t Alignment) 00603 { 00604 HAL_StatusTypeDef status; 00605 uint32_t tmpreg = 0U; 00606 00607 /* Check the parameters */ 00608 assert_param(IS_DAC_CHANNEL(Channel)); 00609 assert_param(IS_DAC_ALIGN(Alignment)); 00610 00611 /* Process locked */ 00612 __HAL_LOCK(hdac); 00613 00614 /* Change DAC state */ 00615 hdac->State = HAL_DAC_STATE_BUSY; 00616 00617 if (Channel == DAC_CHANNEL_1) 00618 { 00619 /* Set the DMA transfer complete callback for channel1 */ 00620 hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1; 00621 00622 /* Set the DMA half transfer complete callback for channel1 */ 00623 hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1; 00624 00625 /* Set the DMA error callback for channel1 */ 00626 hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1; 00627 00628 /* Enable the selected DAC channel1 DMA request */ 00629 SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1); 00630 00631 /* Case of use of channel 1 */ 00632 switch (Alignment) 00633 { 00634 case DAC_ALIGN_12B_R: 00635 /* Get DHR12R1 address */ 00636 tmpreg = (uint32_t)&hdac->Instance->DHR12R1; 00637 break; 00638 case DAC_ALIGN_12B_L: 00639 /* Get DHR12L1 address */ 00640 tmpreg = (uint32_t)&hdac->Instance->DHR12L1; 00641 break; 00642 case DAC_ALIGN_8B_R: 00643 /* Get DHR8R1 address */ 00644 tmpreg = (uint32_t)&hdac->Instance->DHR8R1; 00645 break; 00646 default: 00647 break; 00648 } 00649 } 00650 00651 else 00652 { 00653 /* Set the DMA transfer complete callback for channel2 */ 00654 hdac->DMA_Handle2->XferCpltCallback = DAC_DMAConvCpltCh2; 00655 00656 /* Set the DMA half transfer complete callback for channel2 */ 00657 hdac->DMA_Handle2->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh2; 00658 00659 /* Set the DMA error callback for channel2 */ 00660 hdac->DMA_Handle2->XferErrorCallback = DAC_DMAErrorCh2; 00661 00662 /* Enable the selected DAC channel2 DMA request */ 00663 SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN2); 00664 00665 /* Case of use of channel 2 */ 00666 switch (Alignment) 00667 { 00668 case DAC_ALIGN_12B_R: 00669 /* Get DHR12R2 address */ 00670 tmpreg = (uint32_t)&hdac->Instance->DHR12R2; 00671 break; 00672 case DAC_ALIGN_12B_L: 00673 /* Get DHR12L2 address */ 00674 tmpreg = (uint32_t)&hdac->Instance->DHR12L2; 00675 break; 00676 case DAC_ALIGN_8B_R: 00677 /* Get DHR8R2 address */ 00678 tmpreg = (uint32_t)&hdac->Instance->DHR8R2; 00679 break; 00680 default: 00681 break; 00682 } 00683 } 00684 00685 00686 /* Enable the DMA Stream */ 00687 if (Channel == DAC_CHANNEL_1) 00688 { 00689 /* Enable the DAC DMA underrun interrupt */ 00690 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1); 00691 00692 /* Enable the DMA Stream */ 00693 status = HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length); 00694 } 00695 00696 else 00697 { 00698 /* Enable the DAC DMA underrun interrupt */ 00699 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR2); 00700 00701 /* Enable the DMA Stream */ 00702 status = HAL_DMA_Start_IT(hdac->DMA_Handle2, (uint32_t)pData, tmpreg, Length); 00703 } 00704 00705 00706 /* Process Unlocked */ 00707 __HAL_UNLOCK(hdac); 00708 00709 if (status == HAL_OK) 00710 { 00711 /* Enable the Peripheral */ 00712 __HAL_DAC_ENABLE(hdac, Channel); 00713 } 00714 else 00715 { 00716 hdac->ErrorCode |= HAL_DAC_ERROR_DMA; 00717 } 00718 00719 /* Return function status */ 00720 return status; 00721 } 00722 00723 /** 00724 * @brief Disables DAC and stop conversion of channel. 00725 * @param hdac pointer to a DAC_HandleTypeDef structure that contains 00726 * the configuration information for the specified DAC. 00727 * @param Channel The selected DAC channel. 00728 * This parameter can be one of the following values: 00729 * @arg DAC_CHANNEL_1: DAC Channel1 selected 00730 * @arg DAC_CHANNEL_2: DAC Channel2 selected 00731 * @retval HAL status 00732 */ 00733 HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel) 00734 { 00735 /* Check the parameters */ 00736 assert_param(IS_DAC_CHANNEL(Channel)); 00737 00738 /* Disable the selected DAC channel DMA request */ 00739 hdac->Instance->CR &= ~(DAC_CR_DMAEN1 << (Channel & 0x10UL)); 00740 00741 /* Disable the Peripheral */ 00742 __HAL_DAC_DISABLE(hdac, Channel); 00743 00744 /* Disable the DMA Stream */ 00745 00746 /* Channel1 is used */ 00747 if (Channel == DAC_CHANNEL_1) 00748 { 00749 /* Disable the DMA Stream */ 00750 (void)HAL_DMA_Abort(hdac->DMA_Handle1); 00751 00752 /* Disable the DAC DMA underrun interrupt */ 00753 __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR1); 00754 } 00755 00756 else /* Channel2 is used for */ 00757 { 00758 /* Disable the DMA Stream */ 00759 (void)HAL_DMA_Abort(hdac->DMA_Handle2); 00760 00761 /* Disable the DAC DMA underrun interrupt */ 00762 __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR2); 00763 } 00764 00765 00766 /* Change DAC state */ 00767 hdac->State = HAL_DAC_STATE_READY; 00768 00769 /* Return function status */ 00770 return HAL_OK; 00771 } 00772 00773 /** 00774 * @brief Handles DAC interrupt request 00775 * This function uses the interruption of DMA 00776 * underrun. 00777 * @param hdac pointer to a DAC_HandleTypeDef structure that contains 00778 * the configuration information for the specified DAC. 00779 * @retval None 00780 */ 00781 void HAL_DAC_IRQHandler(DAC_HandleTypeDef *hdac) 00782 { 00783 if (__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR1)) 00784 { 00785 /* Check underrun flag of DAC channel 1 */ 00786 if (__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR1)) 00787 { 00788 /* Change DAC state to error state */ 00789 hdac->State = HAL_DAC_STATE_ERROR; 00790 00791 /* Set DAC error code to channel1 DMA underrun error */ 00792 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH1); 00793 00794 /* Clear the underrun flag */ 00795 __HAL_DAC_CLEAR_FLAG(hdac, DAC_FLAG_DMAUDR1); 00796 00797 /* Disable the selected DAC channel1 DMA request */ 00798 CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN1); 00799 00800 /* Error callback */ 00801 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 00802 hdac->DMAUnderrunCallbackCh1(hdac); 00803 #else 00804 HAL_DAC_DMAUnderrunCallbackCh1(hdac); 00805 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 00806 } 00807 } 00808 00809 00810 if (__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR2)) 00811 { 00812 /* Check underrun flag of DAC channel 2 */ 00813 if (__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR2)) 00814 { 00815 /* Change DAC state to error state */ 00816 hdac->State = HAL_DAC_STATE_ERROR; 00817 00818 /* Set DAC error code to channel2 DMA underrun error */ 00819 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH2); 00820 00821 /* Clear the underrun flag */ 00822 __HAL_DAC_CLEAR_FLAG(hdac, DAC_FLAG_DMAUDR2); 00823 00824 /* Disable the selected DAC channel2 DMA request */ 00825 CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN2); 00826 00827 /* Error callback */ 00828 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 00829 hdac->DMAUnderrunCallbackCh2(hdac); 00830 #else 00831 HAL_DACEx_DMAUnderrunCallbackCh2(hdac); 00832 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 00833 } 00834 } 00835 00836 } 00837 00838 /** 00839 * @brief Set the specified data holding register value for DAC channel. 00840 * @param hdac pointer to a DAC_HandleTypeDef structure that contains 00841 * the configuration information for the specified DAC. 00842 * @param Channel The selected DAC channel. 00843 * This parameter can be one of the following values: 00844 * @arg DAC_CHANNEL_1: DAC Channel1 selected 00845 * @arg DAC_CHANNEL_2: DAC Channel2 selected 00846 * @param Alignment Specifies the data alignment. 00847 * This parameter can be one of the following values: 00848 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected 00849 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected 00850 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected 00851 * @param Data Data to be loaded in the selected data holding register. 00852 * @retval HAL status 00853 */ 00854 HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data) 00855 { 00856 __IO uint32_t tmp = 0UL; 00857 00858 /* Check the parameters */ 00859 assert_param(IS_DAC_CHANNEL(Channel)); 00860 assert_param(IS_DAC_ALIGN(Alignment)); 00861 assert_param(IS_DAC_DATA(Data)); 00862 00863 tmp = (uint32_t)hdac->Instance; 00864 if (Channel == DAC_CHANNEL_1) 00865 { 00866 tmp += DAC_DHR12R1_ALIGNMENT(Alignment); 00867 } 00868 00869 else 00870 { 00871 tmp += DAC_DHR12R2_ALIGNMENT(Alignment); 00872 } 00873 00874 00875 /* Set the DAC channel selected data holding register */ 00876 *(__IO uint32_t *) tmp = Data; 00877 00878 /* Return function status */ 00879 return HAL_OK; 00880 } 00881 00882 /** 00883 * @brief Conversion complete callback in non-blocking mode for Channel1 00884 * @param hdac pointer to a DAC_HandleTypeDef structure that contains 00885 * the configuration information for the specified DAC. 00886 * @retval None 00887 */ 00888 __weak void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef *hdac) 00889 { 00890 /* Prevent unused argument(s) compilation warning */ 00891 UNUSED(hdac); 00892 00893 /* NOTE : This function should not be modified, when the callback is needed, 00894 the HAL_DAC_ConvCpltCallbackCh1 could be implemented in the user file 00895 */ 00896 } 00897 00898 /** 00899 * @brief Conversion half DMA transfer callback in non-blocking mode for Channel1 00900 * @param hdac pointer to a DAC_HandleTypeDef structure that contains 00901 * the configuration information for the specified DAC. 00902 * @retval None 00903 */ 00904 __weak void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef *hdac) 00905 { 00906 /* Prevent unused argument(s) compilation warning */ 00907 UNUSED(hdac); 00908 00909 /* NOTE : This function should not be modified, when the callback is needed, 00910 the HAL_DAC_ConvHalfCpltCallbackCh1 could be implemented in the user file 00911 */ 00912 } 00913 00914 /** 00915 * @brief Error DAC callback for Channel1. 00916 * @param hdac pointer to a DAC_HandleTypeDef structure that contains 00917 * the configuration information for the specified DAC. 00918 * @retval None 00919 */ 00920 __weak void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac) 00921 { 00922 /* Prevent unused argument(s) compilation warning */ 00923 UNUSED(hdac); 00924 00925 /* NOTE : This function should not be modified, when the callback is needed, 00926 the HAL_DAC_ErrorCallbackCh1 could be implemented in the user file 00927 */ 00928 } 00929 00930 /** 00931 * @brief DMA underrun DAC callback for channel1. 00932 * @param hdac pointer to a DAC_HandleTypeDef structure that contains 00933 * the configuration information for the specified DAC. 00934 * @retval None 00935 */ 00936 __weak void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac) 00937 { 00938 /* Prevent unused argument(s) compilation warning */ 00939 UNUSED(hdac); 00940 00941 /* NOTE : This function should not be modified, when the callback is needed, 00942 the HAL_DAC_DMAUnderrunCallbackCh1 could be implemented in the user file 00943 */ 00944 } 00945 00946 /** 00947 * @} 00948 */ 00949 00950 /** @defgroup DAC_Exported_Functions_Group3 Peripheral Control functions 00951 * @brief Peripheral Control functions 00952 * 00953 @verbatim 00954 ============================================================================== 00955 ##### Peripheral Control functions ##### 00956 ============================================================================== 00957 [..] This section provides functions allowing to: 00958 (+) Configure channels. 00959 (+) Set the specified data holding register value for DAC channel. 00960 00961 @endverbatim 00962 * @{ 00963 */ 00964 00965 /** 00966 * @brief Returns the last data output value of the selected DAC channel. 00967 * @param hdac pointer to a DAC_HandleTypeDef structure that contains 00968 * the configuration information for the specified DAC. 00969 * @param Channel The selected DAC channel. 00970 * This parameter can be one of the following values: 00971 * @arg DAC_CHANNEL_1: DAC Channel1 selected 00972 * @arg DAC_CHANNEL_2: DAC Channel2 selected 00973 * @retval The selected DAC channel data output value. 00974 */ 00975 uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef *hdac, uint32_t Channel) 00976 { 00977 uint32_t result; 00978 00979 /* Check the parameters */ 00980 assert_param(IS_DAC_CHANNEL(Channel)); 00981 00982 if (Channel == DAC_CHANNEL_1) 00983 { 00984 result = hdac->Instance->DOR1; 00985 } 00986 00987 else 00988 { 00989 result = hdac->Instance->DOR2; 00990 } 00991 00992 /* Returns the DAC channel data output register value */ 00993 return result; 00994 } 00995 00996 /** 00997 * @brief Configures the selected DAC channel. 00998 * @param hdac pointer to a DAC_HandleTypeDef structure that contains 00999 * the configuration information for the specified DAC. 01000 * @param sConfig DAC configuration structure. 01001 * @param Channel The selected DAC channel. 01002 * This parameter can be one of the following values: 01003 * @arg DAC_CHANNEL_1: DAC Channel1 selected 01004 * @arg DAC_CHANNEL_2: DAC Channel2 selected 01005 * @retval HAL status 01006 */ 01007 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef *hdac, DAC_ChannelConfTypeDef *sConfig, uint32_t Channel) 01008 { 01009 uint32_t tmpreg1; 01010 uint32_t tmpreg2; 01011 uint32_t tickstart; 01012 uint32_t connectOnChip; 01013 01014 /* Check the DAC parameters */ 01015 assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger)); 01016 assert_param(IS_DAC_OUTPUT_BUFFER_STATE(sConfig->DAC_OutputBuffer)); 01017 assert_param(IS_DAC_CHIP_CONNECTION(sConfig->DAC_ConnectOnChipPeripheral)); 01018 assert_param(IS_DAC_TRIMMING(sConfig->DAC_UserTrimming)); 01019 if ((sConfig->DAC_UserTrimming) == DAC_TRIMMING_USER) 01020 { 01021 assert_param(IS_DAC_TRIMMINGVALUE(sConfig->DAC_TrimmingValue)); 01022 } 01023 assert_param(IS_DAC_SAMPLEANDHOLD(sConfig->DAC_SampleAndHold)); 01024 if ((sConfig->DAC_SampleAndHold) == DAC_SAMPLEANDHOLD_ENABLE) 01025 { 01026 assert_param(IS_DAC_SAMPLETIME(sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime)); 01027 assert_param(IS_DAC_HOLDTIME(sConfig->DAC_SampleAndHoldConfig.DAC_HoldTime)); 01028 assert_param(IS_DAC_REFRESHTIME(sConfig->DAC_SampleAndHoldConfig.DAC_RefreshTime)); 01029 } 01030 assert_param(IS_DAC_CHANNEL(Channel)); 01031 01032 /* Process locked */ 01033 __HAL_LOCK(hdac); 01034 01035 /* Change DAC state */ 01036 hdac->State = HAL_DAC_STATE_BUSY; 01037 01038 /* Sample and hold configuration */ 01039 if (sConfig->DAC_SampleAndHold == DAC_SAMPLEANDHOLD_ENABLE) 01040 { 01041 /* Get timeout */ 01042 tickstart = HAL_GetTick(); 01043 01044 if (Channel == DAC_CHANNEL_1) 01045 { 01046 /* SHSR1 can be written when BWST1 is cleared */ 01047 while (((hdac->Instance->SR) & DAC_SR_BWST1) != 0UL) 01048 { 01049 /* Check for the Timeout */ 01050 if ((HAL_GetTick() - tickstart) > TIMEOUT_DAC_CALIBCONFIG) 01051 { 01052 /* Update error code */ 01053 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_TIMEOUT); 01054 01055 /* Change the DMA state */ 01056 hdac->State = HAL_DAC_STATE_TIMEOUT; 01057 01058 return HAL_TIMEOUT; 01059 } 01060 } 01061 HAL_Delay(1); 01062 hdac->Instance->SHSR1 = sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime; 01063 } 01064 01065 else /* Channel 2 */ 01066 { 01067 /* SHSR2 can be written when BWST2 is cleared */ 01068 while (((hdac->Instance->SR) & DAC_SR_BWST2) != 0UL) 01069 { 01070 /* Check for the Timeout */ 01071 if ((HAL_GetTick() - tickstart) > TIMEOUT_DAC_CALIBCONFIG) 01072 { 01073 /* Update error code */ 01074 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_TIMEOUT); 01075 01076 /* Change the DMA state */ 01077 hdac->State = HAL_DAC_STATE_TIMEOUT; 01078 01079 return HAL_TIMEOUT; 01080 } 01081 } 01082 HAL_Delay(1U); 01083 hdac->Instance->SHSR2 = sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime; 01084 } 01085 01086 01087 /* HoldTime */ 01088 MODIFY_REG(hdac->Instance->SHHR, DAC_SHHR_THOLD1 << (Channel & 0x10UL), 01089 (sConfig->DAC_SampleAndHoldConfig.DAC_HoldTime) << (Channel & 0x10UL)); 01090 /* RefreshTime */ 01091 MODIFY_REG(hdac->Instance->SHRR, DAC_SHRR_TREFRESH1 << (Channel & 0x10UL), 01092 (sConfig->DAC_SampleAndHoldConfig.DAC_RefreshTime) << (Channel & 0x10UL)); 01093 } 01094 01095 if (sConfig->DAC_UserTrimming == DAC_TRIMMING_USER) 01096 /* USER TRIMMING */ 01097 { 01098 /* Get the DAC CCR value */ 01099 tmpreg1 = hdac->Instance->CCR; 01100 /* Clear trimming value */ 01101 tmpreg1 &= ~(((uint32_t)(DAC_CCR_OTRIM1)) << (Channel & 0x10UL)); 01102 /* Configure for the selected trimming offset */ 01103 tmpreg2 = sConfig->DAC_TrimmingValue; 01104 /* Calculate CCR register value depending on DAC_Channel */ 01105 tmpreg1 |= tmpreg2 << (Channel & 0x10UL); 01106 /* Write to DAC CCR */ 01107 hdac->Instance->CCR = tmpreg1; 01108 } 01109 /* else factory trimming is used (factory setting are available at reset)*/ 01110 /* SW Nothing has nothing to do */ 01111 01112 /* Get the DAC MCR value */ 01113 tmpreg1 = hdac->Instance->MCR; 01114 /* Clear DAC_MCR_MODEx bits */ 01115 tmpreg1 &= ~(((uint32_t)(DAC_MCR_MODE1)) << (Channel & 0x10UL)); 01116 /* Configure for the selected DAC channel: mode, buffer output & on chip peripheral connect */ 01117 if (sConfig->DAC_ConnectOnChipPeripheral == DAC_CHIPCONNECT_EXTERNAL) 01118 { 01119 connectOnChip = 0x00000000UL; 01120 } 01121 else if (sConfig->DAC_ConnectOnChipPeripheral == DAC_CHIPCONNECT_INTERNAL) 01122 { 01123 connectOnChip = DAC_MCR_MODE1_0; 01124 } 01125 else /* (sConfig->DAC_ConnectOnChipPeripheral == DAC_CHIPCONNECT_BOTH) */ 01126 { 01127 if (sConfig->DAC_OutputBuffer == DAC_OUTPUTBUFFER_ENABLE) 01128 { 01129 connectOnChip = DAC_MCR_MODE1_0; 01130 } 01131 else 01132 { 01133 connectOnChip = 0x00000000UL; 01134 } 01135 } 01136 tmpreg2 = (sConfig->DAC_SampleAndHold | sConfig->DAC_OutputBuffer | connectOnChip); 01137 /* Calculate MCR register value depending on DAC_Channel */ 01138 tmpreg1 |= tmpreg2 << (Channel & 0x10UL); 01139 /* Write to DAC MCR */ 01140 hdac->Instance->MCR = tmpreg1; 01141 01142 /* DAC in normal operating mode hence clear DAC_CR_CENx bit */ 01143 CLEAR_BIT(hdac->Instance->CR, DAC_CR_CEN1 << (Channel & 0x10UL)); 01144 01145 /* Get the DAC CR value */ 01146 tmpreg1 = hdac->Instance->CR; 01147 /* Clear TENx, TSELx, WAVEx and MAMPx bits */ 01148 tmpreg1 &= ~(((uint32_t)(DAC_CR_MAMP1 | DAC_CR_WAVE1 | DAC_CR_TSEL1 | DAC_CR_TEN1)) << (Channel & 0x10UL)); 01149 /* Configure for the selected DAC channel: trigger */ 01150 /* Set TSELx and TENx bits according to DAC_Trigger value */ 01151 tmpreg2 = sConfig->DAC_Trigger; 01152 /* Calculate CR register value depending on DAC_Channel */ 01153 tmpreg1 |= tmpreg2 << (Channel & 0x10UL); 01154 /* Write to DAC CR */ 01155 hdac->Instance->CR = tmpreg1; 01156 /* Disable wave generation */ 01157 CLEAR_BIT(hdac->Instance->CR, (DAC_CR_WAVE1 << (Channel & 0x10UL))); 01158 01159 /* Change DAC state */ 01160 hdac->State = HAL_DAC_STATE_READY; 01161 01162 /* Process unlocked */ 01163 __HAL_UNLOCK(hdac); 01164 01165 /* Return function status */ 01166 return HAL_OK; 01167 } 01168 01169 /** 01170 * @} 01171 */ 01172 01173 /** @defgroup DAC_Exported_Functions_Group4 Peripheral State and Errors functions 01174 * @brief Peripheral State and Errors functions 01175 * 01176 @verbatim 01177 ============================================================================== 01178 ##### Peripheral State and Errors functions ##### 01179 ============================================================================== 01180 [..] 01181 This subsection provides functions allowing to 01182 (+) Check the DAC state. 01183 (+) Check the DAC Errors. 01184 01185 @endverbatim 01186 * @{ 01187 */ 01188 01189 /** 01190 * @brief return the DAC handle state 01191 * @param hdac pointer to a DAC_HandleTypeDef structure that contains 01192 * the configuration information for the specified DAC. 01193 * @retval HAL state 01194 */ 01195 HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef *hdac) 01196 { 01197 /* Return DAC handle state */ 01198 return hdac->State; 01199 } 01200 01201 01202 /** 01203 * @brief Return the DAC error code 01204 * @param hdac pointer to a DAC_HandleTypeDef structure that contains 01205 * the configuration information for the specified DAC. 01206 * @retval DAC Error Code 01207 */ 01208 uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac) 01209 { 01210 return hdac->ErrorCode; 01211 } 01212 01213 /** 01214 * @} 01215 */ 01216 01217 /** 01218 * @} 01219 */ 01220 01221 /** @addtogroup DAC_Exported_Functions 01222 * @{ 01223 */ 01224 01225 /** @addtogroup DAC_Exported_Functions_Group1 01226 * @{ 01227 */ 01228 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 01229 /** 01230 * @brief Register a User DAC Callback 01231 * To be used instead of the weak (surcharged) predefined callback 01232 * @param hdac DAC handle 01233 * @param CallbackID ID of the callback to be registered 01234 * This parameter can be one of the following values: 01235 * @arg @ref HAL_DAC_ERROR_INVALID_CALLBACK DAC Error Callback ID 01236 * @arg @ref HAL_DAC_CH1_COMPLETE_CB_ID DAC CH1 Complete Callback ID 01237 * @arg @ref HAL_DAC_CH1_HALF_COMPLETE_CB_ID DAC CH1 Half Complete Callback ID 01238 * @arg @ref HAL_DAC_CH1_ERROR_ID DAC CH1 Error Callback ID 01239 * @arg @ref HAL_DAC_CH1_UNDERRUN_CB_ID DAC CH1 UnderRun Callback ID 01240 * @arg @ref HAL_DAC_CH2_COMPLETE_CB_ID DAC CH2 Complete Callback ID 01241 * @arg @ref HAL_DAC_CH2_HALF_COMPLETE_CB_ID DAC CH2 Half Complete Callback ID 01242 * @arg @ref HAL_DAC_CH2_ERROR_ID DAC CH2 Error Callback ID 01243 * @arg @ref HAL_DAC_CH2_UNDERRUN_CB_ID DAC CH2 UnderRun Callback ID 01244 * @arg @ref HAL_DAC_MSPINIT_CB_ID DAC MSP Init Callback ID 01245 * @arg @ref HAL_DAC_MSPDEINIT_CB_ID DAC MSP DeInit Callback ID 01246 * 01247 * @param pCallback pointer to the Callback function 01248 * @retval status 01249 */ 01250 HAL_StatusTypeDef HAL_DAC_RegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID, 01251 pDAC_CallbackTypeDef pCallback) 01252 { 01253 HAL_StatusTypeDef status = HAL_OK; 01254 01255 if (pCallback == NULL) 01256 { 01257 /* Update the error code */ 01258 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; 01259 return HAL_ERROR; 01260 } 01261 01262 /* Process locked */ 01263 __HAL_LOCK(hdac); 01264 01265 if (hdac->State == HAL_DAC_STATE_READY) 01266 { 01267 switch (CallbackID) 01268 { 01269 case HAL_DAC_CH1_COMPLETE_CB_ID : 01270 hdac->ConvCpltCallbackCh1 = pCallback; 01271 break; 01272 case HAL_DAC_CH1_HALF_COMPLETE_CB_ID : 01273 hdac->ConvHalfCpltCallbackCh1 = pCallback; 01274 break; 01275 case HAL_DAC_CH1_ERROR_ID : 01276 hdac->ErrorCallbackCh1 = pCallback; 01277 break; 01278 case HAL_DAC_CH1_UNDERRUN_CB_ID : 01279 hdac->DMAUnderrunCallbackCh1 = pCallback; 01280 break; 01281 01282 case HAL_DAC_CH2_COMPLETE_CB_ID : 01283 hdac->ConvCpltCallbackCh2 = pCallback; 01284 break; 01285 case HAL_DAC_CH2_HALF_COMPLETE_CB_ID : 01286 hdac->ConvHalfCpltCallbackCh2 = pCallback; 01287 break; 01288 case HAL_DAC_CH2_ERROR_ID : 01289 hdac->ErrorCallbackCh2 = pCallback; 01290 break; 01291 case HAL_DAC_CH2_UNDERRUN_CB_ID : 01292 hdac->DMAUnderrunCallbackCh2 = pCallback; 01293 break; 01294 01295 case HAL_DAC_MSPINIT_CB_ID : 01296 hdac->MspInitCallback = pCallback; 01297 break; 01298 case HAL_DAC_MSPDEINIT_CB_ID : 01299 hdac->MspDeInitCallback = pCallback; 01300 break; 01301 default : 01302 /* Update the error code */ 01303 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; 01304 /* update return status */ 01305 status = HAL_ERROR; 01306 break; 01307 } 01308 } 01309 else if (hdac->State == HAL_DAC_STATE_RESET) 01310 { 01311 switch (CallbackID) 01312 { 01313 case HAL_DAC_MSPINIT_CB_ID : 01314 hdac->MspInitCallback = pCallback; 01315 break; 01316 case HAL_DAC_MSPDEINIT_CB_ID : 01317 hdac->MspDeInitCallback = pCallback; 01318 break; 01319 default : 01320 /* Update the error code */ 01321 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; 01322 /* update return status */ 01323 status = HAL_ERROR; 01324 break; 01325 } 01326 } 01327 else 01328 { 01329 /* Update the error code */ 01330 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; 01331 /* update return status */ 01332 status = HAL_ERROR; 01333 } 01334 01335 /* Release Lock */ 01336 __HAL_UNLOCK(hdac); 01337 return status; 01338 } 01339 01340 /** 01341 * @brief Unregister a User DAC Callback 01342 * DAC Callback is redirected to the weak (surcharged) predefined callback 01343 * @param hdac DAC handle 01344 * @param CallbackID ID of the callback to be unregistered 01345 * This parameter can be one of the following values: 01346 * @arg @ref HAL_DAC_CH1_COMPLETE_CB_ID DAC CH1 transfer Complete Callback ID 01347 * @arg @ref HAL_DAC_CH1_HALF_COMPLETE_CB_ID DAC CH1 Half Complete Callback ID 01348 * @arg @ref HAL_DAC_CH1_ERROR_ID DAC CH1 Error Callback ID 01349 * @arg @ref HAL_DAC_CH1_UNDERRUN_CB_ID DAC CH1 UnderRun Callback ID 01350 * @arg @ref HAL_DAC_CH2_COMPLETE_CB_ID DAC CH2 Complete Callback ID 01351 * @arg @ref HAL_DAC_CH2_HALF_COMPLETE_CB_ID DAC CH2 Half Complete Callback ID 01352 * @arg @ref HAL_DAC_CH2_ERROR_ID DAC CH2 Error Callback ID 01353 * @arg @ref HAL_DAC_CH2_UNDERRUN_CB_ID DAC CH2 UnderRun Callback ID 01354 * @arg @ref HAL_DAC_MSPINIT_CB_ID DAC MSP Init Callback ID 01355 * @arg @ref HAL_DAC_MSPDEINIT_CB_ID DAC MSP DeInit Callback ID 01356 * @arg @ref HAL_DAC_ALL_CB_ID DAC All callbacks 01357 * @retval status 01358 */ 01359 HAL_StatusTypeDef HAL_DAC_UnRegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID) 01360 { 01361 HAL_StatusTypeDef status = HAL_OK; 01362 01363 /* Process locked */ 01364 __HAL_LOCK(hdac); 01365 01366 if (hdac->State == HAL_DAC_STATE_READY) 01367 { 01368 switch (CallbackID) 01369 { 01370 case HAL_DAC_CH1_COMPLETE_CB_ID : 01371 hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1; 01372 break; 01373 case HAL_DAC_CH1_HALF_COMPLETE_CB_ID : 01374 hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1; 01375 break; 01376 case HAL_DAC_CH1_ERROR_ID : 01377 hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1; 01378 break; 01379 case HAL_DAC_CH1_UNDERRUN_CB_ID : 01380 hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1; 01381 break; 01382 01383 case HAL_DAC_CH2_COMPLETE_CB_ID : 01384 hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2; 01385 break; 01386 case HAL_DAC_CH2_HALF_COMPLETE_CB_ID : 01387 hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2; 01388 break; 01389 case HAL_DAC_CH2_ERROR_ID : 01390 hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2; 01391 break; 01392 case HAL_DAC_CH2_UNDERRUN_CB_ID : 01393 hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2; 01394 break; 01395 01396 case HAL_DAC_MSPINIT_CB_ID : 01397 hdac->MspInitCallback = HAL_DAC_MspInit; 01398 break; 01399 case HAL_DAC_MSPDEINIT_CB_ID : 01400 hdac->MspDeInitCallback = HAL_DAC_MspDeInit; 01401 break; 01402 case HAL_DAC_ALL_CB_ID : 01403 hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1; 01404 hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1; 01405 hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1; 01406 hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1; 01407 01408 hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2; 01409 hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2; 01410 hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2; 01411 hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2; 01412 01413 hdac->MspInitCallback = HAL_DAC_MspInit; 01414 hdac->MspDeInitCallback = HAL_DAC_MspDeInit; 01415 break; 01416 default : 01417 /* Update the error code */ 01418 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; 01419 /* update return status */ 01420 status = HAL_ERROR; 01421 break; 01422 } 01423 } 01424 else if (hdac->State == HAL_DAC_STATE_RESET) 01425 { 01426 switch (CallbackID) 01427 { 01428 case HAL_DAC_MSPINIT_CB_ID : 01429 hdac->MspInitCallback = HAL_DAC_MspInit; 01430 break; 01431 case HAL_DAC_MSPDEINIT_CB_ID : 01432 hdac->MspDeInitCallback = HAL_DAC_MspDeInit; 01433 break; 01434 default : 01435 /* Update the error code */ 01436 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; 01437 /* update return status */ 01438 status = HAL_ERROR; 01439 break; 01440 } 01441 } 01442 else 01443 { 01444 /* Update the error code */ 01445 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; 01446 /* update return status */ 01447 status = HAL_ERROR; 01448 } 01449 01450 /* Release Lock */ 01451 __HAL_UNLOCK(hdac); 01452 return status; 01453 } 01454 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 01455 01456 /** 01457 * @} 01458 */ 01459 01460 /** 01461 * @} 01462 */ 01463 01464 /** @addtogroup DAC_Private_Functions 01465 * @{ 01466 */ 01467 01468 /** 01469 * @brief DMA conversion complete callback. 01470 * @param hdma pointer to a DMA_HandleTypeDef structure that contains 01471 * the configuration information for the specified DMA module. 01472 * @retval None 01473 */ 01474 void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma) 01475 { 01476 DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; 01477 01478 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 01479 hdac->ConvCpltCallbackCh1(hdac); 01480 #else 01481 HAL_DAC_ConvCpltCallbackCh1(hdac); 01482 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 01483 01484 hdac->State = HAL_DAC_STATE_READY; 01485 } 01486 01487 /** 01488 * @brief DMA half transfer complete callback. 01489 * @param hdma pointer to a DMA_HandleTypeDef structure that contains 01490 * the configuration information for the specified DMA module. 01491 * @retval None 01492 */ 01493 void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma) 01494 { 01495 DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; 01496 /* Conversion complete callback */ 01497 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 01498 hdac->ConvHalfCpltCallbackCh1(hdac); 01499 #else 01500 HAL_DAC_ConvHalfCpltCallbackCh1(hdac); 01501 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 01502 } 01503 01504 /** 01505 * @brief DMA error callback 01506 * @param hdma pointer to a DMA_HandleTypeDef structure that contains 01507 * the configuration information for the specified DMA module. 01508 * @retval None 01509 */ 01510 void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma) 01511 { 01512 DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; 01513 01514 /* Set DAC error code to DMA error */ 01515 hdac->ErrorCode |= HAL_DAC_ERROR_DMA; 01516 01517 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 01518 hdac->ErrorCallbackCh1(hdac); 01519 #else 01520 HAL_DAC_ErrorCallbackCh1(hdac); 01521 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 01522 01523 hdac->State = HAL_DAC_STATE_READY; 01524 } 01525 01526 /** 01527 * @} 01528 */ 01529 01530 /** 01531 * @} 01532 */ 01533 01534 #endif /* DAC1 || DAC2 */ 01535 01536 #endif /* HAL_DAC_MODULE_ENABLED */ 01537 01538 /** 01539 * @} 01540 */ 01541