STM32H735xx HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32h7xx_hal_dfsdm.c 00004 * @author MCD Application Team 00005 * @brief This file provides firmware functions to manage the following 00006 * functionalities of the Digital Filter for Sigma-Delta Modulators 00007 * (DFSDM) peripherals: 00008 * + Initialization and configuration of channels and filters 00009 * + Regular channels configuration 00010 * + Injected channels configuration 00011 * + Regular/Injected Channels DMA Configuration 00012 * + Interrupts and flags management 00013 * + Analog watchdog feature 00014 * + Short-circuit detector feature 00015 * + Extremes detector feature 00016 * + Clock absence detector feature 00017 * + Break generation on analog watchdog or short-circuit event 00018 * 00019 ****************************************************************************** 00020 * @attention 00021 * 00022 * Copyright (c) 2017 STMicroelectronics. 00023 * All rights reserved. 00024 * 00025 * This software is licensed under terms that can be found in the LICENSE file 00026 * in the root directory of this software component. 00027 * If no LICENSE file comes with this software, it is provided AS-IS. 00028 * 00029 ****************************************************************************** 00030 @verbatim 00031 ============================================================================== 00032 ##### How to use this driver ##### 00033 ============================================================================== 00034 [..] 00035 *** Channel initialization *** 00036 ============================== 00037 [..] 00038 (#) User has first to initialize channels (before filters initialization). 00039 (#) As prerequisite, fill in the HAL_DFSDM_ChannelMspInit() : 00040 (++) Enable DFSDMz clock interface with __HAL_RCC_DFSDMz_CLK_ENABLE(). 00041 (++) Enable the clocks for the DFSDMz GPIOS with __HAL_RCC_GPIOx_CLK_ENABLE(). 00042 (++) Configure these DFSDMz pins in alternate mode using HAL_GPIO_Init(). 00043 (++) If interrupt mode is used, enable and configure DFSDMz_FLT0 global 00044 interrupt with HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ(). 00045 (#) Configure the output clock, input, serial interface, analog watchdog, 00046 offset and data right bit shift parameters for this channel using the 00047 HAL_DFSDM_ChannelInit() function. 00048 00049 *** Channel clock absence detector *** 00050 ====================================== 00051 [..] 00052 (#) Start clock absence detector using HAL_DFSDM_ChannelCkabStart() or 00053 HAL_DFSDM_ChannelCkabStart_IT(). 00054 (#) In polling mode, use HAL_DFSDM_ChannelPollForCkab() to detect the clock 00055 absence. 00056 (#) In interrupt mode, HAL_DFSDM_ChannelCkabCallback() will be called if 00057 clock absence is detected. 00058 (#) Stop clock absence detector using HAL_DFSDM_ChannelCkabStop() or 00059 HAL_DFSDM_ChannelCkabStop_IT(). 00060 (#) Please note that the same mode (polling or interrupt) has to be used 00061 for all channels because the channels are sharing the same interrupt. 00062 (#) Please note also that in interrupt mode, if clock absence detector is 00063 stopped for one channel, interrupt will be disabled for all channels. 00064 00065 *** Channel short circuit detector *** 00066 ====================================== 00067 [..] 00068 (#) Start short circuit detector using HAL_DFSDM_ChannelScdStart() or 00069 or HAL_DFSDM_ChannelScdStart_IT(). 00070 (#) In polling mode, use HAL_DFSDM_ChannelPollForScd() to detect short 00071 circuit. 00072 (#) In interrupt mode, HAL_DFSDM_ChannelScdCallback() will be called if 00073 short circuit is detected. 00074 (#) Stop short circuit detector using HAL_DFSDM_ChannelScdStop() or 00075 or HAL_DFSDM_ChannelScdStop_IT(). 00076 (#) Please note that the same mode (polling or interrupt) has to be used 00077 for all channels because the channels are sharing the same interrupt. 00078 (#) Please note also that in interrupt mode, if short circuit detector is 00079 stopped for one channel, interrupt will be disabled for all channels. 00080 00081 *** Channel analog watchdog value *** 00082 ===================================== 00083 [..] 00084 (#) Get analog watchdog filter value of a channel using 00085 HAL_DFSDM_ChannelGetAwdValue(). 00086 00087 *** Channel offset value *** 00088 ===================================== 00089 [..] 00090 (#) Modify offset value of a channel using HAL_DFSDM_ChannelModifyOffset(). 00091 00092 *** Filter initialization *** 00093 ============================= 00094 [..] 00095 (#) After channel initialization, user has to init filters. 00096 (#) As prerequisite, fill in the HAL_DFSDM_FilterMspInit() : 00097 (++) If interrupt mode is used , enable and configure DFSDMz_FLTx global 00098 interrupt with HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ(). 00099 Please note that DFSDMz_FLT0 global interrupt could be already 00100 enabled if interrupt is used for channel. 00101 (++) If DMA mode is used, configure DMA with HAL_DMA_Init() and link it 00102 with DFSDMz filter handle using __HAL_LINKDMA(). 00103 (#) Configure the regular conversion, injected conversion and filter 00104 parameters for this filter using the HAL_DFSDM_FilterInit() function. 00105 00106 *** Filter regular channel conversion *** 00107 ========================================= 00108 [..] 00109 (#) Select regular channel and enable/disable continuous mode using 00110 HAL_DFSDM_FilterConfigRegChannel(). 00111 (#) Start regular conversion using HAL_DFSDM_FilterRegularStart(), 00112 HAL_DFSDM_FilterRegularStart_IT(), HAL_DFSDM_FilterRegularStart_DMA() or 00113 HAL_DFSDM_FilterRegularMsbStart_DMA(). 00114 (#) In polling mode, use HAL_DFSDM_FilterPollForRegConversion() to detect 00115 the end of regular conversion. 00116 (#) In interrupt mode, HAL_DFSDM_FilterRegConvCpltCallback() will be called 00117 at the end of regular conversion. 00118 (#) Get value of regular conversion and corresponding channel using 00119 HAL_DFSDM_FilterGetRegularValue(). 00120 (#) In DMA mode, HAL_DFSDM_FilterRegConvHalfCpltCallback() and 00121 HAL_DFSDM_FilterRegConvCpltCallback() will be called respectively at the 00122 half transfer and at the transfer complete. Please note that 00123 HAL_DFSDM_FilterRegConvHalfCpltCallback() will be called only in DMA 00124 circular mode. 00125 (#) Stop regular conversion using HAL_DFSDM_FilterRegularStop(), 00126 HAL_DFSDM_FilterRegularStop_IT() or HAL_DFSDM_FilterRegularStop_DMA(). 00127 00128 *** Filter injected channels conversion *** 00129 =========================================== 00130 [..] 00131 (#) Select injected channels using HAL_DFSDM_FilterConfigInjChannel(). 00132 (#) Start injected conversion using HAL_DFSDM_FilterInjectedStart(), 00133 HAL_DFSDM_FilterInjectedStart_IT(), HAL_DFSDM_FilterInjectedStart_DMA() or 00134 HAL_DFSDM_FilterInjectedMsbStart_DMA(). 00135 (#) In polling mode, use HAL_DFSDM_FilterPollForInjConversion() to detect 00136 the end of injected conversion. 00137 (#) In interrupt mode, HAL_DFSDM_FilterInjConvCpltCallback() will be called 00138 at the end of injected conversion. 00139 (#) Get value of injected conversion and corresponding channel using 00140 HAL_DFSDM_FilterGetInjectedValue(). 00141 (#) In DMA mode, HAL_DFSDM_FilterInjConvHalfCpltCallback() and 00142 HAL_DFSDM_FilterInjConvCpltCallback() will be called respectively at the 00143 half transfer and at the transfer complete. Please note that 00144 HAL_DFSDM_FilterInjConvCpltCallback() will be called only in DMA 00145 circular mode. 00146 (#) Stop injected conversion using HAL_DFSDM_FilterInjectedStop(), 00147 HAL_DFSDM_FilterInjectedStop_IT() or HAL_DFSDM_FilterInjectedStop_DMA(). 00148 00149 *** Filter analog watchdog *** 00150 ============================== 00151 [..] 00152 (#) Start filter analog watchdog using HAL_DFSDM_FilterAwdStart_IT(). 00153 (#) HAL_DFSDM_FilterAwdCallback() will be called if analog watchdog occurs. 00154 (#) Stop filter analog watchdog using HAL_DFSDM_FilterAwdStop_IT(). 00155 00156 *** Filter extreme detector *** 00157 =============================== 00158 [..] 00159 (#) Start filter extreme detector using HAL_DFSDM_FilterExdStart(). 00160 (#) Get extreme detector maximum value using HAL_DFSDM_FilterGetExdMaxValue(). 00161 (#) Get extreme detector minimum value using HAL_DFSDM_FilterGetExdMinValue(). 00162 (#) Start filter extreme detector using HAL_DFSDM_FilterExdStop(). 00163 00164 *** Filter conversion time *** 00165 ============================== 00166 [..] 00167 (#) Get conversion time value using HAL_DFSDM_FilterGetConvTimeValue(). 00168 00169 *** Callback registration *** 00170 ============================= 00171 [..] 00172 The compilation define USE_HAL_DFSDM_REGISTER_CALLBACKS when set to 1 00173 allows the user to configure dynamically the driver callbacks. 00174 Use functions HAL_DFSDM_Channel_RegisterCallback(), 00175 HAL_DFSDM_Filter_RegisterCallback() or 00176 HAL_DFSDM_Filter_RegisterAwdCallback() to register a user callback. 00177 00178 [..] 00179 Function HAL_DFSDM_Channel_RegisterCallback() allows to register 00180 following callbacks: 00181 (+) CkabCallback : DFSDM channel clock absence detection callback. 00182 (+) ScdCallback : DFSDM channel short circuit detection callback. 00183 (+) MspInitCallback : DFSDM channel MSP init callback. 00184 (+) MspDeInitCallback : DFSDM channel MSP de-init callback. 00185 [..] 00186 This function takes as parameters the HAL peripheral handle, the Callback ID 00187 and a pointer to the user callback function. 00188 00189 [..] 00190 Function HAL_DFSDM_Filter_RegisterCallback() allows to register 00191 following callbacks: 00192 (+) RegConvCpltCallback : DFSDM filter regular conversion complete callback. 00193 (+) RegConvHalfCpltCallback : DFSDM filter half regular conversion complete callback. 00194 (+) InjConvCpltCallback : DFSDM filter injected conversion complete callback. 00195 (+) InjConvHalfCpltCallback : DFSDM filter half injected conversion complete callback. 00196 (+) ErrorCallback : DFSDM filter error callback. 00197 (+) MspInitCallback : DFSDM filter MSP init callback. 00198 (+) MspDeInitCallback : DFSDM filter MSP de-init callback. 00199 [..] 00200 This function takes as parameters the HAL peripheral handle, the Callback ID 00201 and a pointer to the user callback function. 00202 00203 [..] 00204 For specific DFSDM filter analog watchdog callback use dedicated register callback: 00205 HAL_DFSDM_Filter_RegisterAwdCallback(). 00206 00207 [..] 00208 Use functions HAL_DFSDM_Channel_UnRegisterCallback() or 00209 HAL_DFSDM_Filter_UnRegisterCallback() to reset a callback to the default 00210 weak function. 00211 00212 [..] 00213 HAL_DFSDM_Channel_UnRegisterCallback() takes as parameters the HAL peripheral handle, 00214 and the Callback ID. 00215 [..] 00216 This function allows to reset following callbacks: 00217 (+) CkabCallback : DFSDM channel clock absence detection callback. 00218 (+) ScdCallback : DFSDM channel short circuit detection callback. 00219 (+) MspInitCallback : DFSDM channel MSP init callback. 00220 (+) MspDeInitCallback : DFSDM channel MSP de-init callback. 00221 00222 [..] 00223 HAL_DFSDM_Filter_UnRegisterCallback() takes as parameters the HAL peripheral handle, 00224 and the Callback ID. 00225 [..] 00226 This function allows to reset following callbacks: 00227 (+) RegConvCpltCallback : DFSDM filter regular conversion complete callback. 00228 (+) RegConvHalfCpltCallback : DFSDM filter half regular conversion complete callback. 00229 (+) InjConvCpltCallback : DFSDM filter injected conversion complete callback. 00230 (+) InjConvHalfCpltCallback : DFSDM filter half injected conversion complete callback. 00231 (+) ErrorCallback : DFSDM filter error callback. 00232 (+) MspInitCallback : DFSDM filter MSP init callback. 00233 (+) MspDeInitCallback : DFSDM filter MSP de-init callback. 00234 00235 [..] 00236 For specific DFSDM filter analog watchdog callback use dedicated unregister callback: 00237 HAL_DFSDM_Filter_UnRegisterAwdCallback(). 00238 00239 [..] 00240 By default, after the call of init function and if the state is RESET 00241 all callbacks are reset to the corresponding legacy weak functions: 00242 examples HAL_DFSDM_ChannelScdCallback(), HAL_DFSDM_FilterErrorCallback(). 00243 Exception done for MspInit and MspDeInit callbacks that are respectively 00244 reset to the legacy weak functions in the init and de-init only when these 00245 callbacks are null (not registered beforehand). 00246 If not, MspInit or MspDeInit are not null, the init and de-init keep and use 00247 the user MspInit/MspDeInit callbacks (registered beforehand) 00248 00249 [..] 00250 Callbacks can be registered/unregistered in READY state only. 00251 Exception done for MspInit/MspDeInit callbacks that can be registered/unregistered 00252 in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used 00253 during the init/de-init. 00254 In that case first register the MspInit/MspDeInit user callbacks using 00255 HAL_DFSDM_Channel_RegisterCallback() or 00256 HAL_DFSDM_Filter_RegisterCallback() before calling init or de-init function. 00257 00258 [..] 00259 When The compilation define USE_HAL_DFSDM_REGISTER_CALLBACKS is set to 0 or 00260 not defined, the callback registering feature is not available 00261 and weak callbacks are used. 00262 00263 @endverbatim 00264 ****************************************************************************** 00265 */ 00266 00267 /* Includes ------------------------------------------------------------------*/ 00268 #include "stm32h7xx_hal.h" 00269 00270 /** @addtogroup STM32H7xx_HAL_Driver 00271 * @{ 00272 */ 00273 #ifdef HAL_DFSDM_MODULE_ENABLED 00274 00275 /** @defgroup DFSDM DFSDM 00276 * @brief DFSDM HAL driver module 00277 * @{ 00278 */ 00279 00280 /* Private typedef -----------------------------------------------------------*/ 00281 /* Private define ------------------------------------------------------------*/ 00282 /** @defgroup DFSDM_Private_Define DFSDM Private Define 00283 * @{ 00284 */ 00285 #define DFSDM_FLTCR1_MSB_RCH_OFFSET 8 00286 #define DFSDM_MSB_MASK 0xFFFF0000U 00287 #define DFSDM_LSB_MASK 0x0000FFFFU 00288 #define DFSDM_CKAB_TIMEOUT 5000U 00289 #define DFSDM1_CHANNEL_NUMBER 8U 00290 #if defined(DFSDM2_Channel0) 00291 #define DFSDM2_CHANNEL_NUMBER 2U 00292 #endif /* DFSDM2_Channel0 */ 00293 /** 00294 * @} 00295 */ 00296 00297 /* Private macro -------------------------------------------------------------*/ 00298 /* Private variables ---------------------------------------------------------*/ 00299 /** @defgroup DFSDM_Private_Variables DFSDM Private Variables 00300 * @{ 00301 */ 00302 static __IO uint32_t v_dfsdm1ChannelCounter = 0; 00303 static DFSDM_Channel_HandleTypeDef *a_dfsdm1ChannelHandle[DFSDM1_CHANNEL_NUMBER] = {NULL}; 00304 #if defined(DFSDM2_Channel0) 00305 static __IO uint32_t v_dfsdm2ChannelCounter = 0; 00306 static DFSDM_Channel_HandleTypeDef *a_dfsdm2ChannelHandle[DFSDM2_CHANNEL_NUMBER] = {NULL}; 00307 #endif /* DFSDM2_Channel0 */ 00308 /** 00309 * @} 00310 */ 00311 00312 /* Private function prototypes -----------------------------------------------*/ 00313 /** @defgroup DFSDM_Private_Functions DFSDM Private Functions 00314 * @{ 00315 */ 00316 static uint32_t DFSDM_GetInjChannelsNbr(uint32_t Channels); 00317 static uint32_t DFSDM_GetChannelFromInstance(const DFSDM_Channel_TypeDef *Instance); 00318 static void DFSDM_RegConvStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter); 00319 static void DFSDM_RegConvStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter); 00320 static void DFSDM_InjConvStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter); 00321 static void DFSDM_InjConvStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter); 00322 static void DFSDM_DMARegularHalfConvCplt(DMA_HandleTypeDef *hdma); 00323 static void DFSDM_DMARegularConvCplt(DMA_HandleTypeDef *hdma); 00324 static void DFSDM_DMAInjectedHalfConvCplt(DMA_HandleTypeDef *hdma); 00325 static void DFSDM_DMAInjectedConvCplt(DMA_HandleTypeDef *hdma); 00326 static void DFSDM_DMAError(DMA_HandleTypeDef *hdma); 00327 /** 00328 * @} 00329 */ 00330 00331 /* Exported functions --------------------------------------------------------*/ 00332 /** @defgroup DFSDM_Exported_Functions DFSDM Exported Functions 00333 * @{ 00334 */ 00335 00336 /** @defgroup DFSDM_Exported_Functions_Group1_Channel Channel initialization and de-initialization functions 00337 * @brief Channel initialization and de-initialization functions 00338 * 00339 @verbatim 00340 ============================================================================== 00341 ##### Channel initialization and de-initialization functions ##### 00342 ============================================================================== 00343 [..] This section provides functions allowing to: 00344 (+) Initialize the DFSDM channel. 00345 (+) De-initialize the DFSDM channel. 00346 @endverbatim 00347 * @{ 00348 */ 00349 00350 /** 00351 * @brief Initialize the DFSDM channel according to the specified parameters 00352 * in the DFSDM_ChannelInitTypeDef structure and initialize the associated handle. 00353 * @param hdfsdm_channel DFSDM channel handle. 00354 * @retval HAL status. 00355 */ 00356 HAL_StatusTypeDef HAL_DFSDM_ChannelInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel) 00357 { 00358 __IO uint32_t *channelCounterPtr; 00359 DFSDM_Channel_HandleTypeDef **channelHandleTable; 00360 DFSDM_Channel_TypeDef *channel0Instance; 00361 00362 /* Check DFSDM Channel handle */ 00363 if(hdfsdm_channel == NULL) 00364 { 00365 return HAL_ERROR; 00366 } 00367 00368 /* Check parameters */ 00369 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance)); 00370 assert_param(IS_FUNCTIONAL_STATE(hdfsdm_channel->Init.OutputClock.Activation)); 00371 assert_param(IS_DFSDM_CHANNEL_INPUT(hdfsdm_channel->Init.Input.Multiplexer)); 00372 assert_param(IS_DFSDM_CHANNEL_DATA_PACKING(hdfsdm_channel->Init.Input.DataPacking)); 00373 assert_param(IS_DFSDM_CHANNEL_INPUT_PINS(hdfsdm_channel->Init.Input.Pins)); 00374 assert_param(IS_DFSDM_CHANNEL_SERIAL_INTERFACE_TYPE(hdfsdm_channel->Init.SerialInterface.Type)); 00375 assert_param(IS_DFSDM_CHANNEL_SPI_CLOCK(hdfsdm_channel->Init.SerialInterface.SpiClock)); 00376 assert_param(IS_DFSDM_CHANNEL_FILTER_ORDER(hdfsdm_channel->Init.Awd.FilterOrder)); 00377 assert_param(IS_DFSDM_CHANNEL_FILTER_OVS_RATIO(hdfsdm_channel->Init.Awd.Oversampling)); 00378 assert_param(IS_DFSDM_CHANNEL_OFFSET(hdfsdm_channel->Init.Offset)); 00379 assert_param(IS_DFSDM_CHANNEL_RIGHT_BIT_SHIFT(hdfsdm_channel->Init.RightBitShift)); 00380 00381 #if defined(DFSDM2_Channel0) 00382 if (IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance)) 00383 { 00384 channelCounterPtr = &v_dfsdm1ChannelCounter; 00385 channelHandleTable = a_dfsdm1ChannelHandle; 00386 channel0Instance = DFSDM1_Channel0; 00387 } 00388 else 00389 { 00390 channelCounterPtr = &v_dfsdm2ChannelCounter; 00391 channelHandleTable = a_dfsdm2ChannelHandle; 00392 channel0Instance = DFSDM2_Channel0; 00393 } 00394 #else /* DFSDM2_Channel0 */ 00395 channelCounterPtr = &v_dfsdm1ChannelCounter; 00396 channelHandleTable = a_dfsdm1ChannelHandle; 00397 channel0Instance = DFSDM1_Channel0; 00398 #endif /* DFSDM2_Channel0 */ 00399 00400 /* Check that channel has not been already initialized */ 00401 if (channelHandleTable[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] != NULL) 00402 { 00403 return HAL_ERROR; 00404 } 00405 00406 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1) 00407 /* Reset callback pointers to the weak predefined callbacks */ 00408 hdfsdm_channel->CkabCallback = HAL_DFSDM_ChannelCkabCallback; 00409 hdfsdm_channel->ScdCallback = HAL_DFSDM_ChannelScdCallback; 00410 00411 /* Call MSP init function */ 00412 if(hdfsdm_channel->MspInitCallback == NULL) 00413 { 00414 hdfsdm_channel->MspInitCallback = HAL_DFSDM_ChannelMspInit; 00415 } 00416 hdfsdm_channel->MspInitCallback(hdfsdm_channel); 00417 #else 00418 /* Call MSP init function */ 00419 HAL_DFSDM_ChannelMspInit(hdfsdm_channel); 00420 #endif 00421 00422 /* Update the channel counter */ 00423 (*channelCounterPtr)++; 00424 00425 /* Configure output serial clock and enable global DFSDM interface only for first channel */ 00426 if(*channelCounterPtr == 1U) 00427 { 00428 assert_param(IS_DFSDM_CHANNEL_OUTPUT_CLOCK(hdfsdm_channel->Init.OutputClock.Selection)); 00429 /* Set the output serial clock source */ 00430 channel0Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKOUTSRC); 00431 channel0Instance->CHCFGR1 |= hdfsdm_channel->Init.OutputClock.Selection; 00432 00433 /* Reset clock divider */ 00434 channel0Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKOUTDIV); 00435 if(hdfsdm_channel->Init.OutputClock.Activation == ENABLE) 00436 { 00437 assert_param(IS_DFSDM_CHANNEL_OUTPUT_CLOCK_DIVIDER(hdfsdm_channel->Init.OutputClock.Divider)); 00438 /* Set the output clock divider */ 00439 channel0Instance->CHCFGR1 |= (uint32_t)((hdfsdm_channel->Init.OutputClock.Divider - 1U) << 00440 DFSDM_CHCFGR1_CKOUTDIV_Pos); 00441 } 00442 00443 /* enable the DFSDM global interface */ 00444 channel0Instance->CHCFGR1 |= DFSDM_CHCFGR1_DFSDMEN; 00445 } 00446 00447 /* Set channel input parameters */ 00448 hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_DATPACK | DFSDM_CHCFGR1_DATMPX | 00449 DFSDM_CHCFGR1_CHINSEL); 00450 hdfsdm_channel->Instance->CHCFGR1 |= (hdfsdm_channel->Init.Input.Multiplexer | 00451 hdfsdm_channel->Init.Input.DataPacking | 00452 hdfsdm_channel->Init.Input.Pins); 00453 00454 /* Set serial interface parameters */ 00455 hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SITP | DFSDM_CHCFGR1_SPICKSEL); 00456 hdfsdm_channel->Instance->CHCFGR1 |= (hdfsdm_channel->Init.SerialInterface.Type | 00457 hdfsdm_channel->Init.SerialInterface.SpiClock); 00458 00459 /* Set analog watchdog parameters */ 00460 hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_AWFORD | DFSDM_CHAWSCDR_AWFOSR); 00461 hdfsdm_channel->Instance->CHAWSCDR |= (hdfsdm_channel->Init.Awd.FilterOrder | 00462 ((hdfsdm_channel->Init.Awd.Oversampling - 1U) << DFSDM_CHAWSCDR_AWFOSR_Pos)); 00463 00464 /* Set channel offset and right bit shift */ 00465 hdfsdm_channel->Instance->CHCFGR2 &= ~(DFSDM_CHCFGR2_OFFSET | DFSDM_CHCFGR2_DTRBS); 00466 hdfsdm_channel->Instance->CHCFGR2 |= (((uint32_t) hdfsdm_channel->Init.Offset << DFSDM_CHCFGR2_OFFSET_Pos) | 00467 (hdfsdm_channel->Init.RightBitShift << DFSDM_CHCFGR2_DTRBS_Pos)); 00468 00469 /* Enable DFSDM channel */ 00470 hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_CHEN; 00471 00472 /* Set DFSDM Channel to ready state */ 00473 hdfsdm_channel->State = HAL_DFSDM_CHANNEL_STATE_READY; 00474 00475 /* Store channel handle in DFSDM channel handle table */ 00476 channelHandleTable[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] = hdfsdm_channel; 00477 00478 return HAL_OK; 00479 } 00480 00481 /** 00482 * @brief De-initialize the DFSDM channel. 00483 * @param hdfsdm_channel DFSDM channel handle. 00484 * @retval HAL status. 00485 */ 00486 HAL_StatusTypeDef HAL_DFSDM_ChannelDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel) 00487 { 00488 __IO uint32_t *channelCounterPtr; 00489 DFSDM_Channel_HandleTypeDef **channelHandleTable; 00490 DFSDM_Channel_TypeDef *channel0Instance; 00491 00492 /* Check DFSDM Channel handle */ 00493 if(hdfsdm_channel == NULL) 00494 { 00495 return HAL_ERROR; 00496 } 00497 00498 /* Check parameters */ 00499 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance)); 00500 00501 #if defined(DFSDM2_Channel0) 00502 if (IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance)) 00503 { 00504 channelCounterPtr = &v_dfsdm1ChannelCounter; 00505 channelHandleTable = a_dfsdm1ChannelHandle; 00506 channel0Instance = DFSDM1_Channel0; 00507 } 00508 else 00509 { 00510 channelCounterPtr = &v_dfsdm2ChannelCounter; 00511 channelHandleTable = a_dfsdm2ChannelHandle; 00512 channel0Instance = DFSDM2_Channel0; 00513 } 00514 #else /* DFSDM2_Channel0 */ 00515 channelCounterPtr = &v_dfsdm1ChannelCounter; 00516 channelHandleTable = a_dfsdm1ChannelHandle; 00517 channel0Instance = DFSDM1_Channel0; 00518 #endif /* DFSDM2_Channel0 */ 00519 00520 /* Check that channel has not been already deinitialized */ 00521 if (channelHandleTable[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] == NULL) 00522 { 00523 return HAL_ERROR; 00524 } 00525 00526 /* Disable the DFSDM channel */ 00527 hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CHEN); 00528 00529 /* Update the channel counter */ 00530 (*channelCounterPtr)--; 00531 00532 /* Disable global DFSDM at deinit of last channel */ 00533 if (*channelCounterPtr == 0U) 00534 { 00535 channel0Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_DFSDMEN); 00536 } 00537 00538 /* Call MSP deinit function */ 00539 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1) 00540 if(hdfsdm_channel->MspDeInitCallback == NULL) 00541 { 00542 hdfsdm_channel->MspDeInitCallback = HAL_DFSDM_ChannelMspDeInit; 00543 } 00544 hdfsdm_channel->MspDeInitCallback(hdfsdm_channel); 00545 #else 00546 HAL_DFSDM_ChannelMspDeInit(hdfsdm_channel); 00547 #endif 00548 00549 /* Set DFSDM Channel in reset state */ 00550 hdfsdm_channel->State = HAL_DFSDM_CHANNEL_STATE_RESET; 00551 00552 /* Reset channel handle in DFSDM channel handle table */ 00553 channelHandleTable[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] = (DFSDM_Channel_HandleTypeDef *) NULL; 00554 00555 return HAL_OK; 00556 } 00557 00558 /** 00559 * @brief Initialize the DFSDM channel MSP. 00560 * @param hdfsdm_channel DFSDM channel handle. 00561 * @retval None 00562 */ 00563 __weak void HAL_DFSDM_ChannelMspInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel) 00564 { 00565 /* Prevent unused argument(s) compilation warning */ 00566 UNUSED(hdfsdm_channel); 00567 00568 /* NOTE : This function should not be modified, when the function is needed, 00569 the HAL_DFSDM_ChannelMspInit could be implemented in the user file. 00570 */ 00571 } 00572 00573 /** 00574 * @brief De-initialize the DFSDM channel MSP. 00575 * @param hdfsdm_channel DFSDM channel handle. 00576 * @retval None 00577 */ 00578 __weak void HAL_DFSDM_ChannelMspDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel) 00579 { 00580 /* Prevent unused argument(s) compilation warning */ 00581 UNUSED(hdfsdm_channel); 00582 00583 /* NOTE : This function should not be modified, when the function is needed, 00584 the HAL_DFSDM_ChannelMspDeInit could be implemented in the user file. 00585 */ 00586 } 00587 00588 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1) 00589 /** 00590 * @brief Register a user DFSDM channel callback 00591 * to be used instead of the weak predefined callback. 00592 * @param hdfsdm_channel DFSDM channel handle. 00593 * @param CallbackID ID of the callback to be registered. 00594 * This parameter can be one of the following values: 00595 * @arg @ref HAL_DFSDM_CHANNEL_CKAB_CB_ID clock absence detection callback ID. 00596 * @arg @ref HAL_DFSDM_CHANNEL_SCD_CB_ID short circuit detection callback ID. 00597 * @arg @ref HAL_DFSDM_CHANNEL_MSPINIT_CB_ID MSP init callback ID. 00598 * @arg @ref HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID MSP de-init callback ID. 00599 * @param pCallback pointer to the callback function. 00600 * @retval HAL status. 00601 */ 00602 HAL_StatusTypeDef HAL_DFSDM_Channel_RegisterCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, 00603 HAL_DFSDM_Channel_CallbackIDTypeDef CallbackID, 00604 pDFSDM_Channel_CallbackTypeDef pCallback) 00605 { 00606 HAL_StatusTypeDef status = HAL_OK; 00607 00608 if(pCallback == NULL) 00609 { 00610 /* update return status */ 00611 status = HAL_ERROR; 00612 } 00613 else 00614 { 00615 if(HAL_DFSDM_CHANNEL_STATE_READY == hdfsdm_channel->State) 00616 { 00617 switch (CallbackID) 00618 { 00619 case HAL_DFSDM_CHANNEL_CKAB_CB_ID : 00620 hdfsdm_channel->CkabCallback = pCallback; 00621 break; 00622 case HAL_DFSDM_CHANNEL_SCD_CB_ID : 00623 hdfsdm_channel->ScdCallback = pCallback; 00624 break; 00625 case HAL_DFSDM_CHANNEL_MSPINIT_CB_ID : 00626 hdfsdm_channel->MspInitCallback = pCallback; 00627 break; 00628 case HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID : 00629 hdfsdm_channel->MspDeInitCallback = pCallback; 00630 break; 00631 default : 00632 /* update return status */ 00633 status = HAL_ERROR; 00634 break; 00635 } 00636 } 00637 else if(HAL_DFSDM_CHANNEL_STATE_RESET == hdfsdm_channel->State) 00638 { 00639 switch (CallbackID) 00640 { 00641 case HAL_DFSDM_CHANNEL_MSPINIT_CB_ID : 00642 hdfsdm_channel->MspInitCallback = pCallback; 00643 break; 00644 case HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID : 00645 hdfsdm_channel->MspDeInitCallback = pCallback; 00646 break; 00647 default : 00648 /* update return status */ 00649 status = HAL_ERROR; 00650 break; 00651 } 00652 } 00653 else 00654 { 00655 /* update return status */ 00656 status = HAL_ERROR; 00657 } 00658 } 00659 return status; 00660 } 00661 00662 /** 00663 * @brief Unregister a user DFSDM channel callback. 00664 * DFSDM channel callback is redirected to the weak predefined callback. 00665 * @param hdfsdm_channel DFSDM channel handle. 00666 * @param CallbackID ID of the callback to be unregistered. 00667 * This parameter can be one of the following values: 00668 * @arg @ref HAL_DFSDM_CHANNEL_CKAB_CB_ID clock absence detection callback ID. 00669 * @arg @ref HAL_DFSDM_CHANNEL_SCD_CB_ID short circuit detection callback ID. 00670 * @arg @ref HAL_DFSDM_CHANNEL_MSPINIT_CB_ID MSP init callback ID. 00671 * @arg @ref HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID MSP de-init callback ID. 00672 * @retval HAL status. 00673 */ 00674 HAL_StatusTypeDef HAL_DFSDM_Channel_UnRegisterCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, 00675 HAL_DFSDM_Channel_CallbackIDTypeDef CallbackID) 00676 { 00677 HAL_StatusTypeDef status = HAL_OK; 00678 00679 if(HAL_DFSDM_CHANNEL_STATE_READY == hdfsdm_channel->State) 00680 { 00681 switch (CallbackID) 00682 { 00683 case HAL_DFSDM_CHANNEL_CKAB_CB_ID : 00684 hdfsdm_channel->CkabCallback = HAL_DFSDM_ChannelCkabCallback; 00685 break; 00686 case HAL_DFSDM_CHANNEL_SCD_CB_ID : 00687 hdfsdm_channel->ScdCallback = HAL_DFSDM_ChannelScdCallback; 00688 break; 00689 case HAL_DFSDM_CHANNEL_MSPINIT_CB_ID : 00690 hdfsdm_channel->MspInitCallback = HAL_DFSDM_ChannelMspInit; 00691 break; 00692 case HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID : 00693 hdfsdm_channel->MspDeInitCallback = HAL_DFSDM_ChannelMspDeInit; 00694 break; 00695 default : 00696 /* update return status */ 00697 status = HAL_ERROR; 00698 break; 00699 } 00700 } 00701 else if(HAL_DFSDM_CHANNEL_STATE_RESET == hdfsdm_channel->State) 00702 { 00703 switch (CallbackID) 00704 { 00705 case HAL_DFSDM_CHANNEL_MSPINIT_CB_ID : 00706 hdfsdm_channel->MspInitCallback = HAL_DFSDM_ChannelMspInit; 00707 break; 00708 case HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID : 00709 hdfsdm_channel->MspDeInitCallback = HAL_DFSDM_ChannelMspDeInit; 00710 break; 00711 default : 00712 /* update return status */ 00713 status = HAL_ERROR; 00714 break; 00715 } 00716 } 00717 else 00718 { 00719 /* update return status */ 00720 status = HAL_ERROR; 00721 } 00722 return status; 00723 } 00724 #endif /* USE_HAL_DFSDM_REGISTER_CALLBACKS */ 00725 00726 /** 00727 * @} 00728 */ 00729 00730 /** @defgroup DFSDM_Exported_Functions_Group2_Channel Channel operation functions 00731 * @brief Channel operation functions 00732 * 00733 @verbatim 00734 ============================================================================== 00735 ##### Channel operation functions ##### 00736 ============================================================================== 00737 [..] This section provides functions allowing to: 00738 (+) Manage clock absence detector feature. 00739 (+) Manage short circuit detector feature. 00740 (+) Get analog watchdog value. 00741 (+) Modify offset value. 00742 @endverbatim 00743 * @{ 00744 */ 00745 00746 /** 00747 * @brief This function allows to start clock absence detection in polling mode. 00748 * @note Same mode has to be used for all channels. 00749 * @note If clock is not available on this channel during 5 seconds, 00750 * clock absence detection will not be activated and function 00751 * will return HAL_TIMEOUT error. 00752 * @param hdfsdm_channel DFSDM channel handle. 00753 * @retval HAL status 00754 */ 00755 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel) 00756 { 00757 HAL_StatusTypeDef status = HAL_OK; 00758 uint32_t channel; 00759 uint32_t tickstart; 00760 DFSDM_Filter_TypeDef *filter0Instance; 00761 00762 /* Check parameters */ 00763 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance)); 00764 00765 #if defined(DFSDM2_Channel0) 00766 if (IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance)) 00767 { 00768 filter0Instance = DFSDM1_Filter0; 00769 } 00770 else 00771 { 00772 filter0Instance = DFSDM2_Filter0; 00773 } 00774 #else /* DFSDM2_Channel0 */ 00775 filter0Instance = DFSDM1_Filter0; 00776 #endif /* DFSDM2_Channel0 */ 00777 00778 /* Check DFSDM channel state */ 00779 if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY) 00780 { 00781 /* Return error status */ 00782 status = HAL_ERROR; 00783 } 00784 else 00785 { 00786 /* Get channel number from channel instance */ 00787 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance); 00788 00789 /* Get timeout */ 00790 tickstart = HAL_GetTick(); 00791 00792 /* Clear clock absence flag */ 00793 while ((((filter0Instance->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_Pos + channel)) & 1U) != 0U) 00794 { 00795 filter0Instance->FLTICR = (1UL << (DFSDM_FLTICR_CLRCKABF_Pos + channel)); 00796 00797 /* Check the Timeout */ 00798 if((HAL_GetTick()-tickstart) > DFSDM_CKAB_TIMEOUT) 00799 { 00800 /* Set timeout status */ 00801 status = HAL_TIMEOUT; 00802 break; 00803 } 00804 } 00805 00806 if(status == HAL_OK) 00807 { 00808 /* Start clock absence detection */ 00809 hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_CKABEN; 00810 } 00811 } 00812 /* Return function status */ 00813 return status; 00814 } 00815 00816 /** 00817 * @brief This function allows to poll for the clock absence detection. 00818 * @param hdfsdm_channel DFSDM channel handle. 00819 * @param Timeout Timeout value in milliseconds. 00820 * @retval HAL status 00821 */ 00822 HAL_StatusTypeDef HAL_DFSDM_ChannelPollForCkab(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, 00823 uint32_t Timeout) 00824 { 00825 uint32_t tickstart; 00826 uint32_t channel; 00827 DFSDM_Filter_TypeDef *filter0Instance; 00828 00829 /* Check parameters */ 00830 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance)); 00831 00832 #if defined(DFSDM2_Channel0) 00833 if (IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance)) 00834 { 00835 filter0Instance = DFSDM1_Filter0; 00836 } 00837 else 00838 { 00839 filter0Instance = DFSDM2_Filter0; 00840 } 00841 #else /* DFSDM2_Channel0 */ 00842 filter0Instance = DFSDM1_Filter0; 00843 #endif /* DFSDM2_Channel0 */ 00844 00845 /* Check DFSDM channel state */ 00846 if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY) 00847 { 00848 /* Return error status */ 00849 return HAL_ERROR; 00850 } 00851 else 00852 { 00853 /* Get channel number from channel instance */ 00854 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance); 00855 00856 /* Get timeout */ 00857 tickstart = HAL_GetTick(); 00858 00859 /* Wait clock absence detection */ 00860 while ((((filter0Instance->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_Pos + channel)) & 1U) == 0U) 00861 { 00862 /* Check the Timeout */ 00863 if(Timeout != HAL_MAX_DELAY) 00864 { 00865 if(((HAL_GetTick()-tickstart) > Timeout) || (Timeout == 0U)) 00866 { 00867 /* Return timeout status */ 00868 return HAL_TIMEOUT; 00869 } 00870 } 00871 } 00872 00873 /* Clear clock absence detection flag */ 00874 filter0Instance->FLTICR = (1UL << (DFSDM_FLTICR_CLRCKABF_Pos + channel)); 00875 00876 /* Return function status */ 00877 return HAL_OK; 00878 } 00879 } 00880 00881 /** 00882 * @brief This function allows to stop clock absence detection in polling mode. 00883 * @param hdfsdm_channel DFSDM channel handle. 00884 * @retval HAL status 00885 */ 00886 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel) 00887 { 00888 HAL_StatusTypeDef status = HAL_OK; 00889 uint32_t channel; 00890 DFSDM_Filter_TypeDef *filter0Instance; 00891 00892 /* Check parameters */ 00893 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance)); 00894 00895 #if defined(DFSDM2_Channel0) 00896 if (IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance)) 00897 { 00898 filter0Instance = DFSDM1_Filter0; 00899 } 00900 else 00901 { 00902 filter0Instance = DFSDM2_Filter0; 00903 } 00904 #else /* DFSDM2_Channel0 */ 00905 filter0Instance = DFSDM1_Filter0; 00906 #endif /* DFSDM2_Channel0 */ 00907 00908 /* Check DFSDM channel state */ 00909 if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY) 00910 { 00911 /* Return error status */ 00912 status = HAL_ERROR; 00913 } 00914 else 00915 { 00916 /* Stop clock absence detection */ 00917 hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKABEN); 00918 00919 /* Clear clock absence flag */ 00920 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance); 00921 filter0Instance->FLTICR = (1UL << (DFSDM_FLTICR_CLRCKABF_Pos + channel)); 00922 } 00923 /* Return function status */ 00924 return status; 00925 } 00926 00927 /** 00928 * @brief This function allows to start clock absence detection in interrupt mode. 00929 * @note Same mode has to be used for all channels. 00930 * @note If clock is not available on this channel during 5 seconds, 00931 * clock absence detection will not be activated and function 00932 * will return HAL_TIMEOUT error. 00933 * @param hdfsdm_channel DFSDM channel handle. 00934 * @retval HAL status 00935 */ 00936 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel) 00937 { 00938 HAL_StatusTypeDef status = HAL_OK; 00939 uint32_t channel; 00940 uint32_t tickstart; 00941 DFSDM_Filter_TypeDef *filter0Instance; 00942 00943 /* Check parameters */ 00944 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance)); 00945 00946 #if defined(DFSDM2_Channel0) 00947 if (IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance)) 00948 { 00949 filter0Instance = DFSDM1_Filter0; 00950 } 00951 else 00952 { 00953 filter0Instance = DFSDM2_Filter0; 00954 } 00955 #else /* DFSDM2_Channel0 */ 00956 filter0Instance = DFSDM1_Filter0; 00957 #endif /* DFSDM2_Channel0 */ 00958 00959 /* Check DFSDM channel state */ 00960 if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY) 00961 { 00962 /* Return error status */ 00963 status = HAL_ERROR; 00964 } 00965 else 00966 { 00967 /* Get channel number from channel instance */ 00968 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance); 00969 00970 /* Get timeout */ 00971 tickstart = HAL_GetTick(); 00972 00973 /* Clear clock absence flag */ 00974 while ((((filter0Instance->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_Pos + channel)) & 1U) != 0U) 00975 { 00976 filter0Instance->FLTICR = (1UL << (DFSDM_FLTICR_CLRCKABF_Pos + channel)); 00977 00978 /* Check the Timeout */ 00979 if((HAL_GetTick()-tickstart) > DFSDM_CKAB_TIMEOUT) 00980 { 00981 /* Set timeout status */ 00982 status = HAL_TIMEOUT; 00983 break; 00984 } 00985 } 00986 00987 if(status == HAL_OK) 00988 { 00989 /* Activate clock absence detection interrupt */ 00990 filter0Instance->FLTCR2 |= DFSDM_FLTCR2_CKABIE; 00991 00992 /* Start clock absence detection */ 00993 hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_CKABEN; 00994 } 00995 } 00996 /* Return function status */ 00997 return status; 00998 } 00999 01000 /** 01001 * @brief Clock absence detection callback. 01002 * @param hdfsdm_channel DFSDM channel handle. 01003 * @retval None 01004 */ 01005 __weak void HAL_DFSDM_ChannelCkabCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel) 01006 { 01007 /* Prevent unused argument(s) compilation warning */ 01008 UNUSED(hdfsdm_channel); 01009 01010 /* NOTE : This function should not be modified, when the callback is needed, 01011 the HAL_DFSDM_ChannelCkabCallback could be implemented in the user file 01012 */ 01013 } 01014 01015 /** 01016 * @brief This function allows to stop clock absence detection in interrupt mode. 01017 * @note Interrupt will be disabled for all channels 01018 * @param hdfsdm_channel DFSDM channel handle. 01019 * @retval HAL status 01020 */ 01021 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel) 01022 { 01023 HAL_StatusTypeDef status = HAL_OK; 01024 uint32_t channel; 01025 DFSDM_Filter_TypeDef *filter0Instance; 01026 01027 /* Check parameters */ 01028 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance)); 01029 01030 #if defined(DFSDM2_Channel0) 01031 if (IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance)) 01032 { 01033 filter0Instance = DFSDM1_Filter0; 01034 } 01035 else 01036 { 01037 filter0Instance = DFSDM2_Filter0; 01038 } 01039 #else /* DFSDM2_Channel0 */ 01040 filter0Instance = DFSDM1_Filter0; 01041 #endif /* DFSDM2_Channel0 */ 01042 01043 /* Check DFSDM channel state */ 01044 if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY) 01045 { 01046 /* Return error status */ 01047 status = HAL_ERROR; 01048 } 01049 else 01050 { 01051 /* Stop clock absence detection */ 01052 hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKABEN); 01053 01054 /* Clear clock absence flag */ 01055 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance); 01056 filter0Instance->FLTICR = (1UL << (DFSDM_FLTICR_CLRCKABF_Pos + channel)); 01057 01058 /* Disable clock absence detection interrupt */ 01059 filter0Instance->FLTCR2 &= ~(DFSDM_FLTCR2_CKABIE); 01060 } 01061 /* Return function status */ 01062 return status; 01063 } 01064 01065 /** 01066 * @brief This function allows to start short circuit detection in polling mode. 01067 * @note Same mode has to be used for all channels 01068 * @param hdfsdm_channel DFSDM channel handle. 01069 * @param Threshold Short circuit detector threshold. 01070 * This parameter must be a number between Min_Data = 0 and Max_Data = 255. 01071 * @param BreakSignal Break signals assigned to short circuit event. 01072 * This parameter can be a values combination of @ref DFSDM_BreakSignals. 01073 * @retval HAL status 01074 */ 01075 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, 01076 uint32_t Threshold, 01077 uint32_t BreakSignal) 01078 { 01079 HAL_StatusTypeDef status = HAL_OK; 01080 01081 /* Check parameters */ 01082 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance)); 01083 assert_param(IS_DFSDM_CHANNEL_SCD_THRESHOLD(Threshold)); 01084 assert_param(IS_DFSDM_BREAK_SIGNALS(BreakSignal)); 01085 01086 /* Check DFSDM channel state */ 01087 if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY) 01088 { 01089 /* Return error status */ 01090 status = HAL_ERROR; 01091 } 01092 else 01093 { 01094 /* Configure threshold and break signals */ 01095 hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_BKSCD | DFSDM_CHAWSCDR_SCDT); 01096 hdfsdm_channel->Instance->CHAWSCDR |= ((BreakSignal << DFSDM_CHAWSCDR_BKSCD_Pos) | \ 01097 Threshold); 01098 01099 /* Start short circuit detection */ 01100 hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_SCDEN; 01101 } 01102 /* Return function status */ 01103 return status; 01104 } 01105 01106 /** 01107 * @brief This function allows to poll for the short circuit detection. 01108 * @param hdfsdm_channel DFSDM channel handle. 01109 * @param Timeout Timeout value in milliseconds. 01110 * @retval HAL status 01111 */ 01112 HAL_StatusTypeDef HAL_DFSDM_ChannelPollForScd(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, 01113 uint32_t Timeout) 01114 { 01115 uint32_t tickstart; 01116 uint32_t channel; 01117 DFSDM_Filter_TypeDef *filter0Instance; 01118 01119 /* Check parameters */ 01120 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance)); 01121 01122 #if defined(DFSDM2_Channel0) 01123 if (IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance)) 01124 { 01125 filter0Instance = DFSDM1_Filter0; 01126 } 01127 else 01128 { 01129 filter0Instance = DFSDM2_Filter0; 01130 } 01131 #else /* DFSDM2_Channel0 */ 01132 filter0Instance = DFSDM1_Filter0; 01133 #endif /* DFSDM2_Channel0 */ 01134 01135 /* Check DFSDM channel state */ 01136 if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY) 01137 { 01138 /* Return error status */ 01139 return HAL_ERROR; 01140 } 01141 else 01142 { 01143 /* Get channel number from channel instance */ 01144 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance); 01145 01146 /* Get timeout */ 01147 tickstart = HAL_GetTick(); 01148 01149 /* Wait short circuit detection */ 01150 while (((filter0Instance->FLTISR & DFSDM_FLTISR_SCDF) >> (DFSDM_FLTISR_SCDF_Pos + channel)) == 0U) 01151 { 01152 /* Check the Timeout */ 01153 if(Timeout != HAL_MAX_DELAY) 01154 { 01155 if(((HAL_GetTick()-tickstart) > Timeout) || (Timeout == 0U)) 01156 { 01157 /* Return timeout status */ 01158 return HAL_TIMEOUT; 01159 } 01160 } 01161 } 01162 01163 /* Clear short circuit detection flag */ 01164 filter0Instance->FLTICR = (1UL << (DFSDM_FLTICR_CLRSCDF_Pos + channel)); 01165 01166 /* Return function status */ 01167 return HAL_OK; 01168 } 01169 } 01170 01171 /** 01172 * @brief This function allows to stop short circuit detection in polling mode. 01173 * @param hdfsdm_channel DFSDM channel handle. 01174 * @retval HAL status 01175 */ 01176 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel) 01177 { 01178 HAL_StatusTypeDef status = HAL_OK; 01179 uint32_t channel; 01180 DFSDM_Filter_TypeDef *filter0Instance; 01181 01182 /* Check parameters */ 01183 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance)); 01184 01185 #if defined(DFSDM2_Channel0) 01186 if (IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance)) 01187 { 01188 filter0Instance = DFSDM1_Filter0; 01189 } 01190 else 01191 { 01192 filter0Instance = DFSDM2_Filter0; 01193 } 01194 #else /* DFSDM2_Channel0 */ 01195 filter0Instance = DFSDM1_Filter0; 01196 #endif /* DFSDM2_Channel0 */ 01197 01198 /* Check DFSDM channel state */ 01199 if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY) 01200 { 01201 /* Return error status */ 01202 status = HAL_ERROR; 01203 } 01204 else 01205 { 01206 /* Stop short circuit detection */ 01207 hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SCDEN); 01208 01209 /* Clear short circuit detection flag */ 01210 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance); 01211 filter0Instance->FLTICR = (1UL << (DFSDM_FLTICR_CLRSCDF_Pos + channel)); 01212 } 01213 /* Return function status */ 01214 return status; 01215 } 01216 01217 /** 01218 * @brief This function allows to start short circuit detection in interrupt mode. 01219 * @note Same mode has to be used for all channels 01220 * @param hdfsdm_channel DFSDM channel handle. 01221 * @param Threshold Short circuit detector threshold. 01222 * This parameter must be a number between Min_Data = 0 and Max_Data = 255. 01223 * @param BreakSignal Break signals assigned to short circuit event. 01224 * This parameter can be a values combination of @ref DFSDM_BreakSignals. 01225 * @retval HAL status 01226 */ 01227 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, 01228 uint32_t Threshold, 01229 uint32_t BreakSignal) 01230 { 01231 HAL_StatusTypeDef status = HAL_OK; 01232 DFSDM_Filter_TypeDef *filter0Instance; 01233 01234 /* Check parameters */ 01235 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance)); 01236 assert_param(IS_DFSDM_CHANNEL_SCD_THRESHOLD(Threshold)); 01237 assert_param(IS_DFSDM_BREAK_SIGNALS(BreakSignal)); 01238 01239 #if defined(DFSDM2_Channel0) 01240 if (IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance)) 01241 { 01242 filter0Instance = DFSDM1_Filter0; 01243 } 01244 else 01245 { 01246 filter0Instance = DFSDM2_Filter0; 01247 } 01248 #else /* DFSDM2_Channel0 */ 01249 filter0Instance = DFSDM1_Filter0; 01250 #endif /* DFSDM2_Channel0 */ 01251 01252 /* Check DFSDM channel state */ 01253 if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY) 01254 { 01255 /* Return error status */ 01256 status = HAL_ERROR; 01257 } 01258 else 01259 { 01260 /* Activate short circuit detection interrupt */ 01261 filter0Instance->FLTCR2 |= DFSDM_FLTCR2_SCDIE; 01262 01263 /* Configure threshold and break signals */ 01264 hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_BKSCD | DFSDM_CHAWSCDR_SCDT); 01265 hdfsdm_channel->Instance->CHAWSCDR |= ((BreakSignal << DFSDM_CHAWSCDR_BKSCD_Pos) | \ 01266 Threshold); 01267 01268 /* Start short circuit detection */ 01269 hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_SCDEN; 01270 } 01271 /* Return function status */ 01272 return status; 01273 } 01274 01275 /** 01276 * @brief Short circuit detection callback. 01277 * @param hdfsdm_channel DFSDM channel handle. 01278 * @retval None 01279 */ 01280 __weak void HAL_DFSDM_ChannelScdCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel) 01281 { 01282 /* Prevent unused argument(s) compilation warning */ 01283 UNUSED(hdfsdm_channel); 01284 01285 /* NOTE : This function should not be modified, when the callback is needed, 01286 the HAL_DFSDM_ChannelScdCallback could be implemented in the user file 01287 */ 01288 } 01289 01290 /** 01291 * @brief This function allows to stop short circuit detection in interrupt mode. 01292 * @note Interrupt will be disabled for all channels 01293 * @param hdfsdm_channel DFSDM channel handle. 01294 * @retval HAL status 01295 */ 01296 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel) 01297 { 01298 HAL_StatusTypeDef status = HAL_OK; 01299 uint32_t channel; 01300 DFSDM_Filter_TypeDef *filter0Instance; 01301 01302 /* Check parameters */ 01303 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance)); 01304 01305 #if defined(DFSDM2_Channel0) 01306 if (IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance)) 01307 { 01308 filter0Instance = DFSDM1_Filter0; 01309 } 01310 else 01311 { 01312 filter0Instance = DFSDM2_Filter0; 01313 } 01314 #else /* DFSDM2_Channel0 */ 01315 filter0Instance = DFSDM1_Filter0; 01316 #endif /* DFSDM2_Channel0 */ 01317 01318 /* Check DFSDM channel state */ 01319 if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY) 01320 { 01321 /* Return error status */ 01322 status = HAL_ERROR; 01323 } 01324 else 01325 { 01326 /* Stop short circuit detection */ 01327 hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SCDEN); 01328 01329 /* Clear short circuit detection flag */ 01330 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance); 01331 filter0Instance->FLTICR = (1UL << (DFSDM_FLTICR_CLRSCDF_Pos + channel)); 01332 01333 /* Disable short circuit detection interrupt */ 01334 filter0Instance->FLTCR2 &= ~(DFSDM_FLTCR2_SCDIE); 01335 } 01336 /* Return function status */ 01337 return status; 01338 } 01339 01340 /** 01341 * @brief This function allows to get channel analog watchdog value. 01342 * @param hdfsdm_channel DFSDM channel handle. 01343 * @retval Channel analog watchdog value. 01344 */ 01345 int16_t HAL_DFSDM_ChannelGetAwdValue(DFSDM_Channel_HandleTypeDef *hdfsdm_channel) 01346 { 01347 return (int16_t) hdfsdm_channel->Instance->CHWDATAR; 01348 } 01349 01350 /** 01351 * @brief This function allows to modify channel offset value. 01352 * @param hdfsdm_channel DFSDM channel handle. 01353 * @param Offset DFSDM channel offset. 01354 * This parameter must be a number between Min_Data = -8388608 and Max_Data = 8388607. 01355 * @retval HAL status. 01356 */ 01357 HAL_StatusTypeDef HAL_DFSDM_ChannelModifyOffset(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, 01358 int32_t Offset) 01359 { 01360 HAL_StatusTypeDef status = HAL_OK; 01361 01362 /* Check parameters */ 01363 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance)); 01364 assert_param(IS_DFSDM_CHANNEL_OFFSET(Offset)); 01365 01366 /* Check DFSDM channel state */ 01367 if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY) 01368 { 01369 /* Return error status */ 01370 status = HAL_ERROR; 01371 } 01372 else 01373 { 01374 /* Modify channel offset */ 01375 hdfsdm_channel->Instance->CHCFGR2 &= ~(DFSDM_CHCFGR2_OFFSET); 01376 hdfsdm_channel->Instance->CHCFGR2 |= ((uint32_t) Offset << DFSDM_CHCFGR2_OFFSET_Pos); 01377 } 01378 /* Return function status */ 01379 return status; 01380 } 01381 01382 /** 01383 * @} 01384 */ 01385 01386 /** @defgroup DFSDM_Exported_Functions_Group3_Channel Channel state function 01387 * @brief Channel state function 01388 * 01389 @verbatim 01390 ============================================================================== 01391 ##### Channel state function ##### 01392 ============================================================================== 01393 [..] This section provides function allowing to: 01394 (+) Get channel handle state. 01395 @endverbatim 01396 * @{ 01397 */ 01398 01399 /** 01400 * @brief This function allows to get the current DFSDM channel handle state. 01401 * @param hdfsdm_channel DFSDM channel handle. 01402 * @retval DFSDM channel state. 01403 */ 01404 HAL_DFSDM_Channel_StateTypeDef HAL_DFSDM_ChannelGetState(DFSDM_Channel_HandleTypeDef *hdfsdm_channel) 01405 { 01406 /* Return DFSDM channel handle state */ 01407 return hdfsdm_channel->State; 01408 } 01409 01410 /** 01411 * @} 01412 */ 01413 01414 /** @defgroup DFSDM_Exported_Functions_Group1_Filter Filter initialization and de-initialization functions 01415 * @brief Filter initialization and de-initialization functions 01416 * 01417 @verbatim 01418 ============================================================================== 01419 ##### Filter initialization and de-initialization functions ##### 01420 ============================================================================== 01421 [..] This section provides functions allowing to: 01422 (+) Initialize the DFSDM filter. 01423 (+) De-initialize the DFSDM filter. 01424 @endverbatim 01425 * @{ 01426 */ 01427 01428 /** 01429 * @brief Initialize the DFSDM filter according to the specified parameters 01430 * in the DFSDM_FilterInitTypeDef structure and initialize the associated handle. 01431 * @param hdfsdm_filter DFSDM filter handle. 01432 * @retval HAL status. 01433 */ 01434 HAL_StatusTypeDef HAL_DFSDM_FilterInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 01435 { 01436 const DFSDM_Filter_TypeDef *filter0Instance; 01437 01438 /* Check DFSDM Channel handle */ 01439 if(hdfsdm_filter == NULL) 01440 { 01441 return HAL_ERROR; 01442 } 01443 01444 /* Check parameters */ 01445 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 01446 assert_param(IS_DFSDM_FILTER_REG_TRIGGER(hdfsdm_filter->Init.RegularParam.Trigger)); 01447 assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.RegularParam.FastMode)); 01448 assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.RegularParam.DmaMode)); 01449 assert_param(IS_DFSDM_FILTER_INJ_TRIGGER(hdfsdm_filter->Init.InjectedParam.Trigger)); 01450 assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.InjectedParam.ScanMode)); 01451 assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.InjectedParam.DmaMode)); 01452 assert_param(IS_DFSDM_FILTER_SINC_ORDER(hdfsdm_filter->Init.FilterParam.SincOrder)); 01453 assert_param(IS_DFSDM_FILTER_OVS_RATIO(hdfsdm_filter->Init.FilterParam.Oversampling)); 01454 assert_param(IS_DFSDM_FILTER_INTEGRATOR_OVS_RATIO(hdfsdm_filter->Init.FilterParam.IntOversampling)); 01455 01456 #if defined(DFSDM2_Channel0) 01457 if (IS_DFSDM1_FILTER_INSTANCE(hdfsdm_filter->Instance)) 01458 { 01459 filter0Instance = DFSDM1_Filter0; 01460 } 01461 else 01462 { 01463 filter0Instance = DFSDM2_Filter0; 01464 } 01465 #else /* DFSDM2_Channel0 */ 01466 filter0Instance = DFSDM1_Filter0; 01467 #endif /* DFSDM2_Channel0 */ 01468 01469 /* Check parameters compatibility */ 01470 if ((hdfsdm_filter->Instance == filter0Instance) && 01471 ((hdfsdm_filter->Init.RegularParam.Trigger == DFSDM_FILTER_SYNC_TRIGGER) || 01472 (hdfsdm_filter->Init.InjectedParam.Trigger == DFSDM_FILTER_SYNC_TRIGGER))) 01473 { 01474 return HAL_ERROR; 01475 } 01476 01477 /* Initialize DFSDM filter variables with default values */ 01478 hdfsdm_filter->RegularContMode = DFSDM_CONTINUOUS_CONV_OFF; 01479 hdfsdm_filter->InjectedChannelsNbr = 1; 01480 hdfsdm_filter->InjConvRemaining = 1; 01481 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_NONE; 01482 01483 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1) 01484 /* Reset callback pointers to the weak predefined callbacks */ 01485 hdfsdm_filter->AwdCallback = HAL_DFSDM_FilterAwdCallback; 01486 hdfsdm_filter->RegConvCpltCallback = HAL_DFSDM_FilterRegConvCpltCallback; 01487 hdfsdm_filter->RegConvHalfCpltCallback = HAL_DFSDM_FilterRegConvHalfCpltCallback; 01488 hdfsdm_filter->InjConvCpltCallback = HAL_DFSDM_FilterInjConvCpltCallback; 01489 hdfsdm_filter->InjConvHalfCpltCallback = HAL_DFSDM_FilterInjConvHalfCpltCallback; 01490 hdfsdm_filter->ErrorCallback = HAL_DFSDM_FilterErrorCallback; 01491 01492 /* Call MSP init function */ 01493 if(hdfsdm_filter->MspInitCallback == NULL) 01494 { 01495 hdfsdm_filter->MspInitCallback = HAL_DFSDM_FilterMspInit; 01496 } 01497 hdfsdm_filter->MspInitCallback(hdfsdm_filter); 01498 #else 01499 /* Call MSP init function */ 01500 HAL_DFSDM_FilterMspInit(hdfsdm_filter); 01501 #endif 01502 01503 /* Set regular parameters */ 01504 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RSYNC); 01505 if(hdfsdm_filter->Init.RegularParam.FastMode == ENABLE) 01506 { 01507 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_FAST; 01508 } 01509 else 01510 { 01511 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_FAST); 01512 } 01513 01514 if(hdfsdm_filter->Init.RegularParam.DmaMode == ENABLE) 01515 { 01516 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RDMAEN; 01517 } 01518 else 01519 { 01520 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RDMAEN); 01521 } 01522 01523 /* Set injected parameters */ 01524 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSYNC | DFSDM_FLTCR1_JEXTEN | DFSDM_FLTCR1_JEXTSEL); 01525 if(hdfsdm_filter->Init.InjectedParam.Trigger == DFSDM_FILTER_EXT_TRIGGER) 01526 { 01527 assert_param(IS_DFSDM_FILTER_EXT_TRIG(hdfsdm_filter->Init.InjectedParam.ExtTrigger)); 01528 assert_param(IS_DFSDM_FILTER_EXT_TRIG_EDGE(hdfsdm_filter->Init.InjectedParam.ExtTriggerEdge)); 01529 hdfsdm_filter->Instance->FLTCR1 |= (hdfsdm_filter->Init.InjectedParam.ExtTrigger); 01530 } 01531 01532 if(hdfsdm_filter->Init.InjectedParam.ScanMode == ENABLE) 01533 { 01534 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSCAN; 01535 } 01536 else 01537 { 01538 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSCAN); 01539 } 01540 01541 if(hdfsdm_filter->Init.InjectedParam.DmaMode == ENABLE) 01542 { 01543 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JDMAEN; 01544 } 01545 else 01546 { 01547 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JDMAEN); 01548 } 01549 01550 /* Set filter parameters */ 01551 hdfsdm_filter->Instance->FLTFCR &= ~(DFSDM_FLTFCR_FORD | DFSDM_FLTFCR_FOSR | DFSDM_FLTFCR_IOSR); 01552 hdfsdm_filter->Instance->FLTFCR |= (hdfsdm_filter->Init.FilterParam.SincOrder | 01553 ((hdfsdm_filter->Init.FilterParam.Oversampling - 1U) << DFSDM_FLTFCR_FOSR_Pos) | 01554 (hdfsdm_filter->Init.FilterParam.IntOversampling - 1U)); 01555 01556 /* Store regular and injected triggers and injected scan mode*/ 01557 hdfsdm_filter->RegularTrigger = hdfsdm_filter->Init.RegularParam.Trigger; 01558 hdfsdm_filter->InjectedTrigger = hdfsdm_filter->Init.InjectedParam.Trigger; 01559 hdfsdm_filter->ExtTriggerEdge = hdfsdm_filter->Init.InjectedParam.ExtTriggerEdge; 01560 hdfsdm_filter->InjectedScanMode = hdfsdm_filter->Init.InjectedParam.ScanMode; 01561 01562 /* Enable DFSDM filter */ 01563 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN; 01564 01565 /* Set DFSDM filter to ready state */ 01566 hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_READY; 01567 01568 return HAL_OK; 01569 } 01570 01571 /** 01572 * @brief De-initializes the DFSDM filter. 01573 * @param hdfsdm_filter DFSDM filter handle. 01574 * @retval HAL status. 01575 */ 01576 HAL_StatusTypeDef HAL_DFSDM_FilterDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 01577 { 01578 /* Check DFSDM filter handle */ 01579 if(hdfsdm_filter == NULL) 01580 { 01581 return HAL_ERROR; 01582 } 01583 01584 /* Check parameters */ 01585 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 01586 01587 /* Disable the DFSDM filter */ 01588 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN); 01589 01590 /* Call MSP deinit function */ 01591 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1) 01592 if(hdfsdm_filter->MspDeInitCallback == NULL) 01593 { 01594 hdfsdm_filter->MspDeInitCallback = HAL_DFSDM_FilterMspDeInit; 01595 } 01596 hdfsdm_filter->MspDeInitCallback(hdfsdm_filter); 01597 #else 01598 HAL_DFSDM_FilterMspDeInit(hdfsdm_filter); 01599 #endif 01600 01601 /* Set DFSDM filter in reset state */ 01602 hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_RESET; 01603 01604 return HAL_OK; 01605 } 01606 01607 /** 01608 * @brief Initializes the DFSDM filter MSP. 01609 * @param hdfsdm_filter DFSDM filter handle. 01610 * @retval None 01611 */ 01612 __weak void HAL_DFSDM_FilterMspInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 01613 { 01614 /* Prevent unused argument(s) compilation warning */ 01615 UNUSED(hdfsdm_filter); 01616 01617 /* NOTE : This function should not be modified, when the function is needed, 01618 the HAL_DFSDM_FilterMspInit could be implemented in the user file. 01619 */ 01620 } 01621 01622 /** 01623 * @brief De-initializes the DFSDM filter MSP. 01624 * @param hdfsdm_filter DFSDM filter handle. 01625 * @retval None 01626 */ 01627 __weak void HAL_DFSDM_FilterMspDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 01628 { 01629 /* Prevent unused argument(s) compilation warning */ 01630 UNUSED(hdfsdm_filter); 01631 01632 /* NOTE : This function should not be modified, when the function is needed, 01633 the HAL_DFSDM_FilterMspDeInit could be implemented in the user file. 01634 */ 01635 } 01636 01637 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1) 01638 /** 01639 * @brief Register a user DFSDM filter callback 01640 * to be used instead of the weak predefined callback. 01641 * @param hdfsdm_filter DFSDM filter handle. 01642 * @param CallbackID ID of the callback to be registered. 01643 * This parameter can be one of the following values: 01644 * @arg @ref HAL_DFSDM_FILTER_REGCONV_COMPLETE_CB_ID regular conversion complete callback ID. 01645 * @arg @ref HAL_DFSDM_FILTER_REGCONV_HALFCOMPLETE_CB_ID half regular conversion complete callback ID. 01646 * @arg @ref HAL_DFSDM_FILTER_INJCONV_COMPLETE_CB_ID injected conversion complete callback ID. 01647 * @arg @ref HAL_DFSDM_FILTER_INJCONV_HALFCOMPLETE_CB_ID half injected conversion complete callback ID. 01648 * @arg @ref HAL_DFSDM_FILTER_ERROR_CB_ID error callback ID. 01649 * @arg @ref HAL_DFSDM_FILTER_MSPINIT_CB_ID MSP init callback ID. 01650 * @arg @ref HAL_DFSDM_FILTER_MSPDEINIT_CB_ID MSP de-init callback ID. 01651 * @param pCallback pointer to the callback function. 01652 * @retval HAL status. 01653 */ 01654 HAL_StatusTypeDef HAL_DFSDM_Filter_RegisterCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, 01655 HAL_DFSDM_Filter_CallbackIDTypeDef CallbackID, 01656 pDFSDM_Filter_CallbackTypeDef pCallback) 01657 { 01658 HAL_StatusTypeDef status = HAL_OK; 01659 01660 if(pCallback == NULL) 01661 { 01662 /* update the error code */ 01663 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK; 01664 /* update return status */ 01665 status = HAL_ERROR; 01666 } 01667 else 01668 { 01669 if(HAL_DFSDM_FILTER_STATE_READY == hdfsdm_filter->State) 01670 { 01671 switch (CallbackID) 01672 { 01673 case HAL_DFSDM_FILTER_REGCONV_COMPLETE_CB_ID : 01674 hdfsdm_filter->RegConvCpltCallback = pCallback; 01675 break; 01676 case HAL_DFSDM_FILTER_REGCONV_HALFCOMPLETE_CB_ID : 01677 hdfsdm_filter->RegConvHalfCpltCallback = pCallback; 01678 break; 01679 case HAL_DFSDM_FILTER_INJCONV_COMPLETE_CB_ID : 01680 hdfsdm_filter->InjConvCpltCallback = pCallback; 01681 break; 01682 case HAL_DFSDM_FILTER_INJCONV_HALFCOMPLETE_CB_ID : 01683 hdfsdm_filter->InjConvHalfCpltCallback = pCallback; 01684 break; 01685 case HAL_DFSDM_FILTER_ERROR_CB_ID : 01686 hdfsdm_filter->ErrorCallback = pCallback; 01687 break; 01688 case HAL_DFSDM_FILTER_MSPINIT_CB_ID : 01689 hdfsdm_filter->MspInitCallback = pCallback; 01690 break; 01691 case HAL_DFSDM_FILTER_MSPDEINIT_CB_ID : 01692 hdfsdm_filter->MspDeInitCallback = pCallback; 01693 break; 01694 default : 01695 /* update the error code */ 01696 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK; 01697 /* update return status */ 01698 status = HAL_ERROR; 01699 break; 01700 } 01701 } 01702 else if(HAL_DFSDM_FILTER_STATE_RESET == hdfsdm_filter->State) 01703 { 01704 switch (CallbackID) 01705 { 01706 case HAL_DFSDM_FILTER_MSPINIT_CB_ID : 01707 hdfsdm_filter->MspInitCallback = pCallback; 01708 break; 01709 case HAL_DFSDM_FILTER_MSPDEINIT_CB_ID : 01710 hdfsdm_filter->MspDeInitCallback = pCallback; 01711 break; 01712 default : 01713 /* update the error code */ 01714 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK; 01715 /* update return status */ 01716 status = HAL_ERROR; 01717 break; 01718 } 01719 } 01720 else 01721 { 01722 /* update the error code */ 01723 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK; 01724 /* update return status */ 01725 status = HAL_ERROR; 01726 } 01727 } 01728 return status; 01729 } 01730 01731 /** 01732 * @brief Unregister a user DFSDM filter callback. 01733 * DFSDM filter callback is redirected to the weak predefined callback. 01734 * @param hdfsdm_filter DFSDM filter handle. 01735 * @param CallbackID ID of the callback to be unregistered. 01736 * This parameter can be one of the following values: 01737 * @arg @ref HAL_DFSDM_FILTER_REGCONV_COMPLETE_CB_ID regular conversion complete callback ID. 01738 * @arg @ref HAL_DFSDM_FILTER_REGCONV_HALFCOMPLETE_CB_ID half regular conversion complete callback ID. 01739 * @arg @ref HAL_DFSDM_FILTER_INJCONV_COMPLETE_CB_ID injected conversion complete callback ID. 01740 * @arg @ref HAL_DFSDM_FILTER_INJCONV_HALFCOMPLETE_CB_ID half injected conversion complete callback ID. 01741 * @arg @ref HAL_DFSDM_FILTER_ERROR_CB_ID error callback ID. 01742 * @arg @ref HAL_DFSDM_FILTER_MSPINIT_CB_ID MSP init callback ID. 01743 * @arg @ref HAL_DFSDM_FILTER_MSPDEINIT_CB_ID MSP de-init callback ID. 01744 * @retval HAL status. 01745 */ 01746 HAL_StatusTypeDef HAL_DFSDM_Filter_UnRegisterCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, 01747 HAL_DFSDM_Filter_CallbackIDTypeDef CallbackID) 01748 { 01749 HAL_StatusTypeDef status = HAL_OK; 01750 01751 if(HAL_DFSDM_FILTER_STATE_READY == hdfsdm_filter->State) 01752 { 01753 switch (CallbackID) 01754 { 01755 case HAL_DFSDM_FILTER_REGCONV_COMPLETE_CB_ID : 01756 hdfsdm_filter->RegConvCpltCallback = HAL_DFSDM_FilterRegConvCpltCallback; 01757 break; 01758 case HAL_DFSDM_FILTER_REGCONV_HALFCOMPLETE_CB_ID : 01759 hdfsdm_filter->RegConvHalfCpltCallback = HAL_DFSDM_FilterRegConvHalfCpltCallback; 01760 break; 01761 case HAL_DFSDM_FILTER_INJCONV_COMPLETE_CB_ID : 01762 hdfsdm_filter->InjConvCpltCallback = HAL_DFSDM_FilterInjConvCpltCallback; 01763 break; 01764 case HAL_DFSDM_FILTER_INJCONV_HALFCOMPLETE_CB_ID : 01765 hdfsdm_filter->InjConvHalfCpltCallback = HAL_DFSDM_FilterInjConvHalfCpltCallback; 01766 break; 01767 case HAL_DFSDM_FILTER_ERROR_CB_ID : 01768 hdfsdm_filter->ErrorCallback = HAL_DFSDM_FilterErrorCallback; 01769 break; 01770 case HAL_DFSDM_FILTER_MSPINIT_CB_ID : 01771 hdfsdm_filter->MspInitCallback = HAL_DFSDM_FilterMspInit; 01772 break; 01773 case HAL_DFSDM_FILTER_MSPDEINIT_CB_ID : 01774 hdfsdm_filter->MspDeInitCallback = HAL_DFSDM_FilterMspDeInit; 01775 break; 01776 default : 01777 /* update the error code */ 01778 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK; 01779 /* update return status */ 01780 status = HAL_ERROR; 01781 break; 01782 } 01783 } 01784 else if(HAL_DFSDM_FILTER_STATE_RESET == hdfsdm_filter->State) 01785 { 01786 switch (CallbackID) 01787 { 01788 case HAL_DFSDM_FILTER_MSPINIT_CB_ID : 01789 hdfsdm_filter->MspInitCallback = HAL_DFSDM_FilterMspInit; 01790 break; 01791 case HAL_DFSDM_FILTER_MSPDEINIT_CB_ID : 01792 hdfsdm_filter->MspDeInitCallback = HAL_DFSDM_FilterMspDeInit; 01793 break; 01794 default : 01795 /* update the error code */ 01796 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK; 01797 /* update return status */ 01798 status = HAL_ERROR; 01799 break; 01800 } 01801 } 01802 else 01803 { 01804 /* update the error code */ 01805 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK; 01806 /* update return status */ 01807 status = HAL_ERROR; 01808 } 01809 return status; 01810 } 01811 01812 /** 01813 * @brief Register a user DFSDM filter analog watchdog callback 01814 * to be used instead of the weak predefined callback. 01815 * @param hdfsdm_filter DFSDM filter handle. 01816 * @param pCallback pointer to the DFSDM filter analog watchdog callback function. 01817 * @retval HAL status. 01818 */ 01819 HAL_StatusTypeDef HAL_DFSDM_Filter_RegisterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, 01820 pDFSDM_Filter_AwdCallbackTypeDef pCallback) 01821 { 01822 HAL_StatusTypeDef status = HAL_OK; 01823 01824 if(pCallback == NULL) 01825 { 01826 /* update the error code */ 01827 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK; 01828 /* update return status */ 01829 status = HAL_ERROR; 01830 } 01831 else 01832 { 01833 if(HAL_DFSDM_FILTER_STATE_READY == hdfsdm_filter->State) 01834 { 01835 hdfsdm_filter->AwdCallback = pCallback; 01836 } 01837 else 01838 { 01839 /* update the error code */ 01840 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK; 01841 /* update return status */ 01842 status = HAL_ERROR; 01843 } 01844 } 01845 return status; 01846 } 01847 01848 /** 01849 * @brief Unregister a user DFSDM filter analog watchdog callback. 01850 * DFSDM filter AWD callback is redirected to the weak predefined callback. 01851 * @param hdfsdm_filter DFSDM filter handle. 01852 * @retval HAL status. 01853 */ 01854 HAL_StatusTypeDef HAL_DFSDM_Filter_UnRegisterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 01855 { 01856 HAL_StatusTypeDef status = HAL_OK; 01857 01858 if(HAL_DFSDM_FILTER_STATE_READY == hdfsdm_filter->State) 01859 { 01860 hdfsdm_filter->AwdCallback = HAL_DFSDM_FilterAwdCallback; 01861 } 01862 else 01863 { 01864 /* update the error code */ 01865 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK; 01866 /* update return status */ 01867 status = HAL_ERROR; 01868 } 01869 return status; 01870 } 01871 #endif /* USE_HAL_DFSDM_REGISTER_CALLBACKS */ 01872 01873 /** 01874 * @} 01875 */ 01876 01877 /** @defgroup DFSDM_Exported_Functions_Group2_Filter Filter control functions 01878 * @brief Filter control functions 01879 * 01880 @verbatim 01881 ============================================================================== 01882 ##### Filter control functions ##### 01883 ============================================================================== 01884 [..] This section provides functions allowing to: 01885 (+) Select channel and enable/disable continuous mode for regular conversion. 01886 (+) Select channels for injected conversion. 01887 @endverbatim 01888 * @{ 01889 */ 01890 01891 /** 01892 * @brief This function allows to select channel and to enable/disable 01893 * continuous mode for regular conversion. 01894 * @param hdfsdm_filter DFSDM filter handle. 01895 * @param Channel Channel for regular conversion. 01896 * This parameter can be a value of @ref DFSDM_Channel_Selection. 01897 * @param ContinuousMode Enable/disable continuous mode for regular conversion. 01898 * This parameter can be a value of @ref DFSDM_ContinuousMode. 01899 * @retval HAL status 01900 */ 01901 HAL_StatusTypeDef HAL_DFSDM_FilterConfigRegChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, 01902 uint32_t Channel, 01903 uint32_t ContinuousMode) 01904 { 01905 HAL_StatusTypeDef status = HAL_OK; 01906 01907 /* Check parameters */ 01908 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 01909 assert_param(IS_DFSDM_REGULAR_CHANNEL(Channel)); 01910 assert_param(IS_DFSDM_CONTINUOUS_MODE(ContinuousMode)); 01911 01912 /* Check DFSDM filter state */ 01913 if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_RESET) && 01914 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_ERROR)) 01915 { 01916 /* Configure channel and continuous mode for regular conversion */ 01917 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RCH | DFSDM_FLTCR1_RCONT); 01918 if(ContinuousMode == DFSDM_CONTINUOUS_CONV_ON) 01919 { 01920 hdfsdm_filter->Instance->FLTCR1 |= (uint32_t) (((Channel & DFSDM_MSB_MASK) << DFSDM_FLTCR1_MSB_RCH_OFFSET) | 01921 DFSDM_FLTCR1_RCONT); 01922 } 01923 else 01924 { 01925 hdfsdm_filter->Instance->FLTCR1 |= (uint32_t) ((Channel & DFSDM_MSB_MASK) << DFSDM_FLTCR1_MSB_RCH_OFFSET); 01926 } 01927 /* Store continuous mode information */ 01928 hdfsdm_filter->RegularContMode = ContinuousMode; 01929 } 01930 else 01931 { 01932 status = HAL_ERROR; 01933 } 01934 01935 /* Return function status */ 01936 return status; 01937 } 01938 01939 /** 01940 * @brief This function allows to select channels for injected conversion. 01941 * @param hdfsdm_filter DFSDM filter handle. 01942 * @param Channel Channels for injected conversion. 01943 * This parameter can be a values combination of @ref DFSDM_Channel_Selection. 01944 * @retval HAL status 01945 */ 01946 HAL_StatusTypeDef HAL_DFSDM_FilterConfigInjChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, 01947 uint32_t Channel) 01948 { 01949 HAL_StatusTypeDef status = HAL_OK; 01950 01951 /* Check parameters */ 01952 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 01953 assert_param(IS_DFSDM_INJECTED_CHANNEL(Channel)); 01954 01955 /* Check DFSDM filter state */ 01956 if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_RESET) && 01957 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_ERROR)) 01958 { 01959 /* Configure channel for injected conversion */ 01960 hdfsdm_filter->Instance->FLTJCHGR = (uint32_t) (Channel & DFSDM_LSB_MASK); 01961 /* Store number of injected channels */ 01962 hdfsdm_filter->InjectedChannelsNbr = DFSDM_GetInjChannelsNbr(Channel); 01963 /* Update number of injected channels remaining */ 01964 hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \ 01965 hdfsdm_filter->InjectedChannelsNbr : 1U; 01966 } 01967 else 01968 { 01969 status = HAL_ERROR; 01970 } 01971 /* Return function status */ 01972 return status; 01973 } 01974 01975 /** 01976 * @} 01977 */ 01978 01979 /** @defgroup DFSDM_Exported_Functions_Group3_Filter Filter operation functions 01980 * @brief Filter operation functions 01981 * 01982 @verbatim 01983 ============================================================================== 01984 ##### Filter operation functions ##### 01985 ============================================================================== 01986 [..] This section provides functions allowing to: 01987 (+) Start conversion of regular/injected channel. 01988 (+) Poll for the end of regular/injected conversion. 01989 (+) Stop conversion of regular/injected channel. 01990 (+) Start conversion of regular/injected channel and enable interrupt. 01991 (+) Call the callback functions at the end of regular/injected conversions. 01992 (+) Stop conversion of regular/injected channel and disable interrupt. 01993 (+) Start conversion of regular/injected channel and enable DMA transfer. 01994 (+) Stop conversion of regular/injected channel and disable DMA transfer. 01995 (+) Start analog watchdog and enable interrupt. 01996 (+) Call the callback function when analog watchdog occurs. 01997 (+) Stop analog watchdog and disable interrupt. 01998 (+) Start extreme detector. 01999 (+) Stop extreme detector. 02000 (+) Get result of regular channel conversion. 02001 (+) Get result of injected channel conversion. 02002 (+) Get extreme detector maximum and minimum values. 02003 (+) Get conversion time. 02004 (+) Handle DFSDM interrupt request. 02005 @endverbatim 02006 * @{ 02007 */ 02008 02009 /** 02010 * @brief This function allows to start regular conversion in polling mode. 02011 * @note This function should be called only when DFSDM filter instance is 02012 * in idle state or if injected conversion is ongoing. 02013 * @param hdfsdm_filter DFSDM filter handle. 02014 * @retval HAL status 02015 */ 02016 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 02017 { 02018 HAL_StatusTypeDef status = HAL_OK; 02019 02020 /* Check parameters */ 02021 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 02022 02023 /* Check DFSDM filter state */ 02024 if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \ 02025 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ)) 02026 { 02027 /* Start regular conversion */ 02028 DFSDM_RegConvStart(hdfsdm_filter); 02029 } 02030 else 02031 { 02032 status = HAL_ERROR; 02033 } 02034 /* Return function status */ 02035 return status; 02036 } 02037 02038 /** 02039 * @brief This function allows to poll for the end of regular conversion. 02040 * @note This function should be called only if regular conversion is ongoing. 02041 * @param hdfsdm_filter DFSDM filter handle. 02042 * @param Timeout Timeout value in milliseconds. 02043 * @retval HAL status 02044 */ 02045 HAL_StatusTypeDef HAL_DFSDM_FilterPollForRegConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, 02046 uint32_t Timeout) 02047 { 02048 uint32_t tickstart; 02049 02050 /* Check parameters */ 02051 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 02052 02053 /* Check DFSDM filter state */ 02054 if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \ 02055 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ)) 02056 { 02057 /* Return error status */ 02058 return HAL_ERROR; 02059 } 02060 else 02061 { 02062 /* Get timeout */ 02063 tickstart = HAL_GetTick(); 02064 02065 /* Wait end of regular conversion */ 02066 while((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_REOCF) != DFSDM_FLTISR_REOCF) 02067 { 02068 /* Check the Timeout */ 02069 if(Timeout != HAL_MAX_DELAY) 02070 { 02071 if(((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U)) 02072 { 02073 /* Return timeout status */ 02074 return HAL_TIMEOUT; 02075 } 02076 } 02077 } 02078 /* Check if overrun occurs */ 02079 if((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_ROVRF) == DFSDM_FLTISR_ROVRF) 02080 { 02081 /* Update error code and call error callback */ 02082 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_REGULAR_OVERRUN; 02083 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1) 02084 hdfsdm_filter->ErrorCallback(hdfsdm_filter); 02085 #else 02086 HAL_DFSDM_FilterErrorCallback(hdfsdm_filter); 02087 #endif 02088 02089 /* Clear regular overrun flag */ 02090 hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRROVRF; 02091 } 02092 /* Update DFSDM filter state only if not continuous conversion and SW trigger */ 02093 if((hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \ 02094 (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER)) 02095 { 02096 hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \ 02097 HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ; 02098 } 02099 /* Return function status */ 02100 return HAL_OK; 02101 } 02102 } 02103 02104 /** 02105 * @brief This function allows to stop regular conversion in polling mode. 02106 * @note This function should be called only if regular conversion is ongoing. 02107 * @param hdfsdm_filter DFSDM filter handle. 02108 * @retval HAL status 02109 */ 02110 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 02111 { 02112 HAL_StatusTypeDef status = HAL_OK; 02113 02114 /* Check parameters */ 02115 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 02116 02117 /* Check DFSDM filter state */ 02118 if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \ 02119 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ)) 02120 { 02121 /* Return error status */ 02122 status = HAL_ERROR; 02123 } 02124 else 02125 { 02126 /* Stop regular conversion */ 02127 DFSDM_RegConvStop(hdfsdm_filter); 02128 } 02129 /* Return function status */ 02130 return status; 02131 } 02132 02133 /** 02134 * @brief This function allows to start regular conversion in interrupt mode. 02135 * @note This function should be called only when DFSDM filter instance is 02136 * in idle state or if injected conversion is ongoing. 02137 * @param hdfsdm_filter DFSDM filter handle. 02138 * @retval HAL status 02139 */ 02140 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 02141 { 02142 HAL_StatusTypeDef status = HAL_OK; 02143 02144 /* Check parameters */ 02145 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 02146 02147 /* Check DFSDM filter state */ 02148 if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \ 02149 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ)) 02150 { 02151 /* Enable interrupts for regular conversions */ 02152 hdfsdm_filter->Instance->FLTCR2 |= (DFSDM_FLTCR2_REOCIE | DFSDM_FLTCR2_ROVRIE); 02153 02154 /* Start regular conversion */ 02155 DFSDM_RegConvStart(hdfsdm_filter); 02156 } 02157 else 02158 { 02159 status = HAL_ERROR; 02160 } 02161 /* Return function status */ 02162 return status; 02163 } 02164 02165 /** 02166 * @brief This function allows to stop regular conversion in interrupt mode. 02167 * @note This function should be called only if regular conversion is ongoing. 02168 * @param hdfsdm_filter DFSDM filter handle. 02169 * @retval HAL status 02170 */ 02171 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 02172 { 02173 HAL_StatusTypeDef status = HAL_OK; 02174 02175 /* Check parameters */ 02176 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 02177 02178 /* Check DFSDM filter state */ 02179 if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \ 02180 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ)) 02181 { 02182 /* Return error status */ 02183 status = HAL_ERROR; 02184 } 02185 else 02186 { 02187 /* Disable interrupts for regular conversions */ 02188 hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_REOCIE | DFSDM_FLTCR2_ROVRIE); 02189 02190 /* Stop regular conversion */ 02191 DFSDM_RegConvStop(hdfsdm_filter); 02192 } 02193 /* Return function status */ 02194 return status; 02195 } 02196 02197 /** 02198 * @brief This function allows to start regular conversion in DMA mode. 02199 * @note This function should be called only when DFSDM filter instance is 02200 * in idle state or if injected conversion is ongoing. 02201 * Please note that data on buffer will contain signed regular conversion 02202 * value on 24 most significant bits and corresponding channel on 3 least 02203 * significant bits. 02204 * @param hdfsdm_filter DFSDM filter handle. 02205 * @param pData The destination buffer address. 02206 * @param Length The length of data to be transferred from DFSDM filter to memory. 02207 * @retval HAL status 02208 */ 02209 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, 02210 int32_t *pData, 02211 uint32_t Length) 02212 { 02213 HAL_StatusTypeDef status = HAL_OK; 02214 02215 /* Check parameters */ 02216 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 02217 02218 /* Check destination address and length */ 02219 if((pData == NULL) || (Length == 0U)) 02220 { 02221 status = HAL_ERROR; 02222 } 02223 /* Check that DMA is enabled for regular conversion */ 02224 else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_RDMAEN) != DFSDM_FLTCR1_RDMAEN) 02225 { 02226 status = HAL_ERROR; 02227 } 02228 /* Check parameters compatibility */ 02229 else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \ 02230 (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \ 02231 (hdfsdm_filter->hdmaReg->Init.Mode == DMA_NORMAL) && \ 02232 (Length != 1U)) 02233 { 02234 status = HAL_ERROR; 02235 } 02236 else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \ 02237 (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \ 02238 (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR)) 02239 { 02240 status = HAL_ERROR; 02241 } 02242 /* Check DFSDM filter state */ 02243 else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \ 02244 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ)) 02245 { 02246 /* Set callbacks on DMA handler */ 02247 hdfsdm_filter->hdmaReg->XferCpltCallback = DFSDM_DMARegularConvCplt; 02248 hdfsdm_filter->hdmaReg->XferErrorCallback = DFSDM_DMAError; 02249 hdfsdm_filter->hdmaReg->XferHalfCpltCallback = (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR) ?\ 02250 DFSDM_DMARegularHalfConvCplt : NULL; 02251 02252 /* Start DMA in interrupt mode */ 02253 if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaReg, (uint32_t)&hdfsdm_filter->Instance->FLTRDATAR, \ 02254 (uint32_t) pData, Length) != HAL_OK) 02255 { 02256 /* Set DFSDM filter in error state */ 02257 hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR; 02258 status = HAL_ERROR; 02259 } 02260 else 02261 { 02262 /* Start regular conversion */ 02263 DFSDM_RegConvStart(hdfsdm_filter); 02264 } 02265 } 02266 else 02267 { 02268 status = HAL_ERROR; 02269 } 02270 /* Return function status */ 02271 return status; 02272 } 02273 02274 /** 02275 * @brief This function allows to start regular conversion in DMA mode and to get 02276 * only the 16 most significant bits of conversion. 02277 * @note This function should be called only when DFSDM filter instance is 02278 * in idle state or if injected conversion is ongoing. 02279 * Please note that data on buffer will contain signed 16 most significant 02280 * bits of regular conversion. 02281 * @param hdfsdm_filter DFSDM filter handle. 02282 * @param pData The destination buffer address. 02283 * @param Length The length of data to be transferred from DFSDM filter to memory. 02284 * @retval HAL status 02285 */ 02286 HAL_StatusTypeDef HAL_DFSDM_FilterRegularMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, 02287 int16_t *pData, 02288 uint32_t Length) 02289 { 02290 HAL_StatusTypeDef status = HAL_OK; 02291 02292 /* Check parameters */ 02293 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 02294 02295 /* Check destination address and length */ 02296 if((pData == NULL) || (Length == 0U)) 02297 { 02298 status = HAL_ERROR; 02299 } 02300 /* Check that DMA is enabled for regular conversion */ 02301 else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_RDMAEN) != DFSDM_FLTCR1_RDMAEN) 02302 { 02303 status = HAL_ERROR; 02304 } 02305 /* Check parameters compatibility */ 02306 else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \ 02307 (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \ 02308 (hdfsdm_filter->hdmaReg->Init.Mode == DMA_NORMAL) && \ 02309 (Length != 1U)) 02310 { 02311 status = HAL_ERROR; 02312 } 02313 else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \ 02314 (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \ 02315 (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR)) 02316 { 02317 status = HAL_ERROR; 02318 } 02319 /* Check DFSDM filter state */ 02320 else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \ 02321 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ)) 02322 { 02323 /* Set callbacks on DMA handler */ 02324 hdfsdm_filter->hdmaReg->XferCpltCallback = DFSDM_DMARegularConvCplt; 02325 hdfsdm_filter->hdmaReg->XferErrorCallback = DFSDM_DMAError; 02326 hdfsdm_filter->hdmaReg->XferHalfCpltCallback = (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR) ?\ 02327 DFSDM_DMARegularHalfConvCplt : NULL; 02328 02329 /* Start DMA in interrupt mode */ 02330 if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaReg, (uint32_t)(&hdfsdm_filter->Instance->FLTRDATAR) + 2U, \ 02331 (uint32_t) pData, Length) != HAL_OK) 02332 { 02333 /* Set DFSDM filter in error state */ 02334 hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR; 02335 status = HAL_ERROR; 02336 } 02337 else 02338 { 02339 /* Start regular conversion */ 02340 DFSDM_RegConvStart(hdfsdm_filter); 02341 } 02342 } 02343 else 02344 { 02345 status = HAL_ERROR; 02346 } 02347 /* Return function status */ 02348 return status; 02349 } 02350 02351 /** 02352 * @brief This function allows to stop regular conversion in DMA mode. 02353 * @note This function should be called only if regular conversion is ongoing. 02354 * @param hdfsdm_filter DFSDM filter handle. 02355 * @retval HAL status 02356 */ 02357 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 02358 { 02359 HAL_StatusTypeDef status = HAL_OK; 02360 02361 /* Check parameters */ 02362 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 02363 02364 /* Check DFSDM filter state */ 02365 if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \ 02366 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ)) 02367 { 02368 /* Return error status */ 02369 status = HAL_ERROR; 02370 } 02371 else 02372 { 02373 /* Stop current DMA transfer */ 02374 if(HAL_DMA_Abort(hdfsdm_filter->hdmaReg) != HAL_OK) 02375 { 02376 /* Set DFSDM filter in error state */ 02377 hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR; 02378 status = HAL_ERROR; 02379 } 02380 else 02381 { 02382 /* Stop regular conversion */ 02383 DFSDM_RegConvStop(hdfsdm_filter); 02384 } 02385 } 02386 /* Return function status */ 02387 return status; 02388 } 02389 02390 /** 02391 * @brief This function allows to get regular conversion value. 02392 * @param hdfsdm_filter DFSDM filter handle. 02393 * @param Channel Corresponding channel of regular conversion. 02394 * @retval Regular conversion value 02395 */ 02396 int32_t HAL_DFSDM_FilterGetRegularValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, 02397 uint32_t *Channel) 02398 { 02399 uint32_t reg; 02400 int32_t value; 02401 02402 /* Check parameters */ 02403 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 02404 assert_param(Channel != (void *)0); 02405 02406 /* Get value of data register for regular channel */ 02407 reg = hdfsdm_filter->Instance->FLTRDATAR; 02408 02409 /* Extract channel and regular conversion value */ 02410 *Channel = (reg & DFSDM_FLTRDATAR_RDATACH); 02411 /* Regular conversion value is a signed value located on 24 MSB of register */ 02412 /* So after applying a mask on these bits we have to perform a division by 256 (2 raised to the power of 8) */ 02413 reg &= DFSDM_FLTRDATAR_RDATA; 02414 value = ((int32_t)reg) / 256; 02415 02416 /* return regular conversion value */ 02417 return value; 02418 } 02419 02420 /** 02421 * @brief This function allows to start injected conversion in polling mode. 02422 * @note This function should be called only when DFSDM filter instance is 02423 * in idle state or if regular conversion is ongoing. 02424 * @param hdfsdm_filter DFSDM filter handle. 02425 * @retval HAL status 02426 */ 02427 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 02428 { 02429 HAL_StatusTypeDef status = HAL_OK; 02430 02431 /* Check parameters */ 02432 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 02433 02434 /* Check DFSDM filter state */ 02435 if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \ 02436 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG)) 02437 { 02438 /* Start injected conversion */ 02439 DFSDM_InjConvStart(hdfsdm_filter); 02440 } 02441 else 02442 { 02443 status = HAL_ERROR; 02444 } 02445 /* Return function status */ 02446 return status; 02447 } 02448 02449 /** 02450 * @brief This function allows to poll for the end of injected conversion. 02451 * @note This function should be called only if injected conversion is ongoing. 02452 * @param hdfsdm_filter DFSDM filter handle. 02453 * @param Timeout Timeout value in milliseconds. 02454 * @retval HAL status 02455 */ 02456 HAL_StatusTypeDef HAL_DFSDM_FilterPollForInjConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, 02457 uint32_t Timeout) 02458 { 02459 uint32_t tickstart; 02460 02461 /* Check parameters */ 02462 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 02463 02464 /* Check DFSDM filter state */ 02465 if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \ 02466 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ)) 02467 { 02468 /* Return error status */ 02469 return HAL_ERROR; 02470 } 02471 else 02472 { 02473 /* Get timeout */ 02474 tickstart = HAL_GetTick(); 02475 02476 /* Wait end of injected conversions */ 02477 while((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JEOCF) != DFSDM_FLTISR_JEOCF) 02478 { 02479 /* Check the Timeout */ 02480 if(Timeout != HAL_MAX_DELAY) 02481 { 02482 if(((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U)) 02483 { 02484 /* Return timeout status */ 02485 return HAL_TIMEOUT; 02486 } 02487 } 02488 } 02489 /* Check if overrun occurs */ 02490 if((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JOVRF) == DFSDM_FLTISR_JOVRF) 02491 { 02492 /* Update error code and call error callback */ 02493 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INJECTED_OVERRUN; 02494 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1) 02495 hdfsdm_filter->ErrorCallback(hdfsdm_filter); 02496 #else 02497 HAL_DFSDM_FilterErrorCallback(hdfsdm_filter); 02498 #endif 02499 02500 /* Clear injected overrun flag */ 02501 hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRJOVRF; 02502 } 02503 02504 /* Update remaining injected conversions */ 02505 hdfsdm_filter->InjConvRemaining--; 02506 if(hdfsdm_filter->InjConvRemaining == 0U) 02507 { 02508 /* Update DFSDM filter state only if trigger is software */ 02509 if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) 02510 { 02511 hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \ 02512 HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG; 02513 } 02514 02515 /* end of injected sequence, reset the value */ 02516 hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \ 02517 hdfsdm_filter->InjectedChannelsNbr : 1U; 02518 } 02519 02520 /* Return function status */ 02521 return HAL_OK; 02522 } 02523 } 02524 02525 /** 02526 * @brief This function allows to stop injected conversion in polling mode. 02527 * @note This function should be called only if injected conversion is ongoing. 02528 * @param hdfsdm_filter DFSDM filter handle. 02529 * @retval HAL status 02530 */ 02531 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 02532 { 02533 HAL_StatusTypeDef status = HAL_OK; 02534 02535 /* Check parameters */ 02536 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 02537 02538 /* Check DFSDM filter state */ 02539 if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \ 02540 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ)) 02541 { 02542 /* Return error status */ 02543 status = HAL_ERROR; 02544 } 02545 else 02546 { 02547 /* Stop injected conversion */ 02548 DFSDM_InjConvStop(hdfsdm_filter); 02549 } 02550 /* Return function status */ 02551 return status; 02552 } 02553 02554 /** 02555 * @brief This function allows to start injected conversion in interrupt mode. 02556 * @note This function should be called only when DFSDM filter instance is 02557 * in idle state or if regular conversion is ongoing. 02558 * @param hdfsdm_filter DFSDM filter handle. 02559 * @retval HAL status 02560 */ 02561 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 02562 { 02563 HAL_StatusTypeDef status = HAL_OK; 02564 02565 /* Check parameters */ 02566 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 02567 02568 /* Check DFSDM filter state */ 02569 if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \ 02570 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG)) 02571 { 02572 /* Enable interrupts for injected conversions */ 02573 hdfsdm_filter->Instance->FLTCR2 |= (DFSDM_FLTCR2_JEOCIE | DFSDM_FLTCR2_JOVRIE); 02574 02575 /* Start injected conversion */ 02576 DFSDM_InjConvStart(hdfsdm_filter); 02577 } 02578 else 02579 { 02580 status = HAL_ERROR; 02581 } 02582 /* Return function status */ 02583 return status; 02584 } 02585 02586 /** 02587 * @brief This function allows to stop injected conversion in interrupt mode. 02588 * @note This function should be called only if injected conversion is ongoing. 02589 * @param hdfsdm_filter DFSDM filter handle. 02590 * @retval HAL status 02591 */ 02592 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 02593 { 02594 HAL_StatusTypeDef status = HAL_OK; 02595 02596 /* Check parameters */ 02597 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 02598 02599 /* Check DFSDM filter state */ 02600 if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \ 02601 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ)) 02602 { 02603 /* Return error status */ 02604 status = HAL_ERROR; 02605 } 02606 else 02607 { 02608 /* Disable interrupts for injected conversions */ 02609 hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_JEOCIE | DFSDM_FLTCR2_JOVRIE); 02610 02611 /* Stop injected conversion */ 02612 DFSDM_InjConvStop(hdfsdm_filter); 02613 } 02614 /* Return function status */ 02615 return status; 02616 } 02617 02618 /** 02619 * @brief This function allows to start injected conversion in DMA mode. 02620 * @note This function should be called only when DFSDM filter instance is 02621 * in idle state or if regular conversion is ongoing. 02622 * Please note that data on buffer will contain signed injected conversion 02623 * value on 24 most significant bits and corresponding channel on 3 least 02624 * significant bits. 02625 * @param hdfsdm_filter DFSDM filter handle. 02626 * @param pData The destination buffer address. 02627 * @param Length The length of data to be transferred from DFSDM filter to memory. 02628 * @retval HAL status 02629 */ 02630 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, 02631 int32_t *pData, 02632 uint32_t Length) 02633 { 02634 HAL_StatusTypeDef status = HAL_OK; 02635 02636 /* Check parameters */ 02637 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 02638 02639 /* Check destination address and length */ 02640 if((pData == NULL) || (Length == 0U)) 02641 { 02642 status = HAL_ERROR; 02643 } 02644 /* Check that DMA is enabled for injected conversion */ 02645 else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_JDMAEN) != DFSDM_FLTCR1_JDMAEN) 02646 { 02647 status = HAL_ERROR; 02648 } 02649 /* Check parameters compatibility */ 02650 else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \ 02651 (hdfsdm_filter->hdmaInj->Init.Mode == DMA_NORMAL) && \ 02652 (Length > hdfsdm_filter->InjConvRemaining)) 02653 { 02654 status = HAL_ERROR; 02655 } 02656 else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \ 02657 (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR)) 02658 { 02659 status = HAL_ERROR; 02660 } 02661 /* Check DFSDM filter state */ 02662 else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \ 02663 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG)) 02664 { 02665 /* Set callbacks on DMA handler */ 02666 hdfsdm_filter->hdmaInj->XferCpltCallback = DFSDM_DMAInjectedConvCplt; 02667 hdfsdm_filter->hdmaInj->XferErrorCallback = DFSDM_DMAError; 02668 hdfsdm_filter->hdmaInj->XferHalfCpltCallback = (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR) ?\ 02669 DFSDM_DMAInjectedHalfConvCplt : NULL; 02670 02671 /* Start DMA in interrupt mode */ 02672 if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaInj, (uint32_t)&hdfsdm_filter->Instance->FLTJDATAR, \ 02673 (uint32_t) pData, Length) != HAL_OK) 02674 { 02675 /* Set DFSDM filter in error state */ 02676 hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR; 02677 status = HAL_ERROR; 02678 } 02679 else 02680 { 02681 /* Start injected conversion */ 02682 DFSDM_InjConvStart(hdfsdm_filter); 02683 } 02684 } 02685 else 02686 { 02687 status = HAL_ERROR; 02688 } 02689 /* Return function status */ 02690 return status; 02691 } 02692 02693 /** 02694 * @brief This function allows to start injected conversion in DMA mode and to get 02695 * only the 16 most significant bits of conversion. 02696 * @note This function should be called only when DFSDM filter instance is 02697 * in idle state or if regular conversion is ongoing. 02698 * Please note that data on buffer will contain signed 16 most significant 02699 * bits of injected conversion. 02700 * @param hdfsdm_filter DFSDM filter handle. 02701 * @param pData The destination buffer address. 02702 * @param Length The length of data to be transferred from DFSDM filter to memory. 02703 * @retval HAL status 02704 */ 02705 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, 02706 int16_t *pData, 02707 uint32_t Length) 02708 { 02709 HAL_StatusTypeDef status = HAL_OK; 02710 02711 /* Check parameters */ 02712 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 02713 02714 /* Check destination address and length */ 02715 if((pData == NULL) || (Length == 0U)) 02716 { 02717 status = HAL_ERROR; 02718 } 02719 /* Check that DMA is enabled for injected conversion */ 02720 else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_JDMAEN) != DFSDM_FLTCR1_JDMAEN) 02721 { 02722 status = HAL_ERROR; 02723 } 02724 /* Check parameters compatibility */ 02725 else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \ 02726 (hdfsdm_filter->hdmaInj->Init.Mode == DMA_NORMAL) && \ 02727 (Length > hdfsdm_filter->InjConvRemaining)) 02728 { 02729 status = HAL_ERROR; 02730 } 02731 else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \ 02732 (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR)) 02733 { 02734 status = HAL_ERROR; 02735 } 02736 /* Check DFSDM filter state */ 02737 else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \ 02738 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG)) 02739 { 02740 /* Set callbacks on DMA handler */ 02741 hdfsdm_filter->hdmaInj->XferCpltCallback = DFSDM_DMAInjectedConvCplt; 02742 hdfsdm_filter->hdmaInj->XferErrorCallback = DFSDM_DMAError; 02743 hdfsdm_filter->hdmaInj->XferHalfCpltCallback = (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR) ?\ 02744 DFSDM_DMAInjectedHalfConvCplt : NULL; 02745 02746 /* Start DMA in interrupt mode */ 02747 if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaInj, (uint32_t)(&hdfsdm_filter->Instance->FLTJDATAR) + 2U, \ 02748 (uint32_t) pData, Length) != HAL_OK) 02749 { 02750 /* Set DFSDM filter in error state */ 02751 hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR; 02752 status = HAL_ERROR; 02753 } 02754 else 02755 { 02756 /* Start injected conversion */ 02757 DFSDM_InjConvStart(hdfsdm_filter); 02758 } 02759 } 02760 else 02761 { 02762 status = HAL_ERROR; 02763 } 02764 /* Return function status */ 02765 return status; 02766 } 02767 02768 /** 02769 * @brief This function allows to stop injected conversion in DMA mode. 02770 * @note This function should be called only if injected conversion is ongoing. 02771 * @param hdfsdm_filter DFSDM filter handle. 02772 * @retval HAL status 02773 */ 02774 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 02775 { 02776 HAL_StatusTypeDef status = HAL_OK; 02777 02778 /* Check parameters */ 02779 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 02780 02781 /* Check DFSDM filter state */ 02782 if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \ 02783 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ)) 02784 { 02785 /* Return error status */ 02786 status = HAL_ERROR; 02787 } 02788 else 02789 { 02790 /* Stop current DMA transfer */ 02791 if(HAL_DMA_Abort(hdfsdm_filter->hdmaInj) != HAL_OK) 02792 { 02793 /* Set DFSDM filter in error state */ 02794 hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR; 02795 status = HAL_ERROR; 02796 } 02797 else 02798 { 02799 /* Stop regular conversion */ 02800 DFSDM_InjConvStop(hdfsdm_filter); 02801 } 02802 } 02803 /* Return function status */ 02804 return status; 02805 } 02806 02807 /** 02808 * @brief This function allows to get injected conversion value. 02809 * @param hdfsdm_filter DFSDM filter handle. 02810 * @param Channel Corresponding channel of injected conversion. 02811 * @retval Injected conversion value 02812 */ 02813 int32_t HAL_DFSDM_FilterGetInjectedValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, 02814 uint32_t *Channel) 02815 { 02816 uint32_t reg; 02817 int32_t value; 02818 02819 /* Check parameters */ 02820 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 02821 assert_param(Channel != (void *)0); 02822 02823 /* Get value of data register for injected channel */ 02824 reg = hdfsdm_filter->Instance->FLTJDATAR; 02825 02826 /* Extract channel and injected conversion value */ 02827 *Channel = (reg & DFSDM_FLTJDATAR_JDATACH); 02828 /* Injected conversion value is a signed value located on 24 MSB of register */ 02829 /* So after applying a mask on these bits we have to perform a division by 256 (2 raised to the power of 8) */ 02830 reg &= DFSDM_FLTJDATAR_JDATA; 02831 value = ((int32_t)reg) / 256; 02832 02833 /* return regular conversion value */ 02834 return value; 02835 } 02836 02837 /** 02838 * @brief This function allows to start filter analog watchdog in interrupt mode. 02839 * @param hdfsdm_filter DFSDM filter handle. 02840 * @param awdParam DFSDM filter analog watchdog parameters. 02841 * @retval HAL status 02842 */ 02843 HAL_StatusTypeDef HAL_DFSDM_FilterAwdStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, 02844 DFSDM_Filter_AwdParamTypeDef *awdParam) 02845 { 02846 HAL_StatusTypeDef status = HAL_OK; 02847 02848 /* Check parameters */ 02849 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 02850 assert_param(IS_DFSDM_FILTER_AWD_DATA_SOURCE(awdParam->DataSource)); 02851 assert_param(IS_DFSDM_INJECTED_CHANNEL(awdParam->Channel)); 02852 assert_param(IS_DFSDM_FILTER_AWD_THRESHOLD(awdParam->HighThreshold)); 02853 assert_param(IS_DFSDM_FILTER_AWD_THRESHOLD(awdParam->LowThreshold)); 02854 assert_param(IS_DFSDM_BREAK_SIGNALS(awdParam->HighBreakSignal)); 02855 assert_param(IS_DFSDM_BREAK_SIGNALS(awdParam->LowBreakSignal)); 02856 02857 /* Check DFSDM filter state */ 02858 if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \ 02859 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR)) 02860 { 02861 /* Return error status */ 02862 status = HAL_ERROR; 02863 } 02864 else 02865 { 02866 /* Set analog watchdog data source */ 02867 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_AWFSEL); 02868 hdfsdm_filter->Instance->FLTCR1 |= awdParam->DataSource; 02869 02870 /* Set thresholds and break signals */ 02871 hdfsdm_filter->Instance->FLTAWHTR &= ~(DFSDM_FLTAWHTR_AWHT | DFSDM_FLTAWHTR_BKAWH); 02872 hdfsdm_filter->Instance->FLTAWHTR |= (((uint32_t) awdParam->HighThreshold << DFSDM_FLTAWHTR_AWHT_Pos) | \ 02873 awdParam->HighBreakSignal); 02874 hdfsdm_filter->Instance->FLTAWLTR &= ~(DFSDM_FLTAWLTR_AWLT | DFSDM_FLTAWLTR_BKAWL); 02875 hdfsdm_filter->Instance->FLTAWLTR |= (((uint32_t) awdParam->LowThreshold << DFSDM_FLTAWLTR_AWLT_Pos) | \ 02876 awdParam->LowBreakSignal); 02877 02878 /* Set channels and interrupt for analog watchdog */ 02879 hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_AWDCH); 02880 hdfsdm_filter->Instance->FLTCR2 |= (((awdParam->Channel & DFSDM_LSB_MASK) << DFSDM_FLTCR2_AWDCH_Pos) | \ 02881 DFSDM_FLTCR2_AWDIE); 02882 } 02883 /* Return function status */ 02884 return status; 02885 } 02886 02887 /** 02888 * @brief This function allows to stop filter analog watchdog in interrupt mode. 02889 * @param hdfsdm_filter DFSDM filter handle. 02890 * @retval HAL status 02891 */ 02892 HAL_StatusTypeDef HAL_DFSDM_FilterAwdStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 02893 { 02894 HAL_StatusTypeDef status = HAL_OK; 02895 02896 /* Check parameters */ 02897 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 02898 02899 /* Check DFSDM filter state */ 02900 if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \ 02901 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR)) 02902 { 02903 /* Return error status */ 02904 status = HAL_ERROR; 02905 } 02906 else 02907 { 02908 /* Reset channels for analog watchdog and deactivate interrupt */ 02909 hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_AWDCH | DFSDM_FLTCR2_AWDIE); 02910 02911 /* Clear all analog watchdog flags */ 02912 hdfsdm_filter->Instance->FLTAWCFR = (DFSDM_FLTAWCFR_CLRAWHTF | DFSDM_FLTAWCFR_CLRAWLTF); 02913 02914 /* Reset thresholds and break signals */ 02915 hdfsdm_filter->Instance->FLTAWHTR &= ~(DFSDM_FLTAWHTR_AWHT | DFSDM_FLTAWHTR_BKAWH); 02916 hdfsdm_filter->Instance->FLTAWLTR &= ~(DFSDM_FLTAWLTR_AWLT | DFSDM_FLTAWLTR_BKAWL); 02917 02918 /* Reset analog watchdog data source */ 02919 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_AWFSEL); 02920 } 02921 /* Return function status */ 02922 return status; 02923 } 02924 02925 /** 02926 * @brief This function allows to start extreme detector feature. 02927 * @param hdfsdm_filter DFSDM filter handle. 02928 * @param Channel Channels where extreme detector is enabled. 02929 * This parameter can be a values combination of @ref DFSDM_Channel_Selection. 02930 * @retval HAL status 02931 */ 02932 HAL_StatusTypeDef HAL_DFSDM_FilterExdStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, 02933 uint32_t Channel) 02934 { 02935 HAL_StatusTypeDef status = HAL_OK; 02936 02937 /* Check parameters */ 02938 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 02939 assert_param(IS_DFSDM_INJECTED_CHANNEL(Channel)); 02940 02941 /* Check DFSDM filter state */ 02942 if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \ 02943 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR)) 02944 { 02945 /* Return error status */ 02946 status = HAL_ERROR; 02947 } 02948 else 02949 { 02950 /* Set channels for extreme detector */ 02951 hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_EXCH); 02952 hdfsdm_filter->Instance->FLTCR2 |= ((Channel & DFSDM_LSB_MASK) << DFSDM_FLTCR2_EXCH_Pos); 02953 } 02954 /* Return function status */ 02955 return status; 02956 } 02957 02958 /** 02959 * @brief This function allows to stop extreme detector feature. 02960 * @param hdfsdm_filter DFSDM filter handle. 02961 * @retval HAL status 02962 */ 02963 HAL_StatusTypeDef HAL_DFSDM_FilterExdStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 02964 { 02965 HAL_StatusTypeDef status = HAL_OK; 02966 __IO uint32_t reg1; 02967 __IO uint32_t reg2; 02968 02969 /* Check parameters */ 02970 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 02971 02972 /* Check DFSDM filter state */ 02973 if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \ 02974 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR)) 02975 { 02976 /* Return error status */ 02977 status = HAL_ERROR; 02978 } 02979 else 02980 { 02981 /* Reset channels for extreme detector */ 02982 hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_EXCH); 02983 02984 /* Clear extreme detector values */ 02985 reg1 = hdfsdm_filter->Instance->FLTEXMAX; 02986 reg2 = hdfsdm_filter->Instance->FLTEXMIN; 02987 UNUSED(reg1); /* To avoid GCC warning */ 02988 UNUSED(reg2); /* To avoid GCC warning */ 02989 } 02990 /* Return function status */ 02991 return status; 02992 } 02993 02994 /** 02995 * @brief This function allows to get extreme detector maximum value. 02996 * @param hdfsdm_filter DFSDM filter handle. 02997 * @param Channel Corresponding channel. 02998 * @retval Extreme detector maximum value 02999 * This value is between Min_Data = -8388608 and Max_Data = 8388607. 03000 */ 03001 int32_t HAL_DFSDM_FilterGetExdMaxValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, 03002 uint32_t *Channel) 03003 { 03004 uint32_t reg; 03005 int32_t value; 03006 03007 /* Check parameters */ 03008 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 03009 assert_param(Channel != (void *)0); 03010 03011 /* Get value of extreme detector maximum register */ 03012 reg = hdfsdm_filter->Instance->FLTEXMAX; 03013 03014 /* Extract channel and extreme detector maximum value */ 03015 *Channel = (reg & DFSDM_FLTEXMAX_EXMAXCH); 03016 /* Extreme detector maximum value is a signed value located on 24 MSB of register */ 03017 /* So after applying a mask on these bits we have to perform a division by 256 (2 raised to the power of 8) */ 03018 reg &= DFSDM_FLTEXMAX_EXMAX; 03019 value = ((int32_t)reg) / 256; 03020 03021 /* return extreme detector maximum value */ 03022 return value; 03023 } 03024 03025 /** 03026 * @brief This function allows to get extreme detector minimum value. 03027 * @param hdfsdm_filter DFSDM filter handle. 03028 * @param Channel Corresponding channel. 03029 * @retval Extreme detector minimum value 03030 * This value is between Min_Data = -8388608 and Max_Data = 8388607. 03031 */ 03032 int32_t HAL_DFSDM_FilterGetExdMinValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, 03033 uint32_t *Channel) 03034 { 03035 uint32_t reg; 03036 int32_t value; 03037 03038 /* Check parameters */ 03039 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 03040 assert_param(Channel != (void *)0); 03041 03042 /* Get value of extreme detector minimum register */ 03043 reg = hdfsdm_filter->Instance->FLTEXMIN; 03044 03045 /* Extract channel and extreme detector minimum value */ 03046 *Channel = (reg & DFSDM_FLTEXMIN_EXMINCH); 03047 /* Extreme detector minimum value is a signed value located on 24 MSB of register */ 03048 /* So after applying a mask on these bits we have to perform a division by 256 (2 raised to the power of 8) */ 03049 reg &= DFSDM_FLTEXMIN_EXMIN; 03050 value = ((int32_t)reg) / 256; 03051 03052 /* return extreme detector minimum value */ 03053 return value; 03054 } 03055 03056 /** 03057 * @brief This function allows to get conversion time value. 03058 * @param hdfsdm_filter DFSDM filter handle. 03059 * @retval Conversion time value 03060 * @note To get time in second, this value has to be divided by DFSDM clock frequency. 03061 */ 03062 uint32_t HAL_DFSDM_FilterGetConvTimeValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 03063 { 03064 uint32_t reg; 03065 uint32_t value; 03066 03067 /* Check parameters */ 03068 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 03069 03070 /* Get value of conversion timer register */ 03071 reg = hdfsdm_filter->Instance->FLTCNVTIMR; 03072 03073 /* Extract conversion time value */ 03074 value = ((reg & DFSDM_FLTCNVTIMR_CNVCNT) >> DFSDM_FLTCNVTIMR_CNVCNT_Pos); 03075 03076 /* return extreme detector minimum value */ 03077 return value; 03078 } 03079 03080 /** 03081 * @brief This function handles the DFSDM interrupts. 03082 * @param hdfsdm_filter DFSDM filter handle. 03083 * @retval None 03084 */ 03085 void HAL_DFSDM_IRQHandler(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 03086 { 03087 DFSDM_Channel_HandleTypeDef **channelHandleTable; 03088 const DFSDM_Filter_TypeDef *filter0Instance; 03089 uint32_t channelNumber; 03090 03091 /* Get FTLISR and FLTCR2 register values */ 03092 const uint32_t temp_fltisr = hdfsdm_filter->Instance->FLTISR; 03093 const uint32_t temp_fltcr2 = hdfsdm_filter->Instance->FLTCR2; 03094 03095 #if defined(DFSDM2_Channel0) 03096 if (IS_DFSDM1_FILTER_INSTANCE(hdfsdm_filter->Instance)) 03097 { 03098 channelHandleTable = a_dfsdm1ChannelHandle; 03099 filter0Instance = DFSDM1_Filter0; 03100 channelNumber = DFSDM1_CHANNEL_NUMBER; 03101 } 03102 else 03103 { 03104 channelHandleTable = a_dfsdm2ChannelHandle; 03105 filter0Instance = DFSDM2_Filter0; 03106 channelNumber = DFSDM2_CHANNEL_NUMBER; 03107 } 03108 #else /* DFSDM2_Channel0 */ 03109 channelHandleTable = a_dfsdm1ChannelHandle; 03110 filter0Instance = DFSDM1_Filter0; 03111 channelNumber = DFSDM1_CHANNEL_NUMBER; 03112 #endif /* DFSDM2_Channel0 */ 03113 03114 /* Check if overrun occurs during regular conversion */ 03115 if(((temp_fltisr & DFSDM_FLTISR_ROVRF) != 0U) && \ 03116 ((temp_fltcr2 & DFSDM_FLTCR2_ROVRIE) != 0U)) 03117 { 03118 /* Clear regular overrun flag */ 03119 hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRROVRF; 03120 03121 /* Update error code */ 03122 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_REGULAR_OVERRUN; 03123 03124 /* Call error callback */ 03125 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1) 03126 hdfsdm_filter->ErrorCallback(hdfsdm_filter); 03127 #else 03128 HAL_DFSDM_FilterErrorCallback(hdfsdm_filter); 03129 #endif 03130 } 03131 /* Check if overrun occurs during injected conversion */ 03132 else if(((temp_fltisr & DFSDM_FLTISR_JOVRF) != 0U) && \ 03133 ((temp_fltcr2 & DFSDM_FLTCR2_JOVRIE) != 0U)) 03134 { 03135 /* Clear injected overrun flag */ 03136 hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRJOVRF; 03137 03138 /* Update error code */ 03139 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INJECTED_OVERRUN; 03140 03141 /* Call error callback */ 03142 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1) 03143 hdfsdm_filter->ErrorCallback(hdfsdm_filter); 03144 #else 03145 HAL_DFSDM_FilterErrorCallback(hdfsdm_filter); 03146 #endif 03147 } 03148 /* Check if end of regular conversion */ 03149 else if(((temp_fltisr & DFSDM_FLTISR_REOCF) != 0U) && \ 03150 ((temp_fltcr2 & DFSDM_FLTCR2_REOCIE) != 0U)) 03151 { 03152 /* Call regular conversion complete callback */ 03153 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1) 03154 hdfsdm_filter->RegConvCpltCallback(hdfsdm_filter); 03155 #else 03156 HAL_DFSDM_FilterRegConvCpltCallback(hdfsdm_filter); 03157 #endif 03158 03159 /* End of conversion if mode is not continuous and software trigger */ 03160 if((hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \ 03161 (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER)) 03162 { 03163 /* Disable interrupts for regular conversions */ 03164 hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_REOCIE); 03165 03166 /* Update DFSDM filter state */ 03167 hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \ 03168 HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ; 03169 } 03170 } 03171 /* Check if end of injected conversion */ 03172 else if(((temp_fltisr & DFSDM_FLTISR_JEOCF) != 0U) && \ 03173 ((temp_fltcr2 & DFSDM_FLTCR2_JEOCIE) != 0U)) 03174 { 03175 /* Call injected conversion complete callback */ 03176 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1) 03177 hdfsdm_filter->InjConvCpltCallback(hdfsdm_filter); 03178 #else 03179 HAL_DFSDM_FilterInjConvCpltCallback(hdfsdm_filter); 03180 #endif 03181 03182 /* Update remaining injected conversions */ 03183 hdfsdm_filter->InjConvRemaining--; 03184 if(hdfsdm_filter->InjConvRemaining == 0U) 03185 { 03186 /* End of conversion if trigger is software */ 03187 if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) 03188 { 03189 /* Disable interrupts for injected conversions */ 03190 hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_JEOCIE); 03191 03192 /* Update DFSDM filter state */ 03193 hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \ 03194 HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG; 03195 } 03196 /* end of injected sequence, reset the value */ 03197 hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \ 03198 hdfsdm_filter->InjectedChannelsNbr : 1U; 03199 } 03200 } 03201 /* Check if analog watchdog occurs */ 03202 else if(((temp_fltisr & DFSDM_FLTISR_AWDF) != 0U) && \ 03203 ((temp_fltcr2 & DFSDM_FLTCR2_AWDIE) != 0U)) 03204 { 03205 uint32_t reg; 03206 uint32_t threshold; 03207 uint32_t channel = 0; 03208 03209 /* Get channel and threshold */ 03210 reg = hdfsdm_filter->Instance->FLTAWSR; 03211 threshold = ((reg & DFSDM_FLTAWSR_AWLTF) != 0U) ? DFSDM_AWD_LOW_THRESHOLD : DFSDM_AWD_HIGH_THRESHOLD; 03212 if(threshold == DFSDM_AWD_HIGH_THRESHOLD) 03213 { 03214 reg = reg >> DFSDM_FLTAWSR_AWHTF_Pos; 03215 } 03216 while (((reg & 1U) == 0U) && (channel < (channelNumber - 1U))) 03217 { 03218 channel++; 03219 reg = reg >> 1; 03220 } 03221 /* Clear analog watchdog flag */ 03222 hdfsdm_filter->Instance->FLTAWCFR = (threshold == DFSDM_AWD_HIGH_THRESHOLD) ? \ 03223 (1UL << (DFSDM_FLTAWSR_AWHTF_Pos + channel)) : \ 03224 (1UL << channel); 03225 03226 /* Call analog watchdog callback */ 03227 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1) 03228 hdfsdm_filter->AwdCallback(hdfsdm_filter, channel, threshold); 03229 #else 03230 HAL_DFSDM_FilterAwdCallback(hdfsdm_filter, channel, threshold); 03231 #endif 03232 } 03233 /* Check if clock absence occurs */ 03234 else if((hdfsdm_filter->Instance == filter0Instance) && \ 03235 ((temp_fltisr & DFSDM_FLTISR_CKABF) != 0U) && \ 03236 ((temp_fltcr2 & DFSDM_FLTCR2_CKABIE) != 0U)) 03237 { 03238 uint32_t reg; 03239 uint32_t channel = 0; 03240 03241 reg = ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_CKABF) >> DFSDM_FLTISR_CKABF_Pos); 03242 03243 while (channel < channelNumber) 03244 { 03245 /* Check if flag is set and corresponding channel is enabled */ 03246 if (((reg & 1U) != 0U) && (channelHandleTable[channel] != NULL)) 03247 { 03248 /* Check clock absence has been enabled for this channel */ 03249 if ((channelHandleTable[channel]->Instance->CHCFGR1 & DFSDM_CHCFGR1_CKABEN) != 0U) 03250 { 03251 /* Clear clock absence flag */ 03252 hdfsdm_filter->Instance->FLTICR = (1UL << (DFSDM_FLTICR_CLRCKABF_Pos + channel)); 03253 03254 /* Call clock absence callback */ 03255 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1) 03256 channelHandleTable[channel]->CkabCallback(channelHandleTable[channel]); 03257 #else 03258 HAL_DFSDM_ChannelCkabCallback(channelHandleTable[channel]); 03259 #endif 03260 } 03261 } 03262 channel++; 03263 reg = reg >> 1; 03264 } 03265 } 03266 /* Check if short circuit detection occurs */ 03267 else if((hdfsdm_filter->Instance == filter0Instance) && \ 03268 ((temp_fltisr & DFSDM_FLTISR_SCDF) != 0U) && \ 03269 ((temp_fltcr2 & DFSDM_FLTCR2_SCDIE) != 0U)) 03270 { 03271 uint32_t reg; 03272 uint32_t channel = 0; 03273 03274 /* Get channel */ 03275 reg = ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_SCDF) >> DFSDM_FLTISR_SCDF_Pos); 03276 while (((reg & 1U) == 0U) && (channel < (channelNumber - 1U))) 03277 { 03278 channel++; 03279 reg = reg >> 1; 03280 } 03281 03282 /* Clear short circuit detection flag */ 03283 hdfsdm_filter->Instance->FLTICR = (1UL << (DFSDM_FLTICR_CLRSCDF_Pos + channel)); 03284 03285 /* Call short circuit detection callback */ 03286 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1) 03287 channelHandleTable[channel]->ScdCallback(channelHandleTable[channel]); 03288 #else 03289 HAL_DFSDM_ChannelScdCallback(channelHandleTable[channel]); 03290 #endif 03291 } 03292 } 03293 03294 /** 03295 * @brief Regular conversion complete callback. 03296 * @note In interrupt mode, user has to read conversion value in this function 03297 * using HAL_DFSDM_FilterGetRegularValue. 03298 * @param hdfsdm_filter DFSDM filter handle. 03299 * @retval None 03300 */ 03301 __weak void HAL_DFSDM_FilterRegConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 03302 { 03303 /* Prevent unused argument(s) compilation warning */ 03304 UNUSED(hdfsdm_filter); 03305 03306 /* NOTE : This function should not be modified, when the callback is needed, 03307 the HAL_DFSDM_FilterRegConvCpltCallback could be implemented in the user file. 03308 */ 03309 } 03310 03311 /** 03312 * @brief Half regular conversion complete callback. 03313 * @param hdfsdm_filter DFSDM filter handle. 03314 * @retval None 03315 */ 03316 __weak void HAL_DFSDM_FilterRegConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 03317 { 03318 /* Prevent unused argument(s) compilation warning */ 03319 UNUSED(hdfsdm_filter); 03320 03321 /* NOTE : This function should not be modified, when the callback is needed, 03322 the HAL_DFSDM_FilterRegConvHalfCpltCallback could be implemented in the user file. 03323 */ 03324 } 03325 03326 /** 03327 * @brief Injected conversion complete callback. 03328 * @note In interrupt mode, user has to read conversion value in this function 03329 * using HAL_DFSDM_FilterGetInjectedValue. 03330 * @param hdfsdm_filter DFSDM filter handle. 03331 * @retval None 03332 */ 03333 __weak void HAL_DFSDM_FilterInjConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 03334 { 03335 /* Prevent unused argument(s) compilation warning */ 03336 UNUSED(hdfsdm_filter); 03337 03338 /* NOTE : This function should not be modified, when the callback is needed, 03339 the HAL_DFSDM_FilterInjConvCpltCallback could be implemented in the user file. 03340 */ 03341 } 03342 03343 /** 03344 * @brief Half injected conversion complete callback. 03345 * @param hdfsdm_filter DFSDM filter handle. 03346 * @retval None 03347 */ 03348 __weak void HAL_DFSDM_FilterInjConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 03349 { 03350 /* Prevent unused argument(s) compilation warning */ 03351 UNUSED(hdfsdm_filter); 03352 03353 /* NOTE : This function should not be modified, when the callback is needed, 03354 the HAL_DFSDM_FilterInjConvHalfCpltCallback could be implemented in the user file. 03355 */ 03356 } 03357 03358 /** 03359 * @brief Filter analog watchdog callback. 03360 * @param hdfsdm_filter DFSDM filter handle. 03361 * @param Channel Corresponding channel. 03362 * @param Threshold Low or high threshold has been reached. 03363 * @retval None 03364 */ 03365 __weak void HAL_DFSDM_FilterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, 03366 uint32_t Channel, uint32_t Threshold) 03367 { 03368 /* Prevent unused argument(s) compilation warning */ 03369 UNUSED(hdfsdm_filter); 03370 UNUSED(Channel); 03371 UNUSED(Threshold); 03372 03373 /* NOTE : This function should not be modified, when the callback is needed, 03374 the HAL_DFSDM_FilterAwdCallback could be implemented in the user file. 03375 */ 03376 } 03377 03378 /** 03379 * @brief Error callback. 03380 * @param hdfsdm_filter DFSDM filter handle. 03381 * @retval None 03382 */ 03383 __weak void HAL_DFSDM_FilterErrorCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 03384 { 03385 /* Prevent unused argument(s) compilation warning */ 03386 UNUSED(hdfsdm_filter); 03387 03388 /* NOTE : This function should not be modified, when the callback is needed, 03389 the HAL_DFSDM_FilterErrorCallback could be implemented in the user file. 03390 */ 03391 } 03392 03393 /** 03394 * @} 03395 */ 03396 03397 /** @defgroup DFSDM_Exported_Functions_Group4_Filter Filter state functions 03398 * @brief Filter state functions 03399 * 03400 @verbatim 03401 ============================================================================== 03402 ##### Filter state functions ##### 03403 ============================================================================== 03404 [..] This section provides functions allowing to: 03405 (+) Get the DFSDM filter state. 03406 (+) Get the DFSDM filter error. 03407 @endverbatim 03408 * @{ 03409 */ 03410 03411 /** 03412 * @brief This function allows to get the current DFSDM filter handle state. 03413 * @param hdfsdm_filter DFSDM filter handle. 03414 * @retval DFSDM filter state. 03415 */ 03416 HAL_DFSDM_Filter_StateTypeDef HAL_DFSDM_FilterGetState(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 03417 { 03418 /* Return DFSDM filter handle state */ 03419 return hdfsdm_filter->State; 03420 } 03421 03422 /** 03423 * @brief This function allows to get the current DFSDM filter error. 03424 * @param hdfsdm_filter DFSDM filter handle. 03425 * @retval DFSDM filter error code. 03426 */ 03427 uint32_t HAL_DFSDM_FilterGetError(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 03428 { 03429 return hdfsdm_filter->ErrorCode; 03430 } 03431 03432 /** 03433 * @} 03434 */ 03435 03436 /** 03437 * @} 03438 */ 03439 /* End of exported functions -------------------------------------------------*/ 03440 03441 /* Private functions ---------------------------------------------------------*/ 03442 /** @addtogroup DFSDM_Private_Functions DFSDM Private Functions 03443 * @{ 03444 */ 03445 03446 /** 03447 * @brief DMA half transfer complete callback for regular conversion. 03448 * @param hdma DMA handle. 03449 * @retval None 03450 */ 03451 static void DFSDM_DMARegularHalfConvCplt(DMA_HandleTypeDef *hdma) 03452 { 03453 /* Get DFSDM filter handle */ 03454 DFSDM_Filter_HandleTypeDef *hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent; 03455 03456 /* Call regular half conversion complete callback */ 03457 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1) 03458 hdfsdm_filter->RegConvHalfCpltCallback(hdfsdm_filter); 03459 #else 03460 HAL_DFSDM_FilterRegConvHalfCpltCallback(hdfsdm_filter); 03461 #endif 03462 } 03463 03464 /** 03465 * @brief DMA transfer complete callback for regular conversion. 03466 * @param hdma DMA handle. 03467 * @retval None 03468 */ 03469 static void DFSDM_DMARegularConvCplt(DMA_HandleTypeDef *hdma) 03470 { 03471 /* Get DFSDM filter handle */ 03472 DFSDM_Filter_HandleTypeDef *hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent; 03473 03474 /* Call regular conversion complete callback */ 03475 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1) 03476 hdfsdm_filter->RegConvCpltCallback(hdfsdm_filter); 03477 #else 03478 HAL_DFSDM_FilterRegConvCpltCallback(hdfsdm_filter); 03479 #endif 03480 } 03481 03482 /** 03483 * @brief DMA half transfer complete callback for injected conversion. 03484 * @param hdma DMA handle. 03485 * @retval None 03486 */ 03487 static void DFSDM_DMAInjectedHalfConvCplt(DMA_HandleTypeDef *hdma) 03488 { 03489 /* Get DFSDM filter handle */ 03490 DFSDM_Filter_HandleTypeDef *hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent; 03491 03492 /* Call injected half conversion complete callback */ 03493 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1) 03494 hdfsdm_filter->InjConvHalfCpltCallback(hdfsdm_filter); 03495 #else 03496 HAL_DFSDM_FilterInjConvHalfCpltCallback(hdfsdm_filter); 03497 #endif 03498 } 03499 03500 /** 03501 * @brief DMA transfer complete callback for injected conversion. 03502 * @param hdma DMA handle. 03503 * @retval None 03504 */ 03505 static void DFSDM_DMAInjectedConvCplt(DMA_HandleTypeDef *hdma) 03506 { 03507 /* Get DFSDM filter handle */ 03508 DFSDM_Filter_HandleTypeDef *hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent; 03509 03510 /* Call injected conversion complete callback */ 03511 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1) 03512 hdfsdm_filter->InjConvCpltCallback(hdfsdm_filter); 03513 #else 03514 HAL_DFSDM_FilterInjConvCpltCallback(hdfsdm_filter); 03515 #endif 03516 } 03517 03518 /** 03519 * @brief DMA error callback. 03520 * @param hdma DMA handle. 03521 * @retval None 03522 */ 03523 static void DFSDM_DMAError(DMA_HandleTypeDef *hdma) 03524 { 03525 /* Get DFSDM filter handle */ 03526 DFSDM_Filter_HandleTypeDef *hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent; 03527 03528 /* Update error code */ 03529 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_DMA; 03530 03531 /* Call error callback */ 03532 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1) 03533 hdfsdm_filter->ErrorCallback(hdfsdm_filter); 03534 #else 03535 HAL_DFSDM_FilterErrorCallback(hdfsdm_filter); 03536 #endif 03537 } 03538 03539 /** 03540 * @brief This function allows to get the number of injected channels. 03541 * @param Channels bitfield of injected channels. 03542 * @retval Number of injected channels. 03543 */ 03544 static uint32_t DFSDM_GetInjChannelsNbr(uint32_t Channels) 03545 { 03546 uint32_t nbChannels = 0; 03547 uint32_t tmp; 03548 03549 /* Get the number of channels from bitfield */ 03550 tmp = (uint32_t)(Channels & DFSDM_LSB_MASK); 03551 while(tmp != 0U) 03552 { 03553 if((tmp & 1U) != 0U) 03554 { 03555 nbChannels++; 03556 } 03557 tmp = (uint32_t)(tmp >> 1); 03558 } 03559 return nbChannels; 03560 } 03561 03562 /** 03563 * @brief This function allows to get the channel number from channel instance. 03564 * @param Instance DFSDM channel instance. 03565 * @retval Channel number. 03566 */ 03567 static uint32_t DFSDM_GetChannelFromInstance(const DFSDM_Channel_TypeDef* Instance) 03568 { 03569 uint32_t channel; 03570 03571 /* Get channel from instance */ 03572 if(Instance == DFSDM1_Channel0) 03573 { 03574 channel = 0; 03575 } 03576 #if defined(DFSDM2_Channel0) 03577 else if (Instance == DFSDM2_Channel0) 03578 { 03579 channel = 0; 03580 } 03581 else if (Instance == DFSDM2_Channel1) 03582 { 03583 channel = 1; 03584 } 03585 #endif /* DFSDM2_Channel0 */ 03586 else if(Instance == DFSDM1_Channel1) 03587 { 03588 channel = 1; 03589 } 03590 else if(Instance == DFSDM1_Channel2) 03591 { 03592 channel = 2; 03593 } 03594 else if(Instance == DFSDM1_Channel3) 03595 { 03596 channel = 3; 03597 } 03598 else if(Instance == DFSDM1_Channel4) 03599 { 03600 channel = 4; 03601 } 03602 else if(Instance == DFSDM1_Channel5) 03603 { 03604 channel = 5; 03605 } 03606 else if(Instance == DFSDM1_Channel6) 03607 { 03608 channel = 6; 03609 } 03610 else /* DFSDM1_Channel7 */ 03611 { 03612 channel = 7; 03613 } 03614 03615 return channel; 03616 } 03617 03618 /** 03619 * @brief This function allows to really start regular conversion. 03620 * @param hdfsdm_filter DFSDM filter handle. 03621 * @retval None 03622 */ 03623 static void DFSDM_RegConvStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 03624 { 03625 /* Check regular trigger */ 03626 if(hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) 03627 { 03628 /* Software start of regular conversion */ 03629 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSWSTART; 03630 } 03631 else /* synchronous trigger */ 03632 { 03633 /* Disable DFSDM filter */ 03634 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN); 03635 03636 /* Set RSYNC bit in DFSDM_FLTCR1 register */ 03637 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSYNC; 03638 03639 /* Enable DFSDM filter */ 03640 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN; 03641 03642 /* If injected conversion was in progress, restart it */ 03643 if(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) 03644 { 03645 if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) 03646 { 03647 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSWSTART; 03648 } 03649 /* Update remaining injected conversions */ 03650 hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \ 03651 hdfsdm_filter->InjectedChannelsNbr : 1U; 03652 } 03653 } 03654 /* Update DFSDM filter state */ 03655 hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) ? \ 03656 HAL_DFSDM_FILTER_STATE_REG : HAL_DFSDM_FILTER_STATE_REG_INJ; 03657 } 03658 03659 /** 03660 * @brief This function allows to really stop regular conversion. 03661 * @param hdfsdm_filter DFSDM filter handle. 03662 * @retval None 03663 */ 03664 static void DFSDM_RegConvStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 03665 { 03666 /* Disable DFSDM filter */ 03667 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN); 03668 03669 /* If regular trigger was synchronous, reset RSYNC bit in DFSDM_FLTCR1 register */ 03670 if(hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SYNC_TRIGGER) 03671 { 03672 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RSYNC); 03673 } 03674 03675 /* Enable DFSDM filter */ 03676 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN; 03677 03678 /* If injected conversion was in progress, restart it */ 03679 if(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG_INJ) 03680 { 03681 if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) 03682 { 03683 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSWSTART; 03684 } 03685 /* Update remaining injected conversions */ 03686 hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \ 03687 hdfsdm_filter->InjectedChannelsNbr : 1U; 03688 } 03689 03690 /* Update DFSDM filter state */ 03691 hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \ 03692 HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ; 03693 } 03694 03695 /** 03696 * @brief This function allows to really start injected conversion. 03697 * @param hdfsdm_filter DFSDM filter handle. 03698 * @retval None 03699 */ 03700 static void DFSDM_InjConvStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 03701 { 03702 /* Check injected trigger */ 03703 if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) 03704 { 03705 /* Software start of injected conversion */ 03706 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSWSTART; 03707 } 03708 else /* external or synchronous trigger */ 03709 { 03710 /* Disable DFSDM filter */ 03711 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN); 03712 03713 if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SYNC_TRIGGER) 03714 { 03715 /* Set JSYNC bit in DFSDM_FLTCR1 register */ 03716 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSYNC; 03717 } 03718 else /* external trigger */ 03719 { 03720 /* Set JEXTEN[1:0] bits in DFSDM_FLTCR1 register */ 03721 hdfsdm_filter->Instance->FLTCR1 |= hdfsdm_filter->ExtTriggerEdge; 03722 } 03723 03724 /* Enable DFSDM filter */ 03725 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN; 03726 03727 /* If regular conversion was in progress, restart it */ 03728 if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) && \ 03729 (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER)) 03730 { 03731 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSWSTART; 03732 } 03733 } 03734 /* Update DFSDM filter state */ 03735 hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) ? \ 03736 HAL_DFSDM_FILTER_STATE_INJ : HAL_DFSDM_FILTER_STATE_REG_INJ; 03737 } 03738 03739 /** 03740 * @brief This function allows to really stop injected conversion. 03741 * @param hdfsdm_filter DFSDM filter handle. 03742 * @retval None 03743 */ 03744 static void DFSDM_InjConvStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 03745 { 03746 /* Disable DFSDM filter */ 03747 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN); 03748 03749 /* If injected trigger was synchronous, reset JSYNC bit in DFSDM_FLTCR1 register */ 03750 if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SYNC_TRIGGER) 03751 { 03752 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSYNC); 03753 } 03754 else if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_EXT_TRIGGER) 03755 { 03756 /* Reset JEXTEN[1:0] bits in DFSDM_FLTCR1 register */ 03757 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JEXTEN); 03758 } 03759 else 03760 { 03761 /* Nothing to do */ 03762 } 03763 03764 /* Enable DFSDM filter */ 03765 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN; 03766 03767 /* If regular conversion was in progress, restart it */ 03768 if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG_INJ) && \ 03769 (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER)) 03770 { 03771 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSWSTART; 03772 } 03773 03774 /* Update remaining injected conversions */ 03775 hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \ 03776 hdfsdm_filter->InjectedChannelsNbr : 1U; 03777 03778 /* Update DFSDM filter state */ 03779 hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \ 03780 HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG; 03781 } 03782 03783 /** 03784 * @} 03785 */ 03786 /* End of private functions --------------------------------------------------*/ 03787 03788 /** 03789 * @} 03790 */ 03791 03792 #endif /* HAL_DFSDM_MODULE_ENABLED */ 03793 03794 /** 03795 * @} 03796 */ 03797