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STM32H735xx HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32h7xx_hal_eth_ex.c 00004 * @author MCD Application Team 00005 * @brief ETH HAL Extended module driver. 00006 ****************************************************************************** 00007 * @attention 00008 * 00009 * Copyright (c) 2017 STMicroelectronics. 00010 * All rights reserved. 00011 * 00012 * This software is licensed under terms that can be found in the LICENSE file 00013 * in the root directory of this software component. 00014 * If no LICENSE file comes with this software, it is provided AS-IS. 00015 * 00016 ****************************************************************************** 00017 */ 00018 00019 /* Includes ------------------------------------------------------------------*/ 00020 #include "stm32h7xx_hal.h" 00021 00022 /** @addtogroup STM32H7xx_HAL_Driver 00023 * @{ 00024 */ 00025 00026 #ifdef HAL_ETH_MODULE_ENABLED 00027 00028 #if defined(ETH) 00029 00030 /** @defgroup ETHEx ETHEx 00031 * @brief ETH HAL Extended module driver 00032 * @{ 00033 */ 00034 00035 00036 /* Private typedef -----------------------------------------------------------*/ 00037 /* Private define ------------------------------------------------------------*/ 00038 /** @defgroup ETHEx_Private_Constants ETHEx Private Constants 00039 * @{ 00040 */ 00041 #define ETH_MACL4CR_MASK (ETH_MACL3L4CR_L4PEN | ETH_MACL3L4CR_L4SPM | \ 00042 ETH_MACL3L4CR_L4SPIM | ETH_MACL3L4CR_L4DPM | \ 00043 ETH_MACL3L4CR_L4DPIM) 00044 00045 #define ETH_MACL3CR_MASK (ETH_MACL3L4CR_L3PEN | ETH_MACL3L4CR_L3SAM | \ 00046 ETH_MACL3L4CR_L3SAIM | ETH_MACL3L4CR_L3DAM | \ 00047 ETH_MACL3L4CR_L3DAIM | ETH_MACL3L4CR_L3HSBM | \ 00048 ETH_MACL3L4CR_L3HDBM) 00049 00050 #define ETH_MACRXVLAN_MASK (ETH_MACVTR_EIVLRXS | ETH_MACVTR_EIVLS | \ 00051 ETH_MACVTR_ERIVLT | ETH_MACVTR_EDVLP | \ 00052 ETH_MACVTR_VTHM | ETH_MACVTR_EVLRXS | \ 00053 ETH_MACVTR_EVLS | ETH_MACVTR_DOVLTC | \ 00054 ETH_MACVTR_ERSVLM | ETH_MACVTR_ESVL | \ 00055 ETH_MACVTR_VTIM | ETH_MACVTR_ETV) 00056 00057 #define ETH_MACTXVLAN_MASK (ETH_MACVIR_VLTI | ETH_MACVIR_CSVL | \ 00058 ETH_MACVIR_VLP | ETH_MACVIR_VLC) 00059 /** 00060 * @} 00061 */ 00062 00063 /* Private macros ------------------------------------------------------------*/ 00064 /* Private function prototypes -----------------------------------------------*/ 00065 /* Exported functions ---------------------------------------------------------*/ 00066 /** @defgroup ETHEx_Exported_Functions ETH Extended Exported Functions 00067 * @{ 00068 */ 00069 00070 /** @defgroup ETHEx_Exported_Functions_Group1 Extended features functions 00071 * @brief Extended features functions 00072 * 00073 @verbatim 00074 =============================================================================== 00075 ##### Extended features functions ##### 00076 =============================================================================== 00077 [..] This section provides functions allowing to: 00078 (+) Configure ARP offload module 00079 (+) Configure L3 and L4 filters 00080 (+) Configure Extended VLAN features 00081 (+) Configure Energy Efficient Ethernet module 00082 00083 @endverbatim 00084 * @{ 00085 */ 00086 00087 /** 00088 * @brief Enables ARP Offload. 00089 * @param heth: pointer to a ETH_HandleTypeDef structure that contains 00090 * the configuration information for ETHERNET module 00091 * @retval None 00092 */ 00093 void HAL_ETHEx_EnableARPOffload(ETH_HandleTypeDef *heth) 00094 { 00095 SET_BIT(heth->Instance->MACCR, ETH_MACCR_ARP); 00096 } 00097 00098 /** 00099 * @brief Disables ARP Offload. 00100 * @param heth: pointer to a ETH_HandleTypeDef structure that contains 00101 * the configuration information for ETHERNET module 00102 * @retval None 00103 */ 00104 void HAL_ETHEx_DisableARPOffload(ETH_HandleTypeDef *heth) 00105 { 00106 CLEAR_BIT(heth->Instance->MACCR, ETH_MACCR_ARP); 00107 } 00108 00109 /** 00110 * @brief Set the ARP Match IP address 00111 * @param heth: pointer to a ETH_HandleTypeDef structure that contains 00112 * the configuration information for ETHERNET module 00113 * @param IpAddress: IP Address to be matched for incoming ARP requests 00114 * @retval None 00115 */ 00116 void HAL_ETHEx_SetARPAddressMatch(ETH_HandleTypeDef *heth, uint32_t IpAddress) 00117 { 00118 WRITE_REG(heth->Instance->MACARPAR, IpAddress); 00119 } 00120 00121 /** 00122 * @brief Configures the L4 Filter, this function allow to: 00123 * set the layer 4 protocol to be matched (TCP or UDP) 00124 * enable/disable L4 source/destination port perfect/inverse match. 00125 * @param heth: pointer to a ETH_HandleTypeDef structure that contains 00126 * the configuration information for ETHERNET module 00127 * @param Filter: L4 filter to configured, this parameter must be one of the following 00128 * ETH_L4_FILTER_0 00129 * ETH_L4_FILTER_1 00130 * @param pL4FilterConfig: pointer to a ETH_L4FilterConfigTypeDef structure 00131 * that contains L4 filter configuration. 00132 * @retval HAL status 00133 */ 00134 HAL_StatusTypeDef HAL_ETHEx_SetL4FilterConfig(ETH_HandleTypeDef *heth, uint32_t Filter , ETH_L4FilterConfigTypeDef *pL4FilterConfig) 00135 { 00136 __IO uint32_t *configreg = ((__IO uint32_t *)(&(heth->Instance->MACL3L4C0R) + Filter)); 00137 00138 if(pL4FilterConfig == NULL) 00139 { 00140 return HAL_ERROR; 00141 } 00142 00143 /* Write configuration to (MACL3L4C0R + filter )register */ 00144 MODIFY_REG(*configreg, ETH_MACL4CR_MASK ,(pL4FilterConfig->Protocol | 00145 pL4FilterConfig->SrcPortFilterMatch | 00146 pL4FilterConfig->DestPortFilterMatch)); 00147 00148 configreg = ((__IO uint32_t *)(&(heth->Instance->MACL4A0R) + Filter)); 00149 00150 /* Write configuration to (MACL4A0R + filter )register */ 00151 MODIFY_REG(*configreg, (ETH_MACL4AR_L4DP | ETH_MACL4AR_L4SP) , (pL4FilterConfig->SourcePort | 00152 (pL4FilterConfig->DestinationPort << 16))); 00153 00154 /* Enable L4 filter */ 00155 SET_BIT(heth->Instance->MACPFR, ETH_MACPFR_IPFE); 00156 00157 return HAL_OK; 00158 } 00159 00160 /** 00161 * @brief Configures the L4 Filter, this function allow to: 00162 * set the layer 4 protocol to be matched (TCP or UDP) 00163 * enable/disable L4 source/destination port perfect/inverse match. 00164 * @param heth: pointer to a ETH_HandleTypeDef structure that contains 00165 * the configuration information for ETHERNET module 00166 * @param Filter: L4 filter to configured, this parameter must be one of the following 00167 * ETH_L4_FILTER_0 00168 * ETH_L4_FILTER_1 00169 * @param pL4FilterConfig: pointer to a ETH_L4FilterConfigTypeDef structure 00170 * that contains L4 filter configuration. 00171 * @retval HAL status 00172 */ 00173 HAL_StatusTypeDef HAL_ETHEx_GetL4FilterConfig(ETH_HandleTypeDef *heth, uint32_t Filter, ETH_L4FilterConfigTypeDef *pL4FilterConfig) 00174 { 00175 if(pL4FilterConfig == NULL) 00176 { 00177 return HAL_ERROR; 00178 } 00179 00180 /* Get configuration to (MACL3L4C0R + filter )register */ 00181 pL4FilterConfig->Protocol = READ_BIT(*((__IO uint32_t *)(&(heth->Instance->MACL3L4C0R) + Filter)), ETH_MACL3L4CR_L4PEN); 00182 pL4FilterConfig->DestPortFilterMatch = READ_BIT(*((__IO uint32_t *)(&(heth->Instance->MACL3L4C0R) + Filter)), (ETH_MACL3L4CR_L4DPM | ETH_MACL3L4CR_L4DPIM)); 00183 pL4FilterConfig->SrcPortFilterMatch = READ_BIT(*((__IO uint32_t *)(&(heth->Instance->MACL3L4C0R) + Filter)), (ETH_MACL3L4CR_L4SPM | ETH_MACL3L4CR_L4SPIM)); 00184 00185 /* Get configuration to (MACL3L4C0R + filter )register */ 00186 pL4FilterConfig->DestinationPort = (READ_BIT(*((__IO uint32_t *)(&(heth->Instance->MACL4A0R) + Filter)), ETH_MACL4AR_L4DP) >> 16); 00187 pL4FilterConfig->SourcePort = READ_BIT(*((__IO uint32_t *)(&(heth->Instance->MACL4A0R) + Filter)), ETH_MACL4AR_L4SP); 00188 00189 return HAL_OK; 00190 } 00191 00192 /** 00193 * @brief Configures the L3 Filter, this function allow to: 00194 * set the layer 3 protocol to be matched (IPv4 or IPv6) 00195 * enable/disable L3 source/destination port perfect/inverse match. 00196 * @param heth: pointer to a ETH_HandleTypeDef structure that contains 00197 * the configuration information for ETHERNET module 00198 * @param Filter: L3 filter to configured, this parameter must be one of the following 00199 * ETH_L3_FILTER_0 00200 * ETH_L3_FILTER_1 00201 * @param pL3FilterConfig: pointer to a ETH_L3FilterConfigTypeDef structure 00202 * that contains L3 filter configuration. 00203 * @retval HAL status 00204 */ 00205 HAL_StatusTypeDef HAL_ETHEx_SetL3FilterConfig(ETH_HandleTypeDef *heth, uint32_t Filter, ETH_L3FilterConfigTypeDef *pL3FilterConfig) 00206 { 00207 __IO uint32_t *configreg = ((__IO uint32_t *)(&(heth->Instance->MACL3L4C0R) + Filter)); 00208 00209 if(pL3FilterConfig == NULL) 00210 { 00211 return HAL_ERROR; 00212 } 00213 00214 /* Write configuration to (MACL3L4C0R + filter )register */ 00215 MODIFY_REG(*configreg, ETH_MACL3CR_MASK, (pL3FilterConfig->Protocol | 00216 pL3FilterConfig->SrcAddrFilterMatch | 00217 pL3FilterConfig->DestAddrFilterMatch | 00218 (pL3FilterConfig->SrcAddrHigherBitsMatch << 6) | 00219 (pL3FilterConfig->DestAddrHigherBitsMatch << 11))); 00220 00221 /* Check if IPv6 protocol is selected */ 00222 if(pL3FilterConfig->Protocol != ETH_L3_IPV4_MATCH) 00223 { 00224 /* Set the IPv6 address match */ 00225 /* Set Bits[31:0] of 128-bit IP addr */ 00226 *((__IO uint32_t *)(&(heth->Instance->MACL3A0R0R) + Filter)) = pL3FilterConfig->Ip6Addr[0]; 00227 /* Set Bits[63:32] of 128-bit IP addr */ 00228 *((__IO uint32_t *)(&(heth->Instance->MACL3A1R0R) + Filter)) = pL3FilterConfig->Ip6Addr[1]; 00229 /* update Bits[95:64] of 128-bit IP addr */ 00230 *((__IO uint32_t *)(&(heth->Instance->MACL3A2R0R) + Filter)) = pL3FilterConfig->Ip6Addr[2]; 00231 /* update Bits[127:96] of 128-bit IP addr */ 00232 *((__IO uint32_t *)(&(heth->Instance->MACL3A3R0R) + Filter)) = pL3FilterConfig->Ip6Addr[3]; 00233 } 00234 else /* IPv4 protocol is selected */ 00235 { 00236 /* Set the IPv4 source address match */ 00237 *((__IO uint32_t *)(&(heth->Instance->MACL3A0R0R) + Filter)) = pL3FilterConfig->Ip4SrcAddr; 00238 /* Set the IPv4 destination address match */ 00239 *((__IO uint32_t *)(&(heth->Instance->MACL3A1R0R) + Filter)) = pL3FilterConfig->Ip4DestAddr; 00240 } 00241 00242 return HAL_OK; 00243 } 00244 00245 /** 00246 * @brief Configures the L3 Filter, this function allow to: 00247 * set the layer 3 protocol to be matched (IPv4 or IPv6) 00248 * enable/disable L3 source/destination port perfect/inverse match. 00249 * @param heth: pointer to a ETH_HandleTypeDef structure that contains 00250 * the configuration information for ETHERNET module 00251 * @param Filter: L3 filter to configured, this parameter must be one of the following 00252 * ETH_L3_FILTER_0 00253 * ETH_L3_FILTER_1 00254 * @param pL3FilterConfig: pointer to a ETH_L3FilterConfigTypeDef structure 00255 * that will contain the L3 filter configuration. 00256 * @retval HAL status 00257 */ 00258 HAL_StatusTypeDef HAL_ETHEx_GetL3FilterConfig(ETH_HandleTypeDef *heth, uint32_t Filter, ETH_L3FilterConfigTypeDef *pL3FilterConfig) 00259 { 00260 if(pL3FilterConfig == NULL) 00261 { 00262 return HAL_ERROR; 00263 } 00264 00265 pL3FilterConfig->Protocol = READ_BIT(*((__IO uint32_t *)(&(heth->Instance->MACL3L4C0R) + Filter)), ETH_MACL3L4CR_L3PEN); 00266 pL3FilterConfig->SrcAddrFilterMatch = READ_BIT(*((__IO uint32_t *)(&(heth->Instance->MACL3L4C0R) + Filter)), (ETH_MACL3L4CR_L3SAM | ETH_MACL3L4CR_L3SAIM)); 00267 pL3FilterConfig->DestAddrFilterMatch = READ_BIT(*((__IO uint32_t *)(&(heth->Instance->MACL3L4C0R) + Filter)), (ETH_MACL3L4CR_L3DAM | ETH_MACL3L4CR_L3DAIM)); 00268 pL3FilterConfig->SrcAddrHigherBitsMatch = (READ_BIT(*((__IO uint32_t *)(&(heth->Instance->MACL3L4C0R) + Filter)), ETH_MACL3L4CR_L3HSBM) >> 6); 00269 pL3FilterConfig->DestAddrHigherBitsMatch = (READ_BIT(*((__IO uint32_t *)(&(heth->Instance->MACL3L4C0R) + Filter)), ETH_MACL3L4CR_L3HDBM) >> 11); 00270 00271 if(pL3FilterConfig->Protocol != ETH_L3_IPV4_MATCH) 00272 { 00273 pL3FilterConfig->Ip6Addr[0] = *((__IO uint32_t *)(&(heth->Instance->MACL3A0R0R) + Filter)); 00274 pL3FilterConfig->Ip6Addr[1] = *((__IO uint32_t *)(&(heth->Instance->MACL3A1R0R) + Filter)); 00275 pL3FilterConfig->Ip6Addr[2] = *((__IO uint32_t *)(&(heth->Instance->MACL3A2R0R) + Filter)); 00276 pL3FilterConfig->Ip6Addr[3] = *((__IO uint32_t *)(&(heth->Instance->MACL3A3R0R) + Filter)); 00277 } 00278 else 00279 { 00280 pL3FilterConfig->Ip4SrcAddr = *((__IO uint32_t *)(&(heth->Instance->MACL3A0R0R) + Filter)); 00281 pL3FilterConfig->Ip4DestAddr = *((__IO uint32_t *)(&(heth->Instance->MACL3A1R0R) + Filter)); 00282 } 00283 00284 return HAL_OK; 00285 } 00286 00287 /** 00288 * @brief Enables L3 and L4 filtering process. 00289 * @param heth: pointer to a ETH_HandleTypeDef structure that contains 00290 * the configuration information for ETHERNET module 00291 * @retval None. 00292 */ 00293 void HAL_ETHEx_EnableL3L4Filtering(ETH_HandleTypeDef *heth) 00294 { 00295 /* Enable L3/L4 filter */ 00296 SET_BIT(heth->Instance->MACPFR, ETH_MACPFR_IPFE); 00297 } 00298 00299 /** 00300 * @brief Disables L3 and L4 filtering process. 00301 * @param heth: pointer to a ETH_HandleTypeDef structure that contains 00302 * the configuration information for ETHERNET module 00303 * @retval None. 00304 */ 00305 void HAL_ETHEx_DisableL3L4Filtering(ETH_HandleTypeDef *heth) 00306 { 00307 /* Disable L3/L4 filter */ 00308 CLEAR_BIT(heth->Instance->MACPFR, ETH_MACPFR_IPFE); 00309 } 00310 00311 /** 00312 * @brief Get the VLAN Configuration for Receive Packets. 00313 * @param heth: pointer to a ETH_HandleTypeDef structure that contains 00314 * the configuration information for ETHERNET module 00315 * @param pVlanConfig: pointer to a ETH_RxVLANConfigTypeDef structure 00316 * that will contain the VLAN filter configuration. 00317 * @retval HAL status 00318 */ 00319 HAL_StatusTypeDef HAL_ETHEx_GetRxVLANConfig(ETH_HandleTypeDef *heth, ETH_RxVLANConfigTypeDef *pVlanConfig) 00320 { 00321 if(pVlanConfig == NULL) 00322 { 00323 return HAL_ERROR; 00324 } 00325 00326 pVlanConfig->InnerVLANTagInStatus = ((READ_BIT(heth->Instance->MACVTR, ETH_MACVTR_EIVLRXS) >> 31) == 0U) ? DISABLE : ENABLE; 00327 pVlanConfig->StripInnerVLANTag = READ_BIT(heth->Instance->MACVTR, ETH_MACVTR_EIVLS); 00328 pVlanConfig->InnerVLANTag = ((READ_BIT(heth->Instance->MACVTR, ETH_MACVTR_ERIVLT) >> 27) == 0U) ? DISABLE : ENABLE; 00329 pVlanConfig->DoubleVLANProcessing = ((READ_BIT(heth->Instance->MACVTR, ETH_MACVTR_EDVLP) >> 26) == 0U) ? DISABLE : ENABLE; 00330 pVlanConfig->VLANTagHashTableMatch = ((READ_BIT(heth->Instance->MACVTR, ETH_MACVTR_VTHM) >> 25) == 0U) ? DISABLE : ENABLE; 00331 pVlanConfig->VLANTagInStatus = ((READ_BIT(heth->Instance->MACVTR, ETH_MACVTR_EVLRXS) >> 24) == 0U) ? DISABLE : ENABLE; 00332 pVlanConfig->StripVLANTag = READ_BIT(heth->Instance->MACVTR, ETH_MACVTR_EVLS); 00333 pVlanConfig->VLANTypeCheck = READ_BIT(heth->Instance->MACVTR, (ETH_MACVTR_DOVLTC | ETH_MACVTR_ERSVLM | ETH_MACVTR_ESVL)); 00334 pVlanConfig->VLANTagInverceMatch = ((READ_BIT(heth->Instance->MACVTR, ETH_MACVTR_VTIM) >> 17) == 0U) ? DISABLE : ENABLE; 00335 00336 return HAL_OK; 00337 } 00338 00339 /** 00340 * @brief Set the VLAN Configuration for Receive Packets. 00341 * @param heth: pointer to a ETH_HandleTypeDef structure that contains 00342 * the configuration information for ETHERNET module 00343 * @param pVlanConfig: pointer to a ETH_RxVLANConfigTypeDef structure 00344 * that contains VLAN filter configuration. 00345 * @retval HAL status 00346 */ 00347 HAL_StatusTypeDef HAL_ETHEx_SetRxVLANConfig(ETH_HandleTypeDef *heth, ETH_RxVLANConfigTypeDef *pVlanConfig) 00348 { 00349 if(pVlanConfig == NULL) 00350 { 00351 return HAL_ERROR; 00352 } 00353 00354 /* Write config to MACVTR */ 00355 MODIFY_REG(heth->Instance->MACVTR, ETH_MACRXVLAN_MASK, (((uint32_t)pVlanConfig->InnerVLANTagInStatus << 31) | 00356 pVlanConfig->StripInnerVLANTag | 00357 ((uint32_t)pVlanConfig->InnerVLANTag << 27) | 00358 ((uint32_t)pVlanConfig->DoubleVLANProcessing << 26) | 00359 ((uint32_t)pVlanConfig->VLANTagHashTableMatch << 25) | 00360 ((uint32_t)pVlanConfig->VLANTagInStatus << 24) | 00361 pVlanConfig->StripVLANTag | 00362 pVlanConfig->VLANTypeCheck | 00363 ((uint32_t)pVlanConfig->VLANTagInverceMatch << 17))); 00364 00365 return HAL_OK; 00366 } 00367 00368 /** 00369 * @brief Set the VLAN Hash Table 00370 * @param heth: pointer to a ETH_HandleTypeDef structure that contains 00371 * the configuration information for ETHERNET module 00372 * @param VLANHashTable: VLAN hash table 16 bit value 00373 * @retval None 00374 */ 00375 void HAL_ETHEx_SetVLANHashTable(ETH_HandleTypeDef *heth, uint32_t VLANHashTable) 00376 { 00377 MODIFY_REG(heth->Instance->MACVHTR, ETH_MACVHTR_VLHT, VLANHashTable); 00378 } 00379 00380 /** 00381 * @brief Get the VLAN Configuration for Transmit Packets. 00382 * @param heth: pointer to a ETH_HandleTypeDef structure that contains 00383 * the configuration information for ETHERNET module 00384 * @param VLANTag: Selects the vlan tag, this parameter must be one of the following 00385 * ETH_OUTER_TX_VLANTAG 00386 * ETH_INNER_TX_VLANTAG 00387 * @param pVlanConfig: pointer to a ETH_TxVLANConfigTypeDef structure 00388 * that will contain the Tx VLAN filter configuration. 00389 * @retval HAL Status. 00390 */ 00391 HAL_StatusTypeDef HAL_ETHEx_GetTxVLANConfig(ETH_HandleTypeDef *heth, uint32_t VLANTag ,ETH_TxVLANConfigTypeDef *pVlanConfig) 00392 { 00393 if (pVlanConfig == NULL) 00394 { 00395 return HAL_ERROR; 00396 } 00397 00398 if(VLANTag == ETH_INNER_TX_VLANTAG) 00399 { 00400 pVlanConfig->SourceTxDesc = ((READ_BIT(heth->Instance->MACIVIR, ETH_MACVIR_VLTI) >> 20) == 0U) ? DISABLE : ENABLE; 00401 pVlanConfig->SVLANType = ((READ_BIT(heth->Instance->MACIVIR, ETH_MACVIR_CSVL) >> 19) == 0U) ? DISABLE : ENABLE; 00402 pVlanConfig->VLANTagControl = READ_BIT(heth->Instance->MACIVIR, (ETH_MACVIR_VLP | ETH_MACVIR_VLC)); 00403 } 00404 else 00405 { 00406 pVlanConfig->SourceTxDesc = ((READ_BIT(heth->Instance->MACVIR, ETH_MACVIR_VLTI) >> 20) == 0U) ? DISABLE : ENABLE; 00407 pVlanConfig->SVLANType = ((READ_BIT(heth->Instance->MACVIR, ETH_MACVIR_CSVL) >> 19) == 0U) ? DISABLE : ENABLE; 00408 pVlanConfig->VLANTagControl = READ_BIT(heth->Instance->MACVIR, (ETH_MACVIR_VLP | ETH_MACVIR_VLC)); 00409 } 00410 00411 return HAL_OK;; 00412 } 00413 00414 /** 00415 * @brief Set the VLAN Configuration for Transmit Packets. 00416 * @param heth: pointer to a ETH_HandleTypeDef structure that contains 00417 * the configuration information for ETHERNET module 00418 * @param VLANTag: Selects the vlan tag, this parameter must be one of the following 00419 * ETH_OUTER_TX_VLANTAG 00420 * ETH_INNER_TX_VLANTAG 00421 * @param pVlanConfig: pointer to a ETH_TxVLANConfigTypeDef structure 00422 * that contains Tx VLAN filter configuration. 00423 * @retval HAL Status 00424 */ 00425 HAL_StatusTypeDef HAL_ETHEx_SetTxVLANConfig(ETH_HandleTypeDef *heth, uint32_t VLANTag ,ETH_TxVLANConfigTypeDef *pVlanConfig) 00426 { 00427 if(VLANTag == ETH_INNER_TX_VLANTAG) 00428 { 00429 MODIFY_REG(heth->Instance->MACIVIR, ETH_MACTXVLAN_MASK, (((uint32_t)pVlanConfig->SourceTxDesc << 20) | 00430 ((uint32_t)pVlanConfig->SVLANType << 19) | 00431 pVlanConfig->VLANTagControl)); 00432 /* Enable Double VLAN processing */ 00433 SET_BIT(heth->Instance->MACVTR, ETH_MACVTR_EDVLP); 00434 } 00435 else 00436 { 00437 MODIFY_REG(heth->Instance->MACVIR, ETH_MACTXVLAN_MASK, (((uint32_t)pVlanConfig->SourceTxDesc << 20) | 00438 ((uint32_t)pVlanConfig->SVLANType << 19) | 00439 pVlanConfig->VLANTagControl)); 00440 } 00441 00442 return HAL_OK; 00443 } 00444 00445 /** 00446 * @brief Set the VLAN Tag Identifier for Transmit Packets. 00447 * @param heth: pointer to a ETH_HandleTypeDef structure that contains 00448 * the configuration information for ETHERNET module 00449 * @param VLANTag: Selects the vlan tag, this parameter must be one of the following 00450 * ETH_OUTER_TX_VLANTAG 00451 * ETH_INNER_TX_VLANTAG 00452 * @param VLANIdentifier: VLAN Identifier 16 bit value 00453 * @retval None 00454 */ 00455 void HAL_ETHEx_SetTxVLANIdentifier(ETH_HandleTypeDef *heth, uint32_t VLANTag ,uint32_t VLANIdentifier) 00456 { 00457 if(VLANTag == ETH_INNER_TX_VLANTAG) 00458 { 00459 MODIFY_REG(heth->Instance->MACIVIR, ETH_MACVIR_VLT, VLANIdentifier); 00460 } 00461 else 00462 { 00463 MODIFY_REG(heth->Instance->MACVIR, ETH_MACVIR_VLT, VLANIdentifier); 00464 } 00465 } 00466 00467 /** 00468 * @brief Enables the VLAN Tag Filtering process. 00469 * @param heth: pointer to a ETH_HandleTypeDef structure that contains 00470 * the configuration information for ETHERNET module 00471 * @retval None. 00472 */ 00473 void HAL_ETHEx_EnableVLANProcessing(ETH_HandleTypeDef *heth) 00474 { 00475 /* Enable VLAN processing */ 00476 SET_BIT(heth->Instance->MACPFR, ETH_MACPFR_VTFE); 00477 } 00478 00479 /** 00480 * @brief Disables the VLAN Tag Filtering process. 00481 * @param heth: pointer to a ETH_HandleTypeDef structure that contains 00482 * the configuration information for ETHERNET module 00483 * @retval None. 00484 */ 00485 void HAL_ETHEx_DisableVLANProcessing(ETH_HandleTypeDef *heth) 00486 { 00487 /* Disable VLAN processing */ 00488 CLEAR_BIT(heth->Instance->MACPFR, ETH_MACPFR_VTFE); 00489 } 00490 00491 /** 00492 * @brief Enters the Low Power Idle (LPI) mode 00493 * @param heth: pointer to a ETH_HandleTypeDef structure that contains 00494 * the configuration information for ETHERNET module 00495 * @param TxAutomate: Enable/Disable automate enter/exit LPI mode. 00496 * @param TxClockStop: Enable/Disable Tx clock stop in LPI mode. 00497 * @retval None 00498 */ 00499 void HAL_ETHEx_EnterLPIMode(ETH_HandleTypeDef *heth, FunctionalState TxAutomate, FunctionalState TxClockStop) 00500 { 00501 /* Enable LPI Interrupts */ 00502 __HAL_ETH_MAC_ENABLE_IT(heth, ETH_MACIER_LPIIE); 00503 00504 /* Write to LPI Control register: Enter low power mode */ 00505 MODIFY_REG(heth->Instance->MACLCSR, (ETH_MACLCSR_LPIEN | ETH_MACLCSR_LPITXA | ETH_MACLCSR_LPITCSE), (((uint32_t)TxAutomate << 19) | 00506 ((uint32_t)TxClockStop << 21) | 00507 ETH_MACLCSR_LPIEN)); 00508 } 00509 00510 /** 00511 * @brief Exits the Low Power Idle (LPI) mode. 00512 * @param heth: pointer to a ETH_HandleTypeDef structure that contains 00513 * the configuration information for ETHERNET module 00514 * @retval None 00515 */ 00516 void HAL_ETHEx_ExitLPIMode(ETH_HandleTypeDef *heth) 00517 { 00518 /* Clear the LPI Config and exit low power mode */ 00519 CLEAR_BIT(heth->Instance->MACLCSR, (ETH_MACLCSR_LPIEN | ETH_MACLCSR_LPITXA | ETH_MACLCSR_LPITCSE)); 00520 00521 /* Enable LPI Interrupts */ 00522 __HAL_ETH_MAC_DISABLE_IT(heth, ETH_MACIER_LPIIE); 00523 } 00524 00525 00526 /** 00527 * @brief Returns the ETH MAC LPI event 00528 * @param heth: pointer to a ETH_HandleTypeDef structure that contains 00529 * the configuration information for ETHERNET module 00530 * @retval ETH MAC WakeUp event 00531 */ 00532 uint32_t HAL_ETHEx_GetMACLPIEvent(ETH_HandleTypeDef *heth) 00533 { 00534 return heth->MACLPIEvent; 00535 } 00536 00537 /** 00538 * @} 00539 */ 00540 00541 /** 00542 * @} 00543 */ 00544 00545 /** 00546 * @} 00547 */ 00548 00549 #endif /* ETH */ 00550 00551 #endif /* HAL_ETH_MODULE_ENABLED */ 00552 00553 /** 00554 * @} 00555 */ 00556
1.7.6.1