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STM32H735xx HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32h7xx_hal_flash.h 00004 * @author MCD Application Team 00005 * @brief Header file of FLASH HAL module. 00006 ****************************************************************************** 00007 * @attention 00008 * 00009 * Copyright (c) 2017 STMicroelectronics. 00010 * All rights reserved. 00011 * 00012 * This software is licensed under terms that can be found in the LICENSE file in 00013 * the root directory of this software component. 00014 * If no LICENSE file comes with this software, it is provided AS-IS. 00015 ****************************************************************************** 00016 */ 00017 00018 /* Define to prevent recursive inclusion -------------------------------------*/ 00019 #ifndef STM32H7xx_HAL_FLASH_H 00020 #define STM32H7xx_HAL_FLASH_H 00021 00022 #ifdef __cplusplus 00023 extern "C" { 00024 #endif 00025 00026 /* Includes ------------------------------------------------------------------*/ 00027 #include "stm32h7xx_hal_def.h" 00028 00029 /** @addtogroup STM32H7xx_HAL_Driver 00030 * @{ 00031 */ 00032 00033 /** @addtogroup FLASH 00034 * @{ 00035 */ 00036 00037 /* Exported types ------------------------------------------------------------*/ 00038 /** @defgroup FLASH_Exported_Types FLASH Exported Types 00039 * @{ 00040 */ 00041 00042 /** 00043 * @brief FLASH Procedure structure definition 00044 */ 00045 typedef enum 00046 { 00047 FLASH_PROC_NONE = 0U, 00048 FLASH_PROC_SECTERASE_BANK1, 00049 FLASH_PROC_MASSERASE_BANK1, 00050 FLASH_PROC_PROGRAM_BANK1, 00051 FLASH_PROC_SECTERASE_BANK2, 00052 FLASH_PROC_MASSERASE_BANK2, 00053 FLASH_PROC_PROGRAM_BANK2, 00054 FLASH_PROC_ALLBANK_MASSERASE 00055 } FLASH_ProcedureTypeDef; 00056 00057 00058 /** 00059 * @brief FLASH handle Structure definition 00060 */ 00061 typedef struct 00062 { 00063 __IO FLASH_ProcedureTypeDef ProcedureOnGoing; /*!< Internal variable to indicate which procedure is ongoing or not in IT context */ 00064 00065 __IO uint32_t NbSectorsToErase; /*!< Internal variable to save the remaining sectors to erase in IT context */ 00066 00067 __IO uint32_t VoltageForErase; /*!< Internal variable to provide voltage range selected by user in IT context */ 00068 00069 __IO uint32_t Sector; /*!< Internal variable to define the current sector which is erasing */ 00070 00071 __IO uint32_t Address; /*!< Internal variable to save address selected for program */ 00072 00073 HAL_LockTypeDef Lock; /*!< FLASH locking object */ 00074 00075 __IO uint32_t ErrorCode; /*!< FLASH error code */ 00076 00077 }FLASH_ProcessTypeDef; 00078 00079 /** 00080 * @} 00081 */ 00082 00083 /* Exported constants --------------------------------------------------------*/ 00084 /** @defgroup FLASH_Exported_Constants FLASH Exported Constants 00085 * @{ 00086 */ 00087 00088 /** @defgroup FLASH_Error_Code FLASH Error Code 00089 * @brief FLASH Error Code 00090 * @{ 00091 */ 00092 #define HAL_FLASH_ERROR_NONE 0x00000000U /*!< No error */ 00093 00094 #define HAL_FLASH_ERROR_WRP FLASH_FLAG_WRPERR /*!< Write Protection Error */ 00095 #define HAL_FLASH_ERROR_PGS FLASH_FLAG_PGSERR /*!< Program Sequence Error */ 00096 #define HAL_FLASH_ERROR_STRB FLASH_FLAG_STRBERR /*!< Strobe Error */ 00097 #define HAL_FLASH_ERROR_INC FLASH_FLAG_INCERR /*!< Inconsistency Error */ 00098 #if defined (FLASH_SR_OPERR) 00099 #define HAL_FLASH_ERROR_OPE FLASH_FLAG_OPERR /*!< Operation Error */ 00100 #endif /* FLASH_SR_OPERR */ 00101 #define HAL_FLASH_ERROR_RDP FLASH_FLAG_RDPERR /*!< Read Protection Error */ 00102 #define HAL_FLASH_ERROR_RDS FLASH_FLAG_RDSERR /*!< Read Secured Error */ 00103 #define HAL_FLASH_ERROR_SNECC FLASH_FLAG_SNECCERR /*!< ECC Single Correction Error */ 00104 #define HAL_FLASH_ERROR_DBECC FLASH_FLAG_DBECCERR /*!< ECC Double Detection Error */ 00105 #define HAL_FLASH_ERROR_CRCRD FLASH_FLAG_CRCRDERR /*!< CRC Read Error */ 00106 00107 #define HAL_FLASH_ERROR_WRP_BANK1 FLASH_FLAG_WRPERR_BANK1 /*!< Write Protection Error on Bank 1 */ 00108 #define HAL_FLASH_ERROR_PGS_BANK1 FLASH_FLAG_PGSERR_BANK1 /*!< Program Sequence Error on Bank 1 */ 00109 #define HAL_FLASH_ERROR_STRB_BANK1 FLASH_FLAG_STRBERR_BANK1 /*!< Strobe Error on Bank 1 */ 00110 #define HAL_FLASH_ERROR_INC_BANK1 FLASH_FLAG_INCERR_BANK1 /*!< Inconsistency Error on Bank 1 */ 00111 #if defined (FLASH_SR_OPERR) 00112 #define HAL_FLASH_ERROR_OPE_BANK1 FLASH_FLAG_OPERR_BANK1 /*!< Operation Error on Bank 1 */ 00113 #endif /* FLASH_SR_OPERR */ 00114 #define HAL_FLASH_ERROR_RDP_BANK1 FLASH_FLAG_RDPERR_BANK1 /*!< Read Protection Error on Bank 1 */ 00115 #define HAL_FLASH_ERROR_RDS_BANK1 FLASH_FLAG_RDSERR_BANK1 /*!< Read Secured Error on Bank 1 */ 00116 #define HAL_FLASH_ERROR_SNECC_BANK1 FLASH_FLAG_SNECCERR_BANK1 /*!< ECC Single Correction Error on Bank 1 */ 00117 #define HAL_FLASH_ERROR_DBECC_BANK1 FLASH_FLAG_DBECCERR_BANK1 /*!< ECC Double Detection Error on Bank 1 */ 00118 #define HAL_FLASH_ERROR_CRCRD_BANK1 FLASH_FLAG_CRCRDERR_BANK1 /*!< CRC Read Error on Bank1 */ 00119 00120 #define HAL_FLASH_ERROR_WRP_BANK2 FLASH_FLAG_WRPERR_BANK2 /*!< Write Protection Error on Bank 2 */ 00121 #define HAL_FLASH_ERROR_PGS_BANK2 FLASH_FLAG_PGSERR_BANK2 /*!< Program Sequence Error on Bank 2 */ 00122 #define HAL_FLASH_ERROR_STRB_BANK2 FLASH_FLAG_STRBERR_BANK2 /*!< Strobe Error on Bank 2 */ 00123 #define HAL_FLASH_ERROR_INC_BANK2 FLASH_FLAG_INCERR_BANK2 /*!< Inconsistency Error on Bank 2 */ 00124 #if defined (FLASH_SR_OPERR) 00125 #define HAL_FLASH_ERROR_OPE_BANK2 FLASH_FLAG_OPERR_BANK2 /*!< Operation Error on Bank 2 */ 00126 #endif /* FLASH_SR_OPERR */ 00127 #define HAL_FLASH_ERROR_RDP_BANK2 FLASH_FLAG_RDPERR_BANK2 /*!< Read Protection Error on Bank 2 */ 00128 #define HAL_FLASH_ERROR_RDS_BANK2 FLASH_FLAG_RDSERR_BANK2 /*!< Read Secured Error on Bank 2 */ 00129 #define HAL_FLASH_ERROR_SNECC_BANK2 FLASH_FLAG_SNECCERR_BANK2 /*!< ECC Single Correction Error on Bank 2 */ 00130 #define HAL_FLASH_ERROR_DBECC_BANK2 FLASH_FLAG_DBECCERR_BANK2 /*!< ECC Double Detection Error on Bank 2 */ 00131 #define HAL_FLASH_ERROR_CRCRD_BANK2 FLASH_FLAG_CRCRDERR_BANK2 /*!< CRC Read Error on Bank2 */ 00132 00133 #define HAL_FLASH_ERROR_OB_CHANGE FLASH_OPTSR_OPTCHANGEERR /*!< Option Byte Change Error */ 00134 /** 00135 * @} 00136 */ 00137 00138 /** @defgroup FLASH_Type_Program FLASH Type Program 00139 * @{ 00140 */ 00141 #define FLASH_TYPEPROGRAM_FLASHWORD 0x01U /*!< Program a flash word at a specified address */ 00142 #if defined (FLASH_OPTCR_PG_OTP) 00143 #define FLASH_TYPEPROGRAM_OTPWORD 0x02U /*!< Program an OTP word at a specified address */ 00144 #endif /* FLASH_OPTCR_PG_OTP */ 00145 /** 00146 * @} 00147 */ 00148 00149 /** @defgroup FLASH_Flag_definition FLASH Flag definition 00150 * @brief Flag definition 00151 * @{ 00152 */ 00153 #define FLASH_FLAG_BSY FLASH_SR_BSY /*!< FLASH Busy flag */ 00154 #define FLASH_FLAG_WBNE FLASH_SR_WBNE /*!< Write Buffer Not Empty flag */ 00155 #define FLASH_FLAG_QW FLASH_SR_QW /*!< Wait Queue on flag */ 00156 #define FLASH_FLAG_CRC_BUSY FLASH_SR_CRC_BUSY /*!< CRC Busy flag */ 00157 #define FLASH_FLAG_EOP FLASH_SR_EOP /*!< End Of Program on flag */ 00158 #define FLASH_FLAG_WRPERR FLASH_SR_WRPERR /*!< Write Protection Error on flag */ 00159 #define FLASH_FLAG_PGSERR FLASH_SR_PGSERR /*!< Program Sequence Error on flag */ 00160 #define FLASH_FLAG_STRBERR FLASH_SR_STRBERR /*!< Strobe Error flag */ 00161 #define FLASH_FLAG_INCERR FLASH_SR_INCERR /*!< Inconsistency Error on flag */ 00162 #if defined (FLASH_SR_OPERR) 00163 #define FLASH_FLAG_OPERR FLASH_SR_OPERR /*!< Operation Error on flag */ 00164 #endif /* FLASH_SR_OPERR */ 00165 #define FLASH_FLAG_RDPERR FLASH_SR_RDPERR /*!< Read Protection Error on flag */ 00166 #define FLASH_FLAG_RDSERR FLASH_SR_RDSERR /*!< Read Secured Error on flag */ 00167 #define FLASH_FLAG_SNECCERR FLASH_SR_SNECCERR /*!< Single ECC Error Correction on flag */ 00168 #define FLASH_FLAG_DBECCERR FLASH_SR_DBECCERR /*!< Double Detection ECC Error on flag */ 00169 #define FLASH_FLAG_CRCEND FLASH_SR_CRCEND /*!< CRC End of Calculation flag */ 00170 #define FLASH_FLAG_CRCRDERR FLASH_SR_CRCRDERR /*!< CRC Read Error on bank flag */ 00171 00172 #define FLASH_FLAG_BSY_BANK1 FLASH_SR_BSY /*!< FLASH Bank 1 Busy flag */ 00173 #define FLASH_FLAG_WBNE_BANK1 FLASH_SR_WBNE /*!< Write Buffer Not Empty on Bank 1 flag */ 00174 #define FLASH_FLAG_QW_BANK1 FLASH_SR_QW /*!< Wait Queue on Bank 1 flag */ 00175 #define FLASH_FLAG_CRC_BUSY_BANK1 FLASH_SR_CRC_BUSY /*!< CRC Busy on Bank 1 flag */ 00176 #define FLASH_FLAG_EOP_BANK1 FLASH_SR_EOP /*!< End Of Program on Bank 1 flag */ 00177 #define FLASH_FLAG_WRPERR_BANK1 FLASH_SR_WRPERR /*!< Write Protection Error on Bank 1 flag */ 00178 #define FLASH_FLAG_PGSERR_BANK1 FLASH_SR_PGSERR /*!< Program Sequence Error on Bank 1 flag */ 00179 #define FLASH_FLAG_STRBERR_BANK1 FLASH_SR_STRBERR /*!< Strobe Error on Bank 1 flag */ 00180 #define FLASH_FLAG_INCERR_BANK1 FLASH_SR_INCERR /*!< Inconsistency Error on Bank 1 flag */ 00181 #if defined (FLASH_SR_OPERR) 00182 #define FLASH_FLAG_OPERR_BANK1 FLASH_SR_OPERR /*!< Operation Error on Bank 1 flag */ 00183 #endif /* FLASH_SR_OPERR */ 00184 #define FLASH_FLAG_RDPERR_BANK1 FLASH_SR_RDPERR /*!< Read Protection Error on Bank 1 flag */ 00185 #define FLASH_FLAG_RDSERR_BANK1 FLASH_SR_RDSERR /*!< Read Secured Error on Bank 1 flag */ 00186 #define FLASH_FLAG_SNECCERR_BANK1 FLASH_SR_SNECCERR /*!< Single ECC Error Correction on Bank 1 flag */ 00187 #define FLASH_FLAG_DBECCERR_BANK1 FLASH_SR_DBECCERR /*!< Double Detection ECC Error on Bank 1 flag */ 00188 #define FLASH_FLAG_CRCEND_BANK1 FLASH_SR_CRCEND /*!< CRC End of Calculation on Bank 1 flag */ 00189 #define FLASH_FLAG_CRCRDERR_BANK1 FLASH_SR_CRCRDERR /*!< CRC Read error on Bank 1 flag */ 00190 00191 #if defined (FLASH_SR_OPERR) 00192 #define FLASH_FLAG_ALL_ERRORS_BANK1 (FLASH_FLAG_WRPERR_BANK1 | FLASH_FLAG_PGSERR_BANK1 | \ 00193 FLASH_FLAG_STRBERR_BANK1 | FLASH_FLAG_INCERR_BANK1 | \ 00194 FLASH_FLAG_OPERR_BANK1 | FLASH_FLAG_RDPERR_BANK1 | \ 00195 FLASH_FLAG_RDSERR_BANK1 | FLASH_FLAG_SNECCERR_BANK1 | \ 00196 FLASH_FLAG_DBECCERR_BANK1 | FLASH_FLAG_CRCRDERR_BANK1) /*!< All Bank 1 error flags */ 00197 #else 00198 #define FLASH_FLAG_ALL_ERRORS_BANK1 (FLASH_FLAG_WRPERR_BANK1 | FLASH_FLAG_PGSERR_BANK1 | \ 00199 FLASH_FLAG_STRBERR_BANK1 | FLASH_FLAG_INCERR_BANK1 | \ 00200 FLASH_FLAG_RDPERR_BANK1 | FLASH_FLAG_RDSERR_BANK1 | \ 00201 FLASH_FLAG_SNECCERR_BANK1 | FLASH_FLAG_DBECCERR_BANK1 | \ 00202 FLASH_FLAG_CRCRDERR_BANK1) /*!< All Bank 1 error flags */ 00203 #endif /* FLASH_SR_OPERR */ 00204 00205 #define FLASH_FLAG_ALL_BANK1 (FLASH_FLAG_BSY_BANK1 | FLASH_FLAG_WBNE_BANK1 | \ 00206 FLASH_FLAG_QW_BANK1 | FLASH_FLAG_CRC_BUSY_BANK1 | \ 00207 FLASH_FLAG_EOP_BANK1 | FLASH_FLAG_CRCEND_BANK1 | \ 00208 FLASH_FLAG_ALL_ERRORS_BANK1) /*!< All Bank 1 flags */ 00209 00210 #define FLASH_FLAG_BSY_BANK2 (FLASH_SR_BSY | 0x80000000U) /*!< FLASH Bank 2 Busy flag */ 00211 #define FLASH_FLAG_WBNE_BANK2 (FLASH_SR_WBNE | 0x80000000U) /*!< Write Buffer Not Empty on Bank 2 flag */ 00212 #define FLASH_FLAG_QW_BANK2 (FLASH_SR_QW | 0x80000000U) /*!< Wait Queue on Bank 2 flag */ 00213 #define FLASH_FLAG_CRC_BUSY_BANK2 (FLASH_SR_CRC_BUSY | 0x80000000U) /*!< CRC Busy on Bank 2 flag */ 00214 #define FLASH_FLAG_EOP_BANK2 (FLASH_SR_EOP | 0x80000000U) /*!< End Of Program on Bank 2 flag */ 00215 #define FLASH_FLAG_WRPERR_BANK2 (FLASH_SR_WRPERR | 0x80000000U) /*!< Write Protection Error on Bank 2 flag */ 00216 #define FLASH_FLAG_PGSERR_BANK2 (FLASH_SR_PGSERR | 0x80000000U) /*!< Program Sequence Error on Bank 2 flag */ 00217 #define FLASH_FLAG_STRBERR_BANK2 (FLASH_SR_STRBERR | 0x80000000U) /*!< Strobe Error on Bank 2 flag */ 00218 #define FLASH_FLAG_INCERR_BANK2 (FLASH_SR_INCERR | 0x80000000U) /*!< Inconsistency Error on Bank 2 flag */ 00219 #if defined (FLASH_SR_OPERR) 00220 #define FLASH_FLAG_OPERR_BANK2 (FLASH_SR_OPERR | 0x80000000U) /*!< Operation Error on Bank 2 flag */ 00221 #endif /* FLASH_SR_OPERR */ 00222 #define FLASH_FLAG_RDPERR_BANK2 (FLASH_SR_RDPERR | 0x80000000U) /*!< Read Protection Error on Bank 2 flag */ 00223 #define FLASH_FLAG_RDSERR_BANK2 (FLASH_SR_RDSERR | 0x80000000U) /*!< Read Secured Error on Bank 2 flag */ 00224 #define FLASH_FLAG_SNECCERR_BANK2 (FLASH_SR_SNECCERR | 0x80000000U) /*!< Single ECC Error Correction on Bank 2 flag */ 00225 #define FLASH_FLAG_DBECCERR_BANK2 (FLASH_SR_DBECCERR | 0x80000000U) /*!< Double Detection ECC Error on Bank 2 flag */ 00226 #define FLASH_FLAG_CRCEND_BANK2 (FLASH_SR_CRCEND | 0x80000000U) /*!< CRC End of Calculation on Bank 2 flag */ 00227 #define FLASH_FLAG_CRCRDERR_BANK2 (FLASH_SR_CRCRDERR | 0x80000000U) /*!< CRC Read error on Bank 2 flag */ 00228 00229 #if defined (FLASH_SR_OPERR) 00230 #define FLASH_FLAG_ALL_ERRORS_BANK2 (FLASH_FLAG_WRPERR_BANK2 | FLASH_FLAG_PGSERR_BANK2 | \ 00231 FLASH_FLAG_STRBERR_BANK2 | FLASH_FLAG_INCERR_BANK2 | \ 00232 FLASH_FLAG_OPERR_BANK2 | FLASH_FLAG_RDPERR_BANK2 | \ 00233 FLASH_FLAG_RDSERR_BANK2 | FLASH_FLAG_SNECCERR_BANK2 | \ 00234 FLASH_FLAG_DBECCERR_BANK2 | FLASH_FLAG_CRCRDERR_BANK2) /*!< All Bank 2 error flags */ 00235 #else 00236 #define FLASH_FLAG_ALL_ERRORS_BANK2 (FLASH_FLAG_WRPERR_BANK2 | FLASH_FLAG_PGSERR_BANK2 | \ 00237 FLASH_FLAG_STRBERR_BANK2 | FLASH_FLAG_INCERR_BANK2 | \ 00238 FLASH_FLAG_RDPERR_BANK2 | FLASH_FLAG_RDSERR_BANK2 | \ 00239 FLASH_FLAG_SNECCERR_BANK2 | FLASH_FLAG_DBECCERR_BANK2 | \ 00240 FLASH_FLAG_CRCRDERR_BANK2) /*!< All Bank 2 error flags */ 00241 #endif /* FLASH_SR_OPERR */ 00242 00243 #define FLASH_FLAG_ALL_BANK2 (FLASH_FLAG_BSY_BANK2 | FLASH_FLAG_WBNE_BANK2 | \ 00244 FLASH_FLAG_QW_BANK2 | FLASH_FLAG_CRC_BUSY_BANK2 | \ 00245 FLASH_FLAG_EOP_BANK2 | FLASH_FLAG_CRCEND_BANK2 | \ 00246 FLASH_FLAG_ALL_ERRORS_BANK2) /*!< All Bank 2 flags */ 00247 /** 00248 * @} 00249 */ 00250 00251 /** @defgroup FLASH_Interrupt_definition FLASH Interrupt definition 00252 * @brief FLASH Interrupt definition 00253 * @{ 00254 */ 00255 #define FLASH_IT_EOP_BANK1 FLASH_CR_EOPIE /*!< End of FLASH Bank 1 Operation Interrupt source */ 00256 #define FLASH_IT_WRPERR_BANK1 FLASH_CR_WRPERRIE /*!< Write Protection Error on Bank 1 Interrupt source */ 00257 #define FLASH_IT_PGSERR_BANK1 FLASH_CR_PGSERRIE /*!< Program Sequence Error on Bank 1 Interrupt source */ 00258 #define FLASH_IT_STRBERR_BANK1 FLASH_CR_STRBERRIE /*!< Strobe Error on Bank 1 Interrupt source */ 00259 #define FLASH_IT_INCERR_BANK1 FLASH_CR_INCERRIE /*!< Inconsistency Error on Bank 1 Interrupt source */ 00260 #if defined (FLASH_CR_OPERRIE) 00261 #define FLASH_IT_OPERR_BANK1 FLASH_CR_OPERRIE /*!< Operation Error on Bank 1 Interrupt source */ 00262 #endif /* FLASH_CR_OPERRIE */ 00263 #define FLASH_IT_RDPERR_BANK1 FLASH_CR_RDPERRIE /*!< Read protection Error on Bank 1 Interrupt source */ 00264 #define FLASH_IT_RDSERR_BANK1 FLASH_CR_RDSERRIE /*!< Read Secured Error on Bank 1 Interrupt source */ 00265 #define FLASH_IT_SNECCERR_BANK1 FLASH_CR_SNECCERRIE /*!< Single ECC Error Correction on Bank 1 Interrupt source */ 00266 #define FLASH_IT_DBECCERR_BANK1 FLASH_CR_DBECCERRIE /*!< Double Detection ECC Error on Bank 1 Interrupt source */ 00267 #define FLASH_IT_CRCEND_BANK1 FLASH_CR_CRCENDIE /*!< CRC End on Bank 1 Interrupt source */ 00268 #define FLASH_IT_CRCRDERR_BANK1 FLASH_CR_CRCRDERRIE /*!< CRC Read error on Bank 1 Interrupt source */ 00269 00270 #if defined (FLASH_CR_OPERRIE) 00271 #define FLASH_IT_ALL_BANK1 (FLASH_IT_EOP_BANK1 | FLASH_IT_WRPERR_BANK1 | \ 00272 FLASH_IT_PGSERR_BANK1 | FLASH_IT_STRBERR_BANK1 | \ 00273 FLASH_IT_INCERR_BANK1 | FLASH_IT_OPERR_BANK1 | \ 00274 FLASH_IT_RDPERR_BANK1 | FLASH_IT_RDSERR_BANK1 | \ 00275 FLASH_IT_SNECCERR_BANK1 | FLASH_IT_DBECCERR_BANK1 | \ 00276 FLASH_IT_CRCEND_BANK1 | FLASH_IT_CRCRDERR_BANK1) /*!< All Bank 1 Interrupt sources */ 00277 #else 00278 #define FLASH_IT_ALL_BANK1 (FLASH_IT_EOP_BANK1 | FLASH_IT_WRPERR_BANK1 | \ 00279 FLASH_IT_PGSERR_BANK1 | FLASH_IT_STRBERR_BANK1 | \ 00280 FLASH_IT_INCERR_BANK1 | FLASH_IT_RDPERR_BANK1 | \ 00281 FLASH_IT_RDSERR_BANK1 | FLASH_IT_SNECCERR_BANK1 | \ 00282 FLASH_IT_DBECCERR_BANK1 | FLASH_IT_CRCEND_BANK1 | \ 00283 FLASH_IT_CRCRDERR_BANK1) /*!< All Bank 1 Interrupt sources */ 00284 #endif /* FLASH_CR_OPERRIE */ 00285 00286 #define FLASH_IT_EOP_BANK2 (FLASH_CR_EOPIE | 0x80000000U) /*!< End of FLASH Bank 2 Operation Interrupt source */ 00287 #define FLASH_IT_WRPERR_BANK2 (FLASH_CR_WRPERRIE | 0x80000000U) /*!< Write Protection Error on Bank 2 Interrupt source */ 00288 #define FLASH_IT_PGSERR_BANK2 (FLASH_CR_PGSERRIE | 0x80000000U) /*!< Program Sequence Error on Bank 2 Interrupt source */ 00289 #define FLASH_IT_STRBERR_BANK2 (FLASH_CR_STRBERRIE | 0x80000000U) /*!< Strobe Error on Bank 2 Interrupt source */ 00290 #define FLASH_IT_INCERR_BANK2 (FLASH_CR_INCERRIE | 0x80000000U) /*!< Inconsistency Error on Bank 2 Interrupt source */ 00291 #if defined (FLASH_CR_OPERRIE) 00292 #define FLASH_IT_OPERR_BANK2 (FLASH_CR_OPERRIE | 0x80000000U) /*!< Operation Error on Bank 2 Interrupt source */ 00293 #endif /* FLASH_CR_OPERRIE */ 00294 #define FLASH_IT_RDPERR_BANK2 (FLASH_CR_RDPERRIE | 0x80000000U) /*!< Read protection Error on Bank 2 Interrupt source */ 00295 #define FLASH_IT_RDSERR_BANK2 (FLASH_CR_RDSERRIE | 0x80000000U) /*!< Read Secured Error on Bank 2 Interrupt source */ 00296 #define FLASH_IT_SNECCERR_BANK2 (FLASH_CR_SNECCERRIE | 0x80000000U) /*!< Single ECC Error Correction on Bank 2 Interrupt source */ 00297 #define FLASH_IT_DBECCERR_BANK2 (FLASH_CR_DBECCERRIE | 0x80000000U) /*!< Double Detection ECC Error on Bank 2 Interrupt source */ 00298 #define FLASH_IT_CRCEND_BANK2 (FLASH_CR_CRCENDIE | 0x80000000U) /*!< CRC End on Bank 2 Interrupt source */ 00299 #define FLASH_IT_CRCRDERR_BANK2 (FLASH_CR_CRCRDERRIE | 0x80000000U) /*!< CRC Read Error on Bank 2 Interrupt source */ 00300 00301 #if defined (FLASH_CR_OPERRIE) 00302 #define FLASH_IT_ALL_BANK2 (FLASH_IT_EOP_BANK2 | FLASH_IT_WRPERR_BANK2 | \ 00303 FLASH_IT_PGSERR_BANK2 | FLASH_IT_STRBERR_BANK2 | \ 00304 FLASH_IT_INCERR_BANK2 | FLASH_IT_OPERR_BANK2 | \ 00305 FLASH_IT_RDPERR_BANK2 | FLASH_IT_RDSERR_BANK2 | \ 00306 FLASH_IT_SNECCERR_BANK2 | FLASH_IT_DBECCERR_BANK2 | \ 00307 FLASH_IT_CRCEND_BANK2 | FLASH_IT_CRCRDERR_BANK2) /*!< All Bank 2 Interrupt sources */ 00308 #else 00309 #define FLASH_IT_ALL_BANK2 (FLASH_IT_EOP_BANK2 | FLASH_IT_WRPERR_BANK2 | \ 00310 FLASH_IT_PGSERR_BANK2 | FLASH_IT_STRBERR_BANK2 | \ 00311 FLASH_IT_INCERR_BANK2 | FLASH_IT_RDPERR_BANK2 | \ 00312 FLASH_IT_RDSERR_BANK2 | FLASH_IT_SNECCERR_BANK2 | \ 00313 FLASH_IT_DBECCERR_BANK2 | FLASH_IT_CRCEND_BANK2 | \ 00314 FLASH_IT_CRCRDERR_BANK2) /*!< All Bank 2 Interrupt sources */ 00315 #endif /* FLASH_CR_OPERRIE */ 00316 /** 00317 * @} 00318 */ 00319 00320 #if defined (FLASH_CR_PSIZE) 00321 /** @defgroup FLASH_Program_Parallelism FLASH Program Parallelism 00322 * @{ 00323 */ 00324 #define FLASH_PSIZE_BYTE 0x00000000U /*!< Flash program/erase by 8 bits */ 00325 #define FLASH_PSIZE_HALF_WORD FLASH_CR_PSIZE_0 /*!< Flash program/erase by 16 bits */ 00326 #define FLASH_PSIZE_WORD FLASH_CR_PSIZE_1 /*!< Flash program/erase by 32 bits */ 00327 #define FLASH_PSIZE_DOUBLE_WORD FLASH_CR_PSIZE /*!< Flash program/erase by 64 bits */ 00328 /** 00329 * @} 00330 */ 00331 #endif /* FLASH_CR_PSIZE */ 00332 00333 00334 /** @defgroup FLASH_Keys FLASH Keys 00335 * @{ 00336 */ 00337 #define FLASH_KEY1 0x45670123U 00338 #define FLASH_KEY2 0xCDEF89ABU 00339 #define FLASH_OPT_KEY1 0x08192A3BU 00340 #define FLASH_OPT_KEY2 0x4C5D6E7FU 00341 /** 00342 * @} 00343 */ 00344 00345 /** @defgroup FLASH_Sectors FLASH Sectors 00346 * @{ 00347 */ 00348 #define FLASH_SECTOR_0 0U /*!< Sector Number 0 */ 00349 #define FLASH_SECTOR_1 1U /*!< Sector Number 1 */ 00350 #define FLASH_SECTOR_2 2U /*!< Sector Number 2 */ 00351 #define FLASH_SECTOR_3 3U /*!< Sector Number 3 */ 00352 #define FLASH_SECTOR_4 4U /*!< Sector Number 4 */ 00353 #define FLASH_SECTOR_5 5U /*!< Sector Number 5 */ 00354 #define FLASH_SECTOR_6 6U /*!< Sector Number 6 */ 00355 #define FLASH_SECTOR_7 7U /*!< Sector Number 7 */ 00356 #if (FLASH_SECTOR_TOTAL == 128) 00357 #define FLASH_SECTOR_8 8U /*!< Sector Number 8 */ 00358 #define FLASH_SECTOR_9 9U /*!< Sector Number 9 */ 00359 #define FLASH_SECTOR_10 10U /*!< Sector Number 10 */ 00360 #define FLASH_SECTOR_11 11U /*!< Sector Number 11 */ 00361 #define FLASH_SECTOR_12 12U /*!< Sector Number 12 */ 00362 #define FLASH_SECTOR_13 13U /*!< Sector Number 13 */ 00363 #define FLASH_SECTOR_14 14U /*!< Sector Number 14 */ 00364 #define FLASH_SECTOR_15 15U /*!< Sector Number 15 */ 00365 #define FLASH_SECTOR_16 16U /*!< Sector Number 16 */ 00366 #define FLASH_SECTOR_17 17U /*!< Sector Number 17 */ 00367 #define FLASH_SECTOR_18 18U /*!< Sector Number 18 */ 00368 #define FLASH_SECTOR_19 19U /*!< Sector Number 19 */ 00369 #define FLASH_SECTOR_20 20U /*!< Sector Number 20 */ 00370 #define FLASH_SECTOR_21 21U /*!< Sector Number 21 */ 00371 #define FLASH_SECTOR_22 22U /*!< Sector Number 22 */ 00372 #define FLASH_SECTOR_23 23U /*!< Sector Number 23 */ 00373 #define FLASH_SECTOR_24 24U /*!< Sector Number 24 */ 00374 #define FLASH_SECTOR_25 25U /*!< Sector Number 25 */ 00375 #define FLASH_SECTOR_26 26U /*!< Sector Number 26 */ 00376 #define FLASH_SECTOR_27 27U /*!< Sector Number 27 */ 00377 #define FLASH_SECTOR_28 28U /*!< Sector Number 28 */ 00378 #define FLASH_SECTOR_29 29U /*!< Sector Number 29 */ 00379 #define FLASH_SECTOR_30 30U /*!< Sector Number 30 */ 00380 #define FLASH_SECTOR_31 31U /*!< Sector Number 31 */ 00381 #define FLASH_SECTOR_32 32U /*!< Sector Number 32 */ 00382 #define FLASH_SECTOR_33 33U /*!< Sector Number 33 */ 00383 #define FLASH_SECTOR_34 34U /*!< Sector Number 34 */ 00384 #define FLASH_SECTOR_35 35U /*!< Sector Number 35 */ 00385 #define FLASH_SECTOR_36 36U /*!< Sector Number 36 */ 00386 #define FLASH_SECTOR_37 37U /*!< Sector Number 37 */ 00387 #define FLASH_SECTOR_38 38U /*!< Sector Number 38 */ 00388 #define FLASH_SECTOR_39 39U /*!< Sector Number 39 */ 00389 #define FLASH_SECTOR_40 40U /*!< Sector Number 40 */ 00390 #define FLASH_SECTOR_41 41U /*!< Sector Number 41 */ 00391 #define FLASH_SECTOR_42 42U /*!< Sector Number 42 */ 00392 #define FLASH_SECTOR_43 43U /*!< Sector Number 43 */ 00393 #define FLASH_SECTOR_44 44U /*!< Sector Number 44 */ 00394 #define FLASH_SECTOR_45 45U /*!< Sector Number 45 */ 00395 #define FLASH_SECTOR_46 46U /*!< Sector Number 46 */ 00396 #define FLASH_SECTOR_47 47U /*!< Sector Number 47 */ 00397 #define FLASH_SECTOR_48 48U /*!< Sector Number 48 */ 00398 #define FLASH_SECTOR_49 49U /*!< Sector Number 49 */ 00399 #define FLASH_SECTOR_50 50U /*!< Sector Number 50 */ 00400 #define FLASH_SECTOR_51 51U /*!< Sector Number 51 */ 00401 #define FLASH_SECTOR_52 52U /*!< Sector Number 52 */ 00402 #define FLASH_SECTOR_53 53U /*!< Sector Number 53 */ 00403 #define FLASH_SECTOR_54 54U /*!< Sector Number 54 */ 00404 #define FLASH_SECTOR_55 55U /*!< Sector Number 55 */ 00405 #define FLASH_SECTOR_56 56U /*!< Sector Number 56 */ 00406 #define FLASH_SECTOR_57 57U /*!< Sector Number 57 */ 00407 #define FLASH_SECTOR_58 58U /*!< Sector Number 58 */ 00408 #define FLASH_SECTOR_59 59U /*!< Sector Number 59 */ 00409 #define FLASH_SECTOR_60 60U /*!< Sector Number 60 */ 00410 #define FLASH_SECTOR_61 61U /*!< Sector Number 61 */ 00411 #define FLASH_SECTOR_62 62U /*!< Sector Number 62 */ 00412 #define FLASH_SECTOR_63 63U /*!< Sector Number 63 */ 00413 #define FLASH_SECTOR_64 64U /*!< Sector Number 64 */ 00414 #define FLASH_SECTOR_65 65U /*!< Sector Number 65 */ 00415 #define FLASH_SECTOR_66 66U /*!< Sector Number 66 */ 00416 #define FLASH_SECTOR_67 67U /*!< Sector Number 67 */ 00417 #define FLASH_SECTOR_68 68U /*!< Sector Number 68 */ 00418 #define FLASH_SECTOR_69 69U /*!< Sector Number 69 */ 00419 #define FLASH_SECTOR_70 70U /*!< Sector Number 70 */ 00420 #define FLASH_SECTOR_71 71U /*!< Sector Number 71 */ 00421 #define FLASH_SECTOR_72 72U /*!< Sector Number 72 */ 00422 #define FLASH_SECTOR_73 73U /*!< Sector Number 73 */ 00423 #define FLASH_SECTOR_74 74U /*!< Sector Number 74 */ 00424 #define FLASH_SECTOR_75 75U /*!< Sector Number 75 */ 00425 #define FLASH_SECTOR_76 76U /*!< Sector Number 76 */ 00426 #define FLASH_SECTOR_77 77U /*!< Sector Number 77 */ 00427 #define FLASH_SECTOR_78 78U /*!< Sector Number 78 */ 00428 #define FLASH_SECTOR_79 79U /*!< Sector Number 79 */ 00429 #define FLASH_SECTOR_80 80U /*!< Sector Number 80 */ 00430 #define FLASH_SECTOR_81 81U /*!< Sector Number 81 */ 00431 #define FLASH_SECTOR_82 82U /*!< Sector Number 82 */ 00432 #define FLASH_SECTOR_83 83U /*!< Sector Number 83 */ 00433 #define FLASH_SECTOR_84 84U /*!< Sector Number 84 */ 00434 #define FLASH_SECTOR_85 85U /*!< Sector Number 85 */ 00435 #define FLASH_SECTOR_86 86U /*!< Sector Number 86 */ 00436 #define FLASH_SECTOR_87 87U /*!< Sector Number 87 */ 00437 #define FLASH_SECTOR_88 88U /*!< Sector Number 88 */ 00438 #define FLASH_SECTOR_89 89U /*!< Sector Number 89 */ 00439 #define FLASH_SECTOR_90 90U /*!< Sector Number 90 */ 00440 #define FLASH_SECTOR_91 91U /*!< Sector Number 91 */ 00441 #define FLASH_SECTOR_92 92U /*!< Sector Number 92 */ 00442 #define FLASH_SECTOR_93 93U /*!< Sector Number 93 */ 00443 #define FLASH_SECTOR_94 94U /*!< Sector Number 94 */ 00444 #define FLASH_SECTOR_95 95U /*!< Sector Number 95 */ 00445 #define FLASH_SECTOR_96 96U /*!< Sector Number 96 */ 00446 #define FLASH_SECTOR_97 97U /*!< Sector Number 97 */ 00447 #define FLASH_SECTOR_98 98U /*!< Sector Number 98 */ 00448 #define FLASH_SECTOR_99 99U /*!< Sector Number 99 */ 00449 #define FLASH_SECTOR_100 100U /*!< Sector Number 100 */ 00450 #define FLASH_SECTOR_101 101U /*!< Sector Number 101 */ 00451 #define FLASH_SECTOR_102 102U /*!< Sector Number 102 */ 00452 #define FLASH_SECTOR_103 103U /*!< Sector Number 103 */ 00453 #define FLASH_SECTOR_104 104U /*!< Sector Number 104 */ 00454 #define FLASH_SECTOR_105 105U /*!< Sector Number 105 */ 00455 #define FLASH_SECTOR_106 106U /*!< Sector Number 106 */ 00456 #define FLASH_SECTOR_107 107U /*!< Sector Number 107 */ 00457 #define FLASH_SECTOR_108 108U /*!< Sector Number 108 */ 00458 #define FLASH_SECTOR_109 109U /*!< Sector Number 109 */ 00459 #define FLASH_SECTOR_110 110U /*!< Sector Number 110 */ 00460 #define FLASH_SECTOR_111 111U /*!< Sector Number 111 */ 00461 #define FLASH_SECTOR_112 112U /*!< Sector Number 112 */ 00462 #define FLASH_SECTOR_113 113U /*!< Sector Number 113 */ 00463 #define FLASH_SECTOR_114 114U /*!< Sector Number 114 */ 00464 #define FLASH_SECTOR_115 115U /*!< Sector Number 115 */ 00465 #define FLASH_SECTOR_116 116U /*!< Sector Number 116 */ 00466 #define FLASH_SECTOR_117 117U /*!< Sector Number 117 */ 00467 #define FLASH_SECTOR_118 118U /*!< Sector Number 118 */ 00468 #define FLASH_SECTOR_119 119U /*!< Sector Number 119 */ 00469 #define FLASH_SECTOR_120 120U /*!< Sector Number 120 */ 00470 #define FLASH_SECTOR_121 121U /*!< Sector Number 121 */ 00471 #define FLASH_SECTOR_122 122U /*!< Sector Number 122 */ 00472 #define FLASH_SECTOR_123 123U /*!< Sector Number 123 */ 00473 #define FLASH_SECTOR_124 124U /*!< Sector Number 124 */ 00474 #define FLASH_SECTOR_125 125U /*!< Sector Number 125 */ 00475 #define FLASH_SECTOR_126 126U /*!< Sector Number 126 */ 00476 #define FLASH_SECTOR_127 127U /*!< Sector Number 127 */ 00477 #endif /* FLASH_SECTOR_TOTAL == 128 */ 00478 /** 00479 * @} 00480 */ 00481 00482 /** 00483 * @} 00484 */ 00485 00486 /* Exported macro ------------------------------------------------------------*/ 00487 /** @defgroup FLASH_Exported_Macros FLASH Exported Macros 00488 * @{ 00489 */ 00490 /** 00491 * @brief Set the FLASH Latency. 00492 * @param __LATENCY__: FLASH Latency 00493 * The value of this parameter depend on device used within the same series 00494 * @retval none 00495 */ 00496 #define __HAL_FLASH_SET_LATENCY(__LATENCY__) \ 00497 MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, (uint32_t)(__LATENCY__)) 00498 00499 /** 00500 * @brief Get the FLASH Latency. 00501 * @retval FLASH Latency 00502 * The value of this parameter depend on device used within the same series 00503 */ 00504 #define __HAL_FLASH_GET_LATENCY() (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY)) 00505 00506 /** 00507 * @brief Enable the specified FLASH interrupt. 00508 * @param __INTERRUPT__ : FLASH interrupt 00509 * In case of Bank 1 This parameter can be any combination of the following values: 00510 * @arg FLASH_IT_EOP_BANK1 : End of FLASH Bank 1 Operation Interrupt source 00511 * @arg FLASH_IT_WRPERR_BANK1 : Write Protection Error on Bank 1 Interrupt source 00512 * @arg FLASH_IT_PGSERR_BANK1 : Program Sequence Error on Bank 1 Interrupt source 00513 * @arg FLASH_IT_STRBERR_BANK1 : Strobe Error on Bank 1 Interrupt source 00514 * @arg FLASH_IT_INCERR_BANK1 : Inconsistency Error on Bank 1 Interrupt source 00515 * @arg FLASH_IT_OPERR_BANK1 : Operation Error on Bank 1 Interrupt source 00516 * @arg FLASH_IT_RDPERR_BANK1 : Read protection Error on Bank 1 Interrupt source 00517 * @arg FLASH_IT_RDSERR_BANK1 : Read secure Error on Bank 1 Interrupt source 00518 * @arg FLASH_IT_SNECCERR_BANK1 : Single ECC Error Correction on Bank 1 Interrupt source 00519 * @arg FLASH_IT_DBECCERR_BANK1 : Double Detection ECC Error on Bank 1 Interrupt source 00520 * @arg FLASH_IT_CRCEND_BANK1 : CRC End on Bank 1 Interrupt source 00521 * @arg FLASH_IT_CRCRDERR_BANK1 : CRC Read error on Bank 1 Interrupt source 00522 * @arg FLASH_IT_ALL_BANK1 : All Bank 1 Interrupt sources 00523 * 00524 * In case of Bank 2, this parameter can be any combination of the following values: 00525 * @arg FLASH_IT_EOP_BANK2 : End of FLASH Bank 2 Operation Interrupt source 00526 * @arg FLASH_IT_WRPERR_BANK2 : Write Protection Error on Bank 2 Interrupt source 00527 * @arg FLASH_IT_PGSERR_BANK2 : Program Sequence Error on Bank 2 Interrupt source 00528 * @arg FLASH_IT_STRBERR_BANK2 : Strobe Error on Bank 2 Interrupt source 00529 * @arg FLASH_IT_INCERR_BANK2 : Inconsistency Error on Bank 2 Interrupt source 00530 * @arg FLASH_IT_OPERR_BANK2 : Operation Error on Bank 2 Interrupt source 00531 * @arg FLASH_IT_RDPERR_BANK2 : Read protection Error on Bank 2 Interrupt source 00532 * @arg FLASH_IT_RDSERR_BANK2 : Read secure Error on Bank 2 Interrupt source 00533 * @arg FLASH_IT_SNECCERR_BANK2 : Single ECC Error Correction on Bank 2 Interrupt source 00534 * @arg FLASH_IT_DBECCERR_BANK2 : Double Detection ECC Error on Bank 2 Interrupt source 00535 * @arg FLASH_IT_CRCEND_BANK2 : CRC End on Bank 2 Interrupt source 00536 * @arg FLASH_IT_CRCRDERR_BANK2 : CRC Read error on Bank 2 Interrupt source 00537 * @arg FLASH_IT_ALL_BANK2 : All Bank 2 Interrupt sources 00538 * @retval none 00539 */ 00540 00541 #define __HAL_FLASH_ENABLE_IT_BANK1(__INTERRUPT__) (FLASH->CR1 |= (__INTERRUPT__)) 00542 00543 #define __HAL_FLASH_ENABLE_IT_BANK2(__INTERRUPT__) (FLASH->CR2 |= ((__INTERRUPT__) & 0x7FFFFFFFU)) 00544 00545 #if defined (DUAL_BANK) 00546 #define __HAL_FLASH_ENABLE_IT(__INTERRUPT__) (IS_FLASH_IT_BANK1(__INTERRUPT__) ? \ 00547 __HAL_FLASH_ENABLE_IT_BANK1(__INTERRUPT__) : \ 00548 __HAL_FLASH_ENABLE_IT_BANK2(__INTERRUPT__)) 00549 #else 00550 #define __HAL_FLASH_ENABLE_IT(__INTERRUPT__) __HAL_FLASH_ENABLE_IT_BANK1(__INTERRUPT__) 00551 #endif /* DUAL_BANK */ 00552 00553 00554 /** 00555 * @brief Disable the specified FLASH interrupt. 00556 * @param __INTERRUPT__ : FLASH interrupt 00557 * In case of Bank 1 This parameter can be any combination of the following values: 00558 * @arg FLASH_IT_EOP_BANK1 : End of FLASH Bank 1 Operation Interrupt source 00559 * @arg FLASH_IT_WRPERR_BANK1 : Write Protection Error on Bank 1 Interrupt source 00560 * @arg FLASH_IT_PGSERR_BANK1 : Program Sequence Error on Bank 1 Interrupt source 00561 * @arg FLASH_IT_STRBERR_BANK1 : Strobe Error on Bank 1 Interrupt source 00562 * @arg FLASH_IT_INCERR_BANK1 : Inconsistency Error on Bank 1 Interrupt source 00563 * @arg FLASH_IT_OPERR_BANK1 : Operation Error on Bank 1 Interrupt source 00564 * @arg FLASH_IT_RDPERR_BANK1 : Read protection Error on Bank 1 Interrupt source 00565 * @arg FLASH_IT_RDSERR_BANK1 : Read secure Error on Bank 1 Interrupt source 00566 * @arg FLASH_IT_SNECCERR_BANK1 : Single ECC Error Correction on Bank 1 Interrupt source 00567 * @arg FLASH_IT_DBECCERR_BANK1 : Double Detection ECC Error on Bank 1 Interrupt source 00568 * @arg FLASH_IT_CRCEND_BANK1 : CRC End on Bank 1 Interrupt source 00569 * @arg FLASH_IT_CRCRDERR_BANK1 : CRC Read error on Bank 1 Interrupt source 00570 * @arg FLASH_IT_ALL_BANK1 : All Bank 1 Interrupt sources 00571 * 00572 * In case of Bank 2, this parameter can be any combination of the following values: 00573 * @arg FLASH_IT_EOP_BANK2 : End of FLASH Bank 2 Operation Interrupt source 00574 * @arg FLASH_IT_WRPERR_BANK2 : Write Protection Error on Bank 2 Interrupt source 00575 * @arg FLASH_IT_PGSERR_BANK2 : Program Sequence Error on Bank 2 Interrupt source 00576 * @arg FLASH_IT_STRBERR_BANK2 : Strobe Error on Bank 2 Interrupt source 00577 * @arg FLASH_IT_INCERR_BANK2 : Inconsistency Error on Bank 2 Interrupt source 00578 * @arg FLASH_IT_OPERR_BANK2 : Operation Error on Bank 2 Interrupt source 00579 * @arg FLASH_IT_RDPERR_BANK2 : Read protection Error on Bank 2 Interrupt source 00580 * @arg FLASH_IT_RDSERR_BANK2 : Read secure Error on Bank 2 Interrupt source 00581 * @arg FLASH_IT_SNECCERR_BANK2 : Single ECC Error Correction on Bank 2 Interrupt source 00582 * @arg FLASH_IT_DBECCERR_BANK2 : Double Detection ECC Error on Bank 2 Interrupt source 00583 * @arg FLASH_IT_CRCEND_BANK2 : CRC End on Bank 2 Interrupt source 00584 * @arg FLASH_IT_CRCRDERR_BANK2 : CRC Read error on Bank 2 Interrupt source 00585 * @arg FLASH_IT_ALL_BANK2 : All Bank 2 Interrupt sources 00586 * @retval none 00587 */ 00588 00589 #define __HAL_FLASH_DISABLE_IT_BANK1(__INTERRUPT__) (FLASH->CR1 &= ~(uint32_t)(__INTERRUPT__)) 00590 00591 #define __HAL_FLASH_DISABLE_IT_BANK2(__INTERRUPT__) (FLASH->CR2 &= ~(uint32_t)((__INTERRUPT__) & 0x7FFFFFFFU)) 00592 00593 #if defined (DUAL_BANK) 00594 #define __HAL_FLASH_DISABLE_IT(__INTERRUPT__) (IS_FLASH_IT_BANK1(__INTERRUPT__) ? \ 00595 __HAL_FLASH_DISABLE_IT_BANK1(__INTERRUPT__) : \ 00596 __HAL_FLASH_DISABLE_IT_BANK2(__INTERRUPT__)) 00597 #else 00598 #define __HAL_FLASH_DISABLE_IT(__INTERRUPT__) __HAL_FLASH_DISABLE_IT_BANK1(__INTERRUPT__) 00599 #endif /* DUAL_BANK */ 00600 00601 00602 /** 00603 * @brief Checks whether the specified FLASH flag is set or not. 00604 * @param __FLAG__: specifies the FLASH flag to check. 00605 * In case of Bank 1 This parameter can be one of the following values : 00606 * @arg FLASH_FLAG_BSY_BANK1 : FLASH Bank 1 Busy flag 00607 * @arg FLASH_FLAG_WBNE_BANK1 : Write Buffer Not Empty on Bank 1 flag 00608 * @arg FLASH_FLAG_QW_BANK1 : Wait Queue on Bank 1 flag 00609 * @arg FLASH_FLAG_CRC_BUSY_BANK1 : CRC module is working on Bank 1 flag 00610 * @arg FLASH_FLAG_EOP_BANK1 : End Of Program on Bank 1 flag 00611 * @arg FLASH_FLAG_WRPERR_BANK1 : Write Protection Error on Bank 1 flag 00612 * @arg FLASH_FLAG_PGSERR_BANK1 : Program Sequence Error on Bank 1 flag 00613 * @arg FLASH_FLAG_STRBER_BANK1 : Program Alignment Error on Bank 1 flag 00614 * @arg FLASH_FLAG_INCERR_BANK1 : Inconsistency Error on Bank 1 flag 00615 * @arg FLASH_FLAG_OPERR_BANK1 : Operation Error on Bank 1 flag 00616 * @arg FLASH_FLAG_RDPERR_BANK1 : Read Protection Error on Bank 1 flag 00617 * @arg FLASH_FLAG_RDSERR_BANK1 : Read secure Error on Bank 1 flag 00618 * @arg FLASH_FLAG_SNECCE_BANK1 : Single ECC Error Correction on Bank 1 flag 00619 * @arg FLASH_FLAG_DBECCE_BANK1 : Double Detection ECC Error on Bank 1 flag 00620 * @arg FLASH_FLAG_CRCEND_BANK1 : CRC End on Bank 1 flag 00621 * @arg FLASH_FLAG_CRCRDERR_BANK1 : CRC Read error on Bank 1 flag 00622 * 00623 * In case of Bank 2 This parameter can be one of the following values : 00624 * @arg FLASH_FLAG_BSY_BANK2 : FLASH Bank 2 Busy flag 00625 * @arg FLASH_FLAG_WBNE_BANK2 : Write Buffer Not Empty on Bank 2 flag 00626 * @arg FLASH_FLAG_QW_BANK2 : Wait Queue on Bank 2 flag 00627 * @arg FLASH_FLAG_CRC_BUSY_BANK2 : CRC module is working on Bank 2 flag 00628 * @arg FLASH_FLAG_EOP_BANK2 : End Of Program on Bank 2 flag 00629 * @arg FLASH_FLAG_WRPERR_BANK2 : Write Protection Error on Bank 2 flag 00630 * @arg FLASH_FLAG_PGSERR_BANK2 : Program Sequence Error on Bank 2 flag 00631 * @arg FLASH_FLAG_STRBER_BANK2 : Program Alignment Error on Bank 2 flag 00632 * @arg FLASH_FLAG_INCERR_BANK2 : Inconsistency Error on Bank 2 flag 00633 * @arg FLASH_FLAG_OPERR_BANK2 : Operation Error on Bank 2 flag 00634 * @arg FLASH_FLAG_RDPERR_BANK2 : Read Protection Error on Bank 2 flag 00635 * @arg FLASH_FLAG_RDSERR_BANK2 : Read secure Error on Bank 2 flag 00636 * @arg FLASH_FLAG_SNECCE_BANK2 : Single ECC Error Correction on Bank 2 flag 00637 * @arg FLASH_FLAG_DBECCE_BANK2 : Double Detection ECC Error on Bank 2 flag 00638 * @arg FLASH_FLAG_CRCEND_BANK2 : CRC End on Bank 2 flag 00639 * @arg FLASH_FLAG_CRCRDERR_BANK2 : CRC Read error on Bank 2 flag 00640 * @retval The new state of FLASH_FLAG (SET or RESET). 00641 */ 00642 #define __HAL_FLASH_GET_FLAG_BANK1(__FLAG__) (READ_BIT(FLASH->SR1, (__FLAG__)) == (__FLAG__)) 00643 00644 #define __HAL_FLASH_GET_FLAG_BANK2(__FLAG__) (READ_BIT(FLASH->SR2, ((__FLAG__) & 0x7FFFFFFFU)) == (((__FLAG__) & 0x7FFFFFFFU))) 00645 00646 #if defined (DUAL_BANK) 00647 #define __HAL_FLASH_GET_FLAG(__FLAG__) (IS_FLASH_FLAG_BANK1(__FLAG__) ? __HAL_FLASH_GET_FLAG_BANK1(__FLAG__) : \ 00648 __HAL_FLASH_GET_FLAG_BANK2(__FLAG__)) 00649 #else 00650 #define __HAL_FLASH_GET_FLAG(__FLAG__) __HAL_FLASH_GET_FLAG_BANK1(__FLAG__) 00651 #endif /* DUAL_BANK */ 00652 00653 00654 /** 00655 * @brief Clear the specified FLASH flag. 00656 * @param __FLAG__: specifies the FLASH flags to clear. 00657 * In case of Bank 1, this parameter can be any combination of the following values: 00658 * @arg FLASH_FLAG_EOP_BANK1 : End Of Program on Bank 1 flag 00659 * @arg FLASH_FLAG_WRPERR_BANK1 : Write Protection Error on Bank 1 flag 00660 * @arg FLASH_FLAG_PGSERR_BANK1 : Program Sequence Error on Bank 1 flag 00661 * @arg FLASH_FLAG_STRBER_BANK1 : Program Alignment Error on Bank 1 flag 00662 * @arg FLASH_FLAG_INCERR_BANK1 : Inconsistency Error on Bank 1 flag 00663 * @arg FLASH_FLAG_OPERR_BANK1 : Operation Error on Bank 1 flag 00664 * @arg FLASH_FLAG_RDPERR_BANK1 : Read Protection Error on Bank 1 flag 00665 * @arg FLASH_FLAG_RDSERR_BANK1 : Read secure Error on Bank 1 flag 00666 * @arg FLASH_FLAG_SNECCE_BANK1 : Single ECC Error Correction on Bank 1 flag 00667 * @arg FLASH_FLAG_DBECCE_BANK1 : Double Detection ECC Error on Bank 1 flag 00668 * @arg FLASH_FLAG_CRCEND_BANK1 : CRC End on Bank 1 flag 00669 * @arg FLASH_FLAG_CRCRDERR_BANK1 : CRC Read error on Bank 1 flag 00670 * @arg FLASH_FLAG_ALL_ERRORS_BANK1 : All Bank 1 error flags 00671 * @arg FLASH_FLAG_ALL_BANK1 : All Bank 1 flags 00672 * 00673 * In case of Bank 2, this parameter can be any combination of the following values : 00674 * @arg FLASH_FLAG_EOP_BANK2 : End Of Program on Bank 2 flag 00675 * @arg FLASH_FLAG_WRPERR_BANK2 : Write Protection Error on Bank 2 flag 00676 * @arg FLASH_FLAG_PGSERR_BANK2 : Program Sequence Error on Bank 2 flag 00677 * @arg FLASH_FLAG_STRBER_BANK2 : Program Alignment Error on Bank 2 flag 00678 * @arg FLASH_FLAG_INCERR_BANK2 : Inconsistency Error on Bank 2 flag 00679 * @arg FLASH_FLAG_OPERR_BANK2 : Operation Error on Bank 2 flag 00680 * @arg FLASH_FLAG_RDPERR_BANK2 : Read Protection Error on Bank 2 flag 00681 * @arg FLASH_FLAG_RDSERR_BANK2 : Read secure Error on Bank 2 flag 00682 * @arg FLASH_FLAG_SNECCE_BANK2 : Single ECC Error Correction on Bank 2 flag 00683 * @arg FLASH_FLAG_DBECCE_BANK2 : Double Detection ECC Error on Bank 2 flag 00684 * @arg FLASH_FLAG_CRCEND_BANK2 : CRC End on Bank 2 flag 00685 * @arg FLASH_FLAG_CRCRDERR_BANK2 : CRC Read error on Bank 2 flag 00686 * @arg FLASH_FLAG_ALL_ERRORS_BANK2 : All Bank 2 error flags 00687 * @arg FLASH_FLAG_ALL_BANK2 : All Bank 2 flags 00688 * @retval none 00689 */ 00690 00691 #define __HAL_FLASH_CLEAR_FLAG_BANK1(__FLAG__) WRITE_REG(FLASH->CCR1, (__FLAG__)) 00692 00693 #define __HAL_FLASH_CLEAR_FLAG_BANK2(__FLAG__) WRITE_REG(FLASH->CCR2, ((__FLAG__) & 0x7FFFFFFFU)) 00694 00695 #if defined (DUAL_BANK) 00696 #define __HAL_FLASH_CLEAR_FLAG(__FLAG__) (IS_FLASH_FLAG_BANK1(__FLAG__) ? __HAL_FLASH_CLEAR_FLAG_BANK1(__FLAG__) : \ 00697 __HAL_FLASH_CLEAR_FLAG_BANK2(__FLAG__)) 00698 #else 00699 #define __HAL_FLASH_CLEAR_FLAG(__FLAG__) __HAL_FLASH_CLEAR_FLAG_BANK1(__FLAG__) 00700 #endif /* DUAL_BANK */ 00701 00702 /** 00703 * @} 00704 */ 00705 00706 /* Include FLASH HAL Extension module */ 00707 #include "stm32h7xx_hal_flash_ex.h" 00708 00709 /* Exported functions --------------------------------------------------------*/ 00710 /** @addtogroup FLASH_Exported_Functions 00711 * @{ 00712 */ 00713 /** @addtogroup FLASH_Exported_Functions_Group1 00714 * @{ 00715 */ 00716 /* Program operation functions ***********************************************/ 00717 HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t FlashAddress, uint32_t DataAddress); 00718 HAL_StatusTypeDef HAL_FLASH_Program_IT(uint32_t TypeProgram, uint32_t FlashAddress, uint32_t DataAddress); 00719 /* FLASH IRQ handler method */ 00720 void HAL_FLASH_IRQHandler(void); 00721 /* Callbacks in non blocking modes */ 00722 void HAL_FLASH_EndOfOperationCallback(uint32_t ReturnValue); 00723 void HAL_FLASH_OperationErrorCallback(uint32_t ReturnValue); 00724 /** 00725 * @} 00726 */ 00727 00728 /** @addtogroup FLASH_Exported_Functions_Group2 00729 * @{ 00730 */ 00731 /* Peripheral Control functions **********************************************/ 00732 HAL_StatusTypeDef HAL_FLASH_Unlock(void); 00733 HAL_StatusTypeDef HAL_FLASH_Lock(void); 00734 HAL_StatusTypeDef HAL_FLASH_OB_Unlock(void); 00735 HAL_StatusTypeDef HAL_FLASH_OB_Lock(void); 00736 /* Option bytes control */ 00737 HAL_StatusTypeDef HAL_FLASH_OB_Launch(void); 00738 /** 00739 * @} 00740 */ 00741 00742 /** @addtogroup FLASH_Exported_Functions_Group3 00743 * @{ 00744 */ 00745 /* Peripheral State functions ************************************************/ 00746 uint32_t HAL_FLASH_GetError(void); 00747 /** 00748 * @} 00749 */ 00750 00751 /** 00752 * @} 00753 */ 00754 /* Private types -------------------------------------------------------------*/ 00755 /* Private variables ---------------------------------------------------------*/ 00756 /** @defgroup FLASH_Private_Variables FLASH Private Variables 00757 * @{ 00758 */ 00759 extern FLASH_ProcessTypeDef pFlash; 00760 /** 00761 * @} 00762 */ 00763 /* Private constants ---------------------------------------------------------*/ 00764 /** @defgroup FLASH_Private_Constants FLASH Private Constants 00765 * @{ 00766 */ 00767 00768 /** 00769 * @} 00770 */ 00771 00772 /* Private macros ------------------------------------------------------------*/ 00773 /** @defgroup FLASH_Private_Macros FLASH Private Macros 00774 * @{ 00775 */ 00776 00777 #if defined (FLASH_OPTCR_PG_OTP) 00778 #define IS_FLASH_TYPEPROGRAM(VALUE) (((VALUE) == FLASH_TYPEPROGRAM_FLASHWORD) || \ 00779 ((VALUE) == FLASH_TYPEPROGRAM_OTPWORD)) 00780 #else 00781 #define IS_FLASH_TYPEPROGRAM(VALUE) ((VALUE) == FLASH_TYPEPROGRAM_FLASHWORD) 00782 #endif /* FLASH_OPTCR_PG_OTP */ 00783 00784 #define IS_FLASH_IT_BANK1(IT) (((IT) & FLASH_IT_ALL_BANK1) == (IT)) 00785 #if defined (DUAL_BANK) 00786 #define IS_FLASH_IT_BANK2(IT) (((IT) & FLASH_IT_ALL_BANK2) == (IT)) 00787 #endif /* DUAL_BANK */ 00788 00789 #define IS_FLASH_FLAG_BANK1(FLAG) (((FLAG) & FLASH_FLAG_ALL_BANK1) == (FLAG)) 00790 #if defined (DUAL_BANK) 00791 #define IS_FLASH_FLAG_BANK2(FLAG) (((FLAG) & FLASH_FLAG_ALL_BANK2) == (FLAG)) 00792 #endif /* DUAL_BANK */ 00793 00794 #if defined (DUAL_BANK) 00795 #define IS_FLASH_PROGRAM_ADDRESS_BANK1(ADDRESS) (((ADDRESS) >= FLASH_BANK1_BASE) && ((ADDRESS) < FLASH_BANK2_BASE)) 00796 #define IS_FLASH_PROGRAM_ADDRESS_BANK2(ADDRESS) (((ADDRESS) >= FLASH_BANK2_BASE ) && ((ADDRESS) <= FLASH_END)) 00797 #else 00798 #define IS_FLASH_PROGRAM_ADDRESS_BANK1(ADDRESS) (((ADDRESS) >= FLASH_BANK1_BASE) && ((ADDRESS) <= FLASH_END)) 00799 #endif /* DUAL_BANK */ 00800 00801 #if defined (DUAL_BANK) 00802 #if defined (FLASH_OPTCR_PG_OTP) 00803 #define IS_FLASH_PROGRAM_ADDRESS_OTP(ADDRESS) (((ADDRESS) >= 0x08FFF000U) && ((ADDRESS) <= 0x08FFF3FFU)) 00804 #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (IS_FLASH_PROGRAM_ADDRESS_BANK1(ADDRESS) || \ 00805 IS_FLASH_PROGRAM_ADDRESS_BANK2(ADDRESS) || \ 00806 IS_FLASH_PROGRAM_ADDRESS_OTP(ADDRESS)) 00807 #else 00808 #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (IS_FLASH_PROGRAM_ADDRESS_BANK1(ADDRESS) || \ 00809 IS_FLASH_PROGRAM_ADDRESS_BANK2(ADDRESS)) 00810 #endif /* FLASH_OPTCR_PG_OTP */ 00811 #else 00812 #if defined (FLASH_OPTCR_PG_OTP) 00813 #define IS_FLASH_PROGRAM_ADDRESS_OTP(ADDRESS) (((ADDRESS) >= 0x08FFF000U) && ((ADDRESS) <= 0x08FFF3FFU)) 00814 #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (IS_FLASH_PROGRAM_ADDRESS_BANK1(ADDRESS) || \ 00815 IS_FLASH_PROGRAM_ADDRESS_OTP(ADDRESS)) 00816 #else 00817 #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (IS_FLASH_PROGRAM_ADDRESS_BANK1(ADDRESS)) 00818 #endif /* FLASH_OPTCR_PG_OTP */ 00819 #endif /* DUAL_BANK */ 00820 00821 #define IS_BOOT_ADDRESS(ADDRESS) ((ADDRESS) <= (0x3FFF0000U)) 00822 00823 #if defined (DUAL_BANK) 00824 #define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1) || \ 00825 ((BANK) == FLASH_BANK_2) || \ 00826 ((BANK) == FLASH_BANK_BOTH)) 00827 #define IS_FLASH_BANK_EXCLUSIVE(BANK) (((BANK) == FLASH_BANK_1) || \ 00828 ((BANK) == FLASH_BANK_2)) 00829 #else 00830 #define IS_FLASH_BANK(BANK) ((BANK) == FLASH_BANK_1) 00831 #define IS_FLASH_BANK_EXCLUSIVE(BANK) ((BANK) == FLASH_BANK_1) 00832 #endif /* DUAL_BANK */ 00833 00834 /** 00835 * @} 00836 */ 00837 /* Private functions ---------------------------------------------------------*/ 00838 /** @defgroup FLASH_Private_Functions FLASH Private functions 00839 * @{ 00840 */ 00841 HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout, uint32_t Bank); 00842 HAL_StatusTypeDef FLASH_OB_WaitForLastOperation(uint32_t Timeout); 00843 HAL_StatusTypeDef FLASH_CRC_WaitForLastOperation(uint32_t Timeout, uint32_t Bank); 00844 /** 00845 * @} 00846 */ 00847 00848 /** 00849 * @} 00850 */ 00851 00852 /** 00853 * @} 00854 */ 00855 00856 #ifdef __cplusplus 00857 } 00858 #endif 00859 00860 #endif /* STM32H7xx_HAL_FLASH_H */ 00861
1.7.6.1