STM32H735xx HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32h7xx_hal_gfxmmu.h 00004 * @author MCD Application Team 00005 * @brief Header file of GFXMMU HAL module. 00006 ****************************************************************************** 00007 * @attention 00008 * 00009 * Copyright (c) 2017 STMicroelectronics. 00010 * All rights reserved. 00011 * 00012 * This software is licensed under terms that can be found in the LICENSE file 00013 * in the root directory of this software component. 00014 * If no LICENSE file comes with this software, it is provided AS-IS. 00015 * 00016 ****************************************************************************** 00017 */ 00018 00019 /* Define to prevent recursive inclusion -------------------------------------*/ 00020 #ifndef STM32H7xx_HAL_GFXMMU_H 00021 #define STM32H7xx_HAL_GFXMMU_H 00022 00023 #ifdef __cplusplus 00024 extern "C" { 00025 #endif 00026 00027 /* Includes ------------------------------------------------------------------*/ 00028 #include "stm32h7xx_hal_def.h" 00029 00030 #if defined(GFXMMU) 00031 00032 /** @addtogroup STM32H7xx_HAL_Driver 00033 * @{ 00034 */ 00035 00036 /** @addtogroup GFXMMU 00037 * @{ 00038 */ 00039 00040 /* Exported types ------------------------------------------------------------*/ 00041 /** @defgroup GFXMMU_Exported_Types GFXMMU Exported Types 00042 * @{ 00043 */ 00044 00045 /** 00046 * @brief HAL GFXMMU states definition 00047 */ 00048 typedef enum 00049 { 00050 HAL_GFXMMU_STATE_RESET = 0x00U, /*!< GFXMMU not initialized */ 00051 HAL_GFXMMU_STATE_READY = 0x01U, /*!< GFXMMU initialized and ready for use */ 00052 }HAL_GFXMMU_StateTypeDef; 00053 00054 /** 00055 * @brief GFXMMU buffers structure definition 00056 */ 00057 typedef struct 00058 { 00059 uint32_t Buf0Address; /*!< Physical address of buffer 0. */ 00060 uint32_t Buf1Address; /*!< Physical address of buffer 1. */ 00061 uint32_t Buf2Address; /*!< Physical address of buffer 2. */ 00062 uint32_t Buf3Address; /*!< Physical address of buffer 3. */ 00063 }GFXMMU_BuffersTypeDef; 00064 00065 /** 00066 * @brief GFXMMU cache and pre-fetch structure definition 00067 */ 00068 typedef struct 00069 { 00070 FunctionalState Activation; /*!< Cache and pre-fetch enable/disable. 00071 @note: All following parameters are useful only if cache and pre-fetch are enabled. */ 00072 uint32_t CacheLock; /*!< Locking the cache to a buffer. 00073 This parameter can be a value of @ref GFXMMU_CacheLock. */ 00074 uint32_t CacheLockBuffer; /*!< Buffer on which the cache is locked. 00075 This parameter can be a value of @ref GFXMMU_CacheLockBuffer. 00076 @note: Useful only when lock of the cache is enabled. */ 00077 uint32_t CacheForce; /*!< Forcing the cache regardless MPU attributes. 00078 This parameter can be a value of @ref GFXMMU_CacheForce. 00079 @note: Useful only when lock of the cache is enabled. */ 00080 uint32_t OutterBufferability; /*!< Bufferability of an access generated by the GFXMMU cache. 00081 This parameter can be a value of @ref GFXMMU_OutterBufferability. */ 00082 uint32_t OutterCachability; /*!< Cachability of an access generated by the GFXMMU cache. 00083 This parameter can be a value of @ref GFXMMU_OutterCachability. */ 00084 uint32_t Prefetch; /*!< Pre-fetch enable/disable. 00085 This parameter can be a value of @ref GFXMMU_Prefetch. */ 00086 }GFXMMU_CachePrefetchTypeDef; 00087 00088 /** 00089 * @brief GFXMMU interrupts structure definition 00090 */ 00091 typedef struct 00092 { 00093 FunctionalState Activation; /*!< Interrupts enable/disable */ 00094 uint32_t UsedInterrupts; /*!< Interrupts used. 00095 This parameter can be a values combination of @ref GFXMMU_Interrupts. 00096 @note: Useful only when interrupts are enabled. */ 00097 }GFXMMU_InterruptsTypeDef; 00098 00099 /** 00100 * @brief GFXMMU init structure definition 00101 */ 00102 typedef struct 00103 { 00104 uint32_t BlocksPerLine; /*!< Number of blocks of 16 bytes per line. 00105 This parameter can be a value of @ref GFXMMU_BlocksPerLine. */ 00106 uint32_t DefaultValue; /*!< Value returned when virtual memory location not physically mapped. */ 00107 GFXMMU_BuffersTypeDef Buffers; /*!< Physical buffers addresses. */ 00108 GFXMMU_CachePrefetchTypeDef CachePrefetch; /*!< Cache and pre-fetch parameters. */ 00109 GFXMMU_InterruptsTypeDef Interrupts; /*!< Interrupts parameters. */ 00110 }GFXMMU_InitTypeDef; 00111 00112 /** 00113 * @brief GFXMMU handle structure definition 00114 */ 00115 #if (USE_HAL_GFXMMU_REGISTER_CALLBACKS == 1) 00116 typedef struct __GFXMMU_HandleTypeDef 00117 #else 00118 typedef struct 00119 #endif 00120 { 00121 GFXMMU_TypeDef *Instance; /*!< GFXMMU instance */ 00122 GFXMMU_InitTypeDef Init; /*!< GFXMMU init parameters */ 00123 HAL_GFXMMU_StateTypeDef State; /*!< GFXMMU state */ 00124 __IO uint32_t ErrorCode; /*!< GFXMMU error code */ 00125 #if (USE_HAL_GFXMMU_REGISTER_CALLBACKS == 1) 00126 void (*ErrorCallback) (struct __GFXMMU_HandleTypeDef *hgfxmmu); /*!< GFXMMU error callback */ 00127 void (*MspInitCallback) (struct __GFXMMU_HandleTypeDef *hgfxmmu); /*!< GFXMMU MSP init callback */ 00128 void (*MspDeInitCallback) (struct __GFXMMU_HandleTypeDef *hgfxmmu); /*!< GFXMMU MSP de-init callback */ 00129 #endif 00130 }GFXMMU_HandleTypeDef; 00131 00132 /** 00133 * @brief GFXMMU LUT line structure definition 00134 */ 00135 typedef struct 00136 { 00137 uint32_t LineNumber; /*!< LUT line number. 00138 This parameter must be a number between Min_Data = 0 and Max_Data = 1023. */ 00139 uint32_t LineStatus; /*!< LUT line enable/disable. 00140 This parameter can be a value of @ref GFXMMU_LutLineStatus. */ 00141 uint32_t FirstVisibleBlock; /*!< First visible block on this line. 00142 This parameter must be a number between Min_Data = 0 and Max_Data = 255. */ 00143 uint32_t LastVisibleBlock; /*!< Last visible block on this line. 00144 This parameter must be a number between Min_Data = 0 and Max_Data = 255. */ 00145 int32_t LineOffset; /*!< Offset of block 0 of the current line in physical buffer. 00146 This parameter must be a number between Min_Data = -4080 and Max_Data = 4190208. 00147 @note: Line offset has to be computed with the following formula: 00148 LineOffset = [(Blocks already used) - (1st visible block)]*BlockSize. */ 00149 }GFXMMU_LutLineTypeDef; 00150 00151 #if (USE_HAL_GFXMMU_REGISTER_CALLBACKS == 1) 00152 /** 00153 * @brief GFXMMU callback ID enumeration definition 00154 */ 00155 typedef enum 00156 { 00157 HAL_GFXMMU_ERROR_CB_ID = 0x00U, /*!< GFXMMU error callback ID */ 00158 HAL_GFXMMU_MSPINIT_CB_ID = 0x01U, /*!< GFXMMU MSP init callback ID */ 00159 HAL_GFXMMU_MSPDEINIT_CB_ID = 0x02U /*!< GFXMMU MSP de-init callback ID */ 00160 }HAL_GFXMMU_CallbackIDTypeDef; 00161 00162 /** 00163 * @brief GFXMMU callback pointer definition 00164 */ 00165 typedef void (*pGFXMMU_CallbackTypeDef)(GFXMMU_HandleTypeDef *hgfxmmu); 00166 #endif 00167 00168 /** 00169 * @} 00170 */ 00171 /* End of exported types -----------------------------------------------------*/ 00172 00173 /* Exported constants --------------------------------------------------------*/ 00174 /** @defgroup GFXMMU_Exported_Constants GFXMMU Exported Constants 00175 * @{ 00176 */ 00177 00178 /** @defgroup GFXMMU_BlocksPerLine GFXMMU blocks per line 00179 * @{ 00180 */ 00181 #define GFXMMU_256BLOCKS 0x00000000U /*!< 256 blocks of 16 bytes per line */ 00182 #define GFXMMU_192BLOCKS GFXMMU_CR_192BM /*!< 192 blocks of 16 bytes per line */ 00183 /** 00184 * @} 00185 */ 00186 00187 /** @defgroup GFXMMU_CacheLock GFXMMU cache lock 00188 * @{ 00189 */ 00190 #define GFXMMU_CACHE_LOCK_DISABLE 0x00000000U /*!< Cache not locked to a buffer */ 00191 #define GFXMMU_CACHE_LOCK_ENABLE GFXMMU_CR_CL /*!< Cache locked to a buffer */ 00192 /** 00193 * @} 00194 */ 00195 00196 /** @defgroup GFXMMU_CacheLockBuffer GFXMMU cache lock buffer 00197 * @{ 00198 */ 00199 #define GFXMMU_CACHE_LOCK_BUFFER0 0x00000000U /*!< Cache locked to buffer 0 */ 00200 #define GFXMMU_CACHE_LOCK_BUFFER1 GFXMMU_CR_CLB_0 /*!< Cache locked to buffer 1 */ 00201 #define GFXMMU_CACHE_LOCK_BUFFER2 GFXMMU_CR_CLB_1 /*!< Cache locked to buffer 2 */ 00202 #define GFXMMU_CACHE_LOCK_BUFFER3 GFXMMU_CR_CLB /*!< Cache locked to buffer 3 */ 00203 /** 00204 * @} 00205 */ 00206 00207 /** @defgroup GFXMMU_CacheForce GFXMMU cache force 00208 * @{ 00209 */ 00210 #define GFXMMU_CACHE_FORCE_DISABLE 0x00000000U /*!< Caching not forced */ 00211 #define GFXMMU_CACHE_FORCE_ENABLE GFXMMU_CR_FC /*!< Caching forced */ 00212 /** 00213 * @} 00214 */ 00215 00216 /** @defgroup GFXMMU_OutterBufferability GFXMMU outer bufferability 00217 * @{ 00218 */ 00219 #define GFXMMU_OUTTER_BUFFERABILITY_DISABLE 0x00000000U /*!< No bufferable */ 00220 #define GFXMMU_OUTTER_BUFFERABILITY_ENABLE GFXMMU_CR_OB /*!< Bufferable */ 00221 /** 00222 * @} 00223 */ 00224 00225 /** @defgroup GFXMMU_OutterCachability GFXMMU outer cachability 00226 * @{ 00227 */ 00228 #define GFXMMU_OUTTER_CACHABILITY_DISABLE 0x00000000U /*!< No cacheable */ 00229 #define GFXMMU_OUTTER_CACHABILITY_ENABLE GFXMMU_CR_OC /*!< Cacheable */ 00230 /** 00231 * @} 00232 */ 00233 00234 /** @defgroup GFXMMU_Prefetch GFXMMU pre-fetch 00235 * @{ 00236 */ 00237 #define GFXMMU_PREFETCH_DISABLE GFXMMU_CR_PD /*!< Pre-fetch disable */ 00238 #define GFXMMU_PREFETCH_ENABLE 0x00000000U /*!< Pre-fetch enable */ 00239 /** 00240 * @} 00241 */ 00242 00243 /** @defgroup GFXMMU_Interrupts GFXMMU interrupts 00244 * @{ 00245 */ 00246 #define GFXMMU_AHB_MASTER_ERROR_IT GFXMMU_CR_AMEIE /*!< AHB master error interrupt */ 00247 #define GFXMMU_BUFFER0_OVERFLOW_IT GFXMMU_CR_B0OIE /*!< Buffer 0 overflow interrupt */ 00248 #define GFXMMU_BUFFER1_OVERFLOW_IT GFXMMU_CR_B1OIE /*!< Buffer 1 overflow interrupt */ 00249 #define GFXMMU_BUFFER2_OVERFLOW_IT GFXMMU_CR_B2OIE /*!< Buffer 2 overflow interrupt */ 00250 #define GFXMMU_BUFFER3_OVERFLOW_IT GFXMMU_CR_B3OIE /*!< Buffer 3 overflow interrupt */ 00251 /** 00252 * @} 00253 */ 00254 00255 /** @defgroup GFXMMU_Error_Code GFXMMU Error Code 00256 * @{ 00257 */ 00258 #define GFXMMU_ERROR_NONE 0x00000000U /*!< No error */ 00259 #define GFXMMU_ERROR_BUFFER0_OVERFLOW GFXMMU_SR_B0OF /*!< Buffer 0 overflow */ 00260 #define GFXMMU_ERROR_BUFFER1_OVERFLOW GFXMMU_SR_B1OF /*!< Buffer 1 overflow */ 00261 #define GFXMMU_ERROR_BUFFER2_OVERFLOW GFXMMU_SR_B2OF /*!< Buffer 2 overflow */ 00262 #define GFXMMU_ERROR_BUFFER3_OVERFLOW GFXMMU_SR_B3OF /*!< Buffer 3 overflow */ 00263 #define GFXMMU_ERROR_AHB_MASTER GFXMMU_SR_AMEF /*!< AHB master error */ 00264 #if (USE_HAL_GFXMMU_REGISTER_CALLBACKS == 1) 00265 #define GFXMMU_ERROR_INVALID_CALLBACK 0x00000100U /*!< Invalid callback error */ 00266 #endif 00267 /** 00268 * @} 00269 */ 00270 00271 /** @defgroup GFXMMU_LutLineStatus GFXMMU LUT line status 00272 * @{ 00273 */ 00274 #define GFXMMU_LUT_LINE_DISABLE 0x00000000U /*!< LUT line disabled */ 00275 #define GFXMMU_LUT_LINE_ENABLE GFXMMU_LUTxL_EN /*!< LUT line enabled */ 00276 /** 00277 * @} 00278 */ 00279 00280 /** @defgroup GFXMMU_CacheForceParam GFXMMU cache force parameter 00281 * @{ 00282 */ 00283 #define GFXMMU_CACHE_FORCE_FLUSH GFXMMU_CCR_FF /*!< Force cache flush */ 00284 #define GFXMMU_CACHE_FORCE_INVALIDATE GFXMMU_CCR_FI /*!< Force cache invalidate */ 00285 /** 00286 * @} 00287 */ 00288 00289 /** 00290 * @} 00291 */ 00292 /* End of exported constants -------------------------------------------------*/ 00293 00294 /* Exported macros -----------------------------------------------------------*/ 00295 /** @defgroup GFXMMU_Exported_Macros GFXMMU Exported Macros 00296 * @{ 00297 */ 00298 00299 /** @brief Reset GFXMMU handle state. 00300 * @param __HANDLE__ GFXMMU handle. 00301 * @retval None 00302 */ 00303 #if (USE_HAL_GFXMMU_REGISTER_CALLBACKS == 1) 00304 #define __HAL_GFXMMU_RESET_HANDLE_STATE(__HANDLE__) do{ \ 00305 (__HANDLE__)->State = HAL_GFXMMU_STATE_RESET; \ 00306 (__HANDLE__)->MspInitCallback = NULL; \ 00307 (__HANDLE__)->MspDeInitCallback = NULL; \ 00308 } while(0) 00309 #else 00310 #define __HAL_GFXMMU_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_GFXMMU_STATE_RESET) 00311 #endif 00312 00313 /** 00314 * @} 00315 */ 00316 /* End of exported macros ----------------------------------------------------*/ 00317 00318 /* Exported functions --------------------------------------------------------*/ 00319 /** @addtogroup GFXMMU_Exported_Functions GFXMMU Exported Functions 00320 * @{ 00321 */ 00322 00323 /** @addtogroup GFXMMU_Exported_Functions_Group1 Initialization and de-initialization functions 00324 * @{ 00325 */ 00326 /* Initialization and de-initialization functions *****************************/ 00327 HAL_StatusTypeDef HAL_GFXMMU_Init(GFXMMU_HandleTypeDef *hgfxmmu); 00328 HAL_StatusTypeDef HAL_GFXMMU_DeInit(GFXMMU_HandleTypeDef *hgfxmmu); 00329 void HAL_GFXMMU_MspInit(GFXMMU_HandleTypeDef *hgfxmmu); 00330 void HAL_GFXMMU_MspDeInit(GFXMMU_HandleTypeDef *hgfxmmu); 00331 #if (USE_HAL_GFXMMU_REGISTER_CALLBACKS == 1) 00332 /* GFXMMU callbacks register/unregister functions *****************************/ 00333 HAL_StatusTypeDef HAL_GFXMMU_RegisterCallback(GFXMMU_HandleTypeDef *hgfxmmu, 00334 HAL_GFXMMU_CallbackIDTypeDef CallbackID, 00335 pGFXMMU_CallbackTypeDef pCallback); 00336 HAL_StatusTypeDef HAL_GFXMMU_UnRegisterCallback(GFXMMU_HandleTypeDef *hgfxmmu, 00337 HAL_GFXMMU_CallbackIDTypeDef CallbackID); 00338 #endif 00339 /** 00340 * @} 00341 */ 00342 00343 /** @addtogroup GFXMMU_Exported_Functions_Group2 Operations functions 00344 * @{ 00345 */ 00346 /* Operation functions ********************************************************/ 00347 HAL_StatusTypeDef HAL_GFXMMU_ConfigLut(GFXMMU_HandleTypeDef *hgfxmmu, 00348 uint32_t FirstLine, 00349 uint32_t LinesNumber, 00350 uint32_t Address); 00351 00352 HAL_StatusTypeDef HAL_GFXMMU_DisableLutLines(GFXMMU_HandleTypeDef *hgfxmmu, 00353 uint32_t FirstLine, 00354 uint32_t LinesNumber); 00355 00356 HAL_StatusTypeDef HAL_GFXMMU_ConfigLutLine(GFXMMU_HandleTypeDef *hgfxmmu, GFXMMU_LutLineTypeDef *lutLine); 00357 00358 HAL_StatusTypeDef HAL_GFXMMU_ConfigForceCache(GFXMMU_HandleTypeDef *hgfxmmu, uint32_t ForceParam); 00359 00360 HAL_StatusTypeDef HAL_GFXMMU_ModifyBuffers(GFXMMU_HandleTypeDef *hgfxmmu, GFXMMU_BuffersTypeDef *Buffers); 00361 00362 HAL_StatusTypeDef HAL_GFXMMU_ModifyCachePrefetch(GFXMMU_HandleTypeDef *hgfxmmu, 00363 GFXMMU_CachePrefetchTypeDef *CachePrefetch); 00364 00365 void HAL_GFXMMU_IRQHandler(GFXMMU_HandleTypeDef *hgfxmmu); 00366 00367 void HAL_GFXMMU_ErrorCallback(GFXMMU_HandleTypeDef *hgfxmmu); 00368 /** 00369 * @} 00370 */ 00371 00372 /** @defgroup GFXMMU_Exported_Functions_Group3 State functions 00373 * @{ 00374 */ 00375 /* State function *************************************************************/ 00376 HAL_GFXMMU_StateTypeDef HAL_GFXMMU_GetState(GFXMMU_HandleTypeDef *hgfxmmu); 00377 00378 uint32_t HAL_GFXMMU_GetError(GFXMMU_HandleTypeDef *hgfxmmu); 00379 /** 00380 * @} 00381 */ 00382 00383 /** 00384 * @} 00385 */ 00386 /* End of exported functions -------------------------------------------------*/ 00387 00388 /* Private macros ------------------------------------------------------------*/ 00389 /** @defgroup GFXMMU_Private_Macros GFXMMU Private Macros 00390 * @{ 00391 */ 00392 #define IS_GFXMMU_BLOCKS_PER_LINE(VALUE) (((VALUE) == GFXMMU_256BLOCKS) || \ 00393 ((VALUE) == GFXMMU_192BLOCKS)) 00394 00395 #define IS_GFXMMU_BUFFER_ADDRESS(VALUE) (((VALUE) & 0xFU) == 0U) 00396 00397 #define IS_GFXMMU_CACHE_LOCK(VALUE) (((VALUE) == GFXMMU_CACHE_LOCK_DISABLE) || \ 00398 ((VALUE) == GFXMMU_CACHE_LOCK_ENABLE)) 00399 00400 #define IS_GFXMMU_CACHE_LOCK_BUFFER(VALUE) (((VALUE) == GFXMMU_CACHE_LOCK_BUFFER0) || \ 00401 ((VALUE) == GFXMMU_CACHE_LOCK_BUFFER1) || \ 00402 ((VALUE) == GFXMMU_CACHE_LOCK_BUFFER2) || \ 00403 ((VALUE) == GFXMMU_CACHE_LOCK_BUFFER3)) 00404 00405 #define IS_GFXMMU_CACHE_FORCE(VALUE) (((VALUE) == GFXMMU_CACHE_FORCE_DISABLE) || \ 00406 ((VALUE) == GFXMMU_CACHE_FORCE_ENABLE)) 00407 00408 #define IS_GFXMMU_OUTTER_BUFFERABILITY(VALUE) (((VALUE) == GFXMMU_OUTTER_BUFFERABILITY_DISABLE) || \ 00409 ((VALUE) == GFXMMU_OUTTER_BUFFERABILITY_ENABLE)) 00410 00411 #define IS_GFXMMU_OUTTER_CACHABILITY(VALUE) (((VALUE) == GFXMMU_OUTTER_CACHABILITY_DISABLE) || \ 00412 ((VALUE) == GFXMMU_OUTTER_CACHABILITY_ENABLE)) 00413 00414 #define IS_GFXMMU_PREFETCH(VALUE) (((VALUE) == GFXMMU_PREFETCH_DISABLE) || \ 00415 ((VALUE) == GFXMMU_PREFETCH_ENABLE)) 00416 00417 #define IS_GFXMMU_INTERRUPTS(VALUE) (((VALUE) & 0x1FU) != 0U) 00418 00419 #define IS_GFXMMU_LUT_LINE(VALUE) ((VALUE) < 1024U) 00420 00421 #define IS_GFXMMU_LUT_LINES_NUMBER(VALUE) (((VALUE) > 0U) && ((VALUE) <= 1024U)) 00422 00423 #define IS_GFXMMU_LUT_LINE_STATUS(VALUE) (((VALUE) == GFXMMU_LUT_LINE_DISABLE) || \ 00424 ((VALUE) == GFXMMU_LUT_LINE_ENABLE)) 00425 00426 #define IS_GFXMMU_LUT_BLOCK(VALUE) ((VALUE) < 256U) 00427 00428 #define IS_GFXMMU_LUT_LINE_OFFSET(VALUE) (((VALUE) >= -4080) && ((VALUE) <= 4190208)) 00429 00430 #define IS_GFXMMU_CACHE_FORCE_ACTION(VALUE) (((VALUE) == GFXMMU_CACHE_FORCE_FLUSH) || \ 00431 ((VALUE) == GFXMMU_CACHE_FORCE_INVALIDATE) || \ 00432 ((VALUE) == (GFXMMU_CACHE_FORCE_FLUSH | GFXMMU_CACHE_FORCE_INVALIDATE))) 00433 /** 00434 * @} 00435 */ 00436 /* End of private macros -----------------------------------------------------*/ 00437 00438 /** 00439 * @} 00440 */ 00441 00442 /** 00443 * @} 00444 */ 00445 #endif /* GFXMMU */ 00446 #ifdef __cplusplus 00447 } 00448 #endif 00449 00450 #endif /* STM32H7xx_HAL_GFXMMU_H */ 00451