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STM32H735xx HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32h7xx_hal_i2s.h 00004 * @author MCD Application Team 00005 * @brief Header file of I2S HAL module. 00006 ****************************************************************************** 00007 * @attention 00008 * 00009 * Copyright (c) 2017 STMicroelectronics. 00010 * All rights reserved. 00011 * 00012 * This software is licensed under terms that can be found in the LICENSE file 00013 * in the root directory of this software component. 00014 * If no LICENSE file comes with this software, it is provided AS-IS. 00015 * 00016 ****************************************************************************** 00017 */ 00018 00019 /* Define to prevent recursive inclusion -------------------------------------*/ 00020 #ifndef STM32H7xx_HAL_I2S_H 00021 #define STM32H7xx_HAL_I2S_H 00022 00023 #ifdef __cplusplus 00024 extern "C" { 00025 #endif 00026 00027 /* Includes ------------------------------------------------------------------*/ 00028 #include "stm32h7xx_hal_def.h" 00029 00030 /** @addtogroup STM32H7xx_HAL_Driver 00031 * @{ 00032 */ 00033 00034 /** @addtogroup I2S 00035 * @{ 00036 */ 00037 00038 /* Exported types ------------------------------------------------------------*/ 00039 /** @defgroup I2S_Exported_Types I2S Exported Types 00040 * @{ 00041 */ 00042 00043 /** 00044 * @brief I2S Init structure definition 00045 */ 00046 typedef struct 00047 { 00048 uint32_t Mode; /*!< Specifies the I2S operating mode. 00049 This parameter can be a value of @ref I2S_Mode */ 00050 00051 uint32_t Standard; /*!< Specifies the standard used for the I2S communication. 00052 This parameter can be a value of @ref I2S_Standard */ 00053 00054 uint32_t DataFormat; /*!< Specifies the data format for the I2S communication. 00055 This parameter can be a value of @ref I2S_Data_Format */ 00056 00057 uint32_t MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not. 00058 This parameter can be a value of @ref I2S_MCLK_Output */ 00059 00060 uint32_t AudioFreq; /*!< Specifies the frequency selected for the I2S communication. 00061 This parameter can be a value of @ref I2S_Audio_Frequency */ 00062 00063 uint32_t CPOL; /*!< Specifies the idle state of the I2S clock. 00064 This parameter can be a value of @ref I2S_Clock_Polarity */ 00065 00066 uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit. 00067 This parameter can be a value of @ref I2S_MSB_LSB_Transmission */ 00068 00069 uint32_t WSInversion; /*!< Control the Word Select Inversion. 00070 This parameter can be a value of @ref I2S_WSInversion */ 00071 00072 uint32_t Data24BitAlignment; /*!< Specifies the Data Padding for 24 bits data length 00073 This parameter can be a value of @ref I2S_Data_24Bit_Alignment */ 00074 00075 uint32_t MasterKeepIOState; /*!< Control of Alternate function GPIOs state 00076 This parameter can be a value of @ref I2S_Master_Keep_IO_State */ 00077 00078 } I2S_InitTypeDef; 00079 00080 /** 00081 * @brief HAL State structures definition 00082 */ 00083 typedef enum 00084 { 00085 HAL_I2S_STATE_RESET = 0x00UL, /*!< I2S not yet initialized or disabled */ 00086 HAL_I2S_STATE_READY = 0x01UL, /*!< I2S initialized and ready for use */ 00087 HAL_I2S_STATE_BUSY = 0x02UL, /*!< I2S internal process is ongoing */ 00088 HAL_I2S_STATE_BUSY_TX = 0x03UL, /*!< Data Transmission process is ongoing */ 00089 HAL_I2S_STATE_BUSY_RX = 0x04UL, /*!< Data Reception process is ongoing */ 00090 HAL_I2S_STATE_BUSY_TX_RX = 0x05UL, /*!< Data Transmission and Reception process is ongoing */ 00091 HAL_I2S_STATE_TIMEOUT = 0x06UL, /*!< I2S timeout state */ 00092 HAL_I2S_STATE_ERROR = 0x07UL /*!< I2S error state */ 00093 } HAL_I2S_StateTypeDef; 00094 00095 /** 00096 * @brief I2S handle Structure definition 00097 */ 00098 typedef struct __I2S_HandleTypeDef 00099 { 00100 SPI_TypeDef *Instance; /*!< I2S registers base address */ 00101 00102 I2S_InitTypeDef Init; /*!< I2S communication parameters */ 00103 00104 uint16_t *pTxBuffPtr; /*!< Pointer to I2S Tx transfer buffer */ 00105 00106 __IO uint16_t TxXferSize; /*!< I2S Tx transfer size */ 00107 00108 __IO uint16_t TxXferCount; /*!< I2S Tx transfer Counter */ 00109 00110 uint16_t *pRxBuffPtr; /*!< Pointer to I2S Rx transfer buffer */ 00111 00112 __IO uint16_t RxXferSize; /*!< I2S Rx transfer size */ 00113 00114 __IO uint16_t RxXferCount; /*!< I2S Rx transfer counter 00115 (This field is initialized at the 00116 same value as transfer size at the 00117 beginning of the transfer and 00118 decremented when a sample is received 00119 NbSamplesReceived = RxBufferSize-RxBufferCount) */ 00120 00121 void (*RxISR)(struct __I2S_HandleTypeDef *hi2s); /*!< function pointer on Rx ISR */ 00122 00123 void (*TxISR)(struct __I2S_HandleTypeDef *hi2s); /*!< function pointer on Tx ISR */ 00124 00125 DMA_HandleTypeDef *hdmatx; /*!< I2S Tx DMA handle parameters */ 00126 00127 DMA_HandleTypeDef *hdmarx; /*!< I2S Rx DMA handle parameters */ 00128 00129 __IO HAL_LockTypeDef Lock; /*!< I2S locking object */ 00130 00131 __IO HAL_I2S_StateTypeDef State; /*!< I2S communication state */ 00132 00133 __IO uint32_t ErrorCode; /*!< I2S Error code 00134 This parameter can be a value of @ref I2S_Error */ 00135 00136 #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U) 00137 void (* TxCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Tx Completed callback */ 00138 void (* RxCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Rx Completed callback */ 00139 void (* TxRxCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S TxRx Completed callback */ 00140 void (* TxHalfCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Tx Half Completed callback */ 00141 void (* RxHalfCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Rx Half Completed callback */ 00142 void (* TxRxHalfCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S TxRx Half Completed callback */ 00143 void (* ErrorCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Error callback */ 00144 void (* MspInitCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Msp Init callback */ 00145 void (* MspDeInitCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Msp DeInit callback */ 00146 00147 #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */ 00148 } I2S_HandleTypeDef; 00149 00150 #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1UL) 00151 /** 00152 00153 * @brief HAL I2S Callback ID enumeration definition 00154 */ 00155 typedef enum 00156 { 00157 HAL_I2S_TX_COMPLETE_CB_ID = 0x00UL, /*!< I2S Tx Completed callback ID */ 00158 HAL_I2S_RX_COMPLETE_CB_ID = 0x01UL, /*!< I2S Rx Completed callback ID */ 00159 HAL_I2S_TX_RX_COMPLETE_CB_ID = 0x02UL, /*!< I2S TxRx Completed callback ID */ 00160 HAL_I2S_TX_HALF_COMPLETE_CB_ID = 0x03UL, /*!< I2S Tx Half Completed callback ID */ 00161 HAL_I2S_RX_HALF_COMPLETE_CB_ID = 0x04UL, /*!< I2S Rx Half Completed callback ID */ 00162 HAL_I2S_TX_RX_HALF_COMPLETE_CB_ID = 0x05UL, /*!< I2S TxRx Half Completed callback ID */ 00163 HAL_I2S_ERROR_CB_ID = 0x06UL, /*!< I2S Error callback ID */ 00164 HAL_I2S_MSPINIT_CB_ID = 0x07UL, /*!< I2S Msp Init callback ID */ 00165 HAL_I2S_MSPDEINIT_CB_ID = 0x08UL /*!< I2S Msp DeInit callback ID */ 00166 00167 } HAL_I2S_CallbackIDTypeDef; 00168 00169 /** 00170 * @brief HAL I2S Callback pointer definition 00171 */ 00172 typedef void (*pI2S_CallbackTypeDef)(I2S_HandleTypeDef *hi2s); /*!< pointer to an I2S callback function */ 00173 00174 #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */ 00175 /** 00176 * @} 00177 */ 00178 00179 /* Exported constants --------------------------------------------------------*/ 00180 /** @defgroup I2S_Exported_Constants I2S Exported Constants 00181 * @{ 00182 */ 00183 /** @defgroup I2S_Error I2S Error 00184 * @{ 00185 */ 00186 #define HAL_I2S_ERROR_NONE (0x00000000UL) /*!< No error */ 00187 #define HAL_I2S_ERROR_TIMEOUT (0x00000001UL) /*!< Timeout error */ 00188 #define HAL_I2S_ERROR_OVR (0x00000002UL) /*!< OVR error */ 00189 #define HAL_I2S_ERROR_UDR (0x00000004UL) /*!< UDR error */ 00190 #define HAL_I2S_ERROR_DMA (0x00000008UL) /*!< DMA transfer error */ 00191 #define HAL_I2S_ERROR_PRESCALER (0x00000010UL) /*!< Prescaler Calculation error */ 00192 #define HAL_I2S_ERROR_FRE (0x00000020UL) /*!< FRE error */ 00193 #define HAL_I2S_ERROR_NO_OGT (0x00000040UL) /*!< No On Going Transfer error */ 00194 #define HAL_I2S_ERROR_NOT_SUPPORTED (0x00000080UL) /*!< Requested operation not supported */ 00195 #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1UL) 00196 #define HAL_I2S_ERROR_INVALID_CALLBACK (0x00000100UL) /*!< Invalid Callback error */ 00197 #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */ 00198 /** 00199 * @} 00200 */ 00201 00202 /** @defgroup I2S_Mode I2S Mode 00203 * @{ 00204 */ 00205 #define I2S_MODE_SLAVE_TX (0x00000000UL) 00206 #define I2S_MODE_SLAVE_RX (SPI_I2SCFGR_I2SCFG_0) 00207 #define I2S_MODE_MASTER_TX (SPI_I2SCFGR_I2SCFG_1) 00208 #define I2S_MODE_MASTER_RX (SPI_I2SCFGR_I2SCFG_0 | SPI_I2SCFGR_I2SCFG_1) 00209 #define I2S_MODE_SLAVE_FULLDUPLEX (SPI_I2SCFGR_I2SCFG_2) 00210 #define I2S_MODE_MASTER_FULLDUPLEX (SPI_I2SCFGR_I2SCFG_2 | SPI_I2SCFGR_I2SCFG_0) 00211 /** 00212 * @} 00213 */ 00214 00215 /** @defgroup I2S_Standard I2S Standard 00216 * @{ 00217 */ 00218 #define I2S_STANDARD_PHILIPS (0x00000000UL) 00219 #define I2S_STANDARD_MSB (SPI_I2SCFGR_I2SSTD_0) 00220 #define I2S_STANDARD_LSB (SPI_I2SCFGR_I2SSTD_1) 00221 #define I2S_STANDARD_PCM_SHORT (SPI_I2SCFGR_I2SSTD_0 | SPI_I2SCFGR_I2SSTD_1) 00222 #define I2S_STANDARD_PCM_LONG (SPI_I2SCFGR_I2SSTD_0 | SPI_I2SCFGR_I2SSTD_1 | SPI_I2SCFGR_PCMSYNC) 00223 /** 00224 * @} 00225 */ 00226 00227 /** @defgroup I2S_Data_Format I2S Data Format 00228 * @{ 00229 */ 00230 #define I2S_DATAFORMAT_16B (0x00000000UL) 00231 #define I2S_DATAFORMAT_16B_EXTENDED (SPI_I2SCFGR_CHLEN) 00232 #define I2S_DATAFORMAT_24B (SPI_I2SCFGR_DATLEN_0) 00233 #define I2S_DATAFORMAT_32B (SPI_I2SCFGR_DATLEN_1) 00234 /** 00235 * @} 00236 */ 00237 00238 /** @defgroup I2S_MCLK_Output I2S MCLK Output 00239 * @{ 00240 */ 00241 #define I2S_MCLKOUTPUT_ENABLE (SPI_I2SCFGR_MCKOE) 00242 #define I2S_MCLKOUTPUT_DISABLE (0x00000000UL) 00243 /** 00244 * @} 00245 */ 00246 00247 /** @defgroup I2S_Audio_Frequency I2S Audio Frequency 00248 * @{ 00249 */ 00250 #define I2S_AUDIOFREQ_192K (192000UL) 00251 #define I2S_AUDIOFREQ_96K (96000UL) 00252 #define I2S_AUDIOFREQ_48K (48000UL) 00253 #define I2S_AUDIOFREQ_44K (44100UL) 00254 #define I2S_AUDIOFREQ_32K (32000UL) 00255 #define I2S_AUDIOFREQ_22K (22050UL) 00256 #define I2S_AUDIOFREQ_16K (16000UL) 00257 #define I2S_AUDIOFREQ_11K (11025UL) 00258 #define I2S_AUDIOFREQ_8K (8000UL) 00259 #define I2S_AUDIOFREQ_DEFAULT (2UL) 00260 /** 00261 * @} 00262 */ 00263 00264 /** @defgroup I2S_Clock_Polarity I2S FullDuplex Mode 00265 * @{ 00266 */ 00267 #define I2S_CPOL_LOW (0x00000000UL) 00268 #define I2S_CPOL_HIGH (SPI_I2SCFGR_CKPOL) 00269 /** 00270 * @} 00271 */ 00272 00273 /** @defgroup I2S_MSB_LSB_Transmission I2S MSB LSB Transmission 00274 * @{ 00275 */ 00276 #define I2S_FIRSTBIT_MSB (0x00000000UL) 00277 #define I2S_FIRSTBIT_LSB SPI_CFG2_LSBFRST 00278 /** 00279 * @} 00280 */ 00281 00282 /** @defgroup I2S_WSInversion I2S Word Select Inversion 00283 * @{ 00284 */ 00285 #define I2S_WS_INVERSION_DISABLE (0x00000000UL) 00286 #define I2S_WS_INVERSION_ENABLE SPI_I2SCFGR_WSINV 00287 /** 00288 * @} 00289 */ 00290 00291 /** @defgroup I2S_Data_24Bit_Alignment Data Padding 24Bit 00292 * @{ 00293 */ 00294 #define I2S_DATA_24BIT_ALIGNMENT_RIGHT (0x00000000UL) 00295 #define I2S_DATA_24BIT_ALIGNMENT_LEFT SPI_I2SCFGR_DATFMT 00296 /** 00297 * @} 00298 */ 00299 00300 /** @defgroup I2S_Master_Keep_IO_State Keep IO State 00301 * @{ 00302 */ 00303 #define I2S_MASTER_KEEP_IO_STATE_DISABLE (0x00000000U) 00304 #define I2S_MASTER_KEEP_IO_STATE_ENABLE SPI_CFG2_AFCNTR 00305 /** 00306 * @} 00307 */ 00308 00309 /** @defgroup I2S_Interrupts_Definition I2S Interrupts Definition 00310 * @{ 00311 */ 00312 #define I2S_IT_RXP SPI_IER_RXPIE 00313 #define I2S_IT_TXP SPI_IER_TXPIE 00314 #define I2S_IT_DXP SPI_IER_DXPIE 00315 #define I2S_IT_UDR SPI_IER_UDRIE 00316 #define I2S_IT_OVR SPI_IER_OVRIE 00317 #define I2S_IT_FRE SPI_IER_TIFREIE 00318 #define I2S_IT_ERR (SPI_IER_UDRIE | SPI_IER_OVRIE | SPI_IER_TIFREIE) 00319 /** 00320 * @} 00321 */ 00322 00323 /** @defgroup I2S_Flags_Definition I2S Flags Definition 00324 * @{ 00325 */ 00326 #define I2S_FLAG_RXP SPI_SR_RXP /* I2S status flag : Rx-Packet available flag */ 00327 #define I2S_FLAG_TXP SPI_SR_TXP /* I2S status flag : Tx-Packet space available flag */ 00328 #define I2S_FLAG_DXP SPI_SR_DXP /* I2S status flag : Dx-Packet space available flag */ 00329 #define I2S_FLAG_UDR SPI_SR_UDR /* I2S Error flag : Underrun flag */ 00330 #define I2S_FLAG_OVR SPI_SR_OVR /* I2S Error flag : Overrun flag */ 00331 #define I2S_FLAG_FRE SPI_SR_TIFRE /* I2S Error flag : TI mode frame format error flag */ 00332 00333 #define I2S_FLAG_MASK (SPI_SR_RXP | SPI_SR_TXP | SPI_SR_DXP |SPI_SR_UDR | SPI_SR_OVR | SPI_SR_TIFRE) 00334 /** 00335 * @} 00336 */ 00337 00338 /** 00339 * @} 00340 */ 00341 00342 /* Exported macros -----------------------------------------------------------*/ 00343 /** @defgroup I2S_Exported_macros I2S Exported Macros 00344 * @{ 00345 */ 00346 00347 /** @brief Reset I2S handle state 00348 * @param __HANDLE__ specifies the I2S Handle. 00349 * @retval None 00350 */ 00351 #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1UL) 00352 #define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) do{ \ 00353 (__HANDLE__)->State = HAL_I2S_STATE_RESET; \ 00354 (__HANDLE__)->MspInitCallback = NULL; \ 00355 (__HANDLE__)->MspDeInitCallback = NULL; \ 00356 } while(0) 00357 #else 00358 #define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2S_STATE_RESET) 00359 #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */ 00360 00361 /** @brief Enable the specified SPI peripheral (in I2S mode). 00362 * @param __HANDLE__ specifies the I2S Handle. 00363 * @retval None 00364 */ 00365 #define __HAL_I2S_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE)) 00366 00367 /** @brief Disable the specified SPI peripheral (in I2S mode). 00368 * @param __HANDLE__ specifies the I2S Handle. 00369 * @retval None 00370 */ 00371 #define __HAL_I2S_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE)) 00372 00373 /** @brief Enable the specified I2S interrupts. 00374 * @param __HANDLE__ specifies the I2S Handle. 00375 * This parameter can be I2S where x: 1, 2 or 3 to select the I2S peripheral. 00376 * @param __INTERRUPT__ specifies the interrupt source to enable or disable. 00377 * This parameter can be one of the following values: 00378 * @arg I2S_IT_RXP : Rx-Packet available interrupt 00379 * @arg I2S_IT_TXP : Tx-Packet space available interrupt 00380 * @arg I2S_IT_UDR : Underrun interrupt 00381 * @arg I2S_IT_OVR : Overrun interrupt 00382 * @arg I2S_IT_FRE : TI mode frame format error interrupt 00383 * @arg I2S_IT_ERR : Error interrupt enable 00384 * @retval None 00385 */ 00386 #define __HAL_I2S_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__)) 00387 00388 /** @brief Disable the specified I2S interrupts. 00389 * @param __HANDLE__ specifies the I2S Handle. 00390 * This parameter can be I2S where x: 1, 2 or 3 to select the I2S peripheral. 00391 * @param __INTERRUPT__ specifies the interrupt source to enable or disable. 00392 * This parameter can be one of the following values: 00393 * @arg I2S_IT_RXP : Rx-Packet available interrupt 00394 * @arg I2S_IT_TXP : Tx-Packet space available interrupt 00395 * @arg I2S_IT_UDR : Underrun interrupt 00396 * @arg I2S_IT_OVR : Overrun interrupt 00397 * @arg I2S_IT_FRE : TI mode frame format error interrupt 00398 * @arg I2S_IT_ERR : Error interrupt enable 00399 * @retval None 00400 */ 00401 #define __HAL_I2S_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= (~(__INTERRUPT__))) 00402 00403 /** @brief Check if the specified I2S interrupt source is enabled or disabled. 00404 * @param __HANDLE__ specifies the I2S Handle. 00405 * This parameter can be I2S where x: 1, 2 or 3 to select the I2S peripheral. 00406 * @param __INTERRUPT__ specifies the I2S interrupt source to check. 00407 * This parameter can be one of the following values: 00408 * @arg I2S_IT_RXP : Rx-Packet available interrupt 00409 * @arg I2S_IT_TXP : Tx-Packet space available interrupt 00410 * @arg I2S_IT_DXP : Tx-Packet space available interrupt 00411 * @arg I2S_IT_UDR : Underrun interrupt 00412 * @arg I2S_IT_OVR : Overrun interrupt 00413 * @arg I2S_IT_FRE : TI mode frame format error interrupt 00414 * @arg I2S_IT_ERR : Error interrupt enable 00415 * @retval The new state of __IT__ (TRUE or FALSE). 00416 */ 00417 #define __HAL_I2S_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER\ 00418 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 00419 00420 /** @brief Check whether the specified I2S flag is set or not. 00421 * @param __HANDLE__ specifies the I2S Handle. 00422 * This parameter can be I2S where x: 1, 2 or 3 to select the I2S peripheral. 00423 * @param __FLAG__ specifies the flag to check. 00424 * This parameter can be one of the following values: 00425 * @arg I2S_FLAG_RXP : Rx-Packet available flag 00426 * @arg I2S_FLAG_TXP : Tx-Packet space available flag 00427 * @arg I2S_FLAG_UDR : Underrun flag 00428 * @arg I2S_FLAG_OVR : Overrun flag 00429 * @arg I2S_FLAG_FRE : TI mode frame format error flag 00430 * @retval The new state of __FLAG__ (TRUE or FALSE). 00431 */ 00432 #define __HAL_I2S_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) 00433 00434 /** @brief Clear the I2S OVR pending flag. 00435 * @param __HANDLE__ specifies the I2S Handle. 00436 * @retval None 00437 */ 00438 #define __HAL_I2S_CLEAR_OVRFLAG(__HANDLE__) SET_BIT((__HANDLE__)->Instance->IFCR , SPI_IFCR_OVRC) 00439 00440 /** @brief Clear the I2S UDR pending flag. 00441 * @param __HANDLE__ specifies the I2S Handle. 00442 * @retval None 00443 */ 00444 #define __HAL_I2S_CLEAR_UDRFLAG(__HANDLE__) SET_BIT((__HANDLE__)->Instance->IFCR , SPI_IFCR_UDRC) 00445 00446 /** @brief Clear the I2S FRE pending flag. 00447 * @param __HANDLE__: specifies the I2S Handle. 00448 * @retval None 00449 */ 00450 #define __HAL_I2S_CLEAR_TIFREFLAG(__HANDLE__) SET_BIT((__HANDLE__)->Instance->IFCR , SPI_IFCR_TIFREC) 00451 /** 00452 * @} 00453 */ 00454 00455 00456 /* Exported functions --------------------------------------------------------*/ 00457 /** @addtogroup I2S_Exported_Functions 00458 * @{ 00459 */ 00460 00461 /** @addtogroup I2S_Exported_Functions_Group1 00462 * @{ 00463 */ 00464 /* Initialization/de-initialization functions ********************************/ 00465 HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s); 00466 HAL_StatusTypeDef HAL_I2S_DeInit(I2S_HandleTypeDef *hi2s); 00467 void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s); 00468 void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s); 00469 00470 /* Callbacks Register/UnRegister functions ***********************************/ 00471 #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1UL) 00472 HAL_StatusTypeDef HAL_I2S_RegisterCallback(I2S_HandleTypeDef *hi2s, HAL_I2S_CallbackIDTypeDef CallbackID, 00473 pI2S_CallbackTypeDef pCallback); 00474 HAL_StatusTypeDef HAL_I2S_UnRegisterCallback(I2S_HandleTypeDef *hi2s, HAL_I2S_CallbackIDTypeDef CallbackID); 00475 #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */ 00476 /** 00477 * @} 00478 */ 00479 00480 /** @addtogroup I2S_Exported_Functions_Group2 00481 * @{ 00482 */ 00483 /* I/O operation functions ***************************************************/ 00484 /* Blocking mode: Polling */ 00485 HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout); 00486 HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout); 00487 HAL_StatusTypeDef HAL_I2SEx_TransmitReceive(I2S_HandleTypeDef *hi2s, uint16_t *pTxData, uint16_t *pRxData, 00488 uint16_t Size, uint32_t Timeout); 00489 00490 /* Non-Blocking mode: Interrupt */ 00491 HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); 00492 HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); 00493 HAL_StatusTypeDef HAL_I2SEx_TransmitReceive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pTxData, uint16_t *pRxData, 00494 uint16_t Size); 00495 00496 void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s); 00497 00498 /* Non-Blocking mode: DMA */ 00499 HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); 00500 HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); 00501 HAL_StatusTypeDef HAL_I2SEx_TransmitReceive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pTxData, uint16_t *pRxData, 00502 uint16_t Size); 00503 00504 HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s); 00505 HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s); 00506 HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s); 00507 00508 /* Callbacks used in non blocking modes (Interrupt and DMA) *******************/ 00509 void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s); 00510 void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s); 00511 void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s); 00512 void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s); 00513 void HAL_I2SEx_TxRxHalfCpltCallback(I2S_HandleTypeDef *hi2s); 00514 void HAL_I2SEx_TxRxCpltCallback(I2S_HandleTypeDef *hi2s); 00515 void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s); 00516 /** 00517 * @} 00518 */ 00519 00520 /** @addtogroup I2S_Exported_Functions_Group3 00521 * @{ 00522 */ 00523 /* Peripheral Control and State functions ************************************/ 00524 HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s); 00525 uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s); 00526 /** 00527 * @} 00528 */ 00529 00530 /** 00531 * @} 00532 */ 00533 00534 /* Private types -------------------------------------------------------------*/ 00535 /* Private variables ---------------------------------------------------------*/ 00536 /* Private constants ---------------------------------------------------------*/ 00537 /** @defgroup I2S_Private_Constants I2S Private Constants 00538 * @{ 00539 */ 00540 00541 /** 00542 * @} 00543 */ 00544 00545 /* Private macros ------------------------------------------------------------*/ 00546 /** @defgroup I2S_Private_Macros I2S Private Macros 00547 * @{ 00548 */ 00549 00550 /** @brief Check whether the specified SPI flag is set or not. 00551 * @param __SR__ copy of I2S SR register. 00552 * @param __FLAG__ specifies the flag to check. 00553 * This parameter can be one of the following values: 00554 * @arg I2S_FLAG_RXP : Rx-Packet available flag 00555 * @arg I2S_FLAG_TXP : Tx-Packet space available flag 00556 * @arg I2S_FLAG_UDR : Underrun flag 00557 * @arg I2S_FLAG_OVR : Overrun flag 00558 * @arg I2S_FLAG_FRE : TI mode frame format error flag 00559 * @retval SET or RESET. 00560 */ 00561 #define I2S_CHECK_FLAG(__SR__, __FLAG__) ((((__SR__)\ 00562 & ((__FLAG__) & I2S_FLAG_MASK)) == ((__FLAG__) & I2S_FLAG_MASK))\ 00563 ? SET : RESET) 00564 00565 /** @brief Check whether the specified SPI Interrupt is set or not. 00566 * @param __IER__ copy of I2S IER register. 00567 * @param __INTERRUPT__ specifies the SPI interrupt source to check. 00568 * This parameter can be one of the following values: 00569 * @arg I2S_IT_RXP : Rx-Packet available interrupt 00570 * @arg I2S_IT_TXP : Tx-Packet space available interrupt 00571 * @arg I2S_IT_UDR : Underrun interrupt 00572 * @arg I2S_IT_OVR : Overrun interrupt 00573 * @arg I2S_IT_FRE : TI mode frame format error interrupt 00574 * @arg I2S_IT_ERR : Error interrupt enable 00575 * @retval SET or RESET. 00576 */ 00577 #define I2S_CHECK_IT_SOURCE(__IER__, __INTERRUPT__) ((((__IER__)\ 00578 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 00579 00580 /** @brief Checks if I2S Mode parameter is in allowed range. 00581 * @param __MODE__ specifies the I2S Mode. 00582 * This parameter can be a value of @ref I2S_Mode 00583 * @retval None 00584 */ 00585 #define IS_I2S_MODE(__MODE__) (((__MODE__) == I2S_MODE_SLAVE_TX) || \ 00586 ((__MODE__) == I2S_MODE_SLAVE_RX) || \ 00587 ((__MODE__) == I2S_MODE_MASTER_TX) || \ 00588 ((__MODE__) == I2S_MODE_MASTER_RX) || \ 00589 ((__MODE__) == I2S_MODE_SLAVE_FULLDUPLEX) || \ 00590 ((__MODE__) == I2S_MODE_MASTER_FULLDUPLEX)) 00591 00592 #define IS_I2S_MASTER(__MODE__) (((__MODE__) == I2S_MODE_MASTER_TX) || \ 00593 ((__MODE__) == I2S_MODE_MASTER_RX) || \ 00594 ((__MODE__) == I2S_MODE_MASTER_FULLDUPLEX)) 00595 00596 #define IS_I2S_SLAVE(__MODE__) (((__MODE__) == I2S_MODE_SLAVE_TX) || \ 00597 ((__MODE__) == I2S_MODE_SLAVE_RX) || \ 00598 ((__MODE__) == I2S_MODE_SLAVE_FULLDUPLEX)) 00599 00600 #define IS_I2S_FULLDUPLEX(__MODE__) (((__MODE__) == I2S_MODE_MASTER_FULLDUPLEX) || \ 00601 ((__MODE__) == I2S_MODE_SLAVE_FULLDUPLEX)) 00602 00603 #define IS_I2S_STANDARD(__STANDARD__) (((__STANDARD__) == I2S_STANDARD_PHILIPS) || \ 00604 ((__STANDARD__) == I2S_STANDARD_MSB) || \ 00605 ((__STANDARD__) == I2S_STANDARD_LSB) || \ 00606 ((__STANDARD__) == I2S_STANDARD_PCM_SHORT) || \ 00607 ((__STANDARD__) == I2S_STANDARD_PCM_LONG)) 00608 00609 #define IS_I2S_DATA_FORMAT(__FORMAT__) (((__FORMAT__) == I2S_DATAFORMAT_16B) || \ 00610 ((__FORMAT__) == I2S_DATAFORMAT_16B_EXTENDED) || \ 00611 ((__FORMAT__) == I2S_DATAFORMAT_24B) || \ 00612 ((__FORMAT__) == I2S_DATAFORMAT_32B)) 00613 00614 #define IS_I2S_MCLK_OUTPUT(__OUTPUT__) (((__OUTPUT__) == I2S_MCLKOUTPUT_ENABLE) || \ 00615 ((__OUTPUT__) == I2S_MCLKOUTPUT_DISABLE)) 00616 00617 #define IS_I2S_AUDIO_FREQ(__FREQ__) ((((__FREQ__) >= I2S_AUDIOFREQ_8K) && \ 00618 ((__FREQ__) <= I2S_AUDIOFREQ_192K)) || \ 00619 ((__FREQ__) == I2S_AUDIOFREQ_DEFAULT)) 00620 00621 #define IS_I2S_CPOL(__CPOL__) (((__CPOL__) == I2S_CPOL_LOW) || \ 00622 ((__CPOL__) == I2S_CPOL_HIGH)) 00623 00624 #define IS_I2S_FIRST_BIT(__BIT__) (((__BIT__) == I2S_FIRSTBIT_MSB) || \ 00625 ((__BIT__) == I2S_FIRSTBIT_LSB)) 00626 00627 #define IS_I2S_WS_INVERSION(__WSINV__) (((__WSINV__) == I2S_WS_INVERSION_DISABLE) || \ 00628 ((__WSINV__) == I2S_WS_INVERSION_ENABLE)) 00629 00630 #define IS_I2S_DATA_24BIT_ALIGNMENT(__ALIGNMENT__) (((__ALIGNMENT__) == I2S_DATA_24BIT_ALIGNMENT_RIGHT) || \ 00631 ((__ALIGNMENT__) == I2S_DATA_24BIT_ALIGNMENT_LEFT)) 00632 00633 #define IS_I2S_MASTER_KEEP_IO_STATE(__AFCNTR__) (((__AFCNTR__) == I2S_MASTER_KEEP_IO_STATE_DISABLE) || \ 00634 ((__AFCNTR__) == I2S_MASTER_KEEP_IO_STATE_ENABLE)) 00635 00636 00637 /** 00638 * @} 00639 */ 00640 00641 /** 00642 * @} 00643 */ 00644 00645 /** 00646 * @} 00647 */ 00648 00649 #ifdef __cplusplus 00650 } 00651 #endif 00652 00653 #endif /* STM32H7xx_HAL_I2S_H */ 00654
1.7.6.1