STM32H735xx HAL User Manual
stm32h7xx_hal_iwdg.c
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00001 /**
00002   ******************************************************************************
00003   * @file    stm32h7xx_hal_iwdg.c
00004   * @author  MCD Application Team
00005   * @brief   IWDG HAL module driver.
00006   *          This file provides firmware functions to manage the following
00007   *          functionalities of the Independent Watchdog (IWDG) peripheral:
00008   *           + Initialization and Start functions
00009   *           + IO operation functions
00010   *
00011   ******************************************************************************
00012   * @attention
00013   *
00014   * Copyright (c) 2017 STMicroelectronics.
00015   * All rights reserved.
00016   *
00017   * This software is licensed under terms that can be found in the LICENSE file
00018   * in the root directory of this software component.
00019   * If no LICENSE file comes with this software, it is provided AS-IS.
00020   *
00021   ******************************************************************************
00022   @verbatim
00023   ==============================================================================
00024                     ##### IWDG Generic features #####
00025   ==============================================================================
00026   [..]
00027     (+) The IWDG can be started by either software or hardware (configurable
00028         through option byte).
00029 
00030     (+) The IWDG is clocked by the Low-Speed Internal clock (LSI) and thus stays
00031         active even if the main clock fails.
00032 
00033     (+) Once the IWDG is started, the LSI is forced ON and both cannot be
00034         disabled. The counter starts counting down from the reset value (0xFFF).
00035         When it reaches the end of count value (0x000) a reset signal is
00036         generated (IWDG reset).
00037 
00038     (+) Whenever the key value 0x0000 AAAA is written in the IWDG_KR register,
00039         the IWDG_RLR value is reloaded into the counter and the watchdog reset
00040         is prevented.
00041 
00042     (+) The IWDG is implemented in the VDD voltage domain that is still functional
00043         in STOP and STANDBY mode (IWDG reset can wake up the CPU from STANDBY).
00044         IWDGRST flag in RCC_CSR register can be used to inform when an IWDG
00045         reset occurs.
00046 
00047     (+) Debug mode: When the microcontroller enters debug mode (core halted),
00048         the IWDG counter either continues to work normally or stops, depending
00049         on DBG_IWDG_STOP configuration bit in DBG module, accessible through
00050         __HAL_DBGMCU_FREEZE_IWDG1() or __HAL_DBGMCU_FREEZE2_IWDG2() and
00051         __HAL_DBGMCU_UnFreeze_IWDG1 or __HAL_DBGMCU_UnFreeze2_IWDG2() macros.
00052 
00053     [..] Min-max timeout value @32KHz (LSI): ~125us / ~32.7s
00054          The IWDG timeout may vary due to LSI clock frequency dispersion.
00055          STM32H7xx devices provide the capability to measure the LSI clock
00056          frequency (LSI clock is internally connected to TIM16 CH1 input capture).
00057          The measured value can be used to have an IWDG timeout with an
00058          acceptable accuracy.
00059 
00060     [..] Default timeout value (necessary for IWDG_SR status register update):
00061          Constant LSI_VALUE is defined based on the nominal LSI clock frequency.
00062          This frequency being subject to variations as mentioned above, the
00063          default timeout value (defined through constant HAL_IWDG_DEFAULT_TIMEOUT
00064          below) may become too short or too long.
00065          In such cases, this default timeout value can be tuned by redefining
00066          the constant LSI_VALUE at user-application level (based, for instance,
00067          on the measured LSI clock frequency as explained above).
00068 
00069                      ##### How to use this driver #####
00070   ==============================================================================
00071   [..]
00072     (#) Use IWDG using HAL_IWDG_Init() function to :
00073       (++) Enable instance by writing Start keyword in IWDG_KEY register. LSI
00074            clock is forced ON and IWDG counter starts counting down.
00075       (++) Enable write access to configuration registers:
00076           IWDG_PR, IWDG_RLR and IWDG_WINR.
00077       (++) Configure the IWDG prescaler and counter reload value. This reload
00078            value will be loaded in the IWDG counter each time the watchdog is
00079            reloaded, then the IWDG will start counting down from this value.
00080       (++) Depending on window parameter:
00081         (+++) If Window Init parameter is same as Window register value,
00082              nothing more is done but reload counter value in order to exit
00083              function with exact time base.
00084         (+++) Else modify Window register. This will automatically reload
00085              watchdog counter.
00086       (++) Wait for status flags to be reset.
00087 
00088     (#) Then the application program must refresh the IWDG counter at regular
00089         intervals during normal operation to prevent an MCU reset, using
00090         HAL_IWDG_Refresh() function.
00091 
00092      *** IWDG HAL driver macros list ***
00093      ====================================
00094      [..]
00095        Below the list of most used macros in IWDG HAL driver:
00096       (+) __HAL_IWDG_START: Enable the IWDG peripheral
00097       (+) __HAL_IWDG_RELOAD_COUNTER: Reloads IWDG counter with value defined in
00098           the reload register
00099 
00100   @endverbatim
00101   */
00102 
00103 /* Includes ------------------------------------------------------------------*/
00104 #include "stm32h7xx_hal.h"
00105 
00106 /** @addtogroup STM32H7xx_HAL_Driver
00107   * @{
00108   */
00109 
00110 #ifdef HAL_IWDG_MODULE_ENABLED
00111 /** @addtogroup IWDG
00112   * @brief IWDG HAL module driver.
00113   * @{
00114   */
00115 
00116 /* Private typedef -----------------------------------------------------------*/
00117 /* Private define ------------------------------------------------------------*/
00118 /** @defgroup IWDG_Private_Defines IWDG Private Defines
00119   * @{
00120   */
00121 /* Status register needs up to 5 LSI clock periods divided by the clock
00122    prescaler to be updated. The number of LSI clock periods is upper-rounded to
00123    6 for the timeout value calculation.
00124    The timeout value is calculated using the highest prescaler (256) and
00125    the LSI_VALUE constant. The value of this constant can be changed by the user
00126    to take into account possible LSI clock period variations.
00127    The timeout value is multiplied by 1000 to be converted in milliseconds.
00128    LSI startup time is also considered here by adding LSI_STARTUP_TIME
00129    converted in milliseconds. */
00130 #define HAL_IWDG_DEFAULT_TIMEOUT        (((6UL * 256UL * 1000UL) / LSI_VALUE) + ((LSI_STARTUP_TIME / 1000UL) + 1UL))
00131 #define IWDG_KERNEL_UPDATE_FLAGS        (IWDG_SR_WVU | IWDG_SR_RVU | IWDG_SR_PVU)
00132 /**
00133   * @}
00134   */
00135 
00136 /* Private macro -------------------------------------------------------------*/
00137 /* Private variables ---------------------------------------------------------*/
00138 /* Private function prototypes -----------------------------------------------*/
00139 /* Exported functions --------------------------------------------------------*/
00140 
00141 /** @addtogroup IWDG_Exported_Functions
00142   * @{
00143   */
00144 
00145 /** @addtogroup IWDG_Exported_Functions_Group1
00146   *  @brief    Initialization and Start functions.
00147   *
00148 @verbatim
00149  ===============================================================================
00150           ##### Initialization and Start functions #####
00151  ===============================================================================
00152  [..]  This section provides functions allowing to:
00153       (+) Initialize the IWDG according to the specified parameters in the
00154           IWDG_InitTypeDef of associated handle.
00155       (+) Manage Window option.
00156       (+) Once initialization is performed in HAL_IWDG_Init function, Watchdog
00157           is reloaded in order to exit function with correct time base.
00158 
00159 @endverbatim
00160   * @{
00161   */
00162 
00163 /**
00164   * @brief  Initialize the IWDG according to the specified parameters in the
00165   *         IWDG_InitTypeDef and start watchdog. Before exiting function,
00166   *         watchdog is refreshed in order to have correct time base.
00167   * @param  hiwdg  pointer to a IWDG_HandleTypeDef structure that contains
00168   *                the configuration information for the specified IWDG module.
00169   * @retval HAL status
00170   */
00171 HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg)
00172 {
00173   uint32_t tickstart;
00174 
00175   /* Check the IWDG handle allocation */
00176   if (hiwdg == NULL)
00177   {
00178     return HAL_ERROR;
00179   }
00180 
00181   /* Check the parameters */
00182   assert_param(IS_IWDG_ALL_INSTANCE(hiwdg->Instance));
00183   assert_param(IS_IWDG_PRESCALER(hiwdg->Init.Prescaler));
00184   assert_param(IS_IWDG_RELOAD(hiwdg->Init.Reload));
00185   assert_param(IS_IWDG_WINDOW(hiwdg->Init.Window));
00186 
00187   /* Enable IWDG. LSI is turned on automatically */
00188   __HAL_IWDG_START(hiwdg);
00189 
00190   /* Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers by writing
00191   0x5555 in KR */
00192   IWDG_ENABLE_WRITE_ACCESS(hiwdg);
00193 
00194   /* Write to IWDG registers the Prescaler & Reload values to work with */
00195   hiwdg->Instance->PR = hiwdg->Init.Prescaler;
00196   hiwdg->Instance->RLR = hiwdg->Init.Reload;
00197 
00198   /* Check pending flag, if previous update not done, return timeout */
00199   tickstart = HAL_GetTick();
00200 
00201   /* Wait for register to be updated */
00202   while ((hiwdg->Instance->SR & IWDG_KERNEL_UPDATE_FLAGS) != 0x00u)
00203   {
00204     if ((HAL_GetTick() - tickstart) > HAL_IWDG_DEFAULT_TIMEOUT)
00205     {
00206       if ((hiwdg->Instance->SR & IWDG_KERNEL_UPDATE_FLAGS) != 0x00u)
00207       {
00208         return HAL_TIMEOUT;
00209       }
00210     }
00211   }
00212 
00213   /* If window parameter is different than current value, modify window
00214   register */
00215   if (hiwdg->Instance->WINR != hiwdg->Init.Window)
00216   {
00217     /* Write to IWDG WINR the IWDG_Window value to compare with. In any case,
00218     even if window feature is disabled, Watchdog will be reloaded by writing
00219     windows register */
00220     hiwdg->Instance->WINR = hiwdg->Init.Window;
00221   }
00222   else
00223   {
00224     /* Reload IWDG counter with value defined in the reload register */
00225     __HAL_IWDG_RELOAD_COUNTER(hiwdg);
00226   }
00227 
00228   /* Return function status */
00229   return HAL_OK;
00230 }
00231 
00232 
00233 /**
00234   * @}
00235   */
00236 
00237 
00238 /** @addtogroup IWDG_Exported_Functions_Group2
00239   *  @brief   IO operation functions
00240   *
00241 @verbatim
00242  ===============================================================================
00243                       ##### IO operation functions #####
00244  ===============================================================================
00245  [..]  This section provides functions allowing to:
00246       (+) Refresh the IWDG.
00247 
00248 @endverbatim
00249   * @{
00250   */
00251 
00252 /**
00253   * @brief  Refresh the IWDG.
00254   * @param  hiwdg  pointer to a IWDG_HandleTypeDef structure that contains
00255   *                the configuration information for the specified IWDG module.
00256   * @retval HAL status
00257   */
00258 HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg)
00259 {
00260   /* Reload IWDG counter with value defined in the reload register */
00261   __HAL_IWDG_RELOAD_COUNTER(hiwdg);
00262 
00263   /* Return function status */
00264   return HAL_OK;
00265 }
00266 
00267 
00268 /**
00269   * @}
00270   */
00271 
00272 /**
00273   * @}
00274   */
00275 
00276 #endif /* HAL_IWDG_MODULE_ENABLED */
00277 /**
00278   * @}
00279   */
00280 
00281 /**
00282   * @}
00283   */