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STM32H735xx HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32h7xx_hal_mdma.h 00004 * @author MCD Application Team 00005 * @brief Header file of DMA HAL module. 00006 ****************************************************************************** 00007 * @attention 00008 * 00009 * Copyright (c) 2017 STMicroelectronics. 00010 * All rights reserved. 00011 * 00012 * This software is licensed under terms that can be found in the LICENSE file 00013 * in the root directory of this software component. 00014 * If no LICENSE file comes with this software, it is provided AS-IS. 00015 * 00016 ****************************************************************************** 00017 */ 00018 00019 /* Define to prevent recursive inclusion -------------------------------------*/ 00020 #ifndef STM32H7xx_HAL_MDMA_H 00021 #define STM32H7xx_HAL_MDMA_H 00022 00023 #ifdef __cplusplus 00024 extern "C" { 00025 #endif 00026 00027 /* Includes ------------------------------------------------------------------*/ 00028 #include "stm32h7xx_hal_def.h" 00029 00030 /** @addtogroup STM32H7xx_HAL_Driver 00031 * @{ 00032 */ 00033 00034 /** @addtogroup MDMA 00035 * @{ 00036 */ 00037 00038 /* Exported types ------------------------------------------------------------*/ 00039 00040 /** @defgroup MDMA_Exported_Types MDMA Exported Types 00041 * @brief MDMA Exported Types 00042 * @{ 00043 */ 00044 00045 /** 00046 * @brief MDMA Configuration Structure definition 00047 */ 00048 typedef struct 00049 { 00050 00051 uint32_t Request; /*!< Specifies the MDMA request. 00052 This parameter can be a value of @ref MDMA_Request_selection*/ 00053 00054 uint32_t TransferTriggerMode; /*!< Specifies the Trigger Transfer mode : each request triggers a : 00055 a buffer transfer, a block transfer, a repeated block transfer or a linked list transfer 00056 This parameter can be a value of @ref MDMA_Transfer_TriggerMode */ 00057 00058 uint32_t Priority; /*!< Specifies the software priority for the MDMAy channelx. 00059 This parameter can be a value of @ref MDMA_Priority_level */ 00060 00061 uint32_t Endianness; /*!< Specifies if the MDMA transactions preserve the Little endianness. 00062 This parameter can be a value of @ref MDMA_Endianness */ 00063 00064 uint32_t SourceInc; /*!< Specifies if the Source increment mode . 00065 This parameter can be a value of @ref MDMA_Source_increment_mode */ 00066 00067 uint32_t DestinationInc; /*!< Specifies if the Destination increment mode . 00068 This parameter can be a value of @ref MDMA_Destination_increment_mode */ 00069 00070 uint32_t SourceDataSize; /*!< Specifies the source data size. 00071 This parameter can be a value of @ref MDMA_Source_data_size */ 00072 00073 uint32_t DestDataSize; /*!< Specifies the destination data size. 00074 This parameter can be a value of @ref MDMA_Destination_data_size */ 00075 00076 00077 uint32_t DataAlignment; /*!< Specifies the source to destination Memory data packing/padding mode. 00078 This parameter can be a value of @ref MDMA_data_Alignment */ 00079 00080 uint32_t BufferTransferLength; /*!< Specifies the buffer Transfer Length (number of bytes), 00081 this is the number of bytes to be transferred in a single transfer (1 byte to 128 bytes)*/ 00082 00083 uint32_t SourceBurst; /*!< Specifies the Burst transfer configuration for the source memory transfers. 00084 It specifies the amount of data to be transferred in a single non interruptible 00085 transaction. 00086 This parameter can be a value of @ref MDMA_Source_burst 00087 @note : the burst may be FIXED/INCR based on SourceInc value , 00088 the BURST must be programmed as to ensure that the burst size will be lower than than 00089 BufferTransferLength */ 00090 00091 uint32_t DestBurst; /*!< Specifies the Burst transfer configuration for the destination memory transfers. 00092 It specifies the amount of data to be transferred in a single non interruptible 00093 transaction. 00094 This parameter can be a value of @ref MDMA_Destination_burst 00095 @note : the burst may be FIXED/INCR based on DestinationInc value , 00096 the BURST must be programmed as to ensure that the burst size will be lower than than 00097 BufferTransferLength */ 00098 00099 int32_t SourceBlockAddressOffset; /*!< this field specifies the Next block source address offset 00100 signed value : if > 0 then increment the next block source Address by offset from where the last block ends 00101 if < 0 then decrement the next block source Address by offset from where the last block ends 00102 if == 0, the next block source address starts from where the last block ends 00103 */ 00104 00105 00106 int32_t DestBlockAddressOffset; /*!< this field specifies the Next block destination address offset 00107 signed value : if > 0 then increment the next block destination Address by offset from where the last block ends 00108 if < 0 then decrement the next block destination Address by offset from where the last block ends 00109 if == 0, the next block destination address starts from where the last block ends 00110 */ 00111 00112 }MDMA_InitTypeDef; 00113 00114 /** 00115 * @brief HAL MDMA linked list node structure definition 00116 * @note The Linked list node allows to define a new MDMA configuration 00117 * (CTCR ,CBNDTR ,CSAR ,CDAR ,CBRUR, CLAR, CTBR, CMAR and CMDR registers). 00118 * When CLAR register is configured to a non NULL value , each time a transfer ends, 00119 * a new configuration (linked list node) is automatically loaded from the address given in CLAR register. 00120 */ 00121 typedef struct 00122 { 00123 __IO uint32_t CTCR; /*!< New CTCR register configuration for the given MDMA linked list node */ 00124 __IO uint32_t CBNDTR; /*!< New CBNDTR register configuration for the given MDMA linked list node */ 00125 __IO uint32_t CSAR; /*!< New CSAR register configuration for the given MDMA linked list node */ 00126 __IO uint32_t CDAR; /*!< New CDAR register configuration for the given MDMA linked list node */ 00127 __IO uint32_t CBRUR; /*!< New CBRUR register configuration for the given MDMA linked list node */ 00128 __IO uint32_t CLAR; /*!< New CLAR register configuration for the given MDMA linked list node */ 00129 __IO uint32_t CTBR; /*!< New CTBR register configuration for the given MDMA linked list node */ 00130 __IO uint32_t Reserved; /*!< Reserved register */ 00131 __IO uint32_t CMAR; /*!< New CMAR register configuration for the given MDMA linked list node */ 00132 __IO uint32_t CMDR; /*!< New CMDR register configuration for the given MDMA linked list node */ 00133 00134 }MDMA_LinkNodeTypeDef; 00135 00136 /** 00137 * @brief HAL MDMA linked list node configuration structure definition 00138 * @note used with HAL_MDMA_LinkedList_CreateNode function 00139 */ 00140 typedef struct 00141 { 00142 MDMA_InitTypeDef Init; /*!< configuration of the specified MDMA Linked List Node */ 00143 uint32_t SrcAddress; /*!< The source memory address for the Linked list Node */ 00144 uint32_t DstAddress; /*!< The destination memory address for the Linked list Node */ 00145 uint32_t BlockDataLength; /*!< The data length of a block in bytes */ 00146 uint32_t BlockCount; /*!< The number of blocks to be transferred */ 00147 00148 uint32_t PostRequestMaskAddress; /*!< specifies the address to be updated (written) with PostRequestMaskData after a request is served. 00149 PostRequestMaskAddress and PostRequestMaskData could be used to automatically clear a peripheral flag when the request is served */ 00150 00151 uint32_t PostRequestMaskData; /*!< specifies the value to be written to PostRequestMaskAddress after a request is served. 00152 PostRequestMaskAddress and PostRequestMaskData could be used to automatically clear a peripheral flag when the request is served */ 00153 00154 00155 }MDMA_LinkNodeConfTypeDef; 00156 00157 00158 /** 00159 * @brief HAL MDMA State structure definition 00160 */ 00161 typedef enum 00162 { 00163 HAL_MDMA_STATE_RESET = 0x00U, /*!< MDMA not yet initialized or disabled */ 00164 HAL_MDMA_STATE_READY = 0x01U, /*!< MDMA initialized and ready for use */ 00165 HAL_MDMA_STATE_BUSY = 0x02U, /*!< MDMA process is ongoing */ 00166 HAL_MDMA_STATE_ERROR = 0x03U, /*!< MDMA error state */ 00167 HAL_MDMA_STATE_ABORT = 0x04U, /*!< MDMA Abort state */ 00168 00169 }HAL_MDMA_StateTypeDef; 00170 00171 /** 00172 * @brief HAL MDMA Level Complete structure definition 00173 */ 00174 typedef enum 00175 { 00176 HAL_MDMA_FULL_TRANSFER = 0x00U, /*!< Full transfer */ 00177 HAL_MDMA_BUFFER_TRANSFER = 0x01U, /*!< Buffer Transfer */ 00178 HAL_MDMA_BLOCK_TRANSFER = 0x02U, /*!< Block Transfer */ 00179 HAL_MDMA_REPEAT_BLOCK_TRANSFER = 0x03U /*!< repeat block Transfer */ 00180 00181 }HAL_MDMA_LevelCompleteTypeDef; 00182 00183 /** 00184 * @brief HAL MDMA Callbacks IDs structure definition 00185 */ 00186 typedef enum 00187 { 00188 HAL_MDMA_XFER_CPLT_CB_ID = 0x00U, /*!< Full transfer */ 00189 HAL_MDMA_XFER_BUFFERCPLT_CB_ID = 0x01U, /*!< Buffer Transfer */ 00190 HAL_MDMA_XFER_BLOCKCPLT_CB_ID = 0x02U, /*!< Block Transfer */ 00191 HAL_MDMA_XFER_REPBLOCKCPLT_CB_ID = 0x03U, /*!< Repeated Block Transfer */ 00192 HAL_MDMA_XFER_ERROR_CB_ID = 0x04U, /*!< Error */ 00193 HAL_MDMA_XFER_ABORT_CB_ID = 0x05U, /*!< Abort */ 00194 HAL_MDMA_XFER_ALL_CB_ID = 0x06U /*!< All */ 00195 00196 }HAL_MDMA_CallbackIDTypeDef; 00197 00198 00199 /** 00200 * @brief MDMA handle Structure definition 00201 */ 00202 typedef struct __MDMA_HandleTypeDef 00203 { 00204 MDMA_Channel_TypeDef *Instance; /*!< Register base address */ 00205 00206 MDMA_InitTypeDef Init; /*!< MDMA communication parameters */ 00207 00208 HAL_LockTypeDef Lock; /*!< MDMA locking object */ 00209 00210 __IO HAL_MDMA_StateTypeDef State; /*!< MDMA transfer state */ 00211 00212 void *Parent; /*!< Parent object state */ 00213 00214 void (* XferCpltCallback)( struct __MDMA_HandleTypeDef * hmdma); /*!< MDMA transfer complete callback */ 00215 00216 void (* XferBufferCpltCallback)( struct __MDMA_HandleTypeDef * hmdma); /*!< MDMA buffer transfer complete callback */ 00217 00218 void (* XferBlockCpltCallback)( struct __MDMA_HandleTypeDef * hmdma); /*!< MDMA block transfer complete callback */ 00219 00220 void (* XferRepeatBlockCpltCallback)( struct __MDMA_HandleTypeDef * hmdma); /*!< MDMA block transfer repeat callback */ 00221 00222 void (* XferErrorCallback)( struct __MDMA_HandleTypeDef * hmdma); /*!< MDMA transfer error callback */ 00223 00224 void (* XferAbortCallback)( struct __MDMA_HandleTypeDef * hmdma); /*!< MDMA transfer Abort callback */ 00225 00226 00227 MDMA_LinkNodeTypeDef *FirstLinkedListNodeAddress; /*!< specifies the first node address of the transfer list 00228 (after the initial node defined by the Init struct) 00229 this parameter is used internally by the MDMA driver 00230 to construct the linked list node 00231 */ 00232 00233 MDMA_LinkNodeTypeDef *LastLinkedListNodeAddress; /*!< specifies the last node address of the transfer list 00234 this parameter is used internally by the MDMA driver 00235 to construct the linked list node 00236 */ 00237 uint32_t LinkedListNodeCounter; /*!< Number of nodes in the MDMA linked list */ 00238 00239 __IO uint32_t ErrorCode; /*!< MDMA Error code */ 00240 00241 } MDMA_HandleTypeDef; 00242 00243 /** 00244 * @} 00245 */ 00246 00247 /* Exported constants --------------------------------------------------------*/ 00248 00249 /** @defgroup MDMA_Exported_Constants MDMA Exported Constants 00250 * @brief MDMA Exported constants 00251 * @{ 00252 */ 00253 00254 /** @defgroup MDMA_Error_Codes MDMA Error Codes 00255 * @brief MDMA Error Codes 00256 * @{ 00257 */ 00258 #define HAL_MDMA_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */ 00259 #define HAL_MDMA_ERROR_READ_XFER ((uint32_t)0x00000001U) /*!< Read Transfer error */ 00260 #define HAL_MDMA_ERROR_WRITE_XFER ((uint32_t)0x00000002U) /*!< Write Transfer error */ 00261 #define HAL_MDMA_ERROR_MASK_DATA ((uint32_t)0x00000004U) /*!< Error Mask Data error */ 00262 #define HAL_MDMA_ERROR_LINKED_LIST ((uint32_t)0x00000008U) /*!< Linked list Data error */ 00263 #define HAL_MDMA_ERROR_ALIGNMENT ((uint32_t)0x00000010U) /*!< Address/Size alignment error */ 00264 #define HAL_MDMA_ERROR_BLOCK_SIZE ((uint32_t)0x00000020U) /*!< Block Size error */ 00265 #define HAL_MDMA_ERROR_TIMEOUT ((uint32_t)0x00000040U) /*!< Timeout error */ 00266 #define HAL_MDMA_ERROR_NO_XFER ((uint32_t)0x00000080U) /*!< Abort or SW trigger requested with no Xfer ongoing */ 00267 #define HAL_MDMA_ERROR_BUSY ((uint32_t)0x00000100U) /*!< DeInit or SW trigger requested with Xfer ongoing */ 00268 00269 /** 00270 * @} 00271 */ 00272 00273 /** @defgroup MDMA_Request_selection MDMA Request selection 00274 * @brief MDMA_Request_selection 00275 * @{ 00276 */ 00277 00278 #define MDMA_REQUEST_DMA1_Stream0_TC ((uint32_t)0x00000000U) /*!< MDMA HW request is DMA1 Stream 0 Transfer Complete Flag */ 00279 #define MDMA_REQUEST_DMA1_Stream1_TC ((uint32_t)0x00000001U) /*!< MDMA HW request is DMA1 Stream 1 Transfer Complete Flag */ 00280 #define MDMA_REQUEST_DMA1_Stream2_TC ((uint32_t)0x00000002U) /*!< MDMA HW request is DMA1 Stream 2 Transfer Complete Flag */ 00281 #define MDMA_REQUEST_DMA1_Stream3_TC ((uint32_t)0x00000003U) /*!< MDMA HW request is DMA1 Stream 3 Transfer Complete Flag */ 00282 #define MDMA_REQUEST_DMA1_Stream4_TC ((uint32_t)0x00000004U) /*!< MDMA HW request is DMA1 Stream 4 Transfer Complete Flag */ 00283 #define MDMA_REQUEST_DMA1_Stream5_TC ((uint32_t)0x00000005U) /*!< MDMA HW request is DMA1 Stream 5 Transfer Complete Flag */ 00284 #define MDMA_REQUEST_DMA1_Stream6_TC ((uint32_t)0x00000006U) /*!< MDMA HW request is DMA1 Stream 6 Transfer Complete Flag */ 00285 #define MDMA_REQUEST_DMA1_Stream7_TC ((uint32_t)0x00000007U) /*!< MDMA HW request is DMA1 Stream 7 Transfer Complete Flag */ 00286 #define MDMA_REQUEST_DMA2_Stream0_TC ((uint32_t)0x00000008U) /*!< MDMA HW request is DMA2 Stream 0 Transfer Complete Flag */ 00287 #define MDMA_REQUEST_DMA2_Stream1_TC ((uint32_t)0x00000009U) /*!< MDMA HW request is DMA2 Stream 1 Transfer Complete Flag */ 00288 #define MDMA_REQUEST_DMA2_Stream2_TC ((uint32_t)0x0000000AU) /*!< MDMA HW request is DMA2 Stream 2 Transfer Complete Flag */ 00289 #define MDMA_REQUEST_DMA2_Stream3_TC ((uint32_t)0x0000000BU) /*!< MDMA HW request is DMA2 Stream 3 Transfer Complete Flag */ 00290 #define MDMA_REQUEST_DMA2_Stream4_TC ((uint32_t)0x0000000CU) /*!< MDMA HW request is DMA2 Stream 4 Transfer Complete Flag */ 00291 #define MDMA_REQUEST_DMA2_Stream5_TC ((uint32_t)0x0000000DU) /*!< MDMA HW request is DMA2 Stream 5 Transfer Complete Flag */ 00292 #define MDMA_REQUEST_DMA2_Stream6_TC ((uint32_t)0x0000000EU) /*!< MDMA HW request is DMA2 Stream 6 Transfer Complete Flag */ 00293 #define MDMA_REQUEST_DMA2_Stream7_TC ((uint32_t)0x0000000FU) /*!< MDMA HW request is DMA2 Stream 7 Transfer Complete Flag */ 00294 #if defined (LTDC) 00295 #define MDMA_REQUEST_LTDC_LINE_IT ((uint32_t)0x00000010U) /*!< MDMA HW request is LTDC Line interrupt Flag */ 00296 #endif /* LTDC */ 00297 #if defined (JPEG) 00298 #define MDMA_REQUEST_JPEG_INFIFO_TH ((uint32_t)0x00000011U) /*!< MDMA HW request is JPEG Input FIFO threshold Flag */ 00299 #define MDMA_REQUEST_JPEG_INFIFO_NF ((uint32_t)0x00000012U) /*!< MDMA HW request is JPEG Input FIFO not full Flag */ 00300 #define MDMA_REQUEST_JPEG_OUTFIFO_TH ((uint32_t)0x00000013U) /*!< MDMA HW request is JPEG Output FIFO threshold Flag */ 00301 #define MDMA_REQUEST_JPEG_OUTFIFO_NE ((uint32_t)0x00000014U) /*!< MDMA HW request is JPEG Output FIFO not empty Flag */ 00302 #define MDMA_REQUEST_JPEG_END_CONVERSION ((uint32_t)0x00000015U) /*!< MDMA HW request is JPEG End of conversion Flag */ 00303 #endif /* JPEG */ 00304 #if defined (OCTOSPI1) 00305 #define MDMA_REQUEST_OCTOSPI1_FIFO_TH ((uint32_t)0x00000016U) /*!< MDMA HW request is OCTOSPI1 FIFO threshold Flag */ 00306 #define MDMA_REQUEST_OCTOSPI1_TC ((uint32_t)0x00000017U) /*!< MDMA HW request is OCTOSPI1 Transfer complete Flag */ 00307 #endif /* OCTOSPI1 */ 00308 #if defined (QUADSPI) 00309 #define MDMA_REQUEST_QUADSPI_FIFO_TH ((uint32_t)0x00000016U) /*!< MDMA HW request is QSPI FIFO threshold Flag */ 00310 #define MDMA_REQUEST_QUADSPI_TC ((uint32_t)0x00000017U) /*!< MDMA HW request is QSPI Transfer complete Flag */ 00311 #endif /* QUADSPI */ 00312 #define MDMA_REQUEST_DMA2D_CLUT_TC ((uint32_t)0x00000018U) /*!< MDMA HW request is DMA2D CLUT Transfer Complete Flag */ 00313 #define MDMA_REQUEST_DMA2D_TC ((uint32_t)0x00000019U) /*!< MDMA HW request is DMA2D Transfer Complete Flag */ 00314 #define MDMA_REQUEST_DMA2D_TW ((uint32_t)0x0000001AU) /*!< MDMA HW request is DMA2D Transfer Watermark Flag */ 00315 00316 #if defined (DSI) 00317 #define MDMA_REQUEST_DSI_TEARING_EFFECT ((uint32_t)0x0000001BU) /*!< MDMA HW request is DSI Tearing Effect Flag */ 00318 #define MDMA_REQUEST_DSI_END_REFRESH ((uint32_t)0x0000001CU) /*!< MDMA HW request is DSI End of refresh Flag */ 00319 #endif /* DSI */ 00320 00321 #define MDMA_REQUEST_SDMMC1_END_DATA ((uint32_t)0x0000001DU) /*!< MDMA HW request is SDMMC1 End of Data Flag */ 00322 00323 #define MDMA_REQUEST_SDMMC1_DMA_ENDBUFFER ((uint32_t)0x0000001EU) /*!< MDMA HW request is SDMMC1 Internal DMA buffer End Flag */ 00324 #define MDMA_REQUEST_SDMMC1_COMMAND_END ((uint32_t)0x0000001FU) /*!< MDMA HW request is SDMMC1 Command End Flag */ 00325 00326 #if defined (OCTOSPI2) 00327 #define MDMA_REQUEST_OCTOSPI2_FIFO_TH ((uint32_t)0x00000020U) /*!< MDMA HW request is OCTOSPI2 FIFO threshold Flag */ 00328 #define MDMA_REQUEST_OCTOSPI2_TC ((uint32_t)0x00000021U) /*!< MDMA HW request is OCTOSPI2 Transfer complete Flag */ 00329 #endif /* OCTOSPI2 */ 00330 00331 #define MDMA_REQUEST_SW ((uint32_t)0x40000000U) /*!< MDMA SW request */ 00332 00333 /** 00334 * @} 00335 */ 00336 00337 /** @defgroup MDMA_Transfer_TriggerMode MDMA Transfer Trigger Mode 00338 * @brief MDMA Transfer Trigger Mode 00339 * @{ 00340 */ 00341 #define MDMA_BUFFER_TRANSFER ((uint32_t)0x00000000U) /*!< Each MDMA request (SW or HW) triggers a buffer transfer */ 00342 #define MDMA_BLOCK_TRANSFER ((uint32_t)MDMA_CTCR_TRGM_0) /*!< Each MDMA request (SW or HW) triggers a block transfer */ 00343 #define MDMA_REPEAT_BLOCK_TRANSFER ((uint32_t)MDMA_CTCR_TRGM_1) /*!< Each MDMA request (SW or HW) triggers a repeated block transfer */ 00344 #define MDMA_FULL_TRANSFER ((uint32_t)MDMA_CTCR_TRGM) /*!< Each MDMA request (SW or HW) triggers a Full transfer or a linked list transfer if any */ 00345 00346 /** 00347 * @} 00348 */ 00349 00350 /** @defgroup MDMA_Priority_level MDMA Priority level 00351 * @brief MDMA Priority level 00352 * @{ 00353 */ 00354 #define MDMA_PRIORITY_LOW ((uint32_t)0x00000000U) /*!< Priority level: Low */ 00355 #define MDMA_PRIORITY_MEDIUM ((uint32_t)MDMA_CCR_PL_0) /*!< Priority level: Medium */ 00356 #define MDMA_PRIORITY_HIGH ((uint32_t)MDMA_CCR_PL_1) /*!< Priority level: High */ 00357 #define MDMA_PRIORITY_VERY_HIGH ((uint32_t)MDMA_CCR_PL) /*!< Priority level: Very High */ 00358 00359 /** 00360 * @} 00361 */ 00362 00363 00364 /** @defgroup MDMA_Endianness MDMA Endianness 00365 * @brief MDMA Endianness 00366 * @{ 00367 */ 00368 #define MDMA_LITTLE_ENDIANNESS_PRESERVE ((uint32_t)0x00000000U) /*!< little endianness preserve */ 00369 #define MDMA_LITTLE_BYTE_ENDIANNESS_EXCHANGE ((uint32_t)MDMA_CCR_BEX) /*!< BYTEs endianness exchange when destination data size is > Byte */ 00370 #define MDMA_LITTLE_HALFWORD_ENDIANNESS_EXCHANGE ((uint32_t)MDMA_CCR_HEX) /*!< HALF WORDs endianness exchange when destination data size is > HALF WORD */ 00371 #define MDMA_LITTLE_WORD_ENDIANNESS_EXCHANGE ((uint32_t)MDMA_CCR_WEX) /*!< WORDs endianness exchange when destination data size is > DOUBLE WORD */ 00372 00373 /** 00374 * @} 00375 */ 00376 00377 /** @defgroup MDMA_Source_increment_mode MDMA Source increment mode 00378 * @brief MDMA Source increment mode 00379 * @{ 00380 */ 00381 #define MDMA_SRC_INC_DISABLE ((uint32_t)0x00000000U) /*!< Source address pointer is fixed */ 00382 #define MDMA_SRC_INC_BYTE ((uint32_t)MDMA_CTCR_SINC_1) /*!< Source address pointer is incremented by a BYTE (8 bits) */ 00383 #define MDMA_SRC_INC_HALFWORD ((uint32_t)MDMA_CTCR_SINC_1 | (uint32_t)MDMA_CTCR_SINCOS_0) /*!< Source address pointer is incremented by a half Word (16 bits) */ 00384 #define MDMA_SRC_INC_WORD ((uint32_t)MDMA_CTCR_SINC_1 | (uint32_t)MDMA_CTCR_SINCOS_1) /*!< Source address pointer is incremented by a Word (32 bits) */ 00385 #define MDMA_SRC_INC_DOUBLEWORD ((uint32_t)MDMA_CTCR_SINC_1 | (uint32_t)MDMA_CTCR_SINCOS) /*!< Source address pointer is incremented by a double Word (64 bits)) */ 00386 #define MDMA_SRC_DEC_BYTE ((uint32_t)MDMA_CTCR_SINC) /*!< Source address pointer is decremented by a BYTE (8 bits) */ 00387 #define MDMA_SRC_DEC_HALFWORD ((uint32_t)MDMA_CTCR_SINC | (uint32_t)MDMA_CTCR_SINCOS_0) /*!< Source address pointer is decremented by a half Word (16 bits) */ 00388 #define MDMA_SRC_DEC_WORD ((uint32_t)MDMA_CTCR_SINC | (uint32_t)MDMA_CTCR_SINCOS_1) /*!< Source address pointer is decremented by a Word (32 bits) */ 00389 #define MDMA_SRC_DEC_DOUBLEWORD ((uint32_t)MDMA_CTCR_SINC | (uint32_t)MDMA_CTCR_SINCOS) /*!< Source address pointer is decremented by a double Word (64 bits)) */ 00390 00391 /** 00392 * @} 00393 */ 00394 00395 /** @defgroup MDMA_Destination_increment_mode MDMA Destination increment mode 00396 * @brief MDMA Destination increment mode 00397 * @{ 00398 */ 00399 #define MDMA_DEST_INC_DISABLE ((uint32_t)0x00000000U) /*!< Source address pointer is fixed */ 00400 #define MDMA_DEST_INC_BYTE ((uint32_t)MDMA_CTCR_DINC_1) /*!< Source address pointer is incremented by a BYTE (8 bits) */ 00401 #define MDMA_DEST_INC_HALFWORD ((uint32_t)MDMA_CTCR_DINC_1 | (uint32_t)MDMA_CTCR_DINCOS_0) /*!< Source address pointer is incremented by a half Word (16 bits) */ 00402 #define MDMA_DEST_INC_WORD ((uint32_t)MDMA_CTCR_DINC_1 | (uint32_t)MDMA_CTCR_DINCOS_1) /*!< Source address pointer is incremented by a Word (32 bits) */ 00403 #define MDMA_DEST_INC_DOUBLEWORD ((uint32_t)MDMA_CTCR_DINC_1 | (uint32_t)MDMA_CTCR_DINCOS) /*!< Source address pointer is incremented by a double Word (64 bits)) */ 00404 #define MDMA_DEST_DEC_BYTE ((uint32_t)MDMA_CTCR_DINC) /*!< Source address pointer is decremented by a BYTE (8 bits) */ 00405 #define MDMA_DEST_DEC_HALFWORD ((uint32_t)MDMA_CTCR_DINC | (uint32_t)MDMA_CTCR_DINCOS_0) /*!< Source address pointer is decremented by a half Word (16 bits) */ 00406 #define MDMA_DEST_DEC_WORD ((uint32_t)MDMA_CTCR_DINC | (uint32_t)MDMA_CTCR_DINCOS_1) /*!< Source address pointer is decremented by a Word (32 bits) */ 00407 #define MDMA_DEST_DEC_DOUBLEWORD ((uint32_t)MDMA_CTCR_DINC | (uint32_t)MDMA_CTCR_DINCOS) /*!< Source address pointer is decremented by a double Word (64 bits)) */ 00408 00409 /** 00410 * @} 00411 */ 00412 00413 /** @defgroup MDMA_Source_data_size MDMA Source data size 00414 * @brief MDMA Source data size 00415 * @{ 00416 */ 00417 #define MDMA_SRC_DATASIZE_BYTE ((uint32_t)0x00000000U) /*!< Source data size is Byte */ 00418 #define MDMA_SRC_DATASIZE_HALFWORD ((uint32_t)MDMA_CTCR_SSIZE_0) /*!< Source data size is half word */ 00419 #define MDMA_SRC_DATASIZE_WORD ((uint32_t)MDMA_CTCR_SSIZE_1) /*!< Source data size is word */ 00420 #define MDMA_SRC_DATASIZE_DOUBLEWORD ((uint32_t)MDMA_CTCR_SSIZE) /*!< Source data size is double word */ 00421 00422 /** 00423 * @} 00424 */ 00425 00426 /** @defgroup MDMA_Destination_data_size MDMA Destination data size 00427 * @brief MDMA Destination data size 00428 * @{ 00429 */ 00430 #define MDMA_DEST_DATASIZE_BYTE ((uint32_t)0x00000000U) /*!< Destination data size is Byte */ 00431 #define MDMA_DEST_DATASIZE_HALFWORD ((uint32_t)MDMA_CTCR_DSIZE_0) /*!< Destination data size is half word */ 00432 #define MDMA_DEST_DATASIZE_WORD ((uint32_t)MDMA_CTCR_DSIZE_1) /*!< Destination data size is word */ 00433 #define MDMA_DEST_DATASIZE_DOUBLEWORD ((uint32_t)MDMA_CTCR_DSIZE) /*!< Destination data size is double word */ 00434 00435 /** 00436 * @} 00437 */ 00438 00439 /** @defgroup MDMA_data_Alignment MDMA data alignment 00440 * @brief MDMA data alignment 00441 * @{ 00442 */ 00443 #define MDMA_DATAALIGN_PACKENABLE ((uint32_t)MDMA_CTCR_PKE) /*!< The source data is packed/un-packed into the destination data size 00444 All data are right aligned, in Little Endien mode. */ 00445 #define MDMA_DATAALIGN_RIGHT ((uint32_t)0x00000000U) /*!< Right Aligned, padded w/ 0s (default) */ 00446 #define MDMA_DATAALIGN_RIGHT_SIGNED ((uint32_t)MDMA_CTCR_PAM_0) /*!< Right Aligned, Sign extended , 00447 Note : this mode is allowed only if the Source data size is smaller than Destination data size */ 00448 #define MDMA_DATAALIGN_LEFT ((uint32_t)MDMA_CTCR_PAM_1) /*!< Left Aligned (padded with 0s) */ 00449 00450 /** 00451 * @} 00452 */ 00453 00454 /** @defgroup MDMA_Source_burst MDMA Source burst 00455 * @brief MDMA Source burst 00456 * @{ 00457 */ 00458 #define MDMA_SOURCE_BURST_SINGLE ((uint32_t)0x00000000U) /*!< single transfer */ 00459 #define MDMA_SOURCE_BURST_2BEATS ((uint32_t)MDMA_CTCR_SBURST_0) /*!< Burst 2 beats */ 00460 #define MDMA_SOURCE_BURST_4BEATS ((uint32_t)MDMA_CTCR_SBURST_1) /*!< Burst 4 beats */ 00461 #define MDMA_SOURCE_BURST_8BEATS ((uint32_t)MDMA_CTCR_SBURST_0 | (uint32_t)MDMA_CTCR_SBURST_1) /*!< Burst 8 beats */ 00462 #define MDMA_SOURCE_BURST_16BEATS ((uint32_t)MDMA_CTCR_SBURST_2) /*!< Burst 16 beats */ 00463 #define MDMA_SOURCE_BURST_32BEATS ((uint32_t)MDMA_CTCR_SBURST_0 | (uint32_t)MDMA_CTCR_SBURST_2) /*!< Burst 32 beats */ 00464 #define MDMA_SOURCE_BURST_64BEATS ((uint32_t)MDMA_CTCR_SBURST_1 | (uint32_t)MDMA_CTCR_SBURST_2) /*!< Burst 64 beats */ 00465 #define MDMA_SOURCE_BURST_128BEATS ((uint32_t)MDMA_CTCR_SBURST) /*!< Burst 128 beats */ 00466 00467 /** 00468 * @} 00469 */ 00470 00471 /** @defgroup MDMA_Destination_burst MDMA Destination burst 00472 * @brief MDMA Destination burst 00473 * @{ 00474 */ 00475 #define MDMA_DEST_BURST_SINGLE ((uint32_t)0x00000000U) /*!< single transfer */ 00476 #define MDMA_DEST_BURST_2BEATS ((uint32_t)MDMA_CTCR_DBURST_0) /*!< Burst 2 beats */ 00477 #define MDMA_DEST_BURST_4BEATS ((uint32_t)MDMA_CTCR_DBURST_1) /*!< Burst 4 beats */ 00478 #define MDMA_DEST_BURST_8BEATS ((uint32_t)MDMA_CTCR_DBURST_0 | (uint32_t)MDMA_CTCR_DBURST_1) /*!< Burst 8 beats */ 00479 #define MDMA_DEST_BURST_16BEATS ((uint32_t)MDMA_CTCR_DBURST_2) /*!< Burst 16 beats */ 00480 #define MDMA_DEST_BURST_32BEATS ((uint32_t)MDMA_CTCR_DBURST_0 | (uint32_t)MDMA_CTCR_DBURST_2) /*!< Burst 32 beats */ 00481 #define MDMA_DEST_BURST_64BEATS ((uint32_t)MDMA_CTCR_DBURST_1 | (uint32_t)MDMA_CTCR_DBURST_2) /*!< Burst 64 beats */ 00482 #define MDMA_DEST_BURST_128BEATS ((uint32_t)MDMA_CTCR_DBURST) /*!< Burst 128 beats */ 00483 00484 /** 00485 * @} 00486 */ 00487 00488 /** @defgroup MDMA_interrupt_enable_definitions MDMA interrupt enable definitions 00489 * @brief MDMA interrupt enable definitions 00490 * @{ 00491 */ 00492 #define MDMA_IT_TE ((uint32_t)MDMA_CCR_TEIE) /*!< Transfer Error interrupt */ 00493 #define MDMA_IT_CTC ((uint32_t)MDMA_CCR_CTCIE) /*!< Channel Transfer Complete interrupt */ 00494 #define MDMA_IT_BRT ((uint32_t)MDMA_CCR_BRTIE) /*!< Block Repeat Transfer interrupt */ 00495 #define MDMA_IT_BT ((uint32_t)MDMA_CCR_BTIE) /*!< Block Transfer interrupt */ 00496 #define MDMA_IT_BFTC ((uint32_t)MDMA_CCR_TCIE) /*!< Buffer Transfer Complete interrupt */ 00497 00498 /** 00499 * @} 00500 */ 00501 00502 /** @defgroup MDMA_flag_definitions MDMA flag definitions 00503 * @brief MDMA flag definitions 00504 * @{ 00505 */ 00506 #define MDMA_FLAG_TE ((uint32_t)MDMA_CISR_TEIF) /*!< Transfer Error flag */ 00507 #define MDMA_FLAG_CTC ((uint32_t)MDMA_CISR_CTCIF) /*!< Channel Transfer Complete flag */ 00508 #define MDMA_FLAG_BRT ((uint32_t)MDMA_CISR_BRTIF) /*!< Block Repeat Transfer complete flag */ 00509 #define MDMA_FLAG_BT ((uint32_t)MDMA_CISR_BTIF) /*!< Block Transfer complete flag */ 00510 #define MDMA_FLAG_BFTC ((uint32_t)MDMA_CISR_TCIF) /*!< BuFfer Transfer complete flag */ 00511 #define MDMA_FLAG_CRQA ((uint32_t)MDMA_CISR_CRQA) /*!< Channel request Active flag */ 00512 00513 /** 00514 * @} 00515 */ 00516 00517 /** 00518 * @} 00519 */ 00520 00521 /* Exported macro ------------------------------------------------------------*/ 00522 00523 /** @defgroup MDMA_Exported_Macros MDMA Exported Macros 00524 * @{ 00525 */ 00526 00527 /** 00528 * @brief Enable the specified MDMA Channel. 00529 * @param __HANDLE__: MDMA handle 00530 * @retval None 00531 */ 00532 #define __HAL_MDMA_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CCR |= MDMA_CCR_EN) 00533 00534 /** 00535 * @brief Disable the specified MDMA Channel. 00536 * @param __HANDLE__: MDMA handle 00537 * @retval None 00538 */ 00539 #define __HAL_MDMA_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CCR &= ~MDMA_CCR_EN) 00540 00541 /** 00542 * @brief Get the MDMA Channel pending flags. 00543 * @param __HANDLE__: MDMA handle 00544 * @param __FLAG__: Get the specified flag. 00545 * This parameter can be any combination of the following values: 00546 * @arg MDMA_FLAG_TE : Transfer Error flag. 00547 * @arg MDMA_FLAG_CTC : Channel Transfer Complete flag. 00548 * @arg MDMA_FLAG_BRT : Block Repeat Transfer flag. 00549 * @arg MDMA_FLAG_BT : Block Transfer complete flag. 00550 * @arg MDMA_FLAG_BFTC : BuFfer Transfer Complete flag. 00551 * @arg MDMA_FLAG_CRQA : Channel request Active flag. 00552 * @retval The state of FLAG (SET or RESET). 00553 */ 00554 #define __HAL_MDMA_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->CISR & (__FLAG__)) 00555 00556 /** 00557 * @brief Clear the MDMA Stream pending flags. 00558 * @param __HANDLE__: MDMA handle 00559 * @param __FLAG__: specifies the flag to clear. 00560 * This parameter can be any combination of the following values: 00561 * @arg MDMA_FLAG_TE : Transfer Error flag. 00562 * @arg MDMA_FLAG_CTC : Channel Transfer Complete flag. 00563 * @arg MDMA_FLAG_BRT : Block Repeat Transfer flag. 00564 * @arg MDMA_FLAG_BT : Block Transfer complete flag. 00565 * @arg MDMA_FLAG_BFTC : BuFfer Transfer Complete flag. 00566 * @retval None 00567 */ 00568 #define __HAL_MDMA_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->CIFCR = (__FLAG__)) 00569 00570 /** 00571 * @brief Enables the specified MDMA Channel interrupts. 00572 * @param __HANDLE__: MDMA handle 00573 * @param __INTERRUPT__: specifies the DMA interrupt sources to be enabled or disabled. 00574 * This parameter can be any combination of the following values: 00575 * @arg MDMA_IT_TE : Transfer Error interrupt mask 00576 * @arg MDMA_IT_CTC : Channel Transfer Complete interrupt mask 00577 * @arg MDMA_IT_BRT : Block Repeat Transfer interrupt mask 00578 * @arg MDMA_IT_BT : Block Transfer interrupt mask 00579 * @arg MDMA_IT_BFTC : BuFfer Transfer Complete interrupt mask 00580 * @retval None 00581 */ 00582 #define __HAL_MDMA_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CCR |= (__INTERRUPT__)) 00583 00584 /** 00585 * @brief Disables the specified MDMA Channel interrupts. 00586 * @param __HANDLE__: MDMA handle 00587 * @param __INTERRUPT__: specifies the MDMA interrupt sources to be enabled or disabled. 00588 * This parameter can be any combination of the following values: 00589 * @arg MDMA_IT_TE : Transfer Error interrupt mask 00590 * @arg MDMA_IT_CTC : Channel Transfer Complete interrupt mask 00591 * @arg MDMA_IT_BRT : Block Repeat Transfer interrupt mask 00592 * @arg MDMA_IT_BT : Block Transfer interrupt mask 00593 * @arg MDMA_IT_BFTC : BuFfer Transfer Complete interrupt mask 00594 * @retval None 00595 */ 00596 #define __HAL_MDMA_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CCR &= ~(__INTERRUPT__)) 00597 00598 /** 00599 * @brief Checks whether the specified MDMA Channel interrupt is enabled or not. 00600 * @param __HANDLE__: MDMA handle 00601 * @param __INTERRUPT__: specifies the MDMA interrupt source to check. 00602 * @arg MDMA_IT_TE : Transfer Error interrupt mask 00603 * @arg MDMA_IT_CTC : Channel Transfer Complete interrupt mask 00604 * @arg MDMA_IT_BRT : Block Repeat Transfer interrupt mask 00605 * @arg MDMA_IT_BT : Block Transfer interrupt mask 00606 * @arg MDMA_IT_BFTC : BuFfer Transfer Complete interrupt mask 00607 * @retval The state of MDMA_IT (SET or RESET). 00608 */ 00609 #define __HAL_MDMA_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CCR & (__INTERRUPT__))) 00610 00611 /** 00612 * @brief Writes the number of data in bytes to be transferred on the MDMA Channelx. 00613 * @param __HANDLE__ : MDMA handle 00614 * @param __COUNTER__: Number of data in bytes to be transferred. 00615 * @retval None 00616 */ 00617 #define __HAL_MDMA_SET_COUNTER(__HANDLE__, __COUNTER__) ((__HANDLE__)->Instance->CBNDTR |= ((__COUNTER__) & MDMA_CBNDTR_BNDT)) 00618 00619 /** 00620 * @brief Returns the number of remaining data in bytes in the current MDMA Channelx transfer. 00621 * @param __HANDLE__ : MDMA handle 00622 * @retval The number of remaining data in bytes in the current MDMA Channelx transfer. 00623 */ 00624 #define __HAL_MDMA_GET_COUNTER(__HANDLE__) ((__HANDLE__)->Instance->CBNDTR & MDMA_CBNDTR_BNDT) 00625 00626 /** 00627 * @} 00628 */ 00629 00630 /* Exported functions --------------------------------------------------------*/ 00631 /** @defgroup MDMA_Exported_Functions MDMA Exported Functions 00632 * @{ 00633 */ 00634 00635 /* Initialization and de-initialization functions *****************************/ 00636 /** @defgroup MDMA_Exported_Functions_Group1 Initialization and de-initialization functions 00637 * @brief Initialization and de-initialization functions 00638 * @{ 00639 */ 00640 HAL_StatusTypeDef HAL_MDMA_Init(MDMA_HandleTypeDef *hmdma); 00641 HAL_StatusTypeDef HAL_MDMA_DeInit (MDMA_HandleTypeDef *hmdma); 00642 HAL_StatusTypeDef HAL_MDMA_ConfigPostRequestMask(MDMA_HandleTypeDef *hmdma, uint32_t MaskAddress, uint32_t MaskData); 00643 00644 HAL_StatusTypeDef HAL_MDMA_RegisterCallback(MDMA_HandleTypeDef *hmdma, HAL_MDMA_CallbackIDTypeDef CallbackID, void (* pCallback)(MDMA_HandleTypeDef *_hmdma)); 00645 HAL_StatusTypeDef HAL_MDMA_UnRegisterCallback(MDMA_HandleTypeDef *hmdma, HAL_MDMA_CallbackIDTypeDef CallbackID); 00646 00647 /** 00648 * @} 00649 */ 00650 00651 /* Linked list operation functions ********************************************/ 00652 /** @defgroup MDMA_Exported_Functions_Group2 Linked List operation functions 00653 * @brief Linked list operation functions 00654 * @{ 00655 */ 00656 00657 HAL_StatusTypeDef HAL_MDMA_LinkedList_CreateNode(MDMA_LinkNodeTypeDef *pNode, MDMA_LinkNodeConfTypeDef *pNodeConfig); 00658 HAL_StatusTypeDef HAL_MDMA_LinkedList_AddNode(MDMA_HandleTypeDef *hmdma, MDMA_LinkNodeTypeDef *pNewNode, MDMA_LinkNodeTypeDef *pPrevNode); 00659 HAL_StatusTypeDef HAL_MDMA_LinkedList_RemoveNode(MDMA_HandleTypeDef *hmdma, MDMA_LinkNodeTypeDef *pNode); 00660 HAL_StatusTypeDef HAL_MDMA_LinkedList_EnableCircularMode(MDMA_HandleTypeDef *hmdma); 00661 HAL_StatusTypeDef HAL_MDMA_LinkedList_DisableCircularMode(MDMA_HandleTypeDef *hmdma); 00662 00663 00664 /** 00665 * @} 00666 */ 00667 00668 /* IO operation functions *****************************************************/ 00669 /** @defgroup MDMA_Exported_Functions_Group3 I/O operation functions 00670 * @brief I/O operation functions 00671 * @{ 00672 */ 00673 HAL_StatusTypeDef HAL_MDMA_Start (MDMA_HandleTypeDef *hmdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t BlockDataLength, uint32_t BlockCount); 00674 HAL_StatusTypeDef HAL_MDMA_Start_IT(MDMA_HandleTypeDef *hmdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t BlockDataLength, uint32_t BlockCount); 00675 HAL_StatusTypeDef HAL_MDMA_Abort(MDMA_HandleTypeDef *hmdma); 00676 HAL_StatusTypeDef HAL_MDMA_Abort_IT(MDMA_HandleTypeDef *hmdma); 00677 HAL_StatusTypeDef HAL_MDMA_PollForTransfer(MDMA_HandleTypeDef *hmdma, HAL_MDMA_LevelCompleteTypeDef CompleteLevel, uint32_t Timeout); 00678 HAL_StatusTypeDef HAL_MDMA_GenerateSWRequest(MDMA_HandleTypeDef *hmdma); 00679 void HAL_MDMA_IRQHandler(MDMA_HandleTypeDef *hmdma); 00680 00681 /** 00682 * @} 00683 */ 00684 00685 /* Peripheral State and Error functions ***************************************/ 00686 /** @defgroup MDMA_Exported_Functions_Group4 Peripheral State functions 00687 * @brief Peripheral State functions 00688 * @{ 00689 */ 00690 HAL_MDMA_StateTypeDef HAL_MDMA_GetState(MDMA_HandleTypeDef *hmdma); 00691 uint32_t HAL_MDMA_GetError(MDMA_HandleTypeDef *hmdma); 00692 00693 /** 00694 * @} 00695 */ 00696 00697 /** 00698 * @} 00699 */ 00700 00701 /* Private types -------------------------------------------------------------*/ 00702 /** @defgroup MDMA_Private_Types MDMA Private Types 00703 * @{ 00704 */ 00705 00706 /** 00707 * @} 00708 */ 00709 00710 /* Private defines -----------------------------------------------------------*/ 00711 /** @defgroup MDMA_Private_Defines MDMA Private Defines 00712 * @{ 00713 */ 00714 00715 /** 00716 * @} 00717 */ 00718 00719 /* Private variables ---------------------------------------------------------*/ 00720 /** @defgroup MDMA_Private_Variables MDMA Private Variables 00721 * @{ 00722 */ 00723 00724 /** 00725 * @} 00726 */ 00727 00728 /* Private constants ---------------------------------------------------------*/ 00729 /** @defgroup MDMA_Private_Constants MDMA Private Constants 00730 * @{ 00731 */ 00732 00733 /** 00734 * @} 00735 */ 00736 00737 /* Private macros ------------------------------------------------------------*/ 00738 /** @defgroup MDMA_Private_Macros MDMA Private Macros 00739 * @{ 00740 */ 00741 00742 #define IS_MDMA_LEVEL_COMPLETE(__LEVEL__) (((__LEVEL__) == HAL_MDMA_FULL_TRANSFER ) || \ 00743 ((__LEVEL__) == HAL_MDMA_BUFFER_TRANSFER )|| \ 00744 ((__LEVEL__) == HAL_MDMA_BLOCK_TRANSFER ) || \ 00745 ((__LEVEL__) == HAL_MDMA_REPEAT_BLOCK_TRANSFER )) 00746 00747 00748 #define IS_MDMA_PRIORITY(__PRIORITY__) (((__PRIORITY__) == MDMA_PRIORITY_LOW ) || \ 00749 ((__PRIORITY__) == MDMA_PRIORITY_MEDIUM) || \ 00750 ((__PRIORITY__) == MDMA_PRIORITY_HIGH) || \ 00751 ((__PRIORITY__) == MDMA_PRIORITY_VERY_HIGH)) 00752 00753 #define IS_MDMA_ENDIANNESS_MODE(__ENDIANNESS__) (((__ENDIANNESS__) == MDMA_LITTLE_ENDIANNESS_PRESERVE ) || \ 00754 ((__ENDIANNESS__) == MDMA_LITTLE_BYTE_ENDIANNESS_EXCHANGE) || \ 00755 ((__ENDIANNESS__) == MDMA_LITTLE_HALFWORD_ENDIANNESS_EXCHANGE) || \ 00756 ((__ENDIANNESS__) == MDMA_LITTLE_WORD_ENDIANNESS_EXCHANGE)) 00757 00758 00759 #if defined (OCTOSPI2) 00760 #define IS_MDMA_REQUEST(__REQUEST__) (((__REQUEST__) == MDMA_REQUEST_SW ) || ((__REQUEST__) <= MDMA_REQUEST_OCTOSPI2_TC)) 00761 #else 00762 #define IS_MDMA_REQUEST(__REQUEST__) (((__REQUEST__) == MDMA_REQUEST_SW ) || ((__REQUEST__) <= MDMA_REQUEST_SDMMC1_COMMAND_END)) 00763 #endif /* OCTOSPI2 */ 00764 00765 #define IS_MDMA_SOURCE_INC(__INC__) (((__INC__) == MDMA_SRC_INC_DISABLE ) || \ 00766 ((__INC__) == MDMA_SRC_INC_BYTE ) || \ 00767 ((__INC__) == MDMA_SRC_INC_HALFWORD ) || \ 00768 ((__INC__) == MDMA_SRC_INC_WORD ) || \ 00769 ((__INC__) == MDMA_SRC_INC_DOUBLEWORD) || \ 00770 ((__INC__) == MDMA_SRC_DEC_BYTE) || \ 00771 ((__INC__) == MDMA_SRC_DEC_HALFWORD) || \ 00772 ((__INC__) == MDMA_SRC_DEC_WORD) || \ 00773 ((__INC__) == MDMA_SRC_DEC_DOUBLEWORD)) 00774 00775 #define IS_MDMA_DESTINATION_INC(__INC__) (((__INC__) == MDMA_DEST_INC_DISABLE ) || \ 00776 ((__INC__) == MDMA_DEST_INC_BYTE ) || \ 00777 ((__INC__) == MDMA_DEST_INC_HALFWORD ) || \ 00778 ((__INC__) == MDMA_DEST_INC_WORD ) || \ 00779 ((__INC__) == MDMA_DEST_INC_DOUBLEWORD) || \ 00780 ((__INC__) == MDMA_DEST_DEC_BYTE) || \ 00781 ((__INC__) == MDMA_DEST_DEC_HALFWORD) || \ 00782 ((__INC__) == MDMA_DEST_DEC_WORD) || \ 00783 ((__INC__) == MDMA_DEST_DEC_DOUBLEWORD)) 00784 00785 #define IS_MDMA_SOURCE_DATASIZE(__SIZE__) (((__SIZE__) == MDMA_SRC_DATASIZE_BYTE ) || \ 00786 ((__SIZE__) == MDMA_SRC_DATASIZE_HALFWORD ) || \ 00787 ((__SIZE__) == MDMA_SRC_DATASIZE_WORD ) || \ 00788 ((__SIZE__) == MDMA_SRC_DATASIZE_DOUBLEWORD)) 00789 00790 #define IS_MDMA_DESTINATION_DATASIZE(__SIZE__) (((__SIZE__) == MDMA_DEST_DATASIZE_BYTE ) || \ 00791 ((__SIZE__) == MDMA_DEST_DATASIZE_HALFWORD ) || \ 00792 ((__SIZE__) == MDMA_DEST_DATASIZE_WORD ) || \ 00793 ((__SIZE__) == MDMA_DEST_DATASIZE_DOUBLEWORD)) 00794 00795 #define IS_MDMA_DATA_ALIGNMENT(__ALIGNMENT__) (((__ALIGNMENT__) == MDMA_DATAALIGN_PACKENABLE ) || \ 00796 ((__ALIGNMENT__) == MDMA_DATAALIGN_RIGHT ) || \ 00797 ((__ALIGNMENT__) == MDMA_DATAALIGN_RIGHT_SIGNED ) || \ 00798 ((__ALIGNMENT__) == MDMA_DATAALIGN_LEFT)) 00799 00800 00801 #define IS_MDMA_SOURCE_BURST(__BURST__) (((__BURST__) == MDMA_SOURCE_BURST_SINGLE ) || \ 00802 ((__BURST__) == MDMA_SOURCE_BURST_2BEATS ) || \ 00803 ((__BURST__) == MDMA_SOURCE_BURST_4BEATS ) || \ 00804 ((__BURST__) == MDMA_SOURCE_BURST_8BEATS) || \ 00805 ((__BURST__) == MDMA_SOURCE_BURST_16BEATS) || \ 00806 ((__BURST__) == MDMA_SOURCE_BURST_32BEATS) || \ 00807 ((__BURST__) == MDMA_SOURCE_BURST_64BEATS) || \ 00808 ((__BURST__) == MDMA_SOURCE_BURST_128BEATS)) 00809 00810 00811 #define IS_MDMA_DESTINATION_BURST(__BURST__) (((__BURST__) == MDMA_DEST_BURST_SINGLE ) || \ 00812 ((__BURST__) == MDMA_DEST_BURST_2BEATS ) || \ 00813 ((__BURST__) == MDMA_DEST_BURST_4BEATS ) || \ 00814 ((__BURST__) == MDMA_DEST_BURST_8BEATS) || \ 00815 ((__BURST__) == MDMA_DEST_BURST_16BEATS) || \ 00816 ((__BURST__) == MDMA_DEST_BURST_32BEATS) || \ 00817 ((__BURST__) == MDMA_DEST_BURST_64BEATS) || \ 00818 ((__BURST__) == MDMA_DEST_BURST_128BEATS)) 00819 00820 #define IS_MDMA_TRANSFER_TRIGGER_MODE(__MODE__) (((__MODE__) == MDMA_BUFFER_TRANSFER ) || \ 00821 ((__MODE__) == MDMA_BLOCK_TRANSFER ) || \ 00822 ((__MODE__) == MDMA_REPEAT_BLOCK_TRANSFER ) || \ 00823 ((__MODE__) == MDMA_FULL_TRANSFER)) 00824 00825 #define IS_MDMA_BUFFER_TRANSFER_LENGTH(__LENGTH__) (((__LENGTH__) >= 0x00000001U) && ((__LENGTH__) < 0x000000FFU)) 00826 00827 #define IS_MDMA_BLOCK_COUNT(__COUNT__) (((__COUNT__) > 0U ) && ((__COUNT__) <= 4096U)) 00828 00829 #define IS_MDMA_TRANSFER_LENGTH(SIZE) (((SIZE) > 0U) && ((SIZE) <= 65536U)) 00830 00831 #define IS_MDMA_BLOCK_ADDR_OFFSET(__BLOCK_ADD_OFFSET__) (((__BLOCK_ADD_OFFSET__) > (-65536)) && ((__BLOCK_ADD_OFFSET__) < 65536)) 00832 00833 /** 00834 * @} 00835 */ 00836 00837 /* Private functions prototypes ----------------------------------------------*/ 00838 /** @defgroup MDMA_Private_Functions_Prototypes MDMA Private Functions Prototypes 00839 * @{ 00840 */ 00841 00842 /** 00843 * @} 00844 */ 00845 00846 /* Private functions ---------------------------------------------------------*/ 00847 /** @defgroup MDMA_Private_Functions MDMA Private Functions 00848 * @{ 00849 */ 00850 00851 /** 00852 * @} 00853 */ 00854 00855 /** 00856 * @} 00857 */ 00858 00859 /** 00860 * @} 00861 */ 00862 00863 #ifdef __cplusplus 00864 } 00865 #endif 00866 00867 #endif /* STM32H7xx_HAL_MDMA_H */ 00868
1.7.6.1