STM32H735xx HAL User Manual
stm32h7xx_hal_nor.h
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00001 /**
00002   ******************************************************************************
00003   * @file    stm32h7xx_hal_nor.h
00004   * @author  MCD Application Team
00005   * @brief   Header file of NOR HAL module.
00006   ******************************************************************************
00007   * @attention
00008   *
00009   * Copyright (c) 2017 STMicroelectronics.
00010   * All rights reserved.
00011   *
00012   * This software is licensed under terms that can be found in the LICENSE file
00013   * in the root directory of this software component.
00014   * If no LICENSE file comes with this software, it is provided AS-IS.
00015   *
00016   ******************************************************************************
00017   */
00018 
00019 /* Define to prevent recursive inclusion -------------------------------------*/
00020 #ifndef STM32H7xx_HAL_NOR_H
00021 #define STM32H7xx_HAL_NOR_H
00022 
00023 #ifdef __cplusplus
00024 extern "C" {
00025 #endif
00026 
00027 
00028 /* Includes ------------------------------------------------------------------*/
00029 #include "stm32h7xx_ll_fmc.h"
00030 
00031 /** @addtogroup STM32H7xx_HAL_Driver
00032   * @{
00033   */
00034 
00035 /** @addtogroup NOR
00036   * @{
00037   */
00038 
00039 /* Exported typedef ----------------------------------------------------------*/
00040 /** @defgroup NOR_Exported_Types NOR Exported Types
00041   * @{
00042   */
00043 
00044 /**
00045   * @brief  HAL SRAM State structures definition
00046   */
00047 typedef enum
00048 {
00049   HAL_NOR_STATE_RESET             = 0x00U,  /*!< NOR not yet initialized or disabled  */
00050   HAL_NOR_STATE_READY             = 0x01U,  /*!< NOR initialized and ready for use    */
00051   HAL_NOR_STATE_BUSY              = 0x02U,  /*!< NOR internal processing is ongoing   */
00052   HAL_NOR_STATE_ERROR             = 0x03U,  /*!< NOR error state                      */
00053   HAL_NOR_STATE_PROTECTED         = 0x04U   /*!< NOR NORSRAM device write protected   */
00054 } HAL_NOR_StateTypeDef;
00055 
00056 /**
00057   * @brief  FMC NOR Status typedef
00058   */
00059 typedef enum
00060 {
00061   HAL_NOR_STATUS_SUCCESS  = 0U,
00062   HAL_NOR_STATUS_ONGOING,
00063   HAL_NOR_STATUS_ERROR,
00064   HAL_NOR_STATUS_TIMEOUT
00065 } HAL_NOR_StatusTypeDef;
00066 
00067 /**
00068   * @brief  FMC NOR ID typedef
00069   */
00070 typedef struct
00071 {
00072   uint16_t Manufacturer_Code;  /*!< Defines the device's manufacturer code used to identify the memory       */
00073 
00074   uint16_t Device_Code1;
00075 
00076   uint16_t Device_Code2;
00077 
00078   uint16_t Device_Code3;       /*!< Defines the device's codes used to identify the memory.
00079                                     These codes can be accessed by performing read operations with specific
00080                                     control signals and addresses set.They can also be accessed by issuing
00081                                     an Auto Select command                                                   */
00082 } NOR_IDTypeDef;
00083 
00084 /**
00085   * @brief  FMC NOR CFI typedef
00086   */
00087 typedef struct
00088 {
00089   /*!< Defines the information stored in the memory's Common flash interface
00090        which contains a description of various electrical and timing parameters,
00091        density information and functions supported by the memory                   */
00092 
00093   uint16_t CFI_1;
00094 
00095   uint16_t CFI_2;
00096 
00097   uint16_t CFI_3;
00098 
00099   uint16_t CFI_4;
00100 } NOR_CFITypeDef;
00101 
00102 /**
00103   * @brief  NOR handle Structure definition
00104   */
00105 #if (USE_HAL_NOR_REGISTER_CALLBACKS == 1)
00106 typedef struct __NOR_HandleTypeDef
00107 #else
00108 typedef struct
00109 #endif /* USE_HAL_NOR_REGISTER_CALLBACKS  */
00110 
00111 {
00112   FMC_NORSRAM_TypeDef           *Instance;    /*!< Register base address                        */
00113 
00114   FMC_NORSRAM_EXTENDED_TypeDef  *Extended;    /*!< Extended mode register base address          */
00115 
00116   FMC_NORSRAM_InitTypeDef       Init;         /*!< NOR device control configuration parameters  */
00117 
00118   HAL_LockTypeDef               Lock;         /*!< NOR locking object                           */
00119 
00120   __IO HAL_NOR_StateTypeDef     State;        /*!< NOR device access state                      */
00121 
00122   uint32_t                      CommandSet;   /*!< NOR algorithm command set and control        */
00123 
00124 #if (USE_HAL_NOR_REGISTER_CALLBACKS == 1)
00125   void (* MspInitCallback)(struct __NOR_HandleTypeDef *hnor);               /*!< NOR Msp Init callback              */
00126   void (* MspDeInitCallback)(struct __NOR_HandleTypeDef *hnor);             /*!< NOR Msp DeInit callback            */
00127 #endif /* USE_HAL_NOR_REGISTER_CALLBACKS */
00128 } NOR_HandleTypeDef;
00129 
00130 #if (USE_HAL_NOR_REGISTER_CALLBACKS == 1)
00131 /**
00132   * @brief  HAL NOR Callback ID enumeration definition
00133   */
00134 typedef enum
00135 {
00136   HAL_NOR_MSP_INIT_CB_ID       = 0x00U,  /*!< NOR MspInit Callback ID          */
00137   HAL_NOR_MSP_DEINIT_CB_ID     = 0x01U   /*!< NOR MspDeInit Callback ID        */
00138 } HAL_NOR_CallbackIDTypeDef;
00139 
00140 /**
00141   * @brief  HAL NOR Callback pointer definition
00142   */
00143 typedef void (*pNOR_CallbackTypeDef)(NOR_HandleTypeDef *hnor);
00144 #endif /* USE_HAL_NOR_REGISTER_CALLBACKS */
00145 /**
00146   * @}
00147   */
00148 
00149 /* Exported constants --------------------------------------------------------*/
00150 /* Exported macro ------------------------------------------------------------*/
00151 /** @defgroup NOR_Exported_Macros NOR Exported Macros
00152   * @{
00153   */
00154 /** @brief Reset NOR handle state
00155   * @param  __HANDLE__ specifies the NOR handle.
00156   * @retval None
00157   */
00158 #if (USE_HAL_NOR_REGISTER_CALLBACKS == 1)
00159 #define __HAL_NOR_RESET_HANDLE_STATE(__HANDLE__)          do {                                             \
00160                                                                (__HANDLE__)->State = HAL_NOR_STATE_RESET;  \
00161                                                                (__HANDLE__)->MspInitCallback = NULL;       \
00162                                                                (__HANDLE__)->MspDeInitCallback = NULL;     \
00163                                                              } while(0)
00164 #else
00165 #define __HAL_NOR_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NOR_STATE_RESET)
00166 #endif /* USE_HAL_NOR_REGISTER_CALLBACKS */
00167 /**
00168   * @}
00169   */
00170 
00171 /* Exported functions --------------------------------------------------------*/
00172 /** @addtogroup NOR_Exported_Functions NOR Exported Functions
00173   * @{
00174   */
00175 
00176 /** @addtogroup NOR_Exported_Functions_Group1 Initialization and de-initialization functions
00177   * @{
00178   */
00179 
00180 /* Initialization/de-initialization functions  ********************************/
00181 HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FMC_NORSRAM_TimingTypeDef *Timing,
00182                                FMC_NORSRAM_TimingTypeDef *ExtTiming);
00183 HAL_StatusTypeDef HAL_NOR_DeInit(NOR_HandleTypeDef *hnor);
00184 void HAL_NOR_MspInit(NOR_HandleTypeDef *hnor);
00185 void HAL_NOR_MspDeInit(NOR_HandleTypeDef *hnor);
00186 void HAL_NOR_MspWait(NOR_HandleTypeDef *hnor, uint32_t Timeout);
00187 /**
00188   * @}
00189   */
00190 
00191 /** @addtogroup NOR_Exported_Functions_Group2 Input and Output functions
00192   * @{
00193   */
00194 
00195 /* I/O operation functions  ***************************************************/
00196 HAL_StatusTypeDef HAL_NOR_Read_ID(NOR_HandleTypeDef *hnor, NOR_IDTypeDef *pNOR_ID);
00197 HAL_StatusTypeDef HAL_NOR_ReturnToReadMode(NOR_HandleTypeDef *hnor);
00198 HAL_StatusTypeDef HAL_NOR_Read(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData);
00199 HAL_StatusTypeDef HAL_NOR_Program(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData);
00200 
00201 HAL_StatusTypeDef HAL_NOR_ReadBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData,
00202                                      uint32_t uwBufferSize);
00203 HAL_StatusTypeDef HAL_NOR_ProgramBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData,
00204                                         uint32_t uwBufferSize);
00205 
00206 HAL_StatusTypeDef HAL_NOR_Erase_Block(NOR_HandleTypeDef *hnor, uint32_t BlockAddress, uint32_t Address);
00207 HAL_StatusTypeDef HAL_NOR_Erase_Chip(NOR_HandleTypeDef *hnor, uint32_t Address);
00208 HAL_StatusTypeDef HAL_NOR_Read_CFI(NOR_HandleTypeDef *hnor, NOR_CFITypeDef *pNOR_CFI);
00209 
00210 #if (USE_HAL_NOR_REGISTER_CALLBACKS == 1)
00211 /* NOR callback registering/unregistering */
00212 HAL_StatusTypeDef HAL_NOR_RegisterCallback(NOR_HandleTypeDef *hnor, HAL_NOR_CallbackIDTypeDef CallbackId,
00213                                            pNOR_CallbackTypeDef pCallback);
00214 HAL_StatusTypeDef HAL_NOR_UnRegisterCallback(NOR_HandleTypeDef *hnor, HAL_NOR_CallbackIDTypeDef CallbackId);
00215 #endif /* USE_HAL_NOR_REGISTER_CALLBACKS */
00216 /**
00217   * @}
00218   */
00219 
00220 /** @addtogroup NOR_Exported_Functions_Group3 NOR Control functions
00221   * @{
00222   */
00223 
00224 /* NOR Control functions  *****************************************************/
00225 HAL_StatusTypeDef HAL_NOR_WriteOperation_Enable(NOR_HandleTypeDef *hnor);
00226 HAL_StatusTypeDef HAL_NOR_WriteOperation_Disable(NOR_HandleTypeDef *hnor);
00227 /**
00228   * @}
00229   */
00230 
00231 /** @addtogroup NOR_Exported_Functions_Group4 NOR State functions
00232   * @{
00233   */
00234 
00235 /* NOR State functions ********************************************************/
00236 HAL_NOR_StateTypeDef  HAL_NOR_GetState(NOR_HandleTypeDef *hnor);
00237 HAL_NOR_StatusTypeDef HAL_NOR_GetStatus(NOR_HandleTypeDef *hnor, uint32_t Address, uint32_t Timeout);
00238 /**
00239   * @}
00240   */
00241 
00242 /**
00243   * @}
00244   */
00245 
00246 /* Private types -------------------------------------------------------------*/
00247 /* Private variables ---------------------------------------------------------*/
00248 /* Private constants ---------------------------------------------------------*/
00249 /** @defgroup NOR_Private_Constants NOR Private Constants
00250   * @{
00251   */
00252 /* NOR device IDs addresses */
00253 #define MC_ADDRESS               ((uint16_t)0x0000)
00254 #define DEVICE_CODE1_ADDR        ((uint16_t)0x0001)
00255 #define DEVICE_CODE2_ADDR        ((uint16_t)0x000E)
00256 #define DEVICE_CODE3_ADDR        ((uint16_t)0x000F)
00257 
00258 /* NOR CFI IDs addresses */
00259 #define CFI1_ADDRESS             ((uint16_t)0x0061)
00260 #define CFI2_ADDRESS             ((uint16_t)0x0062)
00261 #define CFI3_ADDRESS             ((uint16_t)0x0063)
00262 #define CFI4_ADDRESS             ((uint16_t)0x0064)
00263 
00264 /* NOR operation wait timeout */
00265 #define NOR_TMEOUT               ((uint16_t)0xFFFF)
00266 
00267 /* NOR memory data width */
00268 #define NOR_MEMORY_8B            ((uint8_t)0x00)
00269 #define NOR_MEMORY_16B           ((uint8_t)0x01)
00270 
00271 /* NOR memory device read/write start address */
00272 #define NOR_MEMORY_ADRESS1       (0x60000000U)
00273 #define NOR_MEMORY_ADRESS2       (0x64000000U)
00274 #define NOR_MEMORY_ADRESS3       (0x68000000U)
00275 #define NOR_MEMORY_ADRESS4       (0x6C000000U)
00276 /**
00277   * @}
00278   */
00279 
00280 /* Private macros ------------------------------------------------------------*/
00281 /** @defgroup NOR_Private_Macros NOR Private Macros
00282   * @{
00283   */
00284 /**
00285   * @brief  NOR memory address shifting.
00286   * @param  __NOR_ADDRESS NOR base address
00287   * @param  __NOR_MEMORY_WIDTH_ NOR memory width
00288   * @param  __ADDRESS__ NOR memory address
00289   * @retval NOR shifted address value
00290   */
00291 #define NOR_ADDR_SHIFT(__NOR_ADDRESS, __NOR_MEMORY_WIDTH_, __ADDRESS__)         \
00292   ((uint32_t)(((__NOR_MEMORY_WIDTH_) == NOR_MEMORY_16B)?            \
00293               ((uint32_t)((__NOR_ADDRESS) + (2U * (__ADDRESS__)))):              \
00294               ((uint32_t)((__NOR_ADDRESS) + (__ADDRESS__)))))
00295 
00296 /**
00297   * @brief  NOR memory write data to specified address.
00298   * @param  __ADDRESS__ NOR memory address
00299   * @param  __DATA__ Data to write
00300   * @retval None
00301   */
00302 #define NOR_WRITE(__ADDRESS__, __DATA__)   do{                                                             \
00303                                                (*(__IO uint16_t *)((uint32_t)(__ADDRESS__)) = (__DATA__)); \
00304                                                __DSB();                                                    \
00305                                              } while(0)
00306 
00307 /**
00308   * @}
00309   */
00310 
00311 /**
00312   * @}
00313   */
00314 
00315 /**
00316   * @}
00317   */
00318 
00319 
00320 #ifdef __cplusplus
00321 }
00322 #endif
00323 
00324 #endif /* STM32H7xx_HAL_NOR_H */