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STM32H735xx HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32h7xx_hal_pssi.h 00004 * @author MCD Application Team 00005 * @brief Header file of PSSI HAL module. 00006 ****************************************************************************** 00007 * @attention 00008 * 00009 * Copyright (c) 2017 STMicroelectronics. 00010 * All rights reserved. 00011 * 00012 * This software is licensed under terms that can be found in the LICENSE file 00013 * in the root directory of this software component. 00014 * If no LICENSE file comes with this software, it is provided AS-IS. 00015 * 00016 ****************************************************************************** 00017 */ 00018 00019 /* Define to prevent recursive inclusion -------------------------------------*/ 00020 #ifndef STM32H7xx_HAL_PSSI_H 00021 #define STM32H7xx_HAL_PSSI_H 00022 00023 #ifdef __cplusplus 00024 extern "C" { 00025 #endif 00026 00027 /* Includes ------------------------------------------------------------------*/ 00028 #include "stm32h7xx_hal_def.h" 00029 00030 /** @addtogroup STM32H7xx_HAL_Driver 00031 * @{ 00032 */ 00033 #if defined(PSSI) 00034 /** @addtogroup PSSI PSSI 00035 * @brief PSSI HAL module driver 00036 * @{ 00037 */ 00038 00039 /* Exported types ------------------------------------------------------------*/ 00040 /** @defgroup PSSI_Exported_Types PSSI Exported Types 00041 * @{ 00042 */ 00043 00044 00045 /** 00046 * @brief PSSI Init structure definition 00047 */ 00048 typedef struct 00049 { 00050 uint32_t DataWidth; /* !< Configures the parallel bus width 8 lines or 16 lines */ 00051 uint32_t BusWidth; /* !< Configures the parallel bus width 8 lines or 16 lines */ 00052 uint32_t ControlSignal; /* !< Configures Data enable and Data ready */ 00053 uint32_t ClockPolarity; /* !< Configures the PSSI Input Clock polarity */ 00054 uint32_t DataEnablePolarity; /* !< Configures the PSSI Data Enable polarity */ 00055 uint32_t ReadyPolarity; /* !< Configures the PSSI Ready polarity */ 00056 00057 } PSSI_InitTypeDef; 00058 00059 00060 /** 00061 * @brief HAL PSSI State structures definition 00062 */ 00063 typedef enum 00064 { 00065 HAL_PSSI_STATE_RESET = 0x00U, /* !< PSSI not yet initialized or disabled */ 00066 HAL_PSSI_STATE_READY = 0x01U, /* !< Peripheral initialized and ready for use */ 00067 HAL_PSSI_STATE_BUSY = 0x02U, /* !< An internal process is ongoing */ 00068 HAL_PSSI_STATE_BUSY_TX = 0x03U, /* !< Transmit process is ongoing */ 00069 HAL_PSSI_STATE_BUSY_RX = 0x04U, /* !< Receive process is ongoing */ 00070 HAL_PSSI_STATE_TIMEOUT = 0x05U, /* !< Timeout state */ 00071 HAL_PSSI_STATE_ERROR = 0x06U, /* !< PSSI state error */ 00072 HAL_PSSI_STATE_ABORT = 0x07U, /* !< PSSI process is aborted */ 00073 00074 } HAL_PSSI_StateTypeDef; 00075 00076 /** 00077 * @brief PSSI handle Structure definition 00078 */ 00079 typedef struct __PSSI_HandleTypeDef 00080 { 00081 PSSI_TypeDef *Instance; /*!< PSSI register base address. */ 00082 PSSI_InitTypeDef Init; /*!< PSSI Initialization Structure. */ 00083 uint32_t *pBuffPtr; /*!< PSSI Data buffer. */ 00084 uint32_t XferCount; /*!< PSSI transfer count */ 00085 uint32_t XferSize; /*!< PSSI transfer size */ 00086 DMA_HandleTypeDef *hdmatx; /*!< PSSI Tx DMA Handle parameters */ 00087 DMA_HandleTypeDef *hdmarx; /*!< PSSI Rx DMA Handle parameters */ 00088 00089 void (* TxCpltCallback)(struct __PSSI_HandleTypeDef *hpssi); /*!< PSSI transfer complete callback. */ 00090 void (* RxCpltCallback)(struct __PSSI_HandleTypeDef *hpssi); /*!< PSSI transfer complete callback. */ 00091 void (* ErrorCallback)(struct __PSSI_HandleTypeDef *hpssi); /*!< PSSI transfer complete callback. */ 00092 void (* AbortCpltCallback)(struct __PSSI_HandleTypeDef *hpssi); /*!< PSSI transfer error callback. */ 00093 00094 void (* MspInitCallback)(struct __PSSI_HandleTypeDef *hpssi); /*!< PSSI Msp Init callback. */ 00095 void (* MspDeInitCallback)(struct __PSSI_HandleTypeDef *hpssi); /*!< PSSI Msp DeInit callback. */ 00096 00097 HAL_LockTypeDef Lock; /*!< PSSI lock. */ 00098 __IO HAL_PSSI_StateTypeDef State; /*!< PSSI transfer state. */ 00099 __IO uint32_t ErrorCode; /*!< PSSI error code. */ 00100 00101 } PSSI_HandleTypeDef; 00102 00103 00104 /** 00105 * @brief HAL PSSI Callback pointer definition 00106 */ 00107 typedef void (*pPSSI_CallbackTypeDef)(PSSI_HandleTypeDef *hpssi); /*!< Pointer to a PSSI common callback function */ 00108 00109 /** 00110 * @} 00111 */ 00112 /** 00113 * @brief HAL PSSI Callback ID enumeration definition 00114 */ 00115 typedef enum 00116 { 00117 HAL_PSSI_TX_COMPLETE_CB_ID = 0x00U, /*!< PSSI Tx Transfer completed callback ID */ 00118 HAL_PSSI_RX_COMPLETE_CB_ID = 0x01U, /*!< PSSI Rx Transfer completed callback ID */ 00119 HAL_PSSI_ERROR_CB_ID = 0x03U, /*!< PSSI Error callback ID */ 00120 HAL_PSSI_ABORT_CB_ID = 0x04U, /*!< PSSI Abort callback ID */ 00121 00122 HAL_PSSI_MSPINIT_CB_ID = 0x05U, /*!< PSSI Msp Init callback ID */ 00123 HAL_PSSI_MSPDEINIT_CB_ID = 0x06U /*!< PSSI Msp DeInit callback ID */ 00124 00125 } HAL_PSSI_CallbackIDTypeDef; 00126 00127 /* Exported constants --------------------------------------------------------*/ 00128 /** @defgroup PSSI_Exported_Constants PSSI Exported Constants 00129 * @{ 00130 */ 00131 00132 /** @defgroup PSSI_Error_Code PSSI Error Code 00133 * @{ 00134 */ 00135 #define HAL_PSSI_ERROR_NONE 0x00000000U /*!< No error */ 00136 #define HAL_PSSI_ERROR_NOT_SUPPORTED 0x00000001U /*!< Not supported operation */ 00137 #define HAL_PSSI_ERROR_UNDER_RUN 0x00000002U /*!< FIFO Under-run error */ 00138 #define HAL_PSSI_ERROR_OVER_RUN 0x00000004U /*!< FIFO Over-run error */ 00139 #define HAL_PSSI_ERROR_DMA 0x00000008U /*!< Dma error */ 00140 #define HAL_PSSI_ERROR_TIMEOUT 0x00000010U /*!< Timeout error */ 00141 #define HAL_PSSI_ERROR_INVALID_CALLBACK 0x00000020U /*!< Invalid callback error */ 00142 00143 00144 /** 00145 * @} 00146 */ 00147 00148 /** @defgroup PSSI_DATA_WIDTH PSSI Data Width 00149 * @{ 00150 */ 00151 00152 #define HAL_PSSI_8BITS 0x00000000U /*!< 8 Bits */ 00153 #define HAL_PSSI_16BITS 0x00000001U /*!< 16 Bits */ 00154 #define HAL_PSSI_32BITS 0x00000002U /*!< 32 Bits */ 00155 /** 00156 * @} 00157 */ 00158 00159 /** @defgroup PSSI_BUS_WIDTH PSSI Bus Width 00160 * @{ 00161 */ 00162 00163 #define HAL_PSSI_8LINES 0x00000000U /*!< 8 data lines */ 00164 #define HAL_PSSI_16LINES PSSI_CR_EDM /*!< 16 data lines */ 00165 /** 00166 * @} 00167 */ 00168 /** @defgroup PSSI_MODE PSSI mode 00169 * @{ 00170 */ 00171 #define HAL_PSSI_UNIDIRECTIONAL 0x00000000U /*!< Uni-directional mode */ 00172 #define HAL_PSSI_BIDIRECTIONAL 0x00000001U /*!< Bi-directional mode */ 00173 /** 00174 * @} 00175 */ 00176 00177 /** @defgroup PSSI_ControlSignal Configuration 00178 * @{ 00179 */ 00180 #define HAL_PSSI_DE_RDY_DISABLE (0x0U << PSSI_CR_DERDYCFG_Pos) /*!< Neither DE nor RDY are enabled */ 00181 #define HAL_PSSI_RDY_ENABLE (0x1U << PSSI_CR_DERDYCFG_Pos) /*!< Only RDY enabled */ 00182 #define HAL_PSSI_DE_ENABLE (0x2U << PSSI_CR_DERDYCFG_Pos) /*!< Only DE enabled */ 00183 #define HAL_PSSI_DE_RDY_ALT_ENABLE (0x3U << PSSI_CR_DERDYCFG_Pos) /*!< Both RDY and DE alternate functions enabled */ 00184 #define HAL_PSSI_MAP_RDY_BIDIR_ENABLE (0x4U << PSSI_CR_DERDYCFG_Pos) /*!< Bi-directional on RDY pin */ 00185 #define HAL_PSSI_RDY_MAP_ENABLE (0x5U << PSSI_CR_DERDYCFG_Pos) /*!< Only RDY enabled, mapped to DE pin */ 00186 #define HAL_PSSI_DE_MAP_ENABLE (0x6U << PSSI_CR_DERDYCFG_Pos) /*!< Only DE enabled, mapped to RDY pin */ 00187 #define HAL_PSSI_MAP_DE_BIDIR_ENABLE (0x7U << PSSI_CR_DERDYCFG_Pos) /*!< Bi-directional on DE pin */ 00188 00189 /** 00190 * @} 00191 */ 00192 00193 00194 /** @defgroup PSSI_Data_Enable_Polarity Data Enable Polarity 00195 * @{ 00196 */ 00197 #define HAL_PSSI_DEPOL_ACTIVE_LOW 0x0U /*!< Active Low */ 00198 #define HAL_PSSI_DEPOL_ACTIVE_HIGH PSSI_CR_DEPOL /*!< Active High */ 00199 /** 00200 * @} 00201 */ 00202 /** @defgroup PSSI_Reday_Polarity Reday Polarity 00203 * @{ 00204 */ 00205 #define HAL_PSSI_RDYPOL_ACTIVE_LOW 0x0U /*!< Active Low */ 00206 #define HAL_PSSI_RDYPOL_ACTIVE_HIGH PSSI_CR_RDYPOL /*!< Active High */ 00207 /** 00208 * @} 00209 */ 00210 00211 /** @defgroup PSSI_Clock_Polarity Clock Polarity 00212 * @{ 00213 */ 00214 #define HAL_PSSI_FALLING_EDGE 0x0U /*!< Fallling Edge */ 00215 #define HAL_PSSI_RISING_EDGE 0x1U /*!< Rising Edge */ 00216 00217 00218 /** 00219 * @} 00220 */ 00221 00222 00223 /** @defgroup PSSI_DEFINITION PSSI definitions 00224 * @{ 00225 */ 00226 00227 #define PSSI_MAX_NBYTE_SIZE 0x10000U /* 64 KB */ 00228 #define PSSI_TIMEOUT_TRANSMIT 0x0000FFFFU /*!< Timeout Value */ 00229 00230 #define PSSI_CR_OUTEN_INPUT 0x00000000U /*!< Input Mode */ 00231 #define PSSI_CR_OUTEN_OUTPUT PSSI_CR_OUTEN /*!< Output Mode */ 00232 00233 #define PSSI_CR_DMA_ENABLE PSSI_CR_DMAEN /*!< DMA Mode Enable */ 00234 #define PSSI_CR_DMA_DISABLE (~PSSI_CR_DMAEN) /*!< DMA Mode Disable */ 00235 00236 #define PSSI_CR_16BITS PSSI_CR_EDM /*!< 16 Lines Mode */ 00237 #define PSSI_CR_8BITS (~PSSI_CR_EDM) /*!< 8 Lines Mode */ 00238 00239 #define PSSI_FLAG_RTT1B PSSI_SR_RTT1B /*!< 1 Byte Fifo Flag*/ 00240 #define PSSI_FLAG_RTT4B PSSI_SR_RTT4B /*!< 4 Bytes Fifo Flag*/ 00241 00242 00243 00244 /** 00245 * @} 00246 */ 00247 00248 /** @defgroup PSSI_Interrupts PSSI Interrupts 00249 * @{ 00250 */ 00251 00252 #define PSSI_FLAG_OVR_RIS PSSI_RIS_OVR_RIS /*!< Overrun, Underrun errors flag */ 00253 #define PSSI_FLAG_MASK PSSI_RIS_OVR_RIS_Msk /*!< Overrun, Underrun errors Mask */ 00254 #define PSSI_FLAG_OVR_MIS PSSI_MIS_OVR_MIS /*!< Overrun, Underrun masked errors flag */ 00255 /** 00256 * @} 00257 */ 00258 00259 00260 00261 /** 00262 * @} 00263 */ 00264 /* Exported macros ------------------------------------------------------------*/ 00265 /** @defgroup PSSI_Exported_Macros PSSI Exported Macros 00266 * @{ 00267 */ 00268 00269 /** @brief Reset PSSI handle state 00270 * @param __HANDLE__ specifies the PSSI handle. 00271 * @retval None 00272 */ 00273 00274 #define HAL_PSSI_RESET_HANDLE_STATE(__HANDLE__) do{ \ 00275 (__HANDLE__)->State = HAL_PSSI_STATE_RESET;\ 00276 (__HANDLE__)->MspInitCallback = NULL; \ 00277 (__HANDLE__)->MspDeInitCallback = NULL; \ 00278 }while(0) 00279 00280 00281 /** 00282 * @brief Enable the PSSI. 00283 * @param __HANDLE__ PSSI handle 00284 * @retval None. 00285 */ 00286 #define HAL_PSSI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= PSSI_CR_ENABLE) 00287 /** 00288 * @brief Disable the PSSI. 00289 * @param __HANDLE__ PSSI handle 00290 * @retval None. 00291 */ 00292 #define HAL_PSSI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= (~PSSI_CR_ENABLE)) 00293 00294 /* PSSI pripheral STATUS */ 00295 /** 00296 * @brief Get the PSSI pending flags. 00297 * @param __HANDLE__ PSSI handle 00298 * @param __FLAG__ flag to check. 00299 * This parameter can be any combination of the following values: 00300 * @arg PSSI_FLAG_RTT1B: FIFO is ready to transfer one byte 00301 * @arg PSSI_FLAG_RTT4B: FIFO is ready to transfer four bytes 00302 * @retval The state of FLAG. 00303 */ 00304 00305 #define HAL_PSSI_GET_STATUS(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR & (__FLAG__)) 00306 00307 00308 00309 /* Interrupt & Flag management */ 00310 /** 00311 * @brief Get the PSSI pending flags. 00312 * @param __HANDLE__ PSSI handle 00313 * @param __FLAG__ flag to check. 00314 * This parameter can be any combination of the following values: 00315 * @arg PSSI_FLAG_OVR_RIS: Data Buffer overrun/underrun error flag 00316 * @retval The state of FLAG. 00317 */ 00318 #define HAL_PSSI_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->RIS & (__FLAG__)) 00319 00320 /** 00321 * @brief Clear the PSSI pending flags. 00322 * @param __HANDLE__ PSSI handle 00323 * @param __FLAG__ specifies the flag to clear. 00324 * This parameter can be any combination of the following values: 00325 * @arg PSSI_FLAG_OVR_RIS: Data Buffer overrun/underrun error flag 00326 * @retval None 00327 */ 00328 #define HAL_PSSI_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) 00329 00330 /** 00331 * @brief Enable the specified PSSI interrupts. 00332 * @param __HANDLE__ PSSI handle 00333 * @param __INTERRUPT__ specifies the PSSI interrupt sources to be enabled. 00334 * This parameter can be any combination of the following values: 00335 * @arg PSSI_FLAG_OVR_RIS: Configuration error mask 00336 * @retval None 00337 */ 00338 #define HAL_PSSI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__)) 00339 00340 /** 00341 * @brief Disable the specified PSSI interrupts. 00342 * @param __HANDLE__ PSSI handle 00343 * @param __INTERRUPT__ specifies the PSSI interrupt sources to be disabled. 00344 * This parameter can be any combination of the following values: 00345 * @arg PSSI_IT_OVR_IE: Configuration error mask 00346 * @retval None 00347 */ 00348 #define HAL_PSSI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= ~(__INTERRUPT__)) 00349 00350 /** 00351 * @brief Check whether the specified PSSI interrupt source is enabled or not. 00352 * @param __HANDLE__ PSSI handle 00353 * @param __INTERRUPT__ specifies the PSSI interrupt source to check. 00354 * This parameter can be one of the following values: 00355 * @arg PSSI_IT_OVR_IE: Data Buffer overrun/underrun error interrupt mask 00356 * @retval The state of INTERRUPT source. 00357 */ 00358 #define HAL_PSSI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER & (__INTERRUPT__)) 00359 00360 /** 00361 * @brief Check whether the PSSI Control signal is valid. 00362 * @param __CONTROL__ Control signals configuration 00363 * @retval Valid or not. 00364 */ 00365 00366 #define IS_PSSI_CONTROL_SIGNAL(__CONTROL__) (((__CONTROL__) == HAL_PSSI_DE_RDY_DISABLE ) || \ 00367 ((__CONTROL__) == HAL_PSSI_RDY_ENABLE ) || \ 00368 ((__CONTROL__) == HAL_PSSI_DE_ENABLE ) || \ 00369 ((__CONTROL__) == HAL_PSSI_DE_RDY_ALT_ENABLE ) || \ 00370 ((__CONTROL__) == HAL_PSSI_MAP_RDY_BIDIR_ENABLE ) || \ 00371 ((__CONTROL__) == HAL_PSSI_RDY_MAP_ENABLE ) || \ 00372 ((__CONTROL__) == HAL_PSSI_DE_MAP_ENABLE ) || \ 00373 ((__CONTROL__) == HAL_PSSI_MAP_DE_BIDIR_ENABLE )) 00374 /** 00375 * @brief Check whether the PSSI Bus Width is valid. 00376 * @param __BUSWIDTH__ PSSI Bush width 00377 * @retval Valid or not. 00378 */ 00379 00380 #define IS_PSSI_BUSWIDTH(__BUSWIDTH__) (((__BUSWIDTH__) == HAL_PSSI_8LINES ) || \ 00381 ((__BUSWIDTH__) == HAL_PSSI_16LINES )) 00382 00383 /** 00384 * @brief Check whether the PSSI Clock Polarity is valid. 00385 * @param __CLOCKPOL__ PSSI Clock Polarity 00386 * @retval Valid or not. 00387 */ 00388 00389 #define IS_PSSI_CLOCK_POLARITY(__CLOCKPOL__) (((__CLOCKPOL__) == HAL_PSSI_FALLING_EDGE ) || \ 00390 ((__CLOCKPOL__) == HAL_PSSI_RISING_EDGE )) 00391 /** 00392 * @brief Check whether the PSSI Data Enable Polarity is valid. 00393 * @param __DEPOL__ PSSI DE Polarity 00394 * @retval Valid or not. 00395 */ 00396 00397 #define IS_PSSI_DE_POLARITY(__DEPOL__) (((__DEPOL__) == HAL_PSSI_DEPOL_ACTIVE_LOW ) || \ 00398 ((__DEPOL__) == HAL_PSSI_DEPOL_ACTIVE_HIGH )) 00399 /** 00400 * @brief Check whether the PSSI Ready Polarity is valid. 00401 * @param __RDYPOL__ PSSI RDY Polarity 00402 * @retval Valid or not. 00403 */ 00404 00405 #define IS_PSSI_RDY_POLARITY(__RDYPOL__) (((__RDYPOL__) == HAL_PSSI_RDYPOL_ACTIVE_LOW ) || \ 00406 ((__RDYPOL__) == HAL_PSSI_RDYPOL_ACTIVE_HIGH )) 00407 /** 00408 * @} 00409 */ 00410 00411 00412 /* Exported functions --------------------------------------------------------*/ 00413 /** @addtogroup PSSI_Exported_Functions 00414 * @{ 00415 */ 00416 00417 /** @addtogroup PSSI_Exported_Functions_Group1 00418 * @{ 00419 */ 00420 00421 /* Initialization and de-initialization functions *******************************/ 00422 HAL_StatusTypeDef HAL_PSSI_Init(PSSI_HandleTypeDef *hpssi); 00423 HAL_StatusTypeDef HAL_PSSI_DeInit(PSSI_HandleTypeDef *hpssi); 00424 void HAL_PSSI_MspInit(PSSI_HandleTypeDef *hpssi); 00425 void HAL_PSSI_MspDeInit(PSSI_HandleTypeDef *hpssi); 00426 /* Callbacks Register/UnRegister functions ***********************************/ 00427 00428 HAL_StatusTypeDef HAL_PSSI_RegisterCallback(PSSI_HandleTypeDef *hpssi, HAL_PSSI_CallbackIDTypeDef CallbackID, pPSSI_CallbackTypeDef pCallback); 00429 HAL_StatusTypeDef HAL_PSSI_UnRegisterCallback(PSSI_HandleTypeDef *hpssi, HAL_PSSI_CallbackIDTypeDef CallbackID); 00430 00431 00432 /** 00433 * @} 00434 */ 00435 00436 /** @addtogroup PSSI_Exported_Functions_Group2 00437 * @{ 00438 */ 00439 00440 /* IO operation functions *******************************************************/ 00441 HAL_StatusTypeDef HAL_PSSI_Transmit(PSSI_HandleTypeDef *hpssi, uint8_t *pData, uint32_t Size, uint32_t Timeout); 00442 HAL_StatusTypeDef HAL_PSSI_Receive(PSSI_HandleTypeDef *hpssi, uint8_t *pData, uint32_t Size, uint32_t Timeout); 00443 HAL_StatusTypeDef HAL_PSSI_Transmit_DMA(PSSI_HandleTypeDef *hpssi, uint32_t *pData, uint32_t Size); 00444 HAL_StatusTypeDef HAL_PSSI_Receive_DMA(PSSI_HandleTypeDef *hpssi, uint32_t *pData, uint32_t Size); 00445 HAL_StatusTypeDef HAL_PSSI_Abort_DMA(PSSI_HandleTypeDef *hpssi); 00446 void HAL_PSSI_IRQHandler(PSSI_HandleTypeDef *hpssi); 00447 00448 /** 00449 * @} 00450 */ 00451 00452 /** @addtogroup PSSI_Exported_Functions_Group3 00453 * @{ 00454 */ 00455 00456 void HAL_PSSI_TxCpltCallback(PSSI_HandleTypeDef *hpssi); 00457 void HAL_PSSI_RxCpltCallback(PSSI_HandleTypeDef *hpssi); 00458 void HAL_PSSI_ErrorCallback(PSSI_HandleTypeDef *hpssi); 00459 void HAL_PSSI_AbortCpltCallback(PSSI_HandleTypeDef *hpssi); 00460 00461 00462 /** 00463 * @} 00464 */ 00465 00466 /** @addtogroup PSSI_Exported_Functions_Group4 00467 * @{ 00468 */ 00469 00470 /* Peripheral State functions ***************************************************/ 00471 HAL_PSSI_StateTypeDef HAL_PSSI_GetState(PSSI_HandleTypeDef *hpssi); 00472 uint32_t HAL_PSSI_GetError(PSSI_HandleTypeDef *hpssi); 00473 00474 /** 00475 * @} 00476 */ 00477 00478 /** 00479 * @} 00480 */ 00481 00482 /* Private constants ---------------------------------------------------------*/ 00483 00484 00485 /* Private macros ------------------------------------------------------------*/ 00486 00487 00488 /** 00489 * @} 00490 */ 00491 #endif /* PSSI */ 00492 00493 /** 00494 * @} 00495 */ 00496 00497 00498 #ifdef __cplusplus 00499 } 00500 #endif 00501 00502 #endif /* STM32H7xx_HAL_PSSI_H */
1.7.6.1