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STM32H735xx HAL User Manual
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PWR HAL module driver. This file provides firmware functions to manage the following functionalities of the Power Controller (PWR) peripheral: + Initialization and de-initialization functions. + Peripheral Control functions. + Interrupt Handling functions. More...
#include "stm32h7xx_hal.h"Go to the source code of this file.
Defines | |
| #define | PVD_MODE_IT (0x00010000U) |
| #define | PVD_MODE_EVT (0x00020000U) |
| #define | PVD_RISING_EDGE (0x00000001U) |
| #define | PVD_FALLING_EDGE (0x00000002U) |
| #define | PVD_RISING_FALLING_EDGE (0x00000003U) |
Functions | |
| void | HAL_PWR_DeInit (void) |
| Deinitialize the HAL PWR peripheral registers to their default reset values. | |
| void | HAL_PWR_EnableBkUpAccess (void) |
| Enable access to the backup domain (RTC registers, RTC backup data registers and backup SRAM). | |
| void | HAL_PWR_DisableBkUpAccess (void) |
| Disable access to the backup domain (RTC registers, RTC backup data registers and backup SRAM). | |
| void | HAL_PWR_ConfigPVD (PWR_PVDTypeDef *sConfigPVD) |
| Configure the event mode and the voltage threshold detected by the Programmable Voltage Detector(PVD). | |
| void | HAL_PWR_EnablePVD (void) |
| Enable the Programmable Voltage Detector (PVD). | |
| void | HAL_PWR_DisablePVD (void) |
| Disable the Programmable Voltage Detector (PVD). | |
| void | HAL_PWR_EnableWakeUpPin (uint32_t WakeUpPinPolarity) |
| Enable the WakeUp PINx functionality. | |
| void | HAL_PWR_DisableWakeUpPin (uint32_t WakeUpPinx) |
| Disable the WakeUp PINx functionality. | |
| void | HAL_PWR_EnterSLEEPMode (uint32_t Regulator, uint8_t SLEEPEntry) |
| Enter the current core in SLEEP mode (CSLEEP). | |
| void | HAL_PWR_EnterSTOPMode (uint32_t Regulator, uint8_t STOPEntry) |
| Enter STOP mode. | |
| void | HAL_PWR_EnterSTANDBYMode (void) |
| Enter STANDBY mode. | |
| void | HAL_PWR_EnableSleepOnExit (void) |
| Indicate Sleep-On-Exit feature when returning from Handler mode to Thread mode. | |
| void | HAL_PWR_DisableSleepOnExit (void) |
| Disable Sleep-On-Exit feature when returning from Handler mode to Thread mode. | |
| void | HAL_PWR_EnableSEVOnPend (void) |
| Enable CORTEX SEVONPEND feature. | |
| void | HAL_PWR_DisableSEVOnPend (void) |
| Disable CORTEX SEVONPEND feature. | |
| void | HAL_PWR_PVD_IRQHandler (void) |
| This function handles the PWR PVD interrupt request. | |
| __weak void | HAL_PWR_PVDCallback (void) |
| PWR PVD interrupt callback. | |
PWR HAL module driver. This file provides firmware functions to manage the following functionalities of the Power Controller (PWR) peripheral: + Initialization and de-initialization functions. + Peripheral Control functions. + Interrupt Handling functions.
Copyright (c) 2017 STMicroelectronics. All rights reserved.
This software is licensed under terms that can be found in the LICENSE file in the root directory of this software component. If no LICENSE file comes with this software, it is provided AS-IS.
==============================================================================
##### PWR peripheral overview #####
==============================================================================
[..]
(#) The Power control (PWR) provides an overview of the supply architecture
for the different power domains and of the supply configuration
controller.
In the H7 family, the number of power domains is different between
device lines. This difference is due to characteristics of each device.
(#) Domain architecture overview for the different H7 lines:
(+) Dual core lines are STM32H745, STM32H747, STM32H755 and STM32H757.
These devices have 3 power domains (D1, D2 and D3).
The domain D1 contains a CPU (Cortex-M7), a Flash memory and some
peripherals. The D2 domain contains peripherals and a CPU
(Cortex-M4). The D3 domain contains the system control, I/O logic
and low-power peripherals.
(+) STM32H72x, STM32H73x, STM32H742, STM32H743, STM32H750 and STM32H753
devices have 3 power domains (D1, D2 and D3).
The domain D1 contains a CPU (Cortex-M7), a Flash memory and some
peripherals. The D2 domain contains peripherals. The D3 domains
contains the system control, I/O logic and low-power peripherals.
(+) STM32H7Axxx and STM32H7Bxxx devices have 2 power domains (CD and SRD).
The core domain (CD) contains a CPU (Cortex-M7), a Flash
memory and peripherals. The SmartRun domain contains the system
control, I/O logic and low-power peripherals.
(#) Every entity have low power mode as described below :
(#) The CPU low power modes are :
(+) CPU CRUN.
(+) CPU CSLEEP.
(+) CPU CSTOP.
(#) The domain low power modes are :
(+) DRUN.
(+) DSTOP.
(+) DSTANDBY.
(#) The SYSTEM low power modes are :
(+) RUN* : The Run* mode is entered after a POR reset and a wakeup from
Standby. In Run* mode, the performance is limited and the
system supply configuration shall be programmed. The system
enters Run mode only when the ACTVOSRDY bit in PWR control
status register 1 (PWR_CSR1) is set to 1.
(+) RUN.
(+) STOP.
(+) STANDBY.
==============================================================================
##### How to use this driver #####
==============================================================================
[..]
(#) Power management peripheral is active by default at startup level in
STM32h7xx lines.
(#) Call HAL_PWR_EnableBkUpAccess() and HAL_PWR_DisableBkUpAccess() functions
to enable/disable access to the backup domain (RTC registers, RTC backup
data registers and backup SRAM).
(#) Call HAL_PWR_ConfigPVD() after setting parameters to be configured (event
mode and voltage threshold) in order to set up the Power Voltage Detector,
then use HAL_PWR_EnablePVD() and HAL_PWR_DisablePVD() functions to start
and stop the PVD detection.
(+) PVD level could be one of the following values :
(++) 1V95
(++) 2V1
(++) 2V25
(++) 2V4
(++) 2V55
(++) 2V7
(++) 2V85
(++) External voltage level
(#) Call HAL_PWR_EnableWakeUpPin() and HAL_PWR_DisableWakeUpPin() functions
with the right parameter to configure the wake up pin polarity (Low or
High) and to enable and disable it.
(#) Call HAL_PWR_EnterSLEEPMode() function to enter the current Core in SLEEP
mode. Wake-up from SLEEP mode could be following to an event or an
interrupt according to low power mode intrinsic request called (__WFI()
or __WFE()).
Please ensure to clear all CPU pending events by calling
HAL_PWREx_ClearPendingEvent() function when trying to enter the Cortex-Mx
in SLEEP mode with __WFE() entry.
(#) Call HAL_PWR_EnterSTOPMode() function to enter the whole system to Stop 0
mode for single core devices. For dual core devices, this API will enter
the domain (containing Cortex-Mx that executing this function) in DSTOP
mode. According to the used parameter, user could select the regulator to
be kept actif in low power mode and wake-up event type.
Please ensure to clear all CPU pending events by calling
HAL_PWREx_ClearPendingEvent() function when trying to enter the Cortex-Mx
in CSTOP mode with __WFE() entry.
(#) Call HAL_PWR_EnterSTANDBYMode() function to enter the whole system in
STANDBY mode for single core devices. For dual core devices, this API
will enter the domain (containing Cortex-Mx that executing this function)
in DSTANDBY mode.
(#) Call HAL_PWR_EnableSleepOnExit() and HAL_PWR_DisableSleepOnExit() APIs to
enable and disable the Cortex-Mx re-entring in SLEEP mode after an
interruption handling is over.
(#) Call HAL_PWR_EnableSEVOnPend() and HAL_PWR_DisableSEVOnPend() functions
to configure the Cortex-Mx to wake-up after any pending event / interrupt
even if it's disabled or has insufficient priority to cause exception
entry.
(#) Call HAL_PWR_PVD_IRQHandler() function to handle the PWR PVD interrupt
request.
*** PWR HAL driver macros list ***
=============================================
[..]
Below the list of most used macros in PWR HAL driver.
(+) __HAL_PWR_VOLTAGESCALING_CONFIG() : Configure the main internal
regulator output voltage.
(+) __HAL_PWR_GET_FLAG() : Get the PWR pending flags.
(+) __HAL_PWR_CLEAR_FLAG() : Clear the PWR pending flags.
Definition in file stm32h7xx_hal_pwr.c.
1.7.6.1