STM32H735xx HAL User Manual
stm32h7xx_hal_sdram.h
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00001 /**
00002   ******************************************************************************
00003   * @file    stm32h7xx_hal_sdram.h
00004   * @author  MCD Application Team
00005   * @brief   Header file of SDRAM HAL module.
00006   ******************************************************************************
00007   * @attention
00008   *
00009   * Copyright (c) 2017 STMicroelectronics.
00010   * All rights reserved.
00011   *
00012   * This software is licensed under terms that can be found in the LICENSE file
00013   * in the root directory of this software component.
00014   * If no LICENSE file comes with this software, it is provided AS-IS.
00015   *
00016   ******************************************************************************
00017   */
00018 
00019 /* Define to prevent recursive inclusion -------------------------------------*/
00020 #ifndef STM32H7xx_HAL_SDRAM_H
00021 #define STM32H7xx_HAL_SDRAM_H
00022 
00023 #ifdef __cplusplus
00024 extern "C" {
00025 #endif
00026 
00027 
00028 /* Includes ------------------------------------------------------------------*/
00029 #include "stm32h7xx_ll_fmc.h"
00030 
00031 /** @addtogroup STM32H7xx_HAL_Driver
00032   * @{
00033   */
00034 
00035 /** @addtogroup SDRAM
00036   * @{
00037   */
00038 
00039 /* Exported typedef ----------------------------------------------------------*/
00040 
00041 /** @defgroup SDRAM_Exported_Types SDRAM Exported Types
00042   * @{
00043   */
00044 
00045 /**
00046   * @brief  HAL SDRAM State structure definition
00047   */
00048 typedef enum
00049 {
00050   HAL_SDRAM_STATE_RESET             = 0x00U,  /*!< SDRAM not yet initialized or disabled */
00051   HAL_SDRAM_STATE_READY             = 0x01U,  /*!< SDRAM initialized and ready for use   */
00052   HAL_SDRAM_STATE_BUSY              = 0x02U,  /*!< SDRAM internal process is ongoing     */
00053   HAL_SDRAM_STATE_ERROR             = 0x03U,  /*!< SDRAM error state                     */
00054   HAL_SDRAM_STATE_WRITE_PROTECTED   = 0x04U,  /*!< SDRAM device write protected          */
00055   HAL_SDRAM_STATE_PRECHARGED        = 0x05U   /*!< SDRAM device precharged               */
00056 
00057 } HAL_SDRAM_StateTypeDef;
00058 
00059 /**
00060   * @brief  SDRAM handle Structure definition
00061   */
00062 #if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1)
00063 typedef struct __SDRAM_HandleTypeDef
00064 #else
00065 typedef struct
00066 #endif /* USE_HAL_SDRAM_REGISTER_CALLBACKS  */
00067 {
00068   FMC_SDRAM_TypeDef             *Instance;  /*!< Register base address                 */
00069 
00070   FMC_SDRAM_InitTypeDef         Init;       /*!< SDRAM device configuration parameters */
00071 
00072   __IO HAL_SDRAM_StateTypeDef   State;      /*!< SDRAM access state                    */
00073 
00074   HAL_LockTypeDef               Lock;       /*!< SDRAM locking object                  */
00075 
00076   MDMA_HandleTypeDef             *hmdma;      /*!< Pointer DMA handler                   */
00077 
00078 #if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1)
00079   void (* MspInitCallback)(struct __SDRAM_HandleTypeDef *hsdram);               /*!< SDRAM Msp Init callback              */
00080   void (* MspDeInitCallback)(struct __SDRAM_HandleTypeDef *hsdram);             /*!< SDRAM Msp DeInit callback            */
00081   void (* RefreshErrorCallback)(struct __SDRAM_HandleTypeDef *hsdram);          /*!< SDRAM Refresh Error callback         */
00082   void (* DmaXferCpltCallback)(MDMA_HandleTypeDef *hmdma);                        /*!< SDRAM DMA Xfer Complete callback     */
00083   void (* DmaXferErrorCallback)(MDMA_HandleTypeDef *hmdma);                       /*!< SDRAM DMA Xfer Error callback        */
00084 #endif /* USE_HAL_SDRAM_REGISTER_CALLBACKS */
00085 } SDRAM_HandleTypeDef;
00086 
00087 #if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1)
00088 /**
00089   * @brief  HAL SDRAM Callback ID enumeration definition
00090   */
00091 typedef enum
00092 {
00093   HAL_SDRAM_MSP_INIT_CB_ID       = 0x00U,  /*!< SDRAM MspInit Callback ID           */
00094   HAL_SDRAM_MSP_DEINIT_CB_ID     = 0x01U,  /*!< SDRAM MspDeInit Callback ID         */
00095   HAL_SDRAM_REFRESH_ERR_CB_ID    = 0x02U,  /*!< SDRAM Refresh Error Callback ID     */
00096   HAL_SDRAM_DMA_XFER_CPLT_CB_ID  = 0x03U,  /*!< SDRAM DMA Xfer Complete Callback ID */
00097   HAL_SDRAM_DMA_XFER_ERR_CB_ID   = 0x04U   /*!< SDRAM DMA Xfer Error Callback ID    */
00098 } HAL_SDRAM_CallbackIDTypeDef;
00099 
00100 /**
00101   * @brief  HAL SDRAM Callback pointer definition
00102   */
00103 typedef void (*pSDRAM_CallbackTypeDef)(SDRAM_HandleTypeDef *hsdram);
00104 typedef void (*pSDRAM_DmaCallbackTypeDef)(MDMA_HandleTypeDef *hmdma);
00105 #endif /* USE_HAL_SDRAM_REGISTER_CALLBACKS */
00106 /**
00107   * @}
00108   */
00109 
00110 /* Exported constants --------------------------------------------------------*/
00111 /* Exported macro ------------------------------------------------------------*/
00112 
00113 /** @defgroup SDRAM_Exported_Macros SDRAM Exported Macros
00114   * @{
00115   */
00116 
00117 /** @brief Reset SDRAM handle state
00118   * @param  __HANDLE__ specifies the SDRAM handle.
00119   * @retval None
00120   */
00121 #if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1)
00122 #define __HAL_SDRAM_RESET_HANDLE_STATE(__HANDLE__)        do {                                               \
00123                                                                (__HANDLE__)->State = HAL_SDRAM_STATE_RESET;  \
00124                                                                (__HANDLE__)->MspInitCallback = NULL;         \
00125                                                                (__HANDLE__)->MspDeInitCallback = NULL;       \
00126                                                              } while(0)
00127 #else
00128 #define __HAL_SDRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SDRAM_STATE_RESET)
00129 #endif /* USE_HAL_SDRAM_REGISTER_CALLBACKS */
00130 /**
00131   * @}
00132   */
00133 
00134 /* Exported functions --------------------------------------------------------*/
00135 
00136 /** @addtogroup SDRAM_Exported_Functions SDRAM Exported Functions
00137   * @{
00138   */
00139 
00140 /** @addtogroup SDRAM_Exported_Functions_Group1
00141   * @{
00142   */
00143 
00144 /* Initialization/de-initialization functions *********************************/
00145 HAL_StatusTypeDef HAL_SDRAM_Init(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_TimingTypeDef *Timing);
00146 HAL_StatusTypeDef HAL_SDRAM_DeInit(SDRAM_HandleTypeDef *hsdram);
00147 void HAL_SDRAM_MspInit(SDRAM_HandleTypeDef *hsdram);
00148 void HAL_SDRAM_MspDeInit(SDRAM_HandleTypeDef *hsdram);
00149 
00150 void HAL_SDRAM_IRQHandler(SDRAM_HandleTypeDef *hsdram);
00151 void HAL_SDRAM_RefreshErrorCallback(SDRAM_HandleTypeDef *hsdram);
00152 void HAL_SDRAM_DMA_XferCpltCallback(MDMA_HandleTypeDef *hmdma);
00153 void HAL_SDRAM_DMA_XferErrorCallback(MDMA_HandleTypeDef *hmdma);
00154 
00155 /**
00156   * @}
00157   */
00158 
00159 /** @addtogroup SDRAM_Exported_Functions_Group2
00160   * @{
00161   */
00162 /* I/O operation functions ****************************************************/
00163 HAL_StatusTypeDef HAL_SDRAM_Read_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pDstBuffer,
00164                                     uint32_t BufferSize);
00165 HAL_StatusTypeDef HAL_SDRAM_Write_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pSrcBuffer,
00166                                      uint32_t BufferSize);
00167 HAL_StatusTypeDef HAL_SDRAM_Read_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pDstBuffer,
00168                                      uint32_t BufferSize);
00169 HAL_StatusTypeDef HAL_SDRAM_Write_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pSrcBuffer,
00170                                       uint32_t BufferSize);
00171 HAL_StatusTypeDef HAL_SDRAM_Read_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pDstBuffer,
00172                                      uint32_t BufferSize);
00173 HAL_StatusTypeDef HAL_SDRAM_Write_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer,
00174                                       uint32_t BufferSize);
00175 
00176 HAL_StatusTypeDef HAL_SDRAM_Read_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pDstBuffer,
00177                                      uint32_t BufferSize);
00178 HAL_StatusTypeDef HAL_SDRAM_Write_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer,
00179                                       uint32_t BufferSize);
00180 
00181 #if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1)
00182 /* SDRAM callback registering/unregistering */
00183 HAL_StatusTypeDef HAL_SDRAM_RegisterCallback(SDRAM_HandleTypeDef *hsdram, HAL_SDRAM_CallbackIDTypeDef CallbackId,
00184                                              pSDRAM_CallbackTypeDef pCallback);
00185 HAL_StatusTypeDef HAL_SDRAM_UnRegisterCallback(SDRAM_HandleTypeDef *hsdram, HAL_SDRAM_CallbackIDTypeDef CallbackId);
00186 HAL_StatusTypeDef HAL_SDRAM_RegisterDmaCallback(SDRAM_HandleTypeDef *hsdram, HAL_SDRAM_CallbackIDTypeDef CallbackId,
00187                                                 pSDRAM_DmaCallbackTypeDef pCallback);
00188 #endif /* USE_HAL_SDRAM_REGISTER_CALLBACKS */
00189 
00190 /**
00191   * @}
00192   */
00193 
00194 /** @addtogroup SDRAM_Exported_Functions_Group3
00195   * @{
00196   */
00197 /* SDRAM Control functions  *****************************************************/
00198 HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Enable(SDRAM_HandleTypeDef *hsdram);
00199 HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Disable(SDRAM_HandleTypeDef *hsdram);
00200 HAL_StatusTypeDef HAL_SDRAM_SendCommand(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_CommandTypeDef *Command,
00201                                         uint32_t Timeout);
00202 HAL_StatusTypeDef HAL_SDRAM_ProgramRefreshRate(SDRAM_HandleTypeDef *hsdram, uint32_t RefreshRate);
00203 HAL_StatusTypeDef HAL_SDRAM_SetAutoRefreshNumber(SDRAM_HandleTypeDef *hsdram, uint32_t AutoRefreshNumber);
00204 uint32_t          HAL_SDRAM_GetModeStatus(SDRAM_HandleTypeDef *hsdram);
00205 
00206 /**
00207   * @}
00208   */
00209 
00210 /** @addtogroup SDRAM_Exported_Functions_Group4
00211   * @{
00212   */
00213 /* SDRAM State functions ********************************************************/
00214 HAL_SDRAM_StateTypeDef  HAL_SDRAM_GetState(SDRAM_HandleTypeDef *hsdram);
00215 /**
00216   * @}
00217   */
00218 
00219 /**
00220   * @}
00221   */
00222 
00223 /**
00224   * @}
00225   */
00226 
00227 /**
00228   * @}
00229   */
00230 
00231 
00232 #ifdef __cplusplus
00233 }
00234 #endif
00235 
00236 #endif /* STM32H7xx_HAL_SDRAM_H */