STM32H735xx HAL User Manual
stm32h7xx_hal_spdifrx.c
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00001 /**
00002   ******************************************************************************
00003   * @file    stm32h7xx_hal_spdifrx.c
00004   * @author  MCD Application Team
00005   * @brief   This file provides firmware functions to manage the following
00006   *          functionalities of the SPDIFRX audio interface:
00007   *           + Initialization and Configuration
00008   *           + Data transfers functions
00009   *           + DMA transfers management
00010   *           + Interrupts and flags management
00011   *
00012   ******************************************************************************
00013   * @attention
00014   *
00015   * Copyright (c) 2017 STMicroelectronics.
00016   * All rights reserved.
00017   *
00018   * This software is licensed under terms that can be found in the LICENSE file
00019   * in the root directory of this software component.
00020   * If no LICENSE file comes with this software, it is provided AS-IS.
00021   *
00022   ******************************************************************************
00023   @verbatim
00024  ===============================================================================
00025                   ##### How to use this driver #####
00026  ===============================================================================
00027  [..]
00028     The SPDIFRX HAL driver can be used as follow:
00029 
00030     (#) Declare SPDIFRX_HandleTypeDef handle structure.
00031     (#) Initialize the SPDIFRX low level resources by implement the HAL_SPDIFRX_MspInit() API:
00032         (##) Enable the SPDIFRX interface clock.
00033         (##) SPDIFRX pins configuration:
00034             (+++) Enable the clock for the SPDIFRX GPIOs.
00035             (+++) Configure these SPDIFRX pins as alternate function pull-up.
00036         (##) NVIC configuration if you need to use interrupt process (HAL_SPDIFRX_ReceiveCtrlFlow_IT() and HAL_SPDIFRX_ReceiveDataFlow_IT() API's).
00037             (+++) Configure the SPDIFRX interrupt priority.
00038             (+++) Enable the NVIC SPDIFRX IRQ handle.
00039         (##) DMA Configuration if you need to use DMA process (HAL_SPDIFRX_ReceiveDataFlow_DMA() and HAL_SPDIFRX_ReceiveCtrlFlow_DMA() API's).
00040             (+++) Declare a DMA handle structure for the reception of the Data Flow channel.
00041             (+++) Declare a DMA handle structure for the reception of the Control Flow channel.
00042             (+++) Enable the DMAx interface clock.
00043             (+++) Configure the declared DMA handle structure CtrlRx/DataRx with the required parameters.
00044             (+++) Configure the DMA Channel.
00045             (+++) Associate the initialized DMA handle to the SPDIFRX DMA CtrlRx/DataRx handle.
00046             (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the
00047                 DMA CtrlRx/DataRx channel.
00048 
00049    (#) Program the input selection, re-tries number, wait for activity, channel status selection, data format, stereo mode and masking of user bits
00050        using HAL_SPDIFRX_Init() function.
00051 
00052    -@- The specific SPDIFRX interrupts (RXNE/CSRNE and Error Interrupts) will be managed using the macros
00053        __SPDIFRX_ENABLE_IT() and __SPDIFRX_DISABLE_IT() inside the receive process.
00054    -@- Make sure that ck_spdif clock is configured.
00055 
00056    (#) Three operation modes are available within this driver :
00057 
00058    *** Polling mode for reception operation (for debug purpose) ***
00059    ================================================================
00060    [..]
00061      (+) Receive data flow in blocking mode using HAL_SPDIFRX_ReceiveDataFlow()
00062      (+) Receive control flow of data in blocking mode using HAL_SPDIFRX_ReceiveCtrlFlow()
00063 
00064    *** Interrupt mode for reception operation ***
00065    =========================================
00066    [..]
00067      (+) Receive an amount of data (Data Flow) in non blocking mode using HAL_SPDIFRX_ReceiveDataFlow_IT()
00068      (+) Receive an amount of data (Control Flow) in non blocking mode using HAL_SPDIFRX_ReceiveCtrlFlow_IT()
00069      (+) At reception end of half transfer HAL_SPDIFRX_RxHalfCpltCallback is executed and user can
00070          add his own code by customization of function pointer HAL_SPDIFRX_RxHalfCpltCallback
00071      (+) At reception end of transfer HAL_SPDIFRX_RxCpltCallback is executed and user can
00072          add his own code by customization of function pointer HAL_SPDIFRX_RxCpltCallback
00073      (+) In case of transfer Error, HAL_SPDIFRX_ErrorCallback() function is executed and user can
00074          add his own code by customization of function pointer HAL_SPDIFRX_ErrorCallback
00075 
00076    *** DMA mode for reception operation ***
00077    ========================================
00078    [..]
00079      (+) Receive an amount of data (Data Flow) in non blocking mode (DMA) using HAL_SPDIFRX_ReceiveDataFlow_DMA()
00080      (+) Receive an amount of data (Control Flow) in non blocking mode (DMA) using HAL_SPDIFRX_ReceiveCtrlFlow_DMA()
00081      (+) At reception end of half transfer HAL_SPDIFRX_RxHalfCpltCallback is executed and user can
00082          add his own code by customization of function pointer HAL_SPDIFRX_RxHalfCpltCallback
00083      (+) At reception end of transfer HAL_SPDIFRX_RxCpltCallback is executed and user can
00084          add his own code by customization of function pointer HAL_SPDIFRX_RxCpltCallback
00085      (+) In case of transfer Error, HAL_SPDIFRX_ErrorCallback() function is executed and user can
00086          add his own code by customization of function pointer HAL_SPDIFRX_ErrorCallback
00087      (+) Stop the DMA Transfer using HAL_SPDIFRX_DMAStop()
00088 
00089    *** SPDIFRX HAL driver macros list ***
00090    =============================================
00091    [..]
00092      Below the list of most used macros in SPDIFRX HAL driver.
00093       (+) __HAL_SPDIFRX_IDLE: Disable the specified SPDIFRX peripheral (IDEL State)
00094       (+) __HAL_SPDIFRX_SYNC: Enable the synchronization state of the specified SPDIFRX peripheral (SYNC State)
00095       (+) __HAL_SPDIFRX_RCV: Enable the receive state of the specified SPDIFRX peripheral (RCV State)
00096       (+) __HAL_SPDIFRX_ENABLE_IT : Enable the specified SPDIFRX interrupts
00097       (+) __HAL_SPDIFRX_DISABLE_IT : Disable the specified SPDIFRX interrupts
00098       (+) __HAL_SPDIFRX_GET_FLAG: Check whether the specified SPDIFRX flag is set or not.
00099 
00100    [..]
00101       (@) You can refer to the SPDIFRX HAL driver header file for more useful macros
00102 
00103   *** Callback registration ***
00104   =============================================
00105 
00106   The compilation define  USE_HAL_SPDIFRX_REGISTER_CALLBACKS when set to 1
00107   allows the user to configure dynamically the driver callbacks.
00108   Use HAL_SPDIFRX_RegisterCallback() function to register an interrupt callback.
00109 
00110   The HAL_SPDIFRX_RegisterCallback() function allows to register the following callbacks:
00111     (+) RxHalfCpltCallback  : SPDIFRX Data flow half completed callback.
00112     (+) RxCpltCallback      : SPDIFRX Data flow completed callback.
00113     (+) CxHalfCpltCallback  : SPDIFRX Control flow half completed callback.
00114     (+) CxCpltCallback      : SPDIFRX Control flow completed callback.
00115     (+) ErrorCallback       : SPDIFRX error callback.
00116     (+) MspInitCallback     : SPDIFRX MspInit.
00117     (+) MspDeInitCallback   : SPDIFRX MspDeInit.
00118   This function takes as parameters the HAL peripheral handle, the Callback ID
00119   and a pointer to the user callback function.
00120 
00121   Use HAL_SPDIFRX_UnRegisterCallback() function to reset a callback to the default
00122   weak function.
00123   The HAL_SPDIFRX_UnRegisterCallback() function takes as parameters the HAL peripheral handle,
00124   and the Callback ID.
00125   This function allows to reset the following callbacks:
00126     (+) RxHalfCpltCallback  : SPDIFRX Data flow half completed callback.
00127     (+) RxCpltCallback      : SPDIFRX Data flow completed callback.
00128     (+) CxHalfCpltCallback  : SPDIFRX Control flow half completed callback.
00129     (+) CxCpltCallback      : SPDIFRX Control flow completed callback.
00130     (+) ErrorCallback       : SPDIFRX error callback.
00131     (+) MspInitCallback     : SPDIFRX MspInit.
00132     (+) MspDeInitCallback   : SPDIFRX MspDeInit.
00133 
00134   By default, after the HAL_SPDIFRX_Init() and when the state is HAL_SPDIFRX_STATE_RESET
00135   all callbacks are set to the corresponding weak functions :
00136   HAL_SPDIFRX_RxHalfCpltCallback() , HAL_SPDIFRX_RxCpltCallback(), HAL_SPDIFRX_CxHalfCpltCallback(),
00137   HAL_SPDIFRX_CxCpltCallback() and HAL_SPDIFRX_ErrorCallback()
00138   Exception done for MspInit and MspDeInit functions that are
00139   reset to the legacy weak function in the HAL_SPDIFRX_Init()/ HAL_SPDIFRX_DeInit() only when
00140   these callbacks pointers are NULL (not registered beforehand).
00141   If not, MspInit or MspDeInit callbacks pointers are not null, the HAL_SPDIFRX_Init() / HAL_SPDIFRX_DeInit()
00142   keep and use the user MspInit/MspDeInit functions (registered beforehand)
00143 
00144   Callbacks can be registered/unregistered in HAL_SPDIFRX_STATE_READY state only.
00145   Exception done MspInit/MspDeInit callbacks that can be registered/unregistered
00146   in HAL_SPDIFRX_STATE_READY or HAL_SPDIFRX_STATE_RESET state,
00147   thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
00148   In that case first register the MspInit/MspDeInit user callbacks
00149   using HAL_SPDIFRX_RegisterCallback() before calling HAL_SPDIFRX_DeInit()
00150   or HAL_SPDIFRX_Init() function.
00151 
00152   When The compilation define USE_HAL_SPDIFRX_REGISTER_CALLBACKS is set to 0 or
00153   not defined, the callback registration feature is not available and all callbacks
00154   are set to the corresponding weak functions.
00155 
00156   @endverbatim
00157   */
00158 
00159 /* Includes ------------------------------------------------------------------*/
00160 #include "stm32h7xx_hal.h"
00161 
00162 /** @addtogroup STM32H7xx_HAL_Driver
00163   * @{
00164   */
00165 
00166 /** @defgroup SPDIFRX SPDIFRX
00167   * @brief SPDIFRX HAL module driver
00168   * @{
00169   */
00170 
00171 #ifdef HAL_SPDIFRX_MODULE_ENABLED
00172 #if defined (SPDIFRX)
00173 
00174 /* Private typedef -----------------------------------------------------------*/
00175 /* Private define ------------------------------------------------------------*/
00176 #define SPDIFRX_TIMEOUT_VALUE  0xFFFFU
00177 
00178 /* Private macro -------------------------------------------------------------*/
00179 /* Private variables ---------------------------------------------------------*/
00180 /* Private function prototypes -----------------------------------------------*/
00181 /** @addtogroup SPDIFRX_Private_Functions
00182   * @{
00183   */
00184 static void  SPDIFRX_DMARxCplt(DMA_HandleTypeDef *hdma);
00185 static void  SPDIFRX_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
00186 static void  SPDIFRX_DMACxCplt(DMA_HandleTypeDef *hdma);
00187 static void  SPDIFRX_DMACxHalfCplt(DMA_HandleTypeDef *hdma);
00188 static void  SPDIFRX_DMAError(DMA_HandleTypeDef *hdma);
00189 static void  SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif);
00190 static void  SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif);
00191 static HAL_StatusTypeDef  SPDIFRX_WaitOnFlagUntilTimeout(SPDIFRX_HandleTypeDef *hspdif, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t tickstart);
00192 /**
00193   * @}
00194   */
00195 /* Exported functions ---------------------------------------------------------*/
00196 
00197 /** @defgroup SPDIFRX_Exported_Functions SPDIFRX Exported Functions
00198   * @{
00199   */
00200 
00201 /** @defgroup  SPDIFRX_Exported_Functions_Group1 Initialization and de-initialization functions
00202   *  @brief    Initialization and Configuration functions
00203   *
00204   @verbatim
00205   ===============================================================================
00206   ##### Initialization and de-initialization functions #####
00207   ===============================================================================
00208   [..]  This subsection provides a set of functions allowing to initialize and
00209         de-initialize the SPDIFRX peripheral:
00210 
00211   (+) User must Implement HAL_SPDIFRX_MspInit() function in which he configures
00212       all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
00213 
00214   (+) Call the function HAL_SPDIFRX_Init() to configure the SPDIFRX peripheral with
00215       the selected configuration:
00216   (++) Input Selection (IN0, IN1,...)
00217   (++) Maximum allowed re-tries during synchronization phase
00218   (++) Wait for activity on SPDIF selected input
00219   (++) Channel status selection (from channel A or B)
00220   (++) Data format (LSB, MSB, ...)
00221   (++) Stereo mode
00222   (++) User bits masking (PT,C,U,V,...)
00223 
00224   (+) Call the function HAL_SPDIFRX_DeInit() to restore the default configuration
00225       of the selected SPDIFRXx peripheral.
00226   @endverbatim
00227   * @{
00228   */
00229 
00230 /**
00231   * @brief Initializes the SPDIFRX according to the specified parameters
00232   *        in the SPDIFRX_InitTypeDef and create the associated handle.
00233   * @param hspdif SPDIFRX handle
00234   * @retval HAL status
00235   */
00236 HAL_StatusTypeDef HAL_SPDIFRX_Init(SPDIFRX_HandleTypeDef *hspdif)
00237 {
00238   uint32_t tmpreg;
00239 
00240   /* Check the SPDIFRX handle allocation */
00241   if(hspdif == NULL)
00242   {
00243     return HAL_ERROR;
00244   }
00245 
00246   /* Check the SPDIFRX parameters */
00247   assert_param(IS_STEREO_MODE(hspdif->Init.StereoMode));
00248   assert_param(IS_SPDIFRX_INPUT_SELECT(hspdif->Init.InputSelection));
00249   assert_param(IS_SPDIFRX_MAX_RETRIES(hspdif->Init.Retries));
00250   assert_param(IS_SPDIFRX_WAIT_FOR_ACTIVITY(hspdif->Init.WaitForActivity));
00251   assert_param(IS_SPDIFRX_CHANNEL(hspdif->Init.ChannelSelection));
00252   assert_param(IS_SPDIFRX_DATA_FORMAT(hspdif->Init.DataFormat));
00253   assert_param(IS_PREAMBLE_TYPE_MASK(hspdif->Init.PreambleTypeMask));
00254   assert_param(IS_CHANNEL_STATUS_MASK(hspdif->Init.ChannelStatusMask));
00255   assert_param(IS_VALIDITY_MASK(hspdif->Init.ValidityBitMask));
00256   assert_param(IS_PARITY_ERROR_MASK(hspdif->Init.ParityErrorMask));
00257   assert_param(IS_SYMBOL_CLOCK_GEN(hspdif->Init.SymbolClockGen));
00258   assert_param(IS_SYMBOL_CLOCK_GEN(hspdif->Init.BackupSymbolClockGen));
00259 
00260 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
00261   if(hspdif->State == HAL_SPDIFRX_STATE_RESET)
00262   {
00263     /* Allocate lock resource and initialize it */
00264     hspdif->Lock = HAL_UNLOCKED;
00265 
00266     hspdif->RxHalfCpltCallback  = HAL_SPDIFRX_RxHalfCpltCallback; /* Legacy weak RxHalfCpltCallback */
00267     hspdif->RxCpltCallback      = HAL_SPDIFRX_RxCpltCallback;     /* Legacy weak RxCpltCallback     */
00268     hspdif->CxHalfCpltCallback  = HAL_SPDIFRX_CxHalfCpltCallback; /* Legacy weak CxHalfCpltCallback */
00269     hspdif->CxCpltCallback      = HAL_SPDIFRX_CxCpltCallback;     /* Legacy weak CxCpltCallback     */
00270     hspdif->ErrorCallback       = HAL_SPDIFRX_ErrorCallback;      /* Legacy weak ErrorCallback      */
00271 
00272     if(hspdif->MspInitCallback == NULL)
00273     {
00274       hspdif->MspInitCallback = HAL_SPDIFRX_MspInit; /* Legacy weak MspInit  */
00275     }
00276 
00277     /* Init the low level hardware */
00278     hspdif->MspInitCallback(hspdif);
00279   }
00280 #else
00281   if(hspdif->State == HAL_SPDIFRX_STATE_RESET)
00282   {
00283     /* Allocate lock resource and initialize it */
00284     hspdif->Lock = HAL_UNLOCKED;
00285     /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
00286     HAL_SPDIFRX_MspInit(hspdif);
00287   }
00288 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
00289 
00290   /* SPDIFRX peripheral state is BUSY */
00291   hspdif->State = HAL_SPDIFRX_STATE_BUSY;
00292 
00293   /* Disable SPDIFRX interface (IDLE State) */
00294   __HAL_SPDIFRX_IDLE(hspdif);
00295 
00296   /* Reset the old SPDIFRX CR configuration */
00297   tmpreg = hspdif->Instance->CR;
00298 
00299   tmpreg &= ~(SPDIFRX_CR_RXSTEO  | SPDIFRX_CR_DRFMT  | SPDIFRX_CR_PMSK |
00300               SPDIFRX_CR_VMSK | SPDIFRX_CR_CUMSK | SPDIFRX_CR_PTMSK  |
00301               SPDIFRX_CR_CHSEL | SPDIFRX_CR_NBTR | SPDIFRX_CR_WFA |
00302               SPDIFRX_CR_CKSEN | SPDIFRX_CR_CKSBKPEN |
00303               SPDIFRX_CR_INSEL);
00304 
00305   /* Sets the new configuration of the SPDIFRX peripheral */
00306   tmpreg |= (hspdif->Init.StereoMode |
00307              hspdif->Init.InputSelection |
00308              hspdif->Init.Retries |
00309              hspdif->Init.WaitForActivity |
00310              hspdif->Init.ChannelSelection |
00311              hspdif->Init.DataFormat |
00312              hspdif->Init.PreambleTypeMask |
00313              hspdif->Init.ChannelStatusMask |
00314              hspdif->Init.ValidityBitMask |
00315              hspdif->Init.ParityErrorMask
00316              );
00317 
00318   if(hspdif->Init.SymbolClockGen == ENABLE)
00319   {
00320     tmpreg |= SPDIFRX_CR_CKSEN;
00321   }
00322 
00323   if(hspdif->Init.BackupSymbolClockGen == ENABLE)
00324   {
00325     tmpreg |= SPDIFRX_CR_CKSBKPEN;
00326   }
00327 
00328   hspdif->Instance->CR = tmpreg;
00329 
00330   hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
00331 
00332   /* SPDIFRX peripheral state is READY*/
00333   hspdif->State = HAL_SPDIFRX_STATE_READY;
00334 
00335   return HAL_OK;
00336 }
00337 
00338 /**
00339   * @brief DeInitializes the SPDIFRX peripheral
00340   * @param hspdif SPDIFRX handle
00341   * @retval HAL status
00342   */
00343 HAL_StatusTypeDef HAL_SPDIFRX_DeInit(SPDIFRX_HandleTypeDef *hspdif)
00344 {
00345   /* Check the SPDIFRX handle allocation */
00346   if(hspdif == NULL)
00347   {
00348     return HAL_ERROR;
00349   }
00350 
00351   /* Check the parameters */
00352   assert_param(IS_SPDIFRX_ALL_INSTANCE(hspdif->Instance));
00353 
00354   hspdif->State = HAL_SPDIFRX_STATE_BUSY;
00355 
00356   /* Disable SPDIFRX interface (IDLE state) */
00357   __HAL_SPDIFRX_IDLE(hspdif);
00358 
00359 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
00360   if(hspdif->MspDeInitCallback == NULL)
00361   {
00362     hspdif->MspDeInitCallback = HAL_SPDIFRX_MspDeInit; /* Legacy weak MspDeInit  */
00363   }
00364 
00365   /* DeInit the low level hardware */
00366   hspdif->MspDeInitCallback(hspdif);
00367 #else
00368   /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
00369   HAL_SPDIFRX_MspDeInit(hspdif);
00370 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
00371 
00372   hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
00373 
00374   /* SPDIFRX peripheral state is RESET*/
00375   hspdif->State = HAL_SPDIFRX_STATE_RESET;
00376 
00377   /* Release Lock */
00378   __HAL_UNLOCK(hspdif);
00379 
00380   return HAL_OK;
00381 }
00382 
00383 /**
00384   * @brief SPDIFRX MSP Init
00385   * @param hspdif SPDIFRX handle
00386   * @retval None
00387   */
00388 __weak void HAL_SPDIFRX_MspInit(SPDIFRX_HandleTypeDef *hspdif)
00389 {
00390   /* Prevent unused argument(s) compilation warning */
00391   UNUSED(hspdif);
00392 
00393   /* NOTE : This function Should not be modified, when the callback is needed,
00394   the HAL_SPDIFRX_MspInit could be implemented in the user file
00395   */
00396 }
00397 
00398 /**
00399   * @brief SPDIFRX MSP DeInit
00400   * @param hspdif SPDIFRX handle
00401   * @retval None
00402   */
00403 __weak void HAL_SPDIFRX_MspDeInit(SPDIFRX_HandleTypeDef *hspdif)
00404 {
00405   /* Prevent unused argument(s) compilation warning */
00406   UNUSED(hspdif);
00407 
00408   /* NOTE : This function Should not be modified, when the callback is needed,
00409   the HAL_SPDIFRX_MspDeInit could be implemented in the user file
00410   */
00411 }
00412 
00413 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
00414 /**
00415   * @brief  Register a User SPDIFRX Callback
00416   *         To be used instead of the weak predefined callback
00417   * @param  hspdif SPDIFRX handle
00418   * @param  CallbackID ID of the callback to be registered
00419   *         This parameter can be one of the following values:
00420   *          @arg @ref HAL_SPDIFRX_RX_HALF_CB_ID    SPDIFRX Data flow half completed callback ID
00421   *          @arg @ref HAL_SPDIFRX_RX_CPLT_CB_ID    SPDIFRX Data flow completed callback ID
00422   *          @arg @ref HAL_SPDIFRX_CX_HALF_CB_ID    SPDIFRX Control flow half completed callback ID
00423   *          @arg @ref HAL_SPDIFRX_CX_CPLT_CB_ID    SPDIFRX Control flow completed callback ID
00424   *          @arg @ref HAL_SPDIFRX_ERROR_CB_ID      SPDIFRX error callback ID
00425   *          @arg @ref HAL_SPDIFRX_MSPINIT_CB_ID    MspInit callback ID
00426   *          @arg @ref HAL_SPDIFRX_MSPDEINIT_CB_ID  MspDeInit callback ID
00427   * @param  pCallback pointer to the Callback function
00428   * @retval HAL status
00429   */
00430 HAL_StatusTypeDef HAL_SPDIFRX_RegisterCallback(SPDIFRX_HandleTypeDef *hspdif, HAL_SPDIFRX_CallbackIDTypeDef CallbackID, pSPDIFRX_CallbackTypeDef pCallback)
00431 {
00432   HAL_StatusTypeDef status = HAL_OK;
00433 
00434   if(pCallback == NULL)
00435   {
00436     /* Update the error code */
00437     hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_INVALID_CALLBACK;
00438     return HAL_ERROR;
00439   }
00440   /* Process locked */
00441   __HAL_LOCK(hspdif);
00442 
00443   if(HAL_SPDIFRX_STATE_READY == hspdif->State)
00444   {
00445     switch (CallbackID)
00446     {
00447       case HAL_SPDIFRX_RX_HALF_CB_ID :
00448         hspdif->RxHalfCpltCallback = pCallback;
00449         break;
00450 
00451       case HAL_SPDIFRX_RX_CPLT_CB_ID :
00452         hspdif->RxCpltCallback = pCallback;
00453         break;
00454 
00455       case HAL_SPDIFRX_CX_HALF_CB_ID :
00456         hspdif->CxHalfCpltCallback = pCallback;
00457         break;
00458 
00459       case HAL_SPDIFRX_CX_CPLT_CB_ID :
00460         hspdif->CxCpltCallback = pCallback;
00461         break;
00462 
00463       case HAL_SPDIFRX_ERROR_CB_ID :
00464         hspdif->ErrorCallback = pCallback;
00465         break;
00466 
00467       case HAL_SPDIFRX_MSPINIT_CB_ID :
00468         hspdif->MspInitCallback = pCallback;
00469         break;
00470 
00471       case HAL_SPDIFRX_MSPDEINIT_CB_ID :
00472         hspdif->MspDeInitCallback = pCallback;
00473         break;
00474 
00475       default :
00476         /* Update the error code */
00477         hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_INVALID_CALLBACK;
00478         /* Return error status */
00479         status =  HAL_ERROR;
00480         break;
00481     }
00482   }
00483   else if(HAL_SPDIFRX_STATE_RESET == hspdif->State)
00484   {
00485     switch (CallbackID)
00486     {
00487       case HAL_SPDIFRX_MSPINIT_CB_ID :
00488         hspdif->MspInitCallback = pCallback;
00489         break;
00490 
00491       case HAL_SPDIFRX_MSPDEINIT_CB_ID :
00492         hspdif->MspDeInitCallback = pCallback;
00493         break;
00494 
00495       default :
00496         /* Update the error code */
00497         hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_INVALID_CALLBACK;
00498        /* Return error status */
00499         status =  HAL_ERROR;
00500         break;
00501     }
00502   }
00503   else
00504   {
00505     /* Update the error code */
00506     hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_INVALID_CALLBACK;
00507     /* Return error status */
00508     status =  HAL_ERROR;
00509   }
00510 
00511   /* Release Lock */
00512   __HAL_UNLOCK(hspdif);
00513   return status;
00514 }
00515 
00516 /**
00517   * @brief  Unregister a SPDIFRX Callback
00518   *         SPDIFRX callabck is redirected to the weak predefined callback
00519   * @param  hspdif SPDIFRX handle
00520   * @param  CallbackID ID of the callback to be unregistered
00521   *         This parameter can be one of the following values:
00522   *          @arg @ref HAL_SPDIFRX_RX_HALF_CB_ID    SPDIFRX Data flow half completed callback ID
00523   *          @arg @ref HAL_SPDIFRX_RX_CPLT_CB_ID    SPDIFRX Data flow completed callback ID
00524   *          @arg @ref HAL_SPDIFRX_CX_HALF_CB_ID    SPDIFRX Control flow half completed callback ID
00525   *          @arg @ref HAL_SPDIFRX_CX_CPLT_CB_ID    SPDIFRX Control flow completed callback ID
00526   *          @arg @ref HAL_SPDIFRX_ERROR_CB_ID      SPDIFRX error callback ID
00527   *          @arg @ref HAL_SPDIFRX_MSPINIT_CB_ID    MspInit callback ID
00528   *          @arg @ref HAL_SPDIFRX_MSPDEINIT_CB_ID  MspDeInit callback ID
00529   * @retval HAL status
00530   */
00531 HAL_StatusTypeDef HAL_SPDIFRX_UnRegisterCallback(SPDIFRX_HandleTypeDef *hspdif, HAL_SPDIFRX_CallbackIDTypeDef CallbackID)
00532 {
00533 HAL_StatusTypeDef status = HAL_OK;
00534 
00535   /* Process locked */
00536   __HAL_LOCK(hspdif);
00537 
00538   if(HAL_SPDIFRX_STATE_READY == hspdif->State)
00539   {
00540     switch (CallbackID)
00541     {
00542       case HAL_SPDIFRX_RX_HALF_CB_ID :
00543         hspdif->RxHalfCpltCallback = HAL_SPDIFRX_RxHalfCpltCallback;
00544         break;
00545 
00546       case HAL_SPDIFRX_RX_CPLT_CB_ID :
00547         hspdif->RxCpltCallback = HAL_SPDIFRX_RxCpltCallback;
00548         break;
00549 
00550       case HAL_SPDIFRX_CX_HALF_CB_ID :
00551         hspdif->CxHalfCpltCallback = HAL_SPDIFRX_CxHalfCpltCallback;
00552         break;
00553 
00554       case HAL_SPDIFRX_CX_CPLT_CB_ID :
00555         hspdif->CxCpltCallback = HAL_SPDIFRX_CxCpltCallback;
00556         break;
00557 
00558       case HAL_SPDIFRX_ERROR_CB_ID :
00559         hspdif->ErrorCallback = HAL_SPDIFRX_ErrorCallback;
00560         break;
00561 
00562       default :
00563         /* Update the error code */
00564         hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_INVALID_CALLBACK;
00565        /* Return error status */
00566         status =  HAL_ERROR;
00567         break;
00568     }
00569   }
00570   else if(HAL_SPDIFRX_STATE_RESET == hspdif->State)
00571   {
00572     switch (CallbackID)
00573     {
00574       case HAL_SPDIFRX_MSPINIT_CB_ID :
00575         hspdif->MspInitCallback = HAL_SPDIFRX_MspInit;  /* Legacy weak MspInit  */
00576         break;
00577 
00578       case HAL_SPDIFRX_MSPDEINIT_CB_ID :
00579         hspdif->MspDeInitCallback = HAL_SPDIFRX_MspDeInit;  /* Legacy weak MspInit  */
00580         break;
00581 
00582       default :
00583         /* Update the error code */
00584         hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_INVALID_CALLBACK;
00585         /* Return error status */
00586         status =  HAL_ERROR;
00587         break;
00588     }
00589   }
00590   else
00591   {
00592     /* Update the error code */
00593     hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_INVALID_CALLBACK;
00594     /* Return error status */
00595     status =  HAL_ERROR;
00596   }
00597 
00598   /* Release Lock */
00599   __HAL_UNLOCK(hspdif);
00600   return status;
00601 }
00602 
00603 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
00604 
00605 /**
00606   * @brief Set the SPDIFRX  data format according to the specified parameters in the SPDIFRX_InitTypeDef.
00607   * @param hspdif SPDIFRX handle
00608   * @param sDataFormat SPDIFRX data format
00609   * @retval HAL status
00610   */
00611 HAL_StatusTypeDef HAL_SPDIFRX_SetDataFormat(SPDIFRX_HandleTypeDef *hspdif, SPDIFRX_SetDataFormatTypeDef sDataFormat)
00612 {
00613   uint32_t tmpreg;
00614 
00615   /* Check the SPDIFRX handle allocation */
00616   if(hspdif == NULL)
00617   {
00618     return HAL_ERROR;
00619   }
00620 
00621   /* Check the SPDIFRX parameters */
00622   assert_param(IS_STEREO_MODE(sDataFormat.StereoMode));
00623   assert_param(IS_SPDIFRX_DATA_FORMAT(sDataFormat.DataFormat));
00624   assert_param(IS_PREAMBLE_TYPE_MASK(sDataFormat.PreambleTypeMask));
00625   assert_param(IS_CHANNEL_STATUS_MASK(sDataFormat.ChannelStatusMask));
00626   assert_param(IS_VALIDITY_MASK(sDataFormat.ValidityBitMask));
00627   assert_param(IS_PARITY_ERROR_MASK(sDataFormat.ParityErrorMask));
00628 
00629   /* Reset the old SPDIFRX CR configuration */
00630   tmpreg = hspdif->Instance->CR;
00631 
00632   if(((tmpreg & SPDIFRX_STATE_RCV) == SPDIFRX_STATE_RCV) &&
00633      (((tmpreg & SPDIFRX_CR_DRFMT) != sDataFormat.DataFormat) ||
00634       ((tmpreg & SPDIFRX_CR_RXSTEO) != sDataFormat.StereoMode)))
00635   {
00636     return HAL_ERROR;
00637   }
00638 
00639   tmpreg &= ~(SPDIFRX_CR_RXSTEO  | SPDIFRX_CR_DRFMT  | SPDIFRX_CR_PMSK |
00640               SPDIFRX_CR_VMSK | SPDIFRX_CR_CUMSK | SPDIFRX_CR_PTMSK);
00641 
00642   /* Configure the new data format */
00643   tmpreg |= (sDataFormat.StereoMode |
00644              sDataFormat.DataFormat |
00645              sDataFormat.PreambleTypeMask |
00646              sDataFormat.ChannelStatusMask |
00647              sDataFormat.ValidityBitMask |
00648              sDataFormat.ParityErrorMask);
00649 
00650   hspdif->Instance->CR = tmpreg;
00651 
00652   return HAL_OK;
00653 }
00654 
00655 /**
00656   * @}
00657   */
00658 
00659 /** @defgroup SPDIFRX_Exported_Functions_Group2 IO operation functions
00660   *  @brief Data transfers functions
00661   *
00662 @verbatim
00663 ===============================================================================
00664                      ##### IO operation functions #####
00665 ===============================================================================
00666     [..]
00667     This subsection provides a set of functions allowing to manage the SPDIFRX data
00668     transfers.
00669 
00670     (#) There is two mode of transfer:
00671         (++) Blocking mode : The communication is performed in the polling mode.
00672              The status of all data processing is returned by the same function
00673              after finishing transfer.
00674         (++) No-Blocking mode : The communication is performed using Interrupts
00675              or DMA. These functions return the status of the transfer start-up.
00676              The end of the data processing will be indicated through the
00677              dedicated SPDIFRX IRQ when using Interrupt mode or the DMA IRQ when
00678              using DMA mode.
00679 
00680     (#) Blocking mode functions are :
00681         (++) HAL_SPDIFRX_ReceiveDataFlow()
00682         (++) HAL_SPDIFRX_ReceiveCtrlFlow()
00683                 (+@) Do not use blocking mode to receive both control and data flow at the same time.
00684 
00685     (#) No-Blocking mode functions with Interrupt are :
00686         (++) HAL_SPDIFRX_ReceiveCtrlFlow_IT()
00687         (++) HAL_SPDIFRX_ReceiveDataFlow_IT()
00688 
00689     (#) No-Blocking mode functions with DMA are :
00690         (++) HAL_SPDIFRX_ReceiveCtrlFlow_DMA()
00691         (++) HAL_SPDIFRX_ReceiveDataFlow_DMA()
00692 
00693     (#) A set of Transfer Complete Callbacks are provided in No_Blocking mode:
00694         (++) HAL_SPDIFRX_RxCpltCallback()
00695         (++) HAL_SPDIFRX_CxCpltCallback()
00696 
00697 @endverbatim
00698 * @{
00699 */
00700 
00701 /**
00702   * @brief  Receives an amount of data (Data Flow) in blocking mode.
00703   * @param  hspdif pointer to SPDIFRX_HandleTypeDef structure that contains
00704   *                 the configuration information for SPDIFRX module.
00705   * @param  pData Pointer to data buffer
00706   * @param  Size Amount of data to be received
00707   * @param  Timeout Timeout duration
00708   * @retval HAL status
00709   */
00710 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size, uint32_t Timeout)
00711 {
00712   uint32_t tickstart;
00713   uint16_t sizeCounter = Size;
00714   uint32_t *pTmpBuf = pData;
00715 
00716   if((pData == NULL ) || (Size == 0U))
00717   {
00718     return  HAL_ERROR;
00719   }
00720 
00721   if(hspdif->State == HAL_SPDIFRX_STATE_READY)
00722   {
00723     /* Process Locked */
00724     __HAL_LOCK(hspdif);
00725 
00726     hspdif->State = HAL_SPDIFRX_STATE_BUSY;
00727 
00728     /* Start synchronisation */
00729     __HAL_SPDIFRX_SYNC(hspdif);
00730 
00731     /* Get tick */
00732     tickstart = HAL_GetTick();
00733 
00734     /* Wait until SYNCD flag is set */
00735     if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, Timeout, tickstart) != HAL_OK)
00736     {
00737       return HAL_TIMEOUT;
00738     }
00739 
00740     /* Start reception */
00741     __HAL_SPDIFRX_RCV(hspdif);
00742 
00743     /* Receive data flow */
00744     while(sizeCounter > 0U)
00745     {
00746       /* Get tick */
00747       tickstart = HAL_GetTick();
00748 
00749       /* Wait until RXNE flag is set */
00750       if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_RXNE, RESET, Timeout, tickstart) != HAL_OK)
00751       {
00752         return HAL_TIMEOUT;
00753       }
00754 
00755       (*pTmpBuf) = hspdif->Instance->DR;
00756       pTmpBuf++;
00757       sizeCounter--;
00758     }
00759 
00760     /* SPDIFRX ready */
00761     hspdif->State = HAL_SPDIFRX_STATE_READY;
00762 
00763     /* Process Unlocked */
00764     __HAL_UNLOCK(hspdif);
00765 
00766     return HAL_OK;
00767   }
00768   else
00769   {
00770     return HAL_BUSY;
00771   }
00772 }
00773 
00774 /**
00775   * @brief  Receives an amount of data (Control Flow) in blocking mode.
00776   * @param  hspdif pointer to a SPDIFRX_HandleTypeDef structure that contains
00777   *                 the configuration information for SPDIFRX module.
00778   * @param  pData Pointer to data buffer
00779   * @param  Size Amount of data to be received
00780   * @param  Timeout Timeout duration
00781   * @retval HAL status
00782   */
00783 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveCtrlFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size, uint32_t Timeout)
00784 {
00785   uint32_t tickstart;
00786   uint16_t sizeCounter = Size;
00787   uint32_t *pTmpBuf = pData;
00788 
00789   if((pData == NULL ) || (Size == 0U))
00790   {
00791     return  HAL_ERROR;
00792   }
00793 
00794   if(hspdif->State == HAL_SPDIFRX_STATE_READY)
00795   {
00796     /* Process Locked */
00797     __HAL_LOCK(hspdif);
00798 
00799     hspdif->State = HAL_SPDIFRX_STATE_BUSY;
00800 
00801     /* Start synchronization */
00802     __HAL_SPDIFRX_SYNC(hspdif);
00803 
00804     /* Get tick */
00805     tickstart = HAL_GetTick();
00806 
00807     /* Wait until SYNCD flag is set */
00808     if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, Timeout, tickstart) != HAL_OK)
00809     {
00810       return HAL_TIMEOUT;
00811     }
00812 
00813     /* Start reception */
00814     __HAL_SPDIFRX_RCV(hspdif);
00815 
00816     /* Receive control flow */
00817     while(sizeCounter > 0U)
00818     {
00819       /* Get tick */
00820       tickstart = HAL_GetTick();
00821 
00822       /* Wait until CSRNE flag is set */
00823       if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_CSRNE, RESET, Timeout, tickstart) != HAL_OK)
00824       {
00825         return HAL_TIMEOUT;
00826       }
00827 
00828       (*pTmpBuf) = hspdif->Instance->CSR;
00829       pTmpBuf++;
00830       sizeCounter--;
00831     }
00832 
00833     /* SPDIFRX ready */
00834     hspdif->State = HAL_SPDIFRX_STATE_READY;
00835 
00836     /* Process Unlocked */
00837     __HAL_UNLOCK(hspdif);
00838 
00839     return HAL_OK;
00840   }
00841   else
00842   {
00843     return HAL_BUSY;
00844   }
00845 }
00846 
00847 /**
00848   * @brief Receive an amount of data (Data Flow) in non-blocking mode with Interrupt
00849   * @param hspdif SPDIFRX handle
00850   * @param pData a 32-bit pointer to the Receive data buffer.
00851   * @param Size number of data sample to be received .
00852   * @retval HAL status
00853   */
00854 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
00855 {
00856   uint32_t count = SPDIFRX_TIMEOUT_VALUE * (SystemCoreClock / 24U / 1000U);
00857 
00858   const HAL_SPDIFRX_StateTypeDef tempState = hspdif->State;
00859 
00860   if((tempState == HAL_SPDIFRX_STATE_READY) || (tempState == HAL_SPDIFRX_STATE_BUSY_CX))
00861   {
00862     if((pData == NULL) || (Size == 0U))
00863     {
00864       return HAL_ERROR;
00865     }
00866 
00867     /* Process Locked */
00868     __HAL_LOCK(hspdif);
00869 
00870     hspdif->pRxBuffPtr = pData;
00871     hspdif->RxXferSize = Size;
00872     hspdif->RxXferCount = Size;
00873 
00874     hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
00875 
00876     /* Check if a receive process is ongoing or not */
00877     hspdif->State = HAL_SPDIFRX_STATE_BUSY_RX;
00878 
00879     /* Enable the SPDIFRX  PE Error Interrupt */
00880     __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
00881 
00882     /* Enable the SPDIFRX  OVR Error Interrupt */
00883     __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
00884 
00885     /* Enable the SPDIFRX RXNE interrupt */
00886     __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_RXNE);
00887 
00888     if((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_RCV)
00889     {
00890       /* Start synchronization */
00891       __HAL_SPDIFRX_SYNC(hspdif);
00892 
00893       /* Wait until SYNCD flag is set */
00894       do
00895       {
00896         if (count == 0U)
00897         {
00898           /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
00899           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
00900           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
00901           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
00902           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
00903           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
00904           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
00905           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
00906 
00907           hspdif->State= HAL_SPDIFRX_STATE_READY;
00908 
00909           /* Process Unlocked */
00910           __HAL_UNLOCK(hspdif);
00911 
00912           return HAL_TIMEOUT;
00913         }
00914         count--;
00915       } while (__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_SYNCD) == RESET);
00916 
00917       /* Start reception */
00918       __HAL_SPDIFRX_RCV(hspdif);
00919     }
00920 
00921     /* Process Unlocked */
00922     __HAL_UNLOCK(hspdif);
00923 
00924     return HAL_OK;
00925   }
00926   else
00927   {
00928     return HAL_BUSY;
00929   }
00930 }
00931 
00932 /**
00933   * @brief Receive an amount of data (Control Flow) with Interrupt
00934   * @param hspdif SPDIFRX handle
00935   * @param pData a 32-bit pointer to the Receive data buffer.
00936   * @param Size number of data sample (Control Flow) to be received
00937   * @retval HAL status
00938   */
00939 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveCtrlFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
00940 {
00941   uint32_t count = SPDIFRX_TIMEOUT_VALUE * (SystemCoreClock / 24U / 1000U);
00942 
00943   const HAL_SPDIFRX_StateTypeDef tempState = hspdif->State;
00944 
00945   if((tempState == HAL_SPDIFRX_STATE_READY) || (tempState == HAL_SPDIFRX_STATE_BUSY_RX))
00946   {
00947     if((pData == NULL ) || (Size == 0U))
00948     {
00949       return HAL_ERROR;
00950     }
00951 
00952     /* Process Locked */
00953     __HAL_LOCK(hspdif);
00954 
00955     hspdif->pCsBuffPtr = pData;
00956     hspdif->CsXferSize = Size;
00957     hspdif->CsXferCount = Size;
00958 
00959     hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
00960 
00961     /* Check if a receive process is ongoing or not */
00962     hspdif->State = HAL_SPDIFRX_STATE_BUSY_CX;
00963 
00964     /* Enable the SPDIFRX PE Error Interrupt */
00965     __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
00966 
00967     /* Enable the SPDIFRX OVR Error Interrupt */
00968     __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
00969 
00970     /* Enable the SPDIFRX CSRNE interrupt */
00971     __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
00972 
00973     if((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_RCV)
00974     {
00975       /* Start synchronization */
00976       __HAL_SPDIFRX_SYNC(hspdif);
00977 
00978       /* Wait until SYNCD flag is set */
00979       do
00980       {
00981         if (count == 0U)
00982         {
00983           /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
00984           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
00985           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
00986           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
00987           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
00988           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
00989           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
00990           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
00991 
00992           hspdif->State= HAL_SPDIFRX_STATE_READY;
00993 
00994           /* Process Unlocked */
00995           __HAL_UNLOCK(hspdif);
00996 
00997           return HAL_TIMEOUT;
00998         }
00999         count--;
01000       } while (__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_SYNCD) == RESET);
01001 
01002       /* Start reception */
01003       __HAL_SPDIFRX_RCV(hspdif);
01004     }
01005 
01006     /* Process Unlocked */
01007     __HAL_UNLOCK(hspdif);
01008 
01009     return HAL_OK;
01010   }
01011   else
01012   {
01013     return HAL_BUSY;
01014   }
01015 }
01016 
01017 /**
01018   * @brief Receive an amount of data (Data Flow) mode with DMA
01019   * @param hspdif SPDIFRX handle
01020   * @param pData a 32-bit pointer to the Receive data buffer.
01021   * @param Size number of data sample to be received
01022   * @retval HAL status
01023   */
01024 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
01025 {
01026   uint32_t count = SPDIFRX_TIMEOUT_VALUE * (SystemCoreClock / 24U / 1000U);
01027 
01028   const HAL_SPDIFRX_StateTypeDef tempState = hspdif->State;
01029 
01030   if((pData == NULL) || (Size == 0U))
01031   {
01032     return  HAL_ERROR;
01033   }
01034 
01035   if((tempState == HAL_SPDIFRX_STATE_READY) || (tempState == HAL_SPDIFRX_STATE_BUSY_CX))
01036   {
01037     /* Process Locked */
01038     __HAL_LOCK(hspdif);
01039 
01040     hspdif->pRxBuffPtr = pData;
01041     hspdif->RxXferSize = Size;
01042     hspdif->RxXferCount = Size;
01043 
01044     hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
01045     hspdif->State = HAL_SPDIFRX_STATE_BUSY_RX;
01046 
01047     /* Set the SPDIFRX Rx DMA Half transfer complete callback */
01048     hspdif->hdmaDrRx->XferHalfCpltCallback = SPDIFRX_DMARxHalfCplt;
01049 
01050     /* Set the SPDIFRX Rx DMA transfer complete callback */
01051     hspdif->hdmaDrRx->XferCpltCallback = SPDIFRX_DMARxCplt;
01052 
01053     /* Set the DMA error callback */
01054     hspdif->hdmaDrRx->XferErrorCallback = SPDIFRX_DMAError;
01055 
01056     /* Enable the DMA request */
01057     if(HAL_DMA_Start_IT(hspdif->hdmaDrRx, (uint32_t)&hspdif->Instance->DR, (uint32_t)hspdif->pRxBuffPtr, Size) != HAL_OK)
01058     {
01059       /* Set SPDIFRX error */
01060       hspdif->ErrorCode = HAL_SPDIFRX_ERROR_DMA;
01061 
01062       /* Set SPDIFRX state */
01063       hspdif->State = HAL_SPDIFRX_STATE_ERROR;
01064 
01065       /* Process Unlocked */
01066       __HAL_UNLOCK(hspdif);
01067 
01068       return HAL_ERROR;
01069     }
01070 
01071     /* Enable RXDMAEN bit in SPDIFRX CR register for data flow reception*/
01072     hspdif->Instance->CR |= SPDIFRX_CR_RXDMAEN;
01073 
01074     if((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_RCV)
01075     {
01076       /* Start synchronization */
01077       __HAL_SPDIFRX_SYNC(hspdif);
01078 
01079       /* Wait until SYNCD flag is set */
01080       do
01081       {
01082         if (count == 0U)
01083         {
01084           /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
01085           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
01086           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
01087           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
01088           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
01089           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
01090           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
01091           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
01092 
01093           hspdif->State= HAL_SPDIFRX_STATE_READY;
01094 
01095           /* Process Unlocked */
01096           __HAL_UNLOCK(hspdif);
01097 
01098           return HAL_TIMEOUT;
01099         }
01100         count--;
01101       } while (__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_SYNCD) == RESET);
01102 
01103       /* Start reception */
01104       __HAL_SPDIFRX_RCV(hspdif);
01105     }
01106 
01107     /* Process Unlocked */
01108     __HAL_UNLOCK(hspdif);
01109 
01110     return HAL_OK;
01111   }
01112   else
01113   {
01114     return HAL_BUSY;
01115   }
01116 }
01117 
01118 /**
01119   * @brief Receive an amount of data (Control Flow) with DMA
01120   * @param hspdif SPDIFRX handle
01121   * @param pData a 32-bit pointer to the Receive data buffer.
01122   * @param Size number of data (Control Flow) sample to be received
01123   * @retval HAL status
01124   */
01125 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveCtrlFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
01126 {
01127   uint32_t count = SPDIFRX_TIMEOUT_VALUE * (SystemCoreClock / 24U / 1000U);
01128 
01129   const HAL_SPDIFRX_StateTypeDef tempState = hspdif->State;
01130 
01131   if((pData == NULL) || (Size == 0U))
01132   {
01133     return  HAL_ERROR;
01134   }
01135 
01136   if((tempState == HAL_SPDIFRX_STATE_READY) || (tempState == HAL_SPDIFRX_STATE_BUSY_RX))
01137   {
01138     hspdif->pCsBuffPtr = pData;
01139     hspdif->CsXferSize = Size;
01140     hspdif->CsXferCount = Size;
01141 
01142     /* Process Locked */
01143     __HAL_LOCK(hspdif);
01144 
01145     hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
01146     hspdif->State = HAL_SPDIFRX_STATE_BUSY_CX;
01147 
01148     /* Set the SPDIFRX Rx DMA Half transfer complete callback */
01149     hspdif->hdmaCsRx->XferHalfCpltCallback = SPDIFRX_DMACxHalfCplt;
01150 
01151     /* Set the SPDIFRX Rx DMA transfer complete callback */
01152     hspdif->hdmaCsRx->XferCpltCallback = SPDIFRX_DMACxCplt;
01153 
01154     /* Set the DMA error callback */
01155     hspdif->hdmaCsRx->XferErrorCallback = SPDIFRX_DMAError;
01156 
01157     /* Enable the DMA request */
01158     if(HAL_DMA_Start_IT(hspdif->hdmaCsRx, (uint32_t)&hspdif->Instance->CSR, (uint32_t)hspdif->pCsBuffPtr, Size) != HAL_OK)
01159     {
01160       /* Set SPDIFRX error */
01161       hspdif->ErrorCode = HAL_SPDIFRX_ERROR_DMA;
01162 
01163       /* Set SPDIFRX state */
01164       hspdif->State = HAL_SPDIFRX_STATE_ERROR;
01165 
01166       /* Process Unlocked */
01167       __HAL_UNLOCK(hspdif);
01168 
01169       return HAL_ERROR;
01170     }
01171 
01172     /* Enable CBDMAEN bit in SPDIFRX CR register for control flow reception*/
01173     hspdif->Instance->CR |= SPDIFRX_CR_CBDMAEN;
01174 
01175     if((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_RCV)
01176     {
01177       /* Start synchronization */
01178       __HAL_SPDIFRX_SYNC(hspdif);
01179 
01180       /* Wait until SYNCD flag is set */
01181       do
01182       {
01183         if (count == 0U)
01184         {
01185           /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
01186           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
01187           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
01188           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
01189           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
01190           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
01191           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
01192           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
01193 
01194           hspdif->State= HAL_SPDIFRX_STATE_READY;
01195 
01196           /* Process Unlocked */
01197           __HAL_UNLOCK(hspdif);
01198 
01199           return HAL_TIMEOUT;
01200         }
01201         count--;
01202       } while (__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_SYNCD) == RESET);
01203 
01204       /* Start reception */
01205       __HAL_SPDIFRX_RCV(hspdif);
01206     }
01207 
01208     /* Process Unlocked */
01209     __HAL_UNLOCK(hspdif);
01210 
01211     return HAL_OK;
01212   }
01213   else
01214   {
01215     return HAL_BUSY;
01216   }
01217 }
01218 
01219 /**
01220   * @brief stop the audio stream receive from the Media.
01221   * @param hspdif SPDIFRX handle
01222   * @retval None
01223   */
01224 HAL_StatusTypeDef HAL_SPDIFRX_DMAStop(SPDIFRX_HandleTypeDef *hspdif)
01225 {
01226   /* Process Locked */
01227   __HAL_LOCK(hspdif);
01228 
01229   /* Disable the SPDIFRX DMA requests */
01230   hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_RXDMAEN);
01231   hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_CBDMAEN);
01232 
01233   /* Disable the SPDIFRX DMA channel */
01234   __HAL_DMA_DISABLE(hspdif->hdmaDrRx);
01235   __HAL_DMA_DISABLE(hspdif->hdmaCsRx);
01236 
01237   /* Disable SPDIFRX peripheral */
01238   __HAL_SPDIFRX_IDLE(hspdif);
01239 
01240   hspdif->State = HAL_SPDIFRX_STATE_READY;
01241 
01242   /* Process Unlocked */
01243   __HAL_UNLOCK(hspdif);
01244 
01245   return HAL_OK;
01246 }
01247 
01248 /**
01249   * @brief  This function handles SPDIFRX interrupt request.
01250   * @param  hspdif SPDIFRX handle
01251   * @retval HAL status
01252   */
01253 void HAL_SPDIFRX_IRQHandler(SPDIFRX_HandleTypeDef *hspdif)
01254 {
01255   uint32_t itFlag   = hspdif->Instance->SR;
01256   uint32_t itSource = hspdif->Instance->IMR;
01257 
01258   /* SPDIFRX in mode Data Flow Reception */
01259   if(((itFlag & SPDIFRX_FLAG_RXNE) == SPDIFRX_FLAG_RXNE) && ((itSource &  SPDIFRX_IT_RXNE) == SPDIFRX_IT_RXNE))
01260   {
01261     __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_IT_RXNE);
01262     SPDIFRX_ReceiveDataFlow_IT(hspdif);
01263   }
01264 
01265   /* SPDIFRX in mode Control Flow Reception */
01266   if(((itFlag & SPDIFRX_FLAG_CSRNE) == SPDIFRX_FLAG_CSRNE) && ((itSource &  SPDIFRX_IT_CSRNE) == SPDIFRX_IT_CSRNE))
01267   {
01268     __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_IT_CSRNE);
01269     SPDIFRX_ReceiveControlFlow_IT(hspdif);
01270   }
01271 
01272   /* SPDIFRX Overrun error interrupt occurred */
01273   if(((itFlag & SPDIFRX_FLAG_OVR) == SPDIFRX_FLAG_OVR) && ((itSource &  SPDIFRX_IT_OVRIE) == SPDIFRX_IT_OVRIE))
01274   {
01275     __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_IT_OVRIE);
01276 
01277     /* Change the SPDIFRX error code */
01278     hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_OVR;
01279 
01280     /* the transfer is not stopped */
01281     HAL_SPDIFRX_ErrorCallback(hspdif);
01282   }
01283 
01284   /* SPDIFRX Parity error interrupt occurred */
01285   if(((itFlag & SPDIFRX_FLAG_PERR) == SPDIFRX_FLAG_PERR) && ((itSource &  SPDIFRX_IT_PERRIE) == SPDIFRX_IT_PERRIE))
01286   {
01287     __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_IT_PERRIE);
01288 
01289     /* Change the SPDIFRX error code */
01290     hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_PE;
01291 
01292     /* the transfer is not stopped */
01293     HAL_SPDIFRX_ErrorCallback(hspdif);
01294   }
01295 }
01296 
01297 /**
01298   * @brief Rx Transfer (Data flow) half completed callbacks
01299   * @param hspdif SPDIFRX handle
01300   * @retval None
01301   */
01302 __weak void HAL_SPDIFRX_RxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
01303 {
01304   /* Prevent unused argument(s) compilation warning */
01305   UNUSED(hspdif);
01306 
01307   /* NOTE : This function Should not be modified, when the callback is needed,
01308             the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
01309   */
01310 }
01311 
01312 /**
01313   * @brief Rx Transfer (Data flow) completed callbacks
01314   * @param hspdif SPDIFRX handle
01315   * @retval None
01316   */
01317 __weak void HAL_SPDIFRX_RxCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
01318 {
01319   /* Prevent unused argument(s) compilation warning */
01320   UNUSED(hspdif);
01321 
01322   /* NOTE : This function Should not be modified, when the callback is needed,
01323             the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
01324   */
01325 }
01326 
01327 /**
01328   * @brief Rx (Control flow) Transfer half completed callbacks
01329   * @param hspdif SPDIFRX handle
01330   * @retval None
01331   */
01332 __weak void HAL_SPDIFRX_CxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
01333 {
01334   /* Prevent unused argument(s) compilation warning */
01335   UNUSED(hspdif);
01336 
01337   /* NOTE : This function Should not be modified, when the callback is needed,
01338             the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
01339   */
01340 }
01341 
01342 /**
01343   * @brief Rx Transfer (Control flow) completed callbacks
01344   * @param hspdif SPDIFRX handle
01345   * @retval None
01346   */
01347 __weak void HAL_SPDIFRX_CxCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
01348 {
01349   /* Prevent unused argument(s) compilation warning */
01350   UNUSED(hspdif);
01351 
01352   /* NOTE : This function Should not be modified, when the callback is needed,
01353             the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
01354   */
01355 }
01356 
01357 /**
01358   * @brief SPDIFRX error callbacks
01359   * @param hspdif SPDIFRX handle
01360   * @retval None
01361   */
01362 __weak void HAL_SPDIFRX_ErrorCallback(SPDIFRX_HandleTypeDef *hspdif)
01363 {
01364   /* Prevent unused argument(s) compilation warning */
01365   UNUSED(hspdif);
01366 
01367   /* NOTE : This function Should not be modified, when the callback is needed,
01368             the HAL_SPDIFRX_ErrorCallback could be implemented in the user file
01369   */
01370 }
01371 
01372 /**
01373   * @}
01374   */
01375 
01376 /** @defgroup SPDIFRX_Exported_Functions_Group3 Peripheral State and Errors functions
01377   *  @brief   Peripheral State functions
01378   *
01379 @verbatim
01380 ===============================================================================
01381 ##### Peripheral State and Errors functions #####
01382 ===============================================================================
01383 [..]
01384 This subsection permit to get in run-time the status of the peripheral
01385 and the data flow.
01386 
01387 @endverbatim
01388   * @{
01389   */
01390 
01391 /**
01392   * @brief  Return the SPDIFRX state
01393   * @param  hspdif SPDIFRX handle
01394   * @retval HAL state
01395   */
01396 HAL_SPDIFRX_StateTypeDef HAL_SPDIFRX_GetState(SPDIFRX_HandleTypeDef const * const hspdif)
01397 {
01398   return hspdif->State;
01399 }
01400 
01401 /**
01402   * @brief  Return the SPDIFRX error code
01403   * @param  hspdif SPDIFRX handle
01404   * @retval SPDIFRX Error Code
01405   */
01406 uint32_t HAL_SPDIFRX_GetError(SPDIFRX_HandleTypeDef const * const hspdif)
01407 {
01408   return hspdif->ErrorCode;
01409 }
01410 
01411 /**
01412   * @}
01413   */
01414 
01415 /**
01416   * @brief DMA SPDIFRX receive process (Data flow) complete callback
01417   * @param hdma DMA handle
01418   * @retval None
01419   */
01420 static void SPDIFRX_DMARxCplt(DMA_HandleTypeDef *hdma)
01421 {
01422   SPDIFRX_HandleTypeDef* hspdif = ( SPDIFRX_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
01423 
01424   /* Disable Rx DMA Request */
01425   if(hdma->Init.Mode != DMA_CIRCULAR)
01426   {
01427     hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_RXDMAEN);
01428     hspdif->RxXferCount = 0;
01429     hspdif->State = HAL_SPDIFRX_STATE_READY;
01430   }
01431 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
01432   hspdif->RxCpltCallback(hspdif);
01433 #else
01434   HAL_SPDIFRX_RxCpltCallback(hspdif);
01435 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
01436 }
01437 
01438 /**
01439   * @brief DMA SPDIFRX receive process (Data flow) half complete callback
01440   * @param hdma DMA handle
01441   * @retval None
01442   */
01443 static void SPDIFRX_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
01444 {
01445   SPDIFRX_HandleTypeDef* hspdif = (SPDIFRX_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
01446 
01447 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
01448   hspdif->RxHalfCpltCallback(hspdif);
01449 #else
01450   HAL_SPDIFRX_RxHalfCpltCallback(hspdif);
01451 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
01452 }
01453 
01454 
01455 /**
01456   * @brief DMA SPDIFRX receive process (Control flow) complete callback
01457   * @param hdma DMA handle
01458   * @retval None
01459   */
01460 static void SPDIFRX_DMACxCplt(DMA_HandleTypeDef *hdma)
01461 {
01462   SPDIFRX_HandleTypeDef* hspdif = ( SPDIFRX_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
01463 
01464   /* Disable Cb DMA Request */
01465   hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_CBDMAEN);
01466   hspdif->CsXferCount = 0;
01467 
01468   hspdif->State = HAL_SPDIFRX_STATE_READY;
01469 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
01470   hspdif->CxCpltCallback(hspdif);
01471 #else
01472   HAL_SPDIFRX_CxCpltCallback(hspdif);
01473 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
01474 }
01475 
01476 /**
01477   * @brief DMA SPDIFRX receive process (Control flow) half complete callback
01478   * @param hdma DMA handle
01479   * @retval None
01480   */
01481 static void SPDIFRX_DMACxHalfCplt(DMA_HandleTypeDef *hdma)
01482 {
01483   SPDIFRX_HandleTypeDef* hspdif = (SPDIFRX_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
01484 
01485 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
01486   hspdif->CxHalfCpltCallback(hspdif);
01487 #else
01488   HAL_SPDIFRX_CxHalfCpltCallback(hspdif);
01489 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
01490 }
01491 
01492 /**
01493   * @brief DMA SPDIFRX communication error callback
01494   * @param hdma DMA handle
01495   * @retval None
01496   */
01497 static void SPDIFRX_DMAError(DMA_HandleTypeDef *hdma)
01498 {
01499   SPDIFRX_HandleTypeDef* hspdif = ( SPDIFRX_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
01500 
01501   /* Disable Rx and Cb DMA Request */
01502   hspdif->Instance->CR &= (uint16_t)(~(SPDIFRX_CR_RXDMAEN | SPDIFRX_CR_CBDMAEN));
01503   hspdif->RxXferCount = 0;
01504 
01505   hspdif->State= HAL_SPDIFRX_STATE_READY;
01506 
01507   /* Set the error code and execute error callback*/
01508   hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_DMA;
01509 
01510 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
01511   /* The transfer is not stopped */
01512   hspdif->ErrorCallback(hspdif);
01513 #else
01514   /* The transfer is not stopped */
01515   HAL_SPDIFRX_ErrorCallback(hspdif);
01516 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
01517 }
01518 
01519 /**
01520   * @brief Receive an amount of data (Data Flow) with Interrupt
01521   * @param hspdif SPDIFRX handle
01522   * @retval None
01523   */
01524 static void SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif)
01525 {
01526   /* Receive data */
01527   (*hspdif->pRxBuffPtr) = hspdif->Instance->DR;
01528   hspdif->pRxBuffPtr++;
01529   hspdif->RxXferCount--;
01530 
01531   if(hspdif->RxXferCount == 0U)
01532   {
01533     /* Disable RXNE/PE and OVR interrupts */
01534     __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE | SPDIFRX_IT_PERRIE | SPDIFRX_IT_RXNE);
01535 
01536     hspdif->State = HAL_SPDIFRX_STATE_READY;
01537 
01538     /* Process Unlocked */
01539     __HAL_UNLOCK(hspdif);
01540 
01541 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
01542   hspdif->RxCpltCallback(hspdif);
01543 #else
01544   HAL_SPDIFRX_RxCpltCallback(hspdif);
01545 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
01546   }
01547 }
01548 
01549 /**
01550   * @brief Receive an amount of data (Control Flow) with Interrupt
01551   * @param hspdif SPDIFRX handle
01552   * @retval None
01553   */
01554 static void SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif)
01555 {
01556   /* Receive data */
01557   (*hspdif->pCsBuffPtr) = hspdif->Instance->CSR;
01558   hspdif->pCsBuffPtr++;
01559   hspdif->CsXferCount--;
01560 
01561   if(hspdif->CsXferCount == 0U)
01562   {
01563     /* Disable CSRNE interrupt */
01564     __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
01565 
01566     hspdif->State = HAL_SPDIFRX_STATE_READY;
01567 
01568     /* Process Unlocked */
01569     __HAL_UNLOCK(hspdif);
01570 
01571 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
01572   hspdif->CxCpltCallback(hspdif);
01573 #else
01574   HAL_SPDIFRX_CxCpltCallback(hspdif);
01575 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
01576   }
01577 }
01578 
01579 /**
01580   * @brief This function handles SPDIFRX Communication Timeout.
01581   * @param hspdif SPDIFRX handle
01582   * @param Flag Flag checked
01583   * @param Status Value of the flag expected
01584   * @param Timeout Duration of the timeout
01585   * @param tickstart Tick start value
01586   * @retval HAL status
01587   */
01588 static HAL_StatusTypeDef SPDIFRX_WaitOnFlagUntilTimeout(SPDIFRX_HandleTypeDef *hspdif, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t tickstart)
01589 {
01590   /* Wait until flag is set */
01591   while(__HAL_SPDIFRX_GET_FLAG(hspdif, Flag) == Status)
01592   {
01593     /* Check for the Timeout */
01594     if(Timeout != HAL_MAX_DELAY)
01595     {
01596       if(((HAL_GetTick() - tickstart ) > Timeout) || (Timeout == 0U))
01597       {
01598         /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
01599         __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
01600         __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
01601         __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
01602         __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
01603         __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
01604         __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
01605         __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
01606 
01607         hspdif->State= HAL_SPDIFRX_STATE_READY;
01608 
01609         /* Process Unlocked */
01610         __HAL_UNLOCK(hspdif);
01611 
01612         return HAL_TIMEOUT;
01613       }
01614     }
01615   }
01616 
01617   return HAL_OK;
01618 }
01619 
01620 /**
01621   * @}
01622   */
01623 
01624 
01625 #endif /* SPDIFRX */
01626 #endif /* HAL_SPDIFRX_MODULE_ENABLED */
01627 /**
01628   * @}
01629   */
01630 
01631 /**
01632   * @}
01633   */