STM32H735xx HAL User Manual
stm32h7xx_hal_spi_ex.c
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00001 /**
00002   ******************************************************************************
00003   * @file    stm32h7xx_hal_spi_ex.c
00004   * @author  MCD Application Team
00005   * @brief   Extended SPI HAL module driver.
00006   *          This file provides firmware functions to manage the following
00007   *          SPI peripheral extended functionalities :
00008   *           + IO operation functions
00009   *           + Peripheral Control functions
00010   *
00011   ******************************************************************************
00012   * @attention
00013   *
00014   * Copyright (c) 2017 STMicroelectronics.
00015   * All rights reserved.
00016   *
00017   * This software is licensed under terms that can be found in the LICENSE file
00018   * in the root directory of this software component.
00019   * If no LICENSE file comes with this software, it is provided AS-IS.
00020   *
00021   ******************************************************************************
00022   */
00023 
00024 /* Includes ------------------------------------------------------------------*/
00025 #include "stm32h7xx_hal.h"
00026 
00027 /** @addtogroup STM32H7xx_HAL_Driver
00028   * @{
00029   */
00030 
00031 /** @defgroup SPIEx SPIEx
00032   * @brief SPI Extended HAL module driver
00033   * @{
00034   */
00035 #ifdef HAL_SPI_MODULE_ENABLED
00036 
00037 /* Private typedef -----------------------------------------------------------*/
00038 /* Private defines -----------------------------------------------------------*/
00039 /* Private macros ------------------------------------------------------------*/
00040 /* Private variables ---------------------------------------------------------*/
00041 /* Private function prototypes -----------------------------------------------*/
00042 /* Exported functions --------------------------------------------------------*/
00043 
00044 /** @defgroup SPIEx_Exported_Functions SPIEx Exported Functions
00045   * @{
00046   */
00047 
00048 /** @defgroup SPIEx_Exported_Functions_Group1 IO operation functions
00049   *  @brief   Data transfers functions
00050   *
00051 @verbatim
00052   ==============================================================================
00053                       ##### IO operation functions #####
00054  ===============================================================================
00055  [..]
00056     This subsection provides a set of extended functions to manage the SPI
00057     data transfers.
00058 
00059     (#) SPIEx function:
00060         (++) HAL_SPIEx_FlushRxFifo()
00061         (++) HAL_SPIEx_FlushRxFifo()
00062         (++) HAL_SPIEx_EnableLockConfiguration()
00063         (++) HAL_SPIEx_ConfigureUnderrun()
00064 
00065 @endverbatim
00066   * @{
00067   */
00068 
00069 /**
00070   * @brief Flush the RX fifo.
00071   * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
00072   *               the configuration information for the specified SPI module.
00073   * @retval HAL status
00074   */
00075 HAL_StatusTypeDef HAL_SPIEx_FlushRxFifo(SPI_HandleTypeDef *hspi)
00076 {
00077   uint8_t  count  = 0;
00078   uint32_t itflag = hspi->Instance->SR;
00079   __IO uint32_t tmpreg;
00080 
00081   while (((hspi->Instance->SR & SPI_FLAG_FRLVL) !=  SPI_RX_FIFO_0PACKET) || ((itflag & SPI_FLAG_RXWNE) !=  0UL))
00082   {
00083     count += (uint8_t)4UL;
00084     tmpreg = hspi->Instance->RXDR;
00085     UNUSED(tmpreg); /* To avoid GCC warning */
00086 
00087     if (IS_SPI_HIGHEND_INSTANCE(hspi->Instance))
00088     {
00089       if (count > SPI_HIGHEND_FIFO_SIZE)
00090       {
00091         return HAL_TIMEOUT;
00092       }
00093     }
00094     else
00095     {
00096       if (count > SPI_LOWEND_FIFO_SIZE)
00097       {
00098         return HAL_TIMEOUT;
00099       }
00100     }
00101   }
00102   return HAL_OK;
00103 }
00104 
00105 
00106 /**
00107   * @brief  Enable the Lock for the AF configuration of associated IOs
00108   *         and write protect the Content of Configuration register 2
00109   *         when SPI is enabled
00110   * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
00111   *               the configuration information for SPI module.
00112   * @retval None
00113   */
00114 HAL_StatusTypeDef HAL_SPIEx_EnableLockConfiguration(SPI_HandleTypeDef *hspi)
00115 {
00116   HAL_StatusTypeDef errorcode = HAL_OK;
00117 
00118   /* Process Locked */
00119   __HAL_LOCK(hspi);
00120 
00121   if (hspi->State != HAL_SPI_STATE_READY)
00122   {
00123     errorcode = HAL_BUSY;
00124     hspi->State = HAL_SPI_STATE_READY;
00125     /* Process Unlocked */
00126     __HAL_UNLOCK(hspi);
00127     return errorcode;
00128   }
00129 
00130   /* Check if the SPI is disabled to edit IOLOCK bit */
00131   if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
00132   {
00133     SET_BIT(hspi->Instance->CR1, SPI_CR1_IOLOCK);
00134   }
00135   else
00136   {
00137     /* Disable SPI peripheral */
00138     __HAL_SPI_DISABLE(hspi);
00139 
00140     SET_BIT(hspi->Instance->CR1, SPI_CR1_IOLOCK);
00141 
00142     /* Enable SPI peripheral */
00143     __HAL_SPI_ENABLE(hspi);
00144   }
00145 
00146   hspi->State = HAL_SPI_STATE_READY;
00147   /* Process Unlocked */
00148   __HAL_UNLOCK(hspi);
00149   return errorcode;
00150 }
00151 
00152 /**
00153   * @brief  Configure the UNDERRUN condition and behavior of slave transmitter.
00154   * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
00155   *               the configuration information for SPI module.
00156   * @param  UnderrunDetection : Detection of underrun condition at slave transmitter
00157   *                             This parameter can be a value of @ref SPI_Underrun_Detection.
00158   * @param  UnderrunBehaviour : Behavior of slave transmitter at underrun condition
00159   *                             This parameter can be a value of @ref SPI_Underrun_Behaviour.
00160   * @retval None
00161   */
00162 HAL_StatusTypeDef HAL_SPIEx_ConfigureUnderrun(SPI_HandleTypeDef *hspi, uint32_t UnderrunDetection,
00163                                               uint32_t UnderrunBehaviour)
00164 {
00165   HAL_StatusTypeDef errorcode = HAL_OK;
00166 
00167   /* Process Locked */
00168   __HAL_LOCK(hspi);
00169 
00170   /* Check State and Insure that Underrun configuration is managed only by Salve */
00171   if ((hspi->State != HAL_SPI_STATE_READY) || (hspi->Init.Mode != SPI_MODE_SLAVE))
00172   {
00173     errorcode = HAL_BUSY;
00174     hspi->State = HAL_SPI_STATE_READY;
00175     /* Process Unlocked */
00176     __HAL_UNLOCK(hspi);
00177     return errorcode;
00178   }
00179 
00180   /* Check the parameters */
00181   assert_param(IS_SPI_UNDERRUN_DETECTION(UnderrunDetection));
00182   assert_param(IS_SPI_UNDERRUN_BEHAVIOUR(UnderrunBehaviour));
00183 
00184   /* Check if the SPI is disabled to edit CFG1 register */
00185   if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
00186   {
00187     /* Configure Underrun fields */
00188     MODIFY_REG(hspi->Instance->CFG1, SPI_CFG1_UDRDET, UnderrunDetection);
00189     MODIFY_REG(hspi->Instance->CFG1, SPI_CFG1_UDRCFG, UnderrunBehaviour);
00190   }
00191   else
00192   {
00193     /* Disable SPI peripheral */
00194     __HAL_SPI_DISABLE(hspi);
00195 
00196     /* Configure Underrun fields */
00197     MODIFY_REG(hspi->Instance->CFG1, SPI_CFG1_UDRDET, UnderrunDetection);
00198     MODIFY_REG(hspi->Instance->CFG1, SPI_CFG1_UDRCFG, UnderrunBehaviour);
00199 
00200     /* Enable SPI peripheral */
00201     __HAL_SPI_ENABLE(hspi);
00202   }
00203 
00204 
00205   hspi->State = HAL_SPI_STATE_READY;
00206   /* Process Unlocked */
00207   __HAL_UNLOCK(hspi);
00208   return errorcode;
00209 }
00210 
00211 /**
00212   * @}
00213   */
00214 
00215 /**
00216   * @}
00217   */
00218 
00219 #endif /* HAL_SPI_MODULE_ENABLED */
00220 
00221 /**
00222   * @}
00223   */
00224 
00225 /**
00226   * @}
00227   */