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STM32H735xx HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32h7xx_hal_tim_ex.h 00004 * @author MCD Application Team 00005 * @brief Header file of TIM HAL Extended module. 00006 ****************************************************************************** 00007 * @attention 00008 * 00009 * Copyright (c) 2017 STMicroelectronics. 00010 * All rights reserved. 00011 * 00012 * This software is licensed under terms that can be found in the LICENSE file 00013 * in the root directory of this software component. 00014 * If no LICENSE file comes with this software, it is provided AS-IS. 00015 * 00016 ****************************************************************************** 00017 */ 00018 00019 /* Define to prevent recursive inclusion -------------------------------------*/ 00020 #ifndef STM32H7xx_HAL_TIM_EX_H 00021 #define STM32H7xx_HAL_TIM_EX_H 00022 00023 #ifdef __cplusplus 00024 extern "C" { 00025 #endif 00026 00027 /* Includes ------------------------------------------------------------------*/ 00028 #include "stm32h7xx_hal_def.h" 00029 00030 /** @addtogroup STM32H7xx_HAL_Driver 00031 * @{ 00032 */ 00033 00034 /** @addtogroup TIMEx 00035 * @{ 00036 */ 00037 00038 /* Exported types ------------------------------------------------------------*/ 00039 /** @defgroup TIMEx_Exported_Types TIM Extended Exported Types 00040 * @{ 00041 */ 00042 00043 /** 00044 * @brief TIM Hall sensor Configuration Structure definition 00045 */ 00046 00047 typedef struct 00048 { 00049 uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal. 00050 This parameter can be a value of @ref TIM_Input_Capture_Polarity */ 00051 00052 uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler. 00053 This parameter can be a value of @ref TIM_Input_Capture_Prescaler */ 00054 00055 uint32_t IC1Filter; /*!< Specifies the input capture filter. 00056 This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ 00057 00058 uint32_t Commutation_Delay; /*!< Specifies the pulse value to be loaded into the Capture Compare Register. 00059 This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */ 00060 } TIM_HallSensor_InitTypeDef; 00061 #if defined(TIM_BREAK_INPUT_SUPPORT) 00062 00063 /** 00064 * @brief TIM Break/Break2 input configuration 00065 */ 00066 typedef struct 00067 { 00068 uint32_t Source; /*!< Specifies the source of the timer break input. 00069 This parameter can be a value of @ref TIMEx_Break_Input_Source */ 00070 uint32_t Enable; /*!< Specifies whether or not the break input source is enabled. 00071 This parameter can be a value of @ref TIMEx_Break_Input_Source_Enable */ 00072 uint32_t Polarity; /*!< Specifies the break input source polarity. 00073 This parameter can be a value of @ref TIMEx_Break_Input_Source_Polarity 00074 Not relevant when analog watchdog output of the DFSDM1 used as break input source */ 00075 } TIMEx_BreakInputConfigTypeDef; 00076 00077 #endif /* TIM_BREAK_INPUT_SUPPORT */ 00078 /** 00079 * @} 00080 */ 00081 /* End of exported types -----------------------------------------------------*/ 00082 00083 /* Exported constants --------------------------------------------------------*/ 00084 /** @defgroup TIMEx_Exported_Constants TIM Extended Exported Constants 00085 * @{ 00086 */ 00087 00088 /** @defgroup TIMEx_Remap TIM Extended Remapping 00089 * @{ 00090 */ 00091 #define TIM_TIM1_ETR_GPIO 0x00000000U /* !< TIM1_ETR is connected to GPIO */ 00092 #define TIM_TIM1_ETR_COMP1 TIM1_AF1_ETRSEL_0 /* !< TIM1_ETR is connected to COMP1 OUT */ 00093 #define TIM_TIM1_ETR_COMP2 TIM1_AF1_ETRSEL_1 /* !< TIM1_ETR is connected to COMP2 OUT */ 00094 #define TIM_TIM1_ETR_ADC1_AWD1 (TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /* !< TIM1_ETR is connected to ADC1 AWD1 */ 00095 #define TIM_TIM1_ETR_ADC1_AWD2 (TIM1_AF1_ETRSEL_2) /* !< TIM1_ETR is connected to ADC1 AWD2 */ 00096 #define TIM_TIM1_ETR_ADC1_AWD3 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /* !< TIM1_ETR is connected to ADC1 AWD3 */ 00097 #define TIM_TIM1_ETR_ADC3_AWD1 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1) /* !< TIM1_ETR is connected to ADC3 AWD1 */ 00098 #define TIM_TIM1_ETR_ADC3_AWD2 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /* !< TIM1_ETR is connected to ADC3 AWD2 */ 00099 #define TIM_TIM1_ETR_ADC3_AWD3 TIM1_AF1_ETRSEL_3 /* !< TIM1_ETR is connected to ADC3 AWD3 */ 00100 00101 #define TIM_TIM8_ETR_GPIO 0x00000000U /* !< TIM8_ETR is connected to GPIO */ 00102 #define TIM_TIM8_ETR_COMP1 TIM8_AF1_ETRSEL_0 /* !< TIM8_ETR is connected to COMP1 OUT */ 00103 #define TIM_TIM8_ETR_COMP2 TIM8_AF1_ETRSEL_1 /* !< TIM8_ETR is connected to COMP2 OUT */ 00104 #define TIM_TIM8_ETR_ADC2_AWD1 (TIM8_AF1_ETRSEL_1 | TIM8_AF1_ETRSEL_0) /* !< TIM8_ETR is connected to ADC2 AWD1 */ 00105 #define TIM_TIM8_ETR_ADC2_AWD2 (TIM8_AF1_ETRSEL_2) /* !< TIM8_ETR is connected to ADC2 AWD2 */ 00106 #define TIM_TIM8_ETR_ADC2_AWD3 (TIM8_AF1_ETRSEL_2 | TIM8_AF1_ETRSEL_0) /* !< TIM8_ETR is connected to ADC2 AWD3 */ 00107 #define TIM_TIM8_ETR_ADC3_AWD1 (TIM8_AF1_ETRSEL_2 | TIM8_AF1_ETRSEL_1) /* !< TIM8_ETR is connected to ADC3 AWD1 */ 00108 #define TIM_TIM8_ETR_ADC3_AWD2 (TIM8_AF1_ETRSEL_2 | TIM8_AF1_ETRSEL_1 | TIM8_AF1_ETRSEL_0) /* !< TIM8_ETR is connected to ADC3 AWD2 */ 00109 #define TIM_TIM8_ETR_ADC3_AWD3 TIM8_AF1_ETRSEL_3 /* !< TIM8_ETR is connected to ADC3 AWD3 */ 00110 00111 #define TIM_TIM2_ETR_GPIO 0x00000000U /* !< TIM2_ETR is connected to GPIO */ 00112 #define TIM_TIM2_ETR_COMP1 (TIM2_AF1_ETRSEL_0) /* !< TIM2_ETR is connected to COMP1 OUT */ 00113 #define TIM_TIM2_ETR_COMP2 (TIM2_AF1_ETRSEL_1) /* !< TIM2_ETR is connected to COMP2 OUT */ 00114 #define TIM_TIM2_ETR_RCC_LSE (TIM2_AF1_ETRSEL_1 | TIM8_AF1_ETRSEL_0) /* !< TIM2_ETR is connected to RCC LSE */ 00115 #define TIM_TIM2_ETR_SAI1_FSA TIM2_AF1_ETRSEL_2 /* !< TIM2_ETR is connected to SAI1 FS_A */ 00116 #define TIM_TIM2_ETR_SAI1_FSB (TIM2_AF1_ETRSEL_2 | TIM8_AF1_ETRSEL_0) /* !< TIM2_ETR is connected to SAI1 FS_B */ 00117 00118 #define TIM_TIM3_ETR_GPIO 0x00000000U /* !< TIM3_ETR is connected to GPIO */ 00119 #define TIM_TIM3_ETR_COMP1 TIM3_AF1_ETRSEL_0 /* !< TIM3_ETR is connected to COMP1 OUT */ 00120 00121 #define TIM_TIM5_ETR_GPIO 0x00000000U /* !< TIM5_ETR is connected to GPIO */ 00122 #define TIM_TIM5_ETR_SAI2_FSA TIM5_AF1_ETRSEL_0 /* !< TIM5_ETR is connected to SAI2 FS_A */ 00123 #define TIM_TIM5_ETR_SAI2_FSB TIM5_AF1_ETRSEL_1 /* !< TIM5_ETR is connected to SAI2 FS_B */ 00124 #define TIM_TIM5_ETR_SAI4_FSA TIM5_AF1_ETRSEL_0 /* !< TIM5_ETR is connected to SAI4 FS_A */ 00125 #define TIM_TIM5_ETR_SAI4_FSB TIM5_AF1_ETRSEL_1 /* !< TIM5_ETR is connected to SAI4 FS_B */ 00126 00127 #define TIM_TIM23_ETR_GPIO 0x00000000U /* !< TIM23_ETR is connected to GPIO */ 00128 #define TIM_TIM23_ETR_COMP1 (TIM2_AF1_ETRSEL_0) /* !< TIM23_ETR is connected to COMP1 OUT */ 00129 #define TIM_TIM23_ETR_COMP2 (TIM2_AF1_ETRSEL_1) /* !< TIM23_ETR is connected to COMP2 OUT */ 00130 00131 #define TIM_TIM24_ETR_GPIO 0x00000000U /* !< TIM24_ETR is connected to GPIO */ 00132 #define TIM_TIM24_ETR_SAI4_FSA TIM5_AF1_ETRSEL_0 /* !< TIM24_ETR is connected to SAI4 FS_A */ 00133 #define TIM_TIM24_ETR_SAI4_FSB TIM5_AF1_ETRSEL_1 /* !< TIM24_ETR is connected to SAI4 FS_B */ 00134 #define TIM_TIM24_ETR_SAI1_FSA (TIM2_AF1_ETRSEL_1 | TIM8_AF1_ETRSEL_0) /* !< TIM24_ETR is connected to SAI1 FS_A */ 00135 #define TIM_TIM24_ETR_SAI1_FSB TIM2_AF1_ETRSEL_2 /* !< TIM24_ETR is connected to SAI1 FS_B */ 00136 /** 00137 * @} 00138 */ 00139 #if defined(TIM_BREAK_INPUT_SUPPORT) 00140 00141 /** @defgroup TIMEx_Break_Input TIM Extended Break input 00142 * @{ 00143 */ 00144 #define TIM_BREAKINPUT_BRK 0x00000001U /*!< Timer break input */ 00145 #define TIM_BREAKINPUT_BRK2 0x00000002U /*!< Timer break2 input */ 00146 /** 00147 * @} 00148 */ 00149 00150 /** @defgroup TIMEx_Break_Input_Source TIM Extended Break input source 00151 * @{ 00152 */ 00153 #define TIM_BREAKINPUTSOURCE_BKIN 0x00000001U /* !< An external source (GPIO) is connected to the BKIN pin */ 00154 #define TIM_BREAKINPUTSOURCE_COMP1 0x00000002U /* !< The COMP1 output is connected to the break input */ 00155 #define TIM_BREAKINPUTSOURCE_COMP2 0x00000004U /* !< The COMP2 output is connected to the break input */ 00156 #define TIM_BREAKINPUTSOURCE_DFSDM1 0x00000008U /* !< The analog watchdog output of the DFSDM1 peripheral is connected to the break input */ 00157 /** 00158 * @} 00159 */ 00160 00161 /** @defgroup TIMEx_Break_Input_Source_Enable TIM Extended Break input source enabling 00162 * @{ 00163 */ 00164 #define TIM_BREAKINPUTSOURCE_DISABLE 0x00000000U /*!< Break input source is disabled */ 00165 #define TIM_BREAKINPUTSOURCE_ENABLE 0x00000001U /*!< Break input source is enabled */ 00166 /** 00167 * @} 00168 */ 00169 00170 /** @defgroup TIMEx_Break_Input_Source_Polarity TIM Extended Break input polarity 00171 * @{ 00172 */ 00173 #define TIM_BREAKINPUTSOURCE_POLARITY_LOW 0x00000001U /*!< Break input source is active low */ 00174 #define TIM_BREAKINPUTSOURCE_POLARITY_HIGH 0x00000000U /*!< Break input source is active_high */ 00175 /** 00176 * @} 00177 */ 00178 #endif /* TIM_BREAK_INPUT_SUPPORT */ 00179 00180 /** @defgroup TIMEx_Timer_Input_Selection TIM Extended Timer input selection 00181 * @{ 00182 */ 00183 #define TIM_TIM1_TI1_GPIO 0x00000000U /* !< TIM1_TI1 is connected to GPIO */ 00184 #define TIM_TIM1_TI1_COMP1 TIM_TISEL_TI1SEL_0 /* !< TIM1_TI1 is connected to COMP1 OUT */ 00185 00186 #define TIM_TIM8_TI1_GPIO 0x00000000U /* !< TIM8_TI1 is connected to GPIO */ 00187 #define TIM_TIM8_TI1_COMP2 TIM_TISEL_TI1SEL_0 /* !< TIM8_TI1 is connected to COMP2 OUT */ 00188 00189 #define TIM_TIM2_TI4_GPIO 0x00000000U /* !< TIM2_TI4 is connected to GPIO */ 00190 #define TIM_TIM2_TI4_COMP1 TIM_TISEL_TI4SEL_0 /* !< TIM2_TI4 is connected to COMP1 OUT */ 00191 #define TIM_TIM2_TI4_COMP2 TIM_TISEL_TI4SEL_1 /* !< TIM2_TI4 is connected to COMP2 OUT */ 00192 #define TIM_TIM2_TI4_COMP1_COMP2 (TIM_TISEL_TI4SEL_0 | TIM_TISEL_TI4SEL_1) /* !< TIM2_TI4 is connected to COMP2 OUT OR COMP2 OUT */ 00193 00194 #define TIM_TIM3_TI1_GPIO 0x00000000U /* !< TIM3_TI1 is connected to GPIO */ 00195 #define TIM_TIM3_TI1_COMP1 TIM_TISEL_TI1SEL_0 /* !< TIM3_TI1 is connected to COMP1 OUT */ 00196 #define TIM_TIM3_TI1_COMP2 TIM_TISEL_TI1SEL_1 /* !< TIM3_TI1 is connected to COMP2 OUT */ 00197 #define TIM_TIM3_TI1_COMP1_COMP2 (TIM_TISEL_TI1SEL_0 | TIM_TISEL_TI1SEL_1) /* !< TIM3_TI1 is connected to COMP1 OUT or COMP2 OUT */ 00198 00199 #define TIM_TIM5_TI1_GPIO 0x00000000U /* !< TIM5_TI1 is connected to GPIO */ 00200 #define TIM_TIM5_TI1_CAN_TMP TIM_TISEL_TI1SEL_0 /* !< TIM5_TI1 is connected to CAN TMP */ 00201 #define TIM_TIM5_TI1_CAN_RTP TIM_TISEL_TI1SEL_1 /* !< TIM5_TI1 is connected to CAN RTP */ 00202 00203 #define TIM_TIM12_TI1_GPIO 0x00000000U /* !< TIM12 TI1 is connected to GPIO */ 00204 #define TIM_TIM12_TI1_SPDIF_FS TIM_TISEL_TI1SEL_0 /* !< TIM12 TI1 is connected to SPDIF FS */ 00205 00206 #define TIM_TIM15_TI1_GPIO 0x00000000U /* !< TIM15_TI1 is connected to GPIO */ 00207 #define TIM_TIM15_TI1_TIM2_CH1 TIM_TISEL_TI1SEL_0 /* !< TIM15_TI1 is connected to TIM2 CH1 */ 00208 #define TIM_TIM15_TI1_TIM3_CH1 TIM_TISEL_TI1SEL_1 /* !< TIM15_TI1 is connected to TIM3 CH1 */ 00209 #define TIM_TIM15_TI1_TIM4_CH1 (TIM_TISEL_TI1SEL_0 | TIM_TISEL_TI1SEL_1) /* !< TIM15_TI1 is connected to TIM4 CH1 */ 00210 #define TIM_TIM15_TI1_RCC_LSE (TIM_TISEL_TI1SEL_2) /* !< TIM15_TI1 is connected to RCC LSE */ 00211 #define TIM_TIM15_TI1_RCC_CSI (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_0) /* !< TIM15_TI1 is connected to RCC CSI */ 00212 #define TIM_TIM15_TI1_RCC_MCO2 (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_1) /* !< TIM15_TI1 is connected to RCC MCO2 */ 00213 00214 #define TIM_TIM15_TI2_GPIO 0x00000000U /* !< TIM15_TI2 is connected to GPIO */ 00215 #define TIM_TIM15_TI2_TIM2_CH2 (TIM_TISEL_TI2SEL_0) /* !< TIM15_TI2 is connected to TIM2 CH2 */ 00216 #define TIM_TIM15_TI2_TIM3_CH2 (TIM_TISEL_TI2SEL_1) /* !< TIM15_TI2 is connected to TIM3 CH2 */ 00217 #define TIM_TIM15_TI2_TIM4_CH2 (TIM_TISEL_TI2SEL_0 | TIM_TISEL_TI2SEL_1) /* !< TIM15_TI2 is connected to TIM4 CH2 */ 00218 00219 #define TIM_TIM16_TI1_GPIO 0x00000000U /* !< TIM16 TI1 is connected to GPIO */ 00220 #define TIM_TIM16_TI1_RCC_LSI TIM_TISEL_TI1SEL_0 /* !< TIM16 TI1 is connected to RCC LSI */ 00221 #define TIM_TIM16_TI1_RCC_LSE TIM_TISEL_TI1SEL_1 /* !< TIM16 TI1 is connected to RCC LSE */ 00222 #define TIM_TIM16_TI1_WKUP_IT (TIM_TISEL_TI1SEL_0 | TIM_TISEL_TI1SEL_1) /* !< TIM16 TI1 is connected to WKUP_IT */ 00223 00224 #define TIM_TIM17_TI1_GPIO 0x00000000U /* !< TIM17 TI1 is connected to GPIO */ 00225 #define TIM_TIM17_TI1_SPDIF_FS TIM_TISEL_TI1SEL_0 /* !< TIM17 TI1 is connected to SPDIF FS */ 00226 #define TIM_TIM17_TI1_RCC_HSE1MHZ TIM_TISEL_TI1SEL_1 /* !< TIM17 TI1 is connected to RCC HSE 1Mhz */ 00227 #define TIM_TIM17_TI1_RCC_MCO1 (TIM_TISEL_TI1SEL_0 | TIM_TISEL_TI1SEL_1) /* !< TIM17 TI1 is connected to RCC MCO1 */ 00228 00229 #define TIM_TIM23_TI4_GPIO 0x00000000U /* !< TIM23_TI4 is connected to GPIO */ 00230 #define TIM_TIM23_TI4_COMP1 TIM_TISEL_TI4SEL_0 /* !< TIM23_TI4 is connected to COMP1 OUT */ 00231 #define TIM_TIM23_TI4_COMP2 TIM_TISEL_TI4SEL_1 /* !< TIM23_TI4 is connected to COMP2 OUT */ 00232 #define TIM_TIM23_TI4_COMP1_COMP2 (TIM_TISEL_TI4SEL_0 | TIM_TISEL_TI4SEL_1) /* !< TIM23_TI4 is connected to COMP1 OUT or COMP2 OUT */ 00233 00234 #define TIM_TIM24_TI1_GPIO 0x00000000U /* !< TIM24_TI1 is connected to GPIO */ 00235 #define TIM_TIM24_TI1_CAN_TMP TIM_TISEL_TI1SEL_0 /* !< TIM24_TI1 is connected to CAN TMP */ 00236 #define TIM_TIM24_TI1_CAN_RTP TIM_TISEL_TI1SEL_1 /* !< TIM24_TI1 is connected to CAN RTP */ 00237 #define TIM_TIM24_TI1_CAN_SOC (TIM_TISEL_TI4SEL_0 | TIM_TISEL_TI4SEL_1) /* !< TIM24_TI1 is connected to CAN SOC */ 00238 /** 00239 * @} 00240 */ 00241 00242 /** 00243 * @} 00244 */ 00245 /* End of exported constants -------------------------------------------------*/ 00246 00247 /* Exported macro ------------------------------------------------------------*/ 00248 /** @defgroup TIMEx_Exported_Macros TIM Extended Exported Macros 00249 * @{ 00250 */ 00251 00252 /** 00253 * @} 00254 */ 00255 /* End of exported macro -----------------------------------------------------*/ 00256 00257 /* Private macro -------------------------------------------------------------*/ 00258 /** @defgroup TIMEx_Private_Macros TIM Extended Private Macros 00259 * @{ 00260 */ 00261 #define IS_TIM_BREAKINPUT(__BREAKINPUT__) (((__BREAKINPUT__) == TIM_BREAKINPUT_BRK) || \ 00262 ((__BREAKINPUT__) == TIM_BREAKINPUT_BRK2)) 00263 00264 #define IS_TIM_BREAKINPUTSOURCE(__SOURCE__) (((__SOURCE__) == TIM_BREAKINPUTSOURCE_BKIN) || \ 00265 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP1) || \ 00266 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP2) || \ 00267 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_DFSDM1)) 00268 00269 #define IS_TIM_BREAKINPUTSOURCE_STATE(__STATE__) (((__STATE__) == TIM_BREAKINPUTSOURCE_DISABLE) || \ 00270 ((__STATE__) == TIM_BREAKINPUTSOURCE_ENABLE)) 00271 00272 #define IS_TIM_BREAKINPUTSOURCE_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_BREAKINPUTSOURCE_POLARITY_LOW) || \ 00273 ((__POLARITY__) == TIM_BREAKINPUTSOURCE_POLARITY_HIGH)) 00274 00275 #define IS_TIM_TISEL(__TISEL__) (((__TISEL__) == TIM_TIM1_TI1_GPIO) ||\ 00276 ((__TISEL__) == TIM_TIM1_TI1_COMP1) ||\ 00277 ((__TISEL__) == TIM_TIM8_TI1_GPIO) ||\ 00278 ((__TISEL__) == TIM_TIM8_TI1_COMP2) ||\ 00279 ((__TISEL__) == TIM_TIM2_TI4_GPIO) ||\ 00280 ((__TISEL__) == TIM_TIM2_TI4_COMP1) ||\ 00281 ((__TISEL__) == TIM_TIM2_TI4_COMP2) ||\ 00282 ((__TISEL__) == TIM_TIM2_TI4_COMP1_COMP2) ||\ 00283 ((__TISEL__) == TIM_TIM3_TI1_GPIO) ||\ 00284 ((__TISEL__) == TIM_TIM3_TI1_COMP1) ||\ 00285 ((__TISEL__) == TIM_TIM3_TI1_COMP2) ||\ 00286 ((__TISEL__) == TIM_TIM3_TI1_COMP1_COMP2) ||\ 00287 ((__TISEL__) == TIM_TIM5_TI1_GPIO) ||\ 00288 ((__TISEL__) == TIM_TIM5_TI1_CAN_TMP) ||\ 00289 ((__TISEL__) == TIM_TIM5_TI1_CAN_RTP) ||\ 00290 ((__TISEL__) == TIM_TIM12_TI1_SPDIF_FS) ||\ 00291 ((__TISEL__) == TIM_TIM12_TI1_GPIO) ||\ 00292 ((__TISEL__) == TIM_TIM15_TI1_GPIO) ||\ 00293 ((__TISEL__) == TIM_TIM15_TI1_TIM2_CH1) ||\ 00294 ((__TISEL__) == TIM_TIM15_TI1_TIM3_CH1) ||\ 00295 ((__TISEL__) == TIM_TIM15_TI1_TIM4_CH1) ||\ 00296 ((__TISEL__) == TIM_TIM15_TI1_RCC_LSE) ||\ 00297 ((__TISEL__) == TIM_TIM15_TI1_RCC_CSI) ||\ 00298 ((__TISEL__) == TIM_TIM15_TI1_RCC_MCO2) ||\ 00299 ((__TISEL__) == TIM_TIM15_TI2_GPIO) ||\ 00300 ((__TISEL__) == TIM_TIM15_TI2_TIM2_CH2) ||\ 00301 ((__TISEL__) == TIM_TIM15_TI2_TIM3_CH2) ||\ 00302 ((__TISEL__) == TIM_TIM15_TI2_TIM4_CH2) ||\ 00303 ((__TISEL__) == TIM_TIM16_TI1_GPIO) ||\ 00304 ((__TISEL__) == TIM_TIM16_TI1_RCC_LSI) ||\ 00305 ((__TISEL__) == TIM_TIM16_TI1_RCC_LSE) ||\ 00306 ((__TISEL__) == TIM_TIM16_TI1_WKUP_IT) ||\ 00307 ((__TISEL__) == TIM_TIM17_TI1_GPIO) ||\ 00308 ((__TISEL__) == TIM_TIM17_TI1_SPDIF_FS) ||\ 00309 ((__TISEL__) == TIM_TIM17_TI1_RCC_HSE1MHZ) ||\ 00310 ((__TISEL__) == TIM_TIM17_TI1_RCC_MCO1) ||\ 00311 ((__TISEL__) == TIM_TIM23_TI4_GPIO) ||\ 00312 ((__TISEL__) == TIM_TIM23_TI4_COMP1) ||\ 00313 ((__TISEL__) == TIM_TIM23_TI4_COMP2) ||\ 00314 ((__TISEL__) == TIM_TIM23_TI4_COMP1_COMP2) ||\ 00315 ((__TISEL__) == TIM_TIM24_TI1_GPIO) ||\ 00316 ((__TISEL__) == TIM_TIM24_TI1_CAN_TMP) ||\ 00317 ((__TISEL__) == TIM_TIM24_TI1_CAN_RTP) ||\ 00318 ((__TISEL__) == TIM_TIM24_TI1_CAN_SOC)) 00319 00320 #define IS_TIM_REMAP(__RREMAP__) (((__RREMAP__) == TIM_TIM1_ETR_GPIO) ||\ 00321 ((__RREMAP__) == TIM_TIM1_ETR_ADC1_AWD1) ||\ 00322 ((__RREMAP__) == TIM_TIM1_ETR_ADC1_AWD2) ||\ 00323 ((__RREMAP__) == TIM_TIM1_ETR_ADC1_AWD3) ||\ 00324 ((__RREMAP__) == TIM_TIM1_ETR_ADC3_AWD1) ||\ 00325 ((__RREMAP__) == TIM_TIM1_ETR_ADC3_AWD2) ||\ 00326 ((__RREMAP__) == TIM_TIM1_ETR_ADC3_AWD3) ||\ 00327 ((__RREMAP__) == TIM_TIM1_ETR_COMP1) ||\ 00328 ((__RREMAP__) == TIM_TIM1_ETR_COMP2) ||\ 00329 ((__RREMAP__) == TIM_TIM8_ETR_GPIO) ||\ 00330 ((__RREMAP__) == TIM_TIM8_ETR_ADC2_AWD1) ||\ 00331 ((__RREMAP__) == TIM_TIM8_ETR_ADC2_AWD2) ||\ 00332 ((__RREMAP__) == TIM_TIM8_ETR_ADC2_AWD3) ||\ 00333 ((__RREMAP__) == TIM_TIM8_ETR_ADC3_AWD1) ||\ 00334 ((__RREMAP__) == TIM_TIM8_ETR_ADC3_AWD2) ||\ 00335 ((__RREMAP__) == TIM_TIM8_ETR_ADC3_AWD3) ||\ 00336 ((__RREMAP__) == TIM_TIM8_ETR_COMP1) ||\ 00337 ((__RREMAP__) == TIM_TIM8_ETR_COMP2) ||\ 00338 ((__RREMAP__) == TIM_TIM2_ETR_GPIO) ||\ 00339 ((__RREMAP__) == TIM_TIM2_ETR_COMP1) ||\ 00340 ((__RREMAP__) == TIM_TIM2_ETR_COMP2) ||\ 00341 ((__RREMAP__) == TIM_TIM2_ETR_RCC_LSE) ||\ 00342 ((__RREMAP__) == TIM_TIM2_ETR_SAI1_FSA) ||\ 00343 ((__RREMAP__) == TIM_TIM2_ETR_SAI1_FSB) ||\ 00344 ((__RREMAP__) == TIM_TIM3_ETR_GPIO) ||\ 00345 ((__RREMAP__) == TIM_TIM3_ETR_COMP1) ||\ 00346 ((__RREMAP__) == TIM_TIM5_ETR_GPIO) ||\ 00347 ((__RREMAP__) == TIM_TIM5_ETR_SAI2_FSA) ||\ 00348 ((__RREMAP__) == TIM_TIM5_ETR_SAI2_FSB) ||\ 00349 ((__RREMAP__) == TIM_TIM23_ETR_GPIO) ||\ 00350 ((__RREMAP__) == TIM_TIM23_ETR_COMP1) ||\ 00351 ((__RREMAP__) == TIM_TIM23_ETR_COMP2) ||\ 00352 ((__RREMAP__) == TIM_TIM24_ETR_GPIO) ||\ 00353 ((__RREMAP__) == TIM_TIM24_ETR_SAI4_FSA) ||\ 00354 ((__RREMAP__) == TIM_TIM24_ETR_SAI4_FSB) ||\ 00355 ((__RREMAP__) == TIM_TIM24_ETR_SAI1_FSA) ||\ 00356 ((__RREMAP__) == TIM_TIM24_ETR_SAI1_FSB)) 00357 00358 /** 00359 * @} 00360 */ 00361 /* End of private macro ------------------------------------------------------*/ 00362 00363 /* Exported functions --------------------------------------------------------*/ 00364 /** @addtogroup TIMEx_Exported_Functions TIM Extended Exported Functions 00365 * @{ 00366 */ 00367 00368 /** @addtogroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions 00369 * @brief Timer Hall Sensor functions 00370 * @{ 00371 */ 00372 /* Timer Hall Sensor functions **********************************************/ 00373 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef *sConfig); 00374 HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim); 00375 00376 void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim); 00377 void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim); 00378 00379 /* Blocking mode: Polling */ 00380 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim); 00381 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim); 00382 /* Non-Blocking mode: Interrupt */ 00383 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim); 00384 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim); 00385 /* Non-Blocking mode: DMA */ 00386 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length); 00387 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim); 00388 /** 00389 * @} 00390 */ 00391 00392 /** @addtogroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions 00393 * @brief Timer Complementary Output Compare functions 00394 * @{ 00395 */ 00396 /* Timer Complementary Output Compare functions *****************************/ 00397 /* Blocking mode: Polling */ 00398 HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel); 00399 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel); 00400 00401 /* Non-Blocking mode: Interrupt */ 00402 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel); 00403 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel); 00404 00405 /* Non-Blocking mode: DMA */ 00406 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length); 00407 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel); 00408 /** 00409 * @} 00410 */ 00411 00412 /** @addtogroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions 00413 * @brief Timer Complementary PWM functions 00414 * @{ 00415 */ 00416 /* Timer Complementary PWM functions ****************************************/ 00417 /* Blocking mode: Polling */ 00418 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel); 00419 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel); 00420 00421 /* Non-Blocking mode: Interrupt */ 00422 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel); 00423 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel); 00424 /* Non-Blocking mode: DMA */ 00425 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length); 00426 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel); 00427 /** 00428 * @} 00429 */ 00430 00431 /** @addtogroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions 00432 * @brief Timer Complementary One Pulse functions 00433 * @{ 00434 */ 00435 /* Timer Complementary One Pulse functions **********************************/ 00436 /* Blocking mode: Polling */ 00437 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel); 00438 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel); 00439 00440 /* Non-Blocking mode: Interrupt */ 00441 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel); 00442 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel); 00443 /** 00444 * @} 00445 */ 00446 00447 /** @addtogroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions 00448 * @brief Peripheral Control functions 00449 * @{ 00450 */ 00451 /* Extended Control functions ************************************************/ 00452 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, 00453 uint32_t CommutationSource); 00454 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, 00455 uint32_t CommutationSource); 00456 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, 00457 uint32_t CommutationSource); 00458 HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, 00459 TIM_MasterConfigTypeDef *sMasterConfig); 00460 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, 00461 TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig); 00462 #if defined(TIM_BREAK_INPUT_SUPPORT) 00463 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput, 00464 TIMEx_BreakInputConfigTypeDef *sBreakInputConfig); 00465 #endif /* TIM_BREAK_INPUT_SUPPORT */ 00466 HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Channels); 00467 HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap); 00468 HAL_StatusTypeDef HAL_TIMEx_TISelection(TIM_HandleTypeDef *htim, uint32_t TISelection, uint32_t Channel); 00469 #if defined(TIM_BDTR_BKBID) 00470 00471 HAL_StatusTypeDef HAL_TIMEx_DisarmBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput); 00472 HAL_StatusTypeDef HAL_TIMEx_ReArmBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput); 00473 #endif /* TIM_BDTR_BKBID */ 00474 /** 00475 * @} 00476 */ 00477 00478 /** @addtogroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions 00479 * @brief Extended Callbacks functions 00480 * @{ 00481 */ 00482 /* Extended Callback **********************************************************/ 00483 void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim); 00484 void HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef *htim); 00485 void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim); 00486 void HAL_TIMEx_Break2Callback(TIM_HandleTypeDef *htim); 00487 /** 00488 * @} 00489 */ 00490 00491 /** @addtogroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions 00492 * @brief Extended Peripheral State functions 00493 * @{ 00494 */ 00495 /* Extended Peripheral State functions ***************************************/ 00496 HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim); 00497 HAL_TIM_ChannelStateTypeDef HAL_TIMEx_GetChannelNState(TIM_HandleTypeDef *htim, uint32_t ChannelN); 00498 /** 00499 * @} 00500 */ 00501 00502 /** 00503 * @} 00504 */ 00505 /* End of exported functions -------------------------------------------------*/ 00506 00507 /* Private functions----------------------------------------------------------*/ 00508 /** @addtogroup TIMEx_Private_Functions TIM Extended Private Functions 00509 * @{ 00510 */ 00511 void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma); 00512 void TIMEx_DMACommutationHalfCplt(DMA_HandleTypeDef *hdma); 00513 /** 00514 * @} 00515 */ 00516 /* End of private functions --------------------------------------------------*/ 00517 00518 /** 00519 * @} 00520 */ 00521 00522 /** 00523 * @} 00524 */ 00525 00526 #ifdef __cplusplus 00527 } 00528 #endif 00529 00530 00531 #endif /* STM32H7xx_HAL_TIM_EX_H */
1.7.6.1