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STM32L443xx HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32l4xx_hal_mmc.h 00004 * @author MCD Application Team 00005 * @brief Header file of MMC HAL module. 00006 ****************************************************************************** 00007 * @attention 00008 * 00009 * Copyright (c) 2017 STMicroelectronics. 00010 * All rights reserved. 00011 * 00012 * This software is licensed under terms that can be found in the LICENSE file 00013 * in the root directory of this software component. 00014 * If no LICENSE file comes with this software, it is provided AS-IS. 00015 * 00016 ****************************************************************************** 00017 */ 00018 00019 /* Define to prevent recursive inclusion -------------------------------------*/ 00020 #ifndef STM32L4xx_HAL_MMC_H 00021 #define STM32L4xx_HAL_MMC_H 00022 00023 #ifdef __cplusplus 00024 extern "C" { 00025 #endif 00026 00027 /* Includes ------------------------------------------------------------------*/ 00028 #include "stm32l4xx_hal_def.h" 00029 #include "stm32l4xx_ll_sdmmc.h" 00030 00031 /** @addtogroup STM32L4xx_HAL_Driver 00032 * @{ 00033 */ 00034 00035 #if defined(SDMMC1) 00036 00037 /** @addtogroup MMC 00038 * @brief MMC HAL module driver 00039 * @{ 00040 */ 00041 00042 /* Exported types ------------------------------------------------------------*/ 00043 /** @defgroup MMC_Exported_Types MMC Exported Types 00044 * @{ 00045 */ 00046 00047 /** @defgroup MMC_Exported_Types_Group1 MMC State enumeration structure 00048 * @{ 00049 */ 00050 typedef enum 00051 { 00052 HAL_MMC_STATE_RESET = ((uint32_t)0x00000000U), /*!< MMC not yet initialized or disabled */ 00053 HAL_MMC_STATE_READY = ((uint32_t)0x00000001U), /*!< MMC initialized and ready for use */ 00054 HAL_MMC_STATE_TIMEOUT = ((uint32_t)0x00000002U), /*!< MMC Timeout state */ 00055 HAL_MMC_STATE_BUSY = ((uint32_t)0x00000003U), /*!< MMC process ongoing */ 00056 HAL_MMC_STATE_PROGRAMMING = ((uint32_t)0x00000004U), /*!< MMC Programming State */ 00057 HAL_MMC_STATE_RECEIVING = ((uint32_t)0x00000005U), /*!< MMC Receinving State */ 00058 HAL_MMC_STATE_TRANSFER = ((uint32_t)0x00000006U), /*!< MMC Transfert State */ 00059 HAL_MMC_STATE_ERROR = ((uint32_t)0x0000000FU) /*!< MMC is in error state */ 00060 }HAL_MMC_StateTypeDef; 00061 /** 00062 * @} 00063 */ 00064 00065 /** @defgroup MMC_Exported_Types_Group2 MMC Card State enumeration structure 00066 * @{ 00067 */ 00068 typedef uint32_t HAL_MMC_CardStateTypeDef; 00069 00070 #define HAL_MMC_CARD_IDLE 0x00000000U /*!< Card is in idle state (can't be checked by CMD13) */ 00071 #define HAL_MMC_CARD_READY 0x00000001U /*!< Card is in ready state (can't be checked by CMD13) */ 00072 #define HAL_MMC_CARD_IDENTIFICATION 0x00000002U /*!< Card is in identification state (can't be checked by CMD13) */ 00073 #define HAL_MMC_CARD_STANDBY 0x00000003U /*!< Card is in standby state */ 00074 #define HAL_MMC_CARD_TRANSFER 0x00000004U /*!< Card is in transfer state */ 00075 #define HAL_MMC_CARD_SENDING 0x00000005U /*!< Card is sending an operation */ 00076 #define HAL_MMC_CARD_RECEIVING 0x00000006U /*!< Card is receiving operation information */ 00077 #define HAL_MMC_CARD_PROGRAMMING 0x00000007U /*!< Card is in programming state */ 00078 #define HAL_MMC_CARD_DISCONNECTED 0x00000008U /*!< Card is disconnected */ 00079 #define HAL_MMC_CARD_BUSTEST 0x00000009U /*!< Card is in bus test state */ 00080 #define HAL_MMC_CARD_SLEEP 0x0000000AU /*!< Card is in sleep state (can't be checked by CMD13) */ 00081 #define HAL_MMC_CARD_ERROR 0x000000FFU /*!< Card response Error (can't be checked by CMD13) */ 00082 /** 00083 * @} 00084 */ 00085 00086 /** @defgroup MMC_Exported_Types_Group3 MMC Handle Structure definition 00087 * @{ 00088 */ 00089 #define MMC_InitTypeDef SDMMC_InitTypeDef 00090 #define MMC_TypeDef SDMMC_TypeDef 00091 00092 /** 00093 * @brief MMC Card Information Structure definition 00094 */ 00095 typedef struct 00096 { 00097 uint32_t CardType; /*!< Specifies the card Type */ 00098 00099 uint32_t Class; /*!< Specifies the class of the card class */ 00100 00101 uint32_t RelCardAdd; /*!< Specifies the Relative Card Address */ 00102 00103 uint32_t BlockNbr; /*!< Specifies the Card Capacity in blocks */ 00104 00105 uint32_t BlockSize; /*!< Specifies one block size in bytes */ 00106 00107 uint32_t LogBlockNbr; /*!< Specifies the Card logical Capacity in blocks */ 00108 00109 uint32_t LogBlockSize; /*!< Specifies logical block size in bytes */ 00110 00111 }HAL_MMC_CardInfoTypeDef; 00112 00113 /** 00114 * @brief MMC handle Structure definition 00115 */ 00116 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) 00117 typedef struct __MMC_HandleTypeDef 00118 #else 00119 typedef struct 00120 #endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ 00121 { 00122 MMC_TypeDef *Instance; /*!< MMC registers base address */ 00123 00124 MMC_InitTypeDef Init; /*!< MMC required parameters */ 00125 00126 HAL_LockTypeDef Lock; /*!< MMC locking object */ 00127 00128 uint8_t *pTxBuffPtr; /*!< Pointer to MMC Tx transfer Buffer */ 00129 00130 uint32_t TxXferSize; /*!< MMC Tx Transfer size */ 00131 00132 uint8_t *pRxBuffPtr; /*!< Pointer to MMC Rx transfer Buffer */ 00133 00134 uint32_t RxXferSize; /*!< MMC Rx Transfer size */ 00135 00136 __IO uint32_t Context; /*!< MMC transfer context */ 00137 00138 __IO HAL_MMC_StateTypeDef State; /*!< MMC card State */ 00139 00140 __IO uint32_t ErrorCode; /*!< MMC Card Error codes */ 00141 00142 #if !defined(STM32L4P5xx) && !defined(STM32L4Q5xx) && !defined(STM32L4R5xx) && !defined(STM32L4R7xx) && !defined(STM32L4R9xx) && !defined(STM32L4S5xx) && !defined(STM32L4S7xx) && !defined(STM32L4S9xx) 00143 DMA_HandleTypeDef *hdmarx; /*!< MMC Rx DMA handle parameters */ 00144 00145 DMA_HandleTypeDef *hdmatx; /*!< MMC Tx DMA handle parameters */ 00146 #endif /* !STM32L4P5xx && !STM32L4Q5xx && !STM32L4R5xx && !STM32L4R7xx && !STM32L4R9xx && !STM32L4S5xx && !STM32L4S7xx && !STM32L4S9xx */ 00147 00148 HAL_MMC_CardInfoTypeDef MmcCard; /*!< MMC Card information */ 00149 00150 uint32_t CSD[4U]; /*!< MMC card specific data table */ 00151 00152 uint32_t CID[4U]; /*!< MMC card identification number table */ 00153 00154 uint32_t Ext_CSD[128]; 00155 00156 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) 00157 void (* TxCpltCallback) (struct __MMC_HandleTypeDef *hmmc); 00158 void (* RxCpltCallback) (struct __MMC_HandleTypeDef *hmmc); 00159 void (* ErrorCallback) (struct __MMC_HandleTypeDef *hmmc); 00160 void (* AbortCpltCallback) (struct __MMC_HandleTypeDef *hmmc); 00161 #if defined(STM32L4P5xx) || defined(STM32L4Q5xx) || defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 00162 void (* Read_DMADblBuf0CpltCallback) (struct __MMC_HandleTypeDef *hmmc); 00163 void (* Read_DMADblBuf1CpltCallback) (struct __MMC_HandleTypeDef *hmmc); 00164 void (* Write_DMADblBuf0CpltCallback) (struct __MMC_HandleTypeDef *hmmc); 00165 void (* Write_DMADblBuf1CpltCallback) (struct __MMC_HandleTypeDef *hmmc); 00166 #endif 00167 00168 void (* MspInitCallback) (struct __MMC_HandleTypeDef *hmmc); 00169 void (* MspDeInitCallback) (struct __MMC_HandleTypeDef *hmmc); 00170 #endif 00171 }MMC_HandleTypeDef; 00172 00173 00174 /** 00175 * @} 00176 */ 00177 00178 /** @defgroup MMC_Exported_Types_Group4 Card Specific Data: CSD Register 00179 * @{ 00180 */ 00181 typedef struct 00182 { 00183 __IO uint8_t CSDStruct; /*!< CSD structure */ 00184 __IO uint8_t SysSpecVersion; /*!< System specification version */ 00185 __IO uint8_t Reserved1; /*!< Reserved */ 00186 __IO uint8_t TAAC; /*!< Data read access time 1 */ 00187 __IO uint8_t NSAC; /*!< Data read access time 2 in CLK cycles */ 00188 __IO uint8_t MaxBusClkFrec; /*!< Max. bus clock frequency */ 00189 __IO uint16_t CardComdClasses; /*!< Card command classes */ 00190 __IO uint8_t RdBlockLen; /*!< Max. read data block length */ 00191 __IO uint8_t PartBlockRead; /*!< Partial blocks for read allowed */ 00192 __IO uint8_t WrBlockMisalign; /*!< Write block misalignment */ 00193 __IO uint8_t RdBlockMisalign; /*!< Read block misalignment */ 00194 __IO uint8_t DSRImpl; /*!< DSR implemented */ 00195 __IO uint8_t Reserved2; /*!< Reserved */ 00196 __IO uint32_t DeviceSize; /*!< Device Size */ 00197 __IO uint8_t MaxRdCurrentVDDMin; /*!< Max. read current @ VDD min */ 00198 __IO uint8_t MaxRdCurrentVDDMax; /*!< Max. read current @ VDD max */ 00199 __IO uint8_t MaxWrCurrentVDDMin; /*!< Max. write current @ VDD min */ 00200 __IO uint8_t MaxWrCurrentVDDMax; /*!< Max. write current @ VDD max */ 00201 __IO uint8_t DeviceSizeMul; /*!< Device size multiplier */ 00202 __IO uint8_t EraseGrSize; /*!< Erase group size */ 00203 __IO uint8_t EraseGrMul; /*!< Erase group size multiplier */ 00204 __IO uint8_t WrProtectGrSize; /*!< Write protect group size */ 00205 __IO uint8_t WrProtectGrEnable; /*!< Write protect group enable */ 00206 __IO uint8_t ManDeflECC; /*!< Manufacturer default ECC */ 00207 __IO uint8_t WrSpeedFact; /*!< Write speed factor */ 00208 __IO uint8_t MaxWrBlockLen; /*!< Max. write data block length */ 00209 __IO uint8_t WriteBlockPaPartial; /*!< Partial blocks for write allowed */ 00210 __IO uint8_t Reserved3; /*!< Reserved */ 00211 __IO uint8_t ContentProtectAppli; /*!< Content protection application */ 00212 __IO uint8_t FileFormatGroup; /*!< File format group */ 00213 __IO uint8_t CopyFlag; /*!< Copy flag (OTP) */ 00214 __IO uint8_t PermWrProtect; /*!< Permanent write protection */ 00215 __IO uint8_t TempWrProtect; /*!< Temporary write protection */ 00216 __IO uint8_t FileFormat; /*!< File format */ 00217 __IO uint8_t ECC; /*!< ECC code */ 00218 __IO uint8_t CSD_CRC; /*!< CSD CRC */ 00219 __IO uint8_t Reserved4; /*!< Always 1 */ 00220 00221 }HAL_MMC_CardCSDTypeDef; 00222 /** 00223 * @} 00224 */ 00225 00226 /** @defgroup MMC_Exported_Types_Group5 Card Identification Data: CID Register 00227 * @{ 00228 */ 00229 typedef struct 00230 { 00231 __IO uint8_t ManufacturerID; /*!< Manufacturer ID */ 00232 __IO uint16_t OEM_AppliID; /*!< OEM/Application ID */ 00233 __IO uint32_t ProdName1; /*!< Product Name part1 */ 00234 __IO uint8_t ProdName2; /*!< Product Name part2 */ 00235 __IO uint8_t ProdRev; /*!< Product Revision */ 00236 __IO uint32_t ProdSN; /*!< Product Serial Number */ 00237 __IO uint8_t Reserved1; /*!< Reserved1 */ 00238 __IO uint16_t ManufactDate; /*!< Manufacturing Date */ 00239 __IO uint8_t CID_CRC; /*!< CID CRC */ 00240 __IO uint8_t Reserved2; /*!< Always 1 */ 00241 00242 }HAL_MMC_CardCIDTypeDef; 00243 /** 00244 * @} 00245 */ 00246 00247 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) 00248 /** @defgroup MMC_Exported_Types_Group6 MMC Callback ID enumeration definition 00249 * @{ 00250 */ 00251 typedef enum 00252 { 00253 HAL_MMC_TX_CPLT_CB_ID = 0x00U, /*!< MMC Tx Complete Callback ID */ 00254 HAL_MMC_RX_CPLT_CB_ID = 0x01U, /*!< MMC Rx Complete Callback ID */ 00255 HAL_MMC_ERROR_CB_ID = 0x02U, /*!< MMC Error Callback ID */ 00256 HAL_MMC_ABORT_CB_ID = 0x03U, /*!< MMC Abort Callback ID */ 00257 #if defined(STM32L4P5xx) || defined(STM32L4Q5xx) || defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 00258 HAL_MMC_READ_DMA_DBL_BUF0_CPLT_CB_ID = 0x04U, /*!< MMC Rx DMA Double Buffer 0 Complete Callback ID */ 00259 HAL_MMC_READ_DMA_DBL_BUF1_CPLT_CB_ID = 0x05U, /*!< MMC Rx DMA Double Buffer 1 Complete Callback ID */ 00260 HAL_MMC_WRITE_DMA_DBL_BUF0_CPLT_CB_ID = 0x06U, /*!< MMC Tx DMA Double Buffer 0 Complete Callback ID */ 00261 HAL_MMC_WRITE_DMA_DBL_BUF1_CPLT_CB_ID = 0x07U, /*!< MMC Tx DMA Double Buffer 1 Complete Callback ID */ 00262 #endif 00263 00264 HAL_MMC_MSP_INIT_CB_ID = 0x10U, /*!< MMC MspInit Callback ID */ 00265 HAL_MMC_MSP_DEINIT_CB_ID = 0x11U /*!< MMC MspDeInit Callback ID */ 00266 }HAL_MMC_CallbackIDTypeDef; 00267 /** 00268 * @} 00269 */ 00270 00271 /** @defgroup MMC_Exported_Types_Group7 MMC Callback pointer definition 00272 * @{ 00273 */ 00274 typedef void (*pMMC_CallbackTypeDef) (MMC_HandleTypeDef *hmmc); 00275 /** 00276 * @} 00277 */ 00278 #endif 00279 00280 /** 00281 * @} 00282 */ 00283 00284 /* Exported constants --------------------------------------------------------*/ 00285 /** @defgroup MMC_Exported_Constants Exported Constants 00286 * @{ 00287 */ 00288 00289 #define MMC_BLOCKSIZE ((uint32_t)512U) /*!< Block size is 512 bytes */ 00290 00291 /** @defgroup MMC_Exported_Constansts_Group1 MMC Error status enumeration Structure definition 00292 * @{ 00293 */ 00294 #define HAL_MMC_ERROR_NONE SDMMC_ERROR_NONE /*!< No error */ 00295 #define HAL_MMC_ERROR_CMD_CRC_FAIL SDMMC_ERROR_CMD_CRC_FAIL /*!< Command response received (but CRC check failed) */ 00296 #define HAL_MMC_ERROR_DATA_CRC_FAIL SDMMC_ERROR_DATA_CRC_FAIL /*!< Data block sent/received (CRC check failed) */ 00297 #define HAL_MMC_ERROR_CMD_RSP_TIMEOUT SDMMC_ERROR_CMD_RSP_TIMEOUT /*!< Command response timeout */ 00298 #define HAL_MMC_ERROR_DATA_TIMEOUT SDMMC_ERROR_DATA_TIMEOUT /*!< Data timeout */ 00299 #define HAL_MMC_ERROR_TX_UNDERRUN SDMMC_ERROR_TX_UNDERRUN /*!< Transmit FIFO underrun */ 00300 #define HAL_MMC_ERROR_RX_OVERRUN SDMMC_ERROR_RX_OVERRUN /*!< Receive FIFO overrun */ 00301 #define HAL_MMC_ERROR_ADDR_MISALIGNED SDMMC_ERROR_ADDR_MISALIGNED /*!< Misaligned address */ 00302 #define HAL_MMC_ERROR_BLOCK_LEN_ERR SDMMC_ERROR_BLOCK_LEN_ERR /*!< Transferred block length is not allowed for the card or the 00303 number of transferred bytes does not match the block length */ 00304 #define HAL_MMC_ERROR_ERASE_SEQ_ERR SDMMC_ERROR_ERASE_SEQ_ERR /*!< An error in the sequence of erase command occurs */ 00305 #define HAL_MMC_ERROR_BAD_ERASE_PARAM SDMMC_ERROR_BAD_ERASE_PARAM /*!< An invalid selection for erase groups */ 00306 #define HAL_MMC_ERROR_WRITE_PROT_VIOLATION SDMMC_ERROR_WRITE_PROT_VIOLATION /*!< Attempt to program a write protect block */ 00307 #define HAL_MMC_ERROR_LOCK_UNLOCK_FAILED SDMMC_ERROR_LOCK_UNLOCK_FAILED /*!< Sequence or password error has been detected in unlock 00308 command or if there was an attempt to access a locked card */ 00309 #define HAL_MMC_ERROR_COM_CRC_FAILED SDMMC_ERROR_COM_CRC_FAILED /*!< CRC check of the previous command failed */ 00310 #define HAL_MMC_ERROR_ILLEGAL_CMD SDMMC_ERROR_ILLEGAL_CMD /*!< Command is not legal for the card state */ 00311 #define HAL_MMC_ERROR_CARD_ECC_FAILED SDMMC_ERROR_CARD_ECC_FAILED /*!< Card internal ECC was applied but failed to correct the data */ 00312 #define HAL_MMC_ERROR_CC_ERR SDMMC_ERROR_CC_ERR /*!< Internal card controller error */ 00313 #define HAL_MMC_ERROR_GENERAL_UNKNOWN_ERR SDMMC_ERROR_GENERAL_UNKNOWN_ERR /*!< General or unknown error */ 00314 #define HAL_MMC_ERROR_STREAM_READ_UNDERRUN SDMMC_ERROR_STREAM_READ_UNDERRUN /*!< The card could not sustain data reading in stream rmode */ 00315 #define HAL_MMC_ERROR_STREAM_WRITE_OVERRUN SDMMC_ERROR_STREAM_WRITE_OVERRUN /*!< The card could not sustain data programming in stream mode */ 00316 #define HAL_MMC_ERROR_CID_CSD_OVERWRITE SDMMC_ERROR_CID_CSD_OVERWRITE /*!< CID/CSD overwrite error */ 00317 #define HAL_MMC_ERROR_WP_ERASE_SKIP SDMMC_ERROR_WP_ERASE_SKIP /*!< Only partial address space was erased */ 00318 #define HAL_MMC_ERROR_CARD_ECC_DISABLED SDMMC_ERROR_CARD_ECC_DISABLED /*!< Command has been executed without using internal ECC */ 00319 #define HAL_MMC_ERROR_ERASE_RESET SDMMC_ERROR_ERASE_RESET /*!< Erase sequence was cleared before executing because an out 00320 of erase sequence command was received */ 00321 #define HAL_MMC_ERROR_AKE_SEQ_ERR SDMMC_ERROR_AKE_SEQ_ERR /*!< Error in sequence of authentication */ 00322 #define HAL_MMC_ERROR_INVALID_VOLTRANGE SDMMC_ERROR_INVALID_VOLTRANGE /*!< Error in case of invalid voltage range */ 00323 #define HAL_MMC_ERROR_ADDR_OUT_OF_RANGE SDMMC_ERROR_ADDR_OUT_OF_RANGE /*!< Error when addressed block is out of range */ 00324 #define HAL_MMC_ERROR_REQUEST_NOT_APPLICABLE SDMMC_ERROR_REQUEST_NOT_APPLICABLE /*!< Error when command request is not applicable */ 00325 #define HAL_MMC_ERROR_PARAM SDMMC_ERROR_INVALID_PARAMETER /*!< the used parameter is not valid */ 00326 #define HAL_MMC_ERROR_UNSUPPORTED_FEATURE SDMMC_ERROR_UNSUPPORTED_FEATURE /*!< Error when feature is not insupported */ 00327 #define HAL_MMC_ERROR_BUSY SDMMC_ERROR_BUSY /*!< Error when transfer process is busy */ 00328 #define HAL_MMC_ERROR_DMA SDMMC_ERROR_DMA /*!< Error while DMA transfer */ 00329 #define HAL_MMC_ERROR_TIMEOUT SDMMC_ERROR_TIMEOUT /*!< Timeout error */ 00330 00331 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) 00332 #define HAL_MMC_ERROR_INVALID_CALLBACK SDMMC_ERROR_INVALID_PARAMETER /*!< Invalid callback error */ 00333 #endif 00334 /** 00335 * @} 00336 */ 00337 00338 /** @defgroup MMC_Exported_Constansts_Group2 MMC context enumeration 00339 * @{ 00340 */ 00341 #define MMC_CONTEXT_NONE ((uint32_t)0x00000000U) /*!< None */ 00342 #define MMC_CONTEXT_READ_SINGLE_BLOCK ((uint32_t)0x00000001U) /*!< Read single block operation */ 00343 #define MMC_CONTEXT_READ_MULTIPLE_BLOCK ((uint32_t)0x00000002U) /*!< Read multiple blocks operation */ 00344 #define MMC_CONTEXT_WRITE_SINGLE_BLOCK ((uint32_t)0x00000010U) /*!< Write single block operation */ 00345 #define MMC_CONTEXT_WRITE_MULTIPLE_BLOCK ((uint32_t)0x00000020U) /*!< Write multiple blocks operation */ 00346 #define MMC_CONTEXT_IT ((uint32_t)0x00000008U) /*!< Process in Interrupt mode */ 00347 #define MMC_CONTEXT_DMA ((uint32_t)0x00000080U) /*!< Process in DMA mode */ 00348 00349 /** 00350 * @} 00351 */ 00352 00353 /** @defgroup MMC_Exported_Constansts_Group3 MMC Voltage mode 00354 * @{ 00355 */ 00356 /** 00357 * @brief 00358 */ 00359 #define MMC_HIGH_VOLTAGE_RANGE 0x80FF8000U /*!< High voltage in byte mode */ 00360 #define MMC_DUAL_VOLTAGE_RANGE 0x80FF8080U /*!< Dual voltage in byte mode */ 00361 #define MMC_LOW_VOLTAGE_RANGE 0x80000080U /*!< Low voltage in byte mode */ 00362 #define EMMC_HIGH_VOLTAGE_RANGE 0xC0FF8000U /*!< High voltage in sector mode */ 00363 #define EMMC_DUAL_VOLTAGE_RANGE 0xC0FF8080U /*!< Dual voltage in sector mode */ 00364 #define EMMC_LOW_VOLTAGE_RANGE 0xC0000080U /*!< Low voltage in sector mode */ 00365 #define MMC_INVALID_VOLTAGE_RANGE 0x0001FF01U 00366 /** 00367 * @} 00368 */ 00369 00370 /** @defgroup MMC_Exported_Constansts_Group4 MMC Memory Cards 00371 * @{ 00372 */ 00373 #define MMC_LOW_CAPACITY_CARD ((uint32_t)0x00000000U) /*!< MMC Card Capacity <=2Gbytes */ 00374 #define MMC_HIGH_CAPACITY_CARD ((uint32_t)0x00000001U) /*!< MMC Card Capacity >2Gbytes and <2Tbytes */ 00375 00376 /** 00377 * @} 00378 */ 00379 00380 #if defined(STM32L4P5xx) || defined(STM32L4Q5xx) || defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 00381 /** @defgroup MMC_Exported_Constansts_Group5 MMC Erase Type 00382 * @{ 00383 */ 00384 #define HAL_MMC_ERASE 0x00000000U /*!< Erase the erase groups identified by CMD35 & 36 */ 00385 #define HAL_MMC_TRIM 0x00000001U /*!< Erase the write blocks identified by CMD35 & 36 */ 00386 #define HAL_MMC_DISCARD 0x00000003U /*!< Discard the write blocks identified by CMD35 & 36 */ 00387 #define HAL_MMC_SECURE_ERASE 0x80000000U /*!< Perform a secure purge according SRT on the erase groups identified by CMD35 & 36 */ 00388 #define HAL_MMC_SECURE_TRIM_STEP1 0x80000001U /*!< Mark the write blocks identified by CMD35 & 36 for secure erase */ 00389 #define HAL_MMC_SECURE_TRIM_STEP2 0x80008000U /*!< Perform a secure purge according SRT on the write blocks previously identified */ 00390 00391 #define IS_MMC_ERASE_TYPE(TYPE) (((TYPE) == HAL_MMC_ERASE) || \ 00392 ((TYPE) == HAL_MMC_TRIM) || \ 00393 ((TYPE) == HAL_MMC_DISCARD) || \ 00394 ((TYPE) == HAL_MMC_SECURE_ERASE) || \ 00395 ((TYPE) == HAL_MMC_SECURE_TRIM_STEP1) || \ 00396 ((TYPE) == HAL_MMC_SECURE_TRIM_STEP2)) 00397 /** 00398 * @} 00399 */ 00400 00401 /** @defgroup MMC_Exported_Constansts_Group6 MMC Secure Removal Type 00402 * @{ 00403 */ 00404 #define HAL_MMC_SRT_ERASE 0x00000001U /*!< Information removed by an erase */ 00405 #define HAL_MMC_SRT_WRITE_CHAR_ERASE 0x00000002U /*!< Information removed by an overwriting with a character followed by an erase */ 00406 #define HAL_MMC_SRT_WRITE_CHAR_COMPL_RANDOM 0x00000004U /*!< Information removed by an overwriting with a character, its complement then a random character */ 00407 #define HAL_MMC_SRT_VENDOR_DEFINED 0x00000008U /*!< Information removed using a vendor defined */ 00408 00409 00410 #define IS_MMC_SRT_TYPE(TYPE) (((TYPE) == HAL_MMC_SRT_ERASE) || \ 00411 ((TYPE) == HAL_MMC_SRT_WRITE_CHAR_ERASE) || \ 00412 ((TYPE) == HAL_MMC_SRT_WRITE_CHAR_COMPL_RANDOM) || \ 00413 ((TYPE) == HAL_MMC_SRT_VENDOR_DEFINED)) 00414 /** 00415 * @} 00416 */ 00417 #endif /* defined(STM32L4P5xx) || defined(STM32L4Q5xx) || defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) */ 00418 00419 /** 00420 * @} 00421 */ 00422 00423 /* Exported macro ------------------------------------------------------------*/ 00424 /** @defgroup MMC_Exported_macros MMC Exported Macros 00425 * @brief macros to handle interrupts and specific clock configurations 00426 * @{ 00427 */ 00428 /** @brief Reset MMC handle state. 00429 * @param __HANDLE__ : MMC handle. 00430 * @retval None 00431 */ 00432 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) 00433 #define __HAL_MMC_RESET_HANDLE_STATE(__HANDLE__) do { \ 00434 (__HANDLE__)->State = HAL_MMC_STATE_RESET; \ 00435 (__HANDLE__)->MspInitCallback = NULL; \ 00436 (__HANDLE__)->MspDeInitCallback = NULL; \ 00437 } while(0) 00438 #else 00439 #define __HAL_MMC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_MMC_STATE_RESET) 00440 #endif 00441 00442 #if !defined(STM32L4P5xx) && !defined(STM32L4Q5xx) && !defined(STM32L4R5xx) && !defined(STM32L4R7xx) && !defined(STM32L4R9xx) && !defined(STM32L4S5xx) && !defined(STM32L4S7xx) && !defined(STM32L4S9xx) 00443 /** 00444 * @brief Enable the MMC device. 00445 * @retval None 00446 */ 00447 #define __HAL_MMC_ENABLE(__HANDLE__) __SDMMC_ENABLE((__HANDLE__)->Instance) 00448 00449 /** 00450 * @brief Disable the MMC device. 00451 * @retval None 00452 */ 00453 #define __HAL_MMC_DISABLE(__HANDLE__) __SDMMC_DISABLE((__HANDLE__)->Instance) 00454 00455 /** 00456 * @brief Enable the SDMMC DMA transfer. 00457 * @retval None 00458 */ 00459 #define __HAL_MMC_DMA_ENABLE(__HANDLE__) __SDMMC_DMA_ENABLE((__HANDLE__)->Instance) 00460 00461 /** 00462 * @brief Disable the SDMMC DMA transfer. 00463 * @retval None 00464 */ 00465 #define __HAL_MMC_DMA_DISABLE(__HANDLE__) __SDMMC_DMA_DISABLE((__HANDLE__)->Instance) 00466 #endif 00467 00468 /** 00469 * @brief Enable the MMC device interrupt. 00470 * @param __HANDLE__ MMC Handle 00471 * @param __INTERRUPT__ specifies the SDMMC interrupt sources to be enabled. 00472 * This parameter can be one or a combination of the following values: 00473 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt 00474 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt 00475 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt 00476 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt 00477 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt 00478 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt 00479 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt 00480 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt 00481 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt 00482 * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt 00483 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt 00484 * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt 00485 * @arg SDMMC_IT_CMDACT: Command transfer in progress interrupt 00486 * @arg SDMMC_IT_TXACT: Data transmit in progress interrupt 00487 * @arg SDMMC_IT_RXACT: Data receive in progress interrupt 00488 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt 00489 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt 00490 * @arg SDMMC_IT_TXFIFOF: Transmit FIFO full interrupt 00491 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt 00492 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt 00493 * @arg SDMMC_IT_RXFIFOE: Receive FIFO empty interrupt 00494 * @arg SDMMC_IT_TXDAVL: Data available in transmit FIFO interrupt 00495 * @arg SDMMC_IT_RXDAVL: Data available in receive FIFO interrupt 00496 * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt 00497 * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt 00498 * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt 00499 * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt 00500 * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt 00501 * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt 00502 * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt 00503 * @retval None 00504 */ 00505 #define __HAL_MMC_ENABLE_IT(__HANDLE__, __INTERRUPT__) __SDMMC_ENABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__)) 00506 00507 /** 00508 * @brief Disable the MMC device interrupt. 00509 * @param __HANDLE__ MMC Handle 00510 * @param __INTERRUPT__ specifies the SDMMC interrupt sources to be disabled. 00511 * This parameter can be one or a combination of the following values: 00512 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt 00513 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt 00514 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt 00515 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt 00516 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt 00517 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt 00518 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt 00519 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt 00520 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt 00521 * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt 00522 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt 00523 * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt 00524 * @arg SDMMC_IT_CMDACT: Command transfer in progress interrupt 00525 * @arg SDMMC_IT_TXACT: Data transmit in progress interrupt 00526 * @arg SDMMC_IT_RXACT: Data receive in progress interrupt 00527 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt 00528 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt 00529 * @arg SDMMC_IT_TXFIFOF: Transmit FIFO full interrupt 00530 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt 00531 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt 00532 * @arg SDMMC_IT_RXFIFOE: Receive FIFO empty interrupt 00533 * @arg SDMMC_IT_TXDAVL: Data available in transmit FIFO interrupt 00534 * @arg SDMMC_IT_RXDAVL: Data available in receive FIFO interrupt 00535 * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt 00536 * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt 00537 * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt 00538 * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt 00539 * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt 00540 * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt 00541 * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt 00542 * @retval None 00543 */ 00544 #define __HAL_MMC_DISABLE_IT(__HANDLE__, __INTERRUPT__) __SDMMC_DISABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__)) 00545 00546 /** 00547 * @brief Check whether the specified MMC flag is set or not. 00548 * @param __HANDLE__ MMC Handle 00549 * @param __FLAG__ specifies the flag to check. 00550 * This parameter can be one of the following values: 00551 * @arg SDMMC_FLAG_CCRCFAIL: Command response received (CRC check failed) 00552 * @arg SDMMC_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) 00553 * @arg SDMMC_FLAG_CTIMEOUT: Command response timeout 00554 * @arg SDMMC_FLAG_DTIMEOUT: Data timeout 00555 * @arg SDMMC_FLAG_TXUNDERR: Transmit FIFO underrun error 00556 * @arg SDMMC_FLAG_RXOVERR: Received FIFO overrun error 00557 * @arg SDMMC_FLAG_CMDREND: Command response received (CRC check passed) 00558 * @arg SDMMC_FLAG_CMDSENT: Command sent (no response required) 00559 * @arg SDMMC_FLAG_DATAEND: Data end (data counter, DATACOUNT, is zero) 00560 * @arg SDMMC_FLAG_DHOLD: Data transfer Hold 00561 * @arg SDMMC_FLAG_DBCKEND: Data block sent/received (CRC check passed) 00562 * @arg SDMMC_FLAG_DABORT: Data transfer aborted by CMD12 00563 * @arg SDMMC_FLAG_DPSMACT: Data path state machine active 00564 * @arg SDMMC_FLAG_CPSMACT: Command path state machine active 00565 * @arg SDMMC_FLAG_CMDACT: Command transfer in progress 00566 * @arg SDMMC_FLAG_TXACT: Data transmit in progress 00567 * @arg SDMMC_FLAG_RXACT: Data receive in progress 00568 * @arg SDMMC_FLAG_TXFIFOHE: Transmit FIFO Half Empty 00569 * @arg SDMMC_FLAG_RXFIFOHF: Receive FIFO Half Full 00570 * @arg SDMMC_FLAG_TXFIFOF: Transmit FIFO full 00571 * @arg SDMMC_FLAG_RXFIFOF: Receive FIFO full 00572 * @arg SDMMC_FLAG_TXFIFOE: Transmit FIFO empty 00573 * @arg SDMMC_FLAG_RXFIFOE: Receive FIFO empty 00574 * @arg SDMMC_FLAG_BUSYD0: Inverted value of SDMMC_D0 line (Busy) 00575 * @arg SDMMC_FLAG_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected 00576 * @arg SDMMC_FLAG_TXDAVL: Data available in transmit FIFO 00577 * @arg SDMMC_FLAG_RXDAVL: Data available in receive FIFO 00578 * @arg SDMMC_FLAG_SDIOIT: SD I/O interrupt received 00579 * @arg SDMMC_FLAG_ACKFAIL: Boot Acknowledgment received 00580 * @arg SDMMC_FLAG_ACKTIMEOUT: Boot Acknowledgment timeout 00581 * @arg SDMMC_FLAG_VSWEND: Voltage switch critical timing section completion 00582 * @arg SDMMC_FLAG_CKSTOP: SDMMC_CK stopped in Voltage switch procedure 00583 * @arg SDMMC_FLAG_IDMATE: IDMA transfer error 00584 * @arg SDMMC_FLAG_IDMABTC: IDMA buffer transfer complete 00585 * @retval The new state of MMC FLAG (SET or RESET). 00586 */ 00587 #define __HAL_MMC_GET_FLAG(__HANDLE__, __FLAG__) __SDMMC_GET_FLAG((__HANDLE__)->Instance, (__FLAG__)) 00588 00589 /** 00590 * @brief Clear the MMC's pending flags. 00591 * @param __HANDLE__ MMC Handle 00592 * @param __FLAG__ specifies the flag to clear. 00593 * This parameter can be one or a combination of the following values: 00594 * @arg SDMMC_FLAG_CCRCFAIL: Command response received (CRC check failed) 00595 * @arg SDMMC_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) 00596 * @arg SDMMC_FLAG_CTIMEOUT: Command response timeout 00597 * @arg SDMMC_FLAG_DTIMEOUT: Data timeout 00598 * @arg SDMMC_FLAG_TXUNDERR: Transmit FIFO underrun error 00599 * @arg SDMMC_FLAG_RXOVERR: Received FIFO overrun error 00600 * @arg SDMMC_FLAG_CMDREND: Command response received (CRC check passed) 00601 * @arg SDMMC_FLAG_CMDSENT: Command sent (no response required) 00602 * @arg SDMMC_FLAG_DATAEND: Data end (data counter, DATACOUNT, is zero) 00603 * @arg SDMMC_FLAG_DHOLD: Data transfer Hold 00604 * @arg SDMMC_FLAG_DBCKEND: Data block sent/received (CRC check passed) 00605 * @arg SDMMC_FLAG_DABORT: Data transfer aborted by CMD12 00606 * @arg SDMMC_FLAG_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected 00607 * @arg SDMMC_FLAG_SDIOIT: SD I/O interrupt received 00608 * @arg SDMMC_FLAG_ACKFAIL: Boot Acknowledgment received 00609 * @arg SDMMC_FLAG_ACKTIMEOUT: Boot Acknowledgment timeout 00610 * @arg SDMMC_FLAG_VSWEND: Voltage switch critical timing section completion 00611 * @arg SDMMC_FLAG_CKSTOP: SDMMC_CK stopped in Voltage switch procedure 00612 * @arg SDMMC_FLAG_IDMATE: IDMA transfer error 00613 * @arg SDMMC_FLAG_IDMABTC: IDMA buffer transfer complete 00614 * @retval None 00615 */ 00616 #define __HAL_MMC_CLEAR_FLAG(__HANDLE__, __FLAG__) __SDMMC_CLEAR_FLAG((__HANDLE__)->Instance, (__FLAG__)) 00617 00618 /** 00619 * @brief Check whether the specified MMC interrupt has occurred or not. 00620 * @param __HANDLE__ MMC Handle 00621 * @param __INTERRUPT__ specifies the SDMMC interrupt source to check. 00622 * This parameter can be one of the following values: 00623 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt 00624 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt 00625 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt 00626 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt 00627 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt 00628 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt 00629 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt 00630 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt 00631 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt 00632 * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt 00633 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt 00634 * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt 00635 * @arg SDMMC_IT_CMDACT: Command transfer in progress interrupt 00636 * @arg SDMMC_IT_TXACT: Data transmit in progress interrupt 00637 * @arg SDMMC_IT_RXACT: Data receive in progress interrupt 00638 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt 00639 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt 00640 * @arg SDMMC_IT_TXFIFOF: Transmit FIFO full interrupt 00641 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt 00642 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt 00643 * @arg SDMMC_IT_RXFIFOE: Receive FIFO empty interrupt 00644 * @arg SDMMC_IT_TXDAVL: Data available in transmit FIFO interrupt 00645 * @arg SDMMC_IT_RXDAVL: Data available in receive FIFO interrupt 00646 * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt 00647 * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt 00648 * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt 00649 * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt 00650 * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt 00651 * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt 00652 * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt 00653 * @retval The new state of MMC IT (SET or RESET). 00654 */ 00655 #define __HAL_MMC_GET_IT(__HANDLE__, __INTERRUPT__) __SDMMC_GET_IT((__HANDLE__)->Instance, (__INTERRUPT__)) 00656 00657 /** 00658 * @brief Clear the MMC's interrupt pending bits. 00659 * @param __HANDLE__ MMC Handle 00660 * @param __INTERRUPT__ specifies the interrupt pending bit to clear. 00661 * This parameter can be one or a combination of the following values: 00662 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt 00663 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt 00664 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt 00665 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt 00666 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt 00667 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt 00668 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt 00669 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt 00670 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt 00671 * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt 00672 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt 00673 * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt 00674 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt 00675 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt 00676 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt 00677 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt 00678 * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt 00679 * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt 00680 * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt 00681 * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt 00682 * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt 00683 * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt 00684 * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt 00685 * @retval None 00686 */ 00687 #define __HAL_MMC_CLEAR_IT(__HANDLE__, __INTERRUPT__) __SDMMC_CLEAR_IT((__HANDLE__)->Instance, (__INTERRUPT__)) 00688 00689 /** 00690 * @} 00691 */ 00692 00693 #if defined(STM32L4P5xx) || defined(STM32L4Q5xx) || defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 00694 /* Include MMC HAL Extension module */ 00695 #include "stm32l4xx_hal_mmc_ex.h" 00696 #endif 00697 00698 /* Exported functions --------------------------------------------------------*/ 00699 /** @addtogroup MMC_Exported_Functions 00700 * @{ 00701 */ 00702 00703 /** @addtogroup MMC_Exported_Functions_Group1 00704 * @{ 00705 */ 00706 HAL_StatusTypeDef HAL_MMC_Init(MMC_HandleTypeDef *hmmc); 00707 HAL_StatusTypeDef HAL_MMC_InitCard(MMC_HandleTypeDef *hmmc); 00708 HAL_StatusTypeDef HAL_MMC_DeInit (MMC_HandleTypeDef *hmmc); 00709 void HAL_MMC_MspInit(MMC_HandleTypeDef *hmmc); 00710 void HAL_MMC_MspDeInit(MMC_HandleTypeDef *hmmc); 00711 00712 /** 00713 * @} 00714 */ 00715 00716 /** @defgroup MMC_Exported_Functions_Group2 Input and Output operation functions 00717 * @{ 00718 */ 00719 /* Blocking mode: Polling */ 00720 HAL_StatusTypeDef HAL_MMC_ReadBlocks(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, uint32_t Timeout); 00721 HAL_StatusTypeDef HAL_MMC_WriteBlocks(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, uint32_t Timeout); 00722 HAL_StatusTypeDef HAL_MMC_Erase(MMC_HandleTypeDef *hmmc, uint32_t BlockStartAdd, uint32_t BlockEndAdd); 00723 /* Non-Blocking mode: IT */ 00724 HAL_StatusTypeDef HAL_MMC_ReadBlocks_IT(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks); 00725 HAL_StatusTypeDef HAL_MMC_WriteBlocks_IT(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks); 00726 /* Non-Blocking mode: DMA */ 00727 HAL_StatusTypeDef HAL_MMC_ReadBlocks_DMA(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks); 00728 HAL_StatusTypeDef HAL_MMC_WriteBlocks_DMA(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks); 00729 00730 void HAL_MMC_IRQHandler(MMC_HandleTypeDef *hmmc); 00731 00732 /* Callback in non blocking modes (DMA) */ 00733 void HAL_MMC_TxCpltCallback(MMC_HandleTypeDef *hmmc); 00734 void HAL_MMC_RxCpltCallback(MMC_HandleTypeDef *hmmc); 00735 void HAL_MMC_ErrorCallback(MMC_HandleTypeDef *hmmc); 00736 void HAL_MMC_AbortCallback(MMC_HandleTypeDef *hmmc); 00737 00738 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) 00739 /* MMC callback registering/unregistering */ 00740 HAL_StatusTypeDef HAL_MMC_RegisterCallback (MMC_HandleTypeDef *hmmc, HAL_MMC_CallbackIDTypeDef CallbackId, pMMC_CallbackTypeDef pCallback); 00741 HAL_StatusTypeDef HAL_MMC_UnRegisterCallback(MMC_HandleTypeDef *hmmc, HAL_MMC_CallbackIDTypeDef CallbackId); 00742 #endif 00743 /** 00744 * @} 00745 */ 00746 00747 /** @defgroup MMC_Exported_Functions_Group3 Peripheral Control functions 00748 * @{ 00749 */ 00750 HAL_StatusTypeDef HAL_MMC_ConfigWideBusOperation(MMC_HandleTypeDef *hmmc, uint32_t WideMode); 00751 #if defined(STM32L4P5xx) || defined(STM32L4Q5xx) || defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 00752 HAL_StatusTypeDef HAL_MMC_ConfigSpeedBusOperation(MMC_HandleTypeDef *hmmc, uint32_t SpeedMode); 00753 #endif 00754 /** 00755 * @} 00756 */ 00757 00758 /** @defgroup MMC_Exported_Functions_Group4 MMC card related functions 00759 * @{ 00760 */ 00761 HAL_MMC_CardStateTypeDef HAL_MMC_GetCardState(MMC_HandleTypeDef *hmmc); 00762 HAL_StatusTypeDef HAL_MMC_GetCardCID(MMC_HandleTypeDef *hmmc, HAL_MMC_CardCIDTypeDef *pCID); 00763 HAL_StatusTypeDef HAL_MMC_GetCardCSD(MMC_HandleTypeDef *hmmc, HAL_MMC_CardCSDTypeDef *pCSD); 00764 HAL_StatusTypeDef HAL_MMC_GetCardInfo(MMC_HandleTypeDef *hmmc, HAL_MMC_CardInfoTypeDef *pCardInfo); 00765 HAL_StatusTypeDef HAL_MMC_GetCardExtCSD(MMC_HandleTypeDef *hmmc, uint32_t *pExtCSD, uint32_t Timeout); 00766 /** 00767 * @} 00768 */ 00769 00770 /** @defgroup MMC_Exported_Functions_Group5 Peripheral State and Errors functions 00771 * @{ 00772 */ 00773 HAL_MMC_StateTypeDef HAL_MMC_GetState(MMC_HandleTypeDef *hmmc); 00774 uint32_t HAL_MMC_GetError(MMC_HandleTypeDef *hmmc); 00775 /** 00776 * @} 00777 */ 00778 00779 /** @defgroup MMC_Exported_Functions_Group6 Peripheral Abort management 00780 * @{ 00781 */ 00782 HAL_StatusTypeDef HAL_MMC_Abort(MMC_HandleTypeDef *hmmc); 00783 HAL_StatusTypeDef HAL_MMC_Abort_IT(MMC_HandleTypeDef *hmmc); 00784 /** 00785 * @} 00786 */ 00787 #if defined(STM32L4P5xx) || defined(STM32L4Q5xx) || defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 00788 /** @defgroup MMC_Exported_Functions_Group7 Peripheral Erase management 00789 * @{ 00790 */ 00791 HAL_StatusTypeDef HAL_MMC_EraseSequence(MMC_HandleTypeDef *hmmc, uint32_t EraseType, uint32_t BlockStartAdd, uint32_t BlockEndAdd); 00792 HAL_StatusTypeDef HAL_MMC_Sanitize(MMC_HandleTypeDef *hmmc); 00793 HAL_StatusTypeDef HAL_MMC_ConfigSecRemovalType(MMC_HandleTypeDef *hmmc, uint32_t SRTMode); 00794 HAL_StatusTypeDef HAL_MMC_GetSupportedSecRemovalType(MMC_HandleTypeDef *hmmc, uint32_t *SupportedSRT); 00795 /** 00796 * @} 00797 */ 00798 00799 /** @defgroup MMC_Exported_Functions_Group8 Peripheral Sleep management 00800 * @{ 00801 */ 00802 HAL_StatusTypeDef HAL_MMC_SleepDevice(MMC_HandleTypeDef *hmmc); 00803 HAL_StatusTypeDef HAL_MMC_AwakeDevice(MMC_HandleTypeDef *hmmc); 00804 /** 00805 * @} 00806 */ 00807 #endif /* defined(STM32L4P5xx) || defined(STM32L4Q5xx) || defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) */ 00808 00809 /** 00810 * @} 00811 */ 00812 00813 /* Private types -------------------------------------------------------------*/ 00814 /** @defgroup MMC_Private_Types MMC Private Types 00815 * @{ 00816 */ 00817 00818 /** 00819 * @} 00820 */ 00821 00822 /* Private defines -----------------------------------------------------------*/ 00823 /** @defgroup MMC_Private_Defines MMC Private Defines 00824 * @{ 00825 */ 00826 00827 /** 00828 * @} 00829 */ 00830 00831 /* Private variables ---------------------------------------------------------*/ 00832 /** @defgroup MMC_Private_Variables MMC Private Variables 00833 * @{ 00834 */ 00835 00836 /** 00837 * @} 00838 */ 00839 00840 /* Private constants ---------------------------------------------------------*/ 00841 /** @defgroup MMC_Private_Constants MMC Private Constants 00842 * @{ 00843 */ 00844 00845 /** 00846 * @} 00847 */ 00848 00849 /* Private macros ------------------------------------------------------------*/ 00850 /** @defgroup MMC_Private_Macros MMC Private Macros 00851 * @{ 00852 */ 00853 00854 /** 00855 * @} 00856 */ 00857 00858 /* Private functions prototypes ----------------------------------------------*/ 00859 /** @defgroup MMC_Private_Functions_Prototypes MMC Private Functions Prototypes 00860 * @{ 00861 */ 00862 00863 /** 00864 * @} 00865 */ 00866 00867 /* Private functions ---------------------------------------------------------*/ 00868 /** @defgroup MMC_Private_Functions MMC Private Functions 00869 * @{ 00870 */ 00871 00872 /** 00873 * @} 00874 */ 00875 00876 00877 /** 00878 * @} 00879 */ 00880 00881 /** 00882 * @} 00883 */ 00884 00885 #endif /* SDMMC1 */ 00886 00887 /** 00888 * @} 00889 */ 00890 00891 #ifdef __cplusplus 00892 } 00893 #endif 00894 00895 00896 #endif /* STM32L4xx_HAL_MMC_H */
1.7.6.1