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STM32L443xx HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32l4xx_hal_pcd.h 00004 * @author MCD Application Team 00005 * @brief Header file of PCD HAL module. 00006 ****************************************************************************** 00007 * @attention 00008 * 00009 * Copyright (c) 2017 STMicroelectronics. 00010 * All rights reserved. 00011 * 00012 * This software is licensed under terms that can be found in the LICENSE file 00013 * in the root directory of this software component. 00014 * If no LICENSE file comes with this software, it is provided AS-IS. 00015 * 00016 ****************************************************************************** 00017 */ 00018 00019 /* Define to prevent recursive inclusion -------------------------------------*/ 00020 #ifndef STM32L4xx_HAL_PCD_H 00021 #define STM32L4xx_HAL_PCD_H 00022 00023 #ifdef __cplusplus 00024 extern "C" { 00025 #endif 00026 00027 /* Includes ------------------------------------------------------------------*/ 00028 #include "stm32l4xx_ll_usb.h" 00029 00030 #if defined (USB) || defined (USB_OTG_FS) 00031 00032 /** @addtogroup STM32L4xx_HAL_Driver 00033 * @{ 00034 */ 00035 00036 /** @addtogroup PCD 00037 * @{ 00038 */ 00039 00040 /* Exported types ------------------------------------------------------------*/ 00041 /** @defgroup PCD_Exported_Types PCD Exported Types 00042 * @{ 00043 */ 00044 00045 /** 00046 * @brief PCD State structure definition 00047 */ 00048 typedef enum 00049 { 00050 HAL_PCD_STATE_RESET = 0x00, 00051 HAL_PCD_STATE_READY = 0x01, 00052 HAL_PCD_STATE_ERROR = 0x02, 00053 HAL_PCD_STATE_BUSY = 0x03, 00054 HAL_PCD_STATE_TIMEOUT = 0x04 00055 } PCD_StateTypeDef; 00056 00057 /* Device LPM suspend state */ 00058 typedef enum 00059 { 00060 LPM_L0 = 0x00, /* on */ 00061 LPM_L1 = 0x01, /* LPM L1 sleep */ 00062 LPM_L2 = 0x02, /* suspend */ 00063 LPM_L3 = 0x03, /* off */ 00064 } PCD_LPM_StateTypeDef; 00065 00066 typedef enum 00067 { 00068 PCD_LPM_L0_ACTIVE = 0x00, /* on */ 00069 PCD_LPM_L1_ACTIVE = 0x01, /* LPM L1 sleep */ 00070 } PCD_LPM_MsgTypeDef; 00071 00072 typedef enum 00073 { 00074 PCD_BCD_ERROR = 0xFF, 00075 PCD_BCD_CONTACT_DETECTION = 0xFE, 00076 PCD_BCD_STD_DOWNSTREAM_PORT = 0xFD, 00077 PCD_BCD_CHARGING_DOWNSTREAM_PORT = 0xFC, 00078 PCD_BCD_DEDICATED_CHARGING_PORT = 0xFB, 00079 PCD_BCD_DISCOVERY_COMPLETED = 0x00, 00080 00081 } PCD_BCD_MsgTypeDef; 00082 00083 #if defined (USB) 00084 00085 #endif /* defined (USB) */ 00086 #if defined (USB_OTG_FS) 00087 typedef USB_OTG_GlobalTypeDef PCD_TypeDef; 00088 typedef USB_OTG_CfgTypeDef PCD_InitTypeDef; 00089 typedef USB_OTG_EPTypeDef PCD_EPTypeDef; 00090 #endif /* defined (USB_OTG_FS) */ 00091 #if defined (USB) 00092 typedef USB_TypeDef PCD_TypeDef; 00093 typedef USB_CfgTypeDef PCD_InitTypeDef; 00094 typedef USB_EPTypeDef PCD_EPTypeDef; 00095 #endif /* defined (USB) */ 00096 00097 /** 00098 * @brief PCD Handle Structure definition 00099 */ 00100 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) 00101 typedef struct __PCD_HandleTypeDef 00102 #else 00103 typedef struct 00104 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ 00105 { 00106 PCD_TypeDef *Instance; /*!< Register base address */ 00107 PCD_InitTypeDef Init; /*!< PCD required parameters */ 00108 __IO uint8_t USB_Address; /*!< USB Address */ 00109 #if defined (USB_OTG_FS) 00110 PCD_EPTypeDef IN_ep[16]; /*!< IN endpoint parameters */ 00111 PCD_EPTypeDef OUT_ep[16]; /*!< OUT endpoint parameters */ 00112 #endif /* defined (USB_OTG_FS) */ 00113 #if defined (USB) 00114 PCD_EPTypeDef IN_ep[8]; /*!< IN endpoint parameters */ 00115 PCD_EPTypeDef OUT_ep[8]; /*!< OUT endpoint parameters */ 00116 #endif /* defined (USB) */ 00117 HAL_LockTypeDef Lock; /*!< PCD peripheral status */ 00118 __IO PCD_StateTypeDef State; /*!< PCD communication state */ 00119 __IO uint32_t ErrorCode; /*!< PCD Error code */ 00120 uint32_t Setup[12]; /*!< Setup packet buffer */ 00121 PCD_LPM_StateTypeDef LPM_State; /*!< LPM State */ 00122 uint32_t BESL; 00123 00124 00125 uint32_t lpm_active; /*!< Enable or disable the Link Power Management . 00126 This parameter can be set to ENABLE or DISABLE */ 00127 00128 uint32_t battery_charging_active; /*!< Enable or disable Battery charging. 00129 This parameter can be set to ENABLE or DISABLE */ 00130 void *pData; /*!< Pointer to upper stack Handler */ 00131 00132 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) 00133 void (* SOFCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD SOF callback */ 00134 void (* SetupStageCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Setup Stage callback */ 00135 void (* ResetCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Reset callback */ 00136 void (* SuspendCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Suspend callback */ 00137 void (* ResumeCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Resume callback */ 00138 void (* ConnectCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Connect callback */ 00139 void (* DisconnectCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Disconnect callback */ 00140 00141 void (* DataOutStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD Data OUT Stage callback */ 00142 void (* DataInStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD Data IN Stage callback */ 00143 void (* ISOOUTIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD ISO OUT Incomplete callback */ 00144 void (* ISOINIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD ISO IN Incomplete callback */ 00145 void (* BCDCallback)(struct __PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg); /*!< USB OTG PCD BCD callback */ 00146 void (* LPMCallback)(struct __PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg); /*!< USB OTG PCD LPM callback */ 00147 00148 void (* MspInitCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Msp Init callback */ 00149 void (* MspDeInitCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Msp DeInit callback */ 00150 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ 00151 } PCD_HandleTypeDef; 00152 00153 /** 00154 * @} 00155 */ 00156 00157 /* Include PCD HAL Extended module */ 00158 #include "stm32l4xx_hal_pcd_ex.h" 00159 00160 /* Exported constants --------------------------------------------------------*/ 00161 /** @defgroup PCD_Exported_Constants PCD Exported Constants 00162 * @{ 00163 */ 00164 00165 /** @defgroup PCD_Speed PCD Speed 00166 * @{ 00167 */ 00168 #define PCD_SPEED_FULL USBD_FS_SPEED 00169 /** 00170 * @} 00171 */ 00172 00173 /** @defgroup PCD_PHY_Module PCD PHY Module 00174 * @{ 00175 */ 00176 #define PCD_PHY_ULPI 1U 00177 #define PCD_PHY_EMBEDDED 2U 00178 #define PCD_PHY_UTMI 3U 00179 /** 00180 * @} 00181 */ 00182 00183 /** @defgroup PCD_Error_Code_definition PCD Error Code definition 00184 * @brief PCD Error Code definition 00185 * @{ 00186 */ 00187 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) 00188 #define HAL_PCD_ERROR_INVALID_CALLBACK (0x00000010U) /*!< Invalid Callback error */ 00189 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ 00190 00191 /** 00192 * @} 00193 */ 00194 00195 /** 00196 * @} 00197 */ 00198 00199 /* Exported macros -----------------------------------------------------------*/ 00200 /** @defgroup PCD_Exported_Macros PCD Exported Macros 00201 * @brief macros to handle interrupts and specific clock configurations 00202 * @{ 00203 */ 00204 #if defined (USB_OTG_FS) 00205 #define __HAL_PCD_ENABLE(__HANDLE__) (void)USB_EnableGlobalInt ((__HANDLE__)->Instance) 00206 #define __HAL_PCD_DISABLE(__HANDLE__) (void)USB_DisableGlobalInt ((__HANDLE__)->Instance) 00207 00208 #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) \ 00209 ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__)) 00210 00211 #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->GINTSTS) &= (__INTERRUPT__)) 00212 #define __HAL_PCD_IS_INVALID_INTERRUPT(__HANDLE__) (USB_ReadInterrupts((__HANDLE__)->Instance) == 0U) 00213 00214 #define __HAL_PCD_UNGATE_PHYCLOCK(__HANDLE__) \ 00215 *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) &= ~(USB_OTG_PCGCCTL_STOPCLK) 00216 00217 #define __HAL_PCD_GATE_PHYCLOCK(__HANDLE__) \ 00218 *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) |= USB_OTG_PCGCCTL_STOPCLK 00219 00220 #define __HAL_PCD_IS_PHY_SUSPENDED(__HANDLE__) \ 00221 ((*(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE)) & 0x10U) 00222 00223 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR1 |= USB_OTG_FS_WAKEUP_EXTI_LINE 00224 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR1 &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE) 00225 #endif /* defined (USB_OTG_FS) */ 00226 00227 #if defined (USB) 00228 #define __HAL_PCD_ENABLE(__HANDLE__) (void)USB_EnableGlobalInt ((__HANDLE__)->Instance) 00229 #define __HAL_PCD_DISABLE(__HANDLE__) (void)USB_DisableGlobalInt ((__HANDLE__)->Instance) 00230 #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance)\ 00231 & (__INTERRUPT__)) == (__INTERRUPT__)) 00232 00233 #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR)\ 00234 &= (uint16_t)(~(__INTERRUPT__))) 00235 00236 #define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR1 |= USB_WAKEUP_EXTI_LINE 00237 #define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR1 &= ~(USB_WAKEUP_EXTI_LINE) 00238 #endif /* defined (USB) */ 00239 00240 /** 00241 * @} 00242 */ 00243 00244 /* Exported functions --------------------------------------------------------*/ 00245 /** @addtogroup PCD_Exported_Functions PCD Exported Functions 00246 * @{ 00247 */ 00248 00249 /* Initialization/de-initialization functions ********************************/ 00250 /** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions 00251 * @{ 00252 */ 00253 HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd); 00254 HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd); 00255 void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd); 00256 void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd); 00257 00258 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) 00259 /** @defgroup HAL_PCD_Callback_ID_enumeration_definition HAL USB OTG PCD Callback ID enumeration definition 00260 * @brief HAL USB OTG PCD Callback ID enumeration definition 00261 * @{ 00262 */ 00263 typedef enum 00264 { 00265 HAL_PCD_SOF_CB_ID = 0x01, /*!< USB PCD SOF callback ID */ 00266 HAL_PCD_SETUPSTAGE_CB_ID = 0x02, /*!< USB PCD Setup Stage callback ID */ 00267 HAL_PCD_RESET_CB_ID = 0x03, /*!< USB PCD Reset callback ID */ 00268 HAL_PCD_SUSPEND_CB_ID = 0x04, /*!< USB PCD Suspend callback ID */ 00269 HAL_PCD_RESUME_CB_ID = 0x05, /*!< USB PCD Resume callback ID */ 00270 HAL_PCD_CONNECT_CB_ID = 0x06, /*!< USB PCD Connect callback ID */ 00271 HAL_PCD_DISCONNECT_CB_ID = 0x07, /*!< USB PCD Disconnect callback ID */ 00272 00273 HAL_PCD_MSPINIT_CB_ID = 0x08, /*!< USB PCD MspInit callback ID */ 00274 HAL_PCD_MSPDEINIT_CB_ID = 0x09 /*!< USB PCD MspDeInit callback ID */ 00275 00276 } HAL_PCD_CallbackIDTypeDef; 00277 /** 00278 * @} 00279 */ 00280 00281 /** @defgroup HAL_PCD_Callback_pointer_definition HAL USB OTG PCD Callback pointer definition 00282 * @brief HAL USB OTG PCD Callback pointer definition 00283 * @{ 00284 */ 00285 00286 typedef void (*pPCD_CallbackTypeDef)(PCD_HandleTypeDef *hpcd); /*!< pointer to a common USB OTG PCD callback function */ 00287 typedef void (*pPCD_DataOutStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD Data OUT Stage callback */ 00288 typedef void (*pPCD_DataInStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD Data IN Stage callback */ 00289 typedef void (*pPCD_IsoOutIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD ISO OUT Incomplete callback */ 00290 typedef void (*pPCD_IsoInIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD ISO IN Incomplete callback */ 00291 typedef void (*pPCD_LpmCallbackTypeDef)(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg); /*!< pointer to USB OTG PCD LPM callback */ 00292 typedef void (*pPCD_BcdCallbackTypeDef)(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg); /*!< pointer to USB OTG PCD BCD callback */ 00293 00294 /** 00295 * @} 00296 */ 00297 00298 HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd, 00299 HAL_PCD_CallbackIDTypeDef CallbackID, 00300 pPCD_CallbackTypeDef pCallback); 00301 00302 HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd, 00303 HAL_PCD_CallbackIDTypeDef CallbackID); 00304 00305 HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd, 00306 pPCD_DataOutStageCallbackTypeDef pCallback); 00307 00308 HAL_StatusTypeDef HAL_PCD_UnRegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd); 00309 00310 HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd, 00311 pPCD_DataInStageCallbackTypeDef pCallback); 00312 00313 HAL_StatusTypeDef HAL_PCD_UnRegisterDataInStageCallback(PCD_HandleTypeDef *hpcd); 00314 00315 HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd, 00316 pPCD_IsoOutIncpltCallbackTypeDef pCallback); 00317 00318 HAL_StatusTypeDef HAL_PCD_UnRegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd); 00319 00320 HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd, 00321 pPCD_IsoInIncpltCallbackTypeDef pCallback); 00322 00323 HAL_StatusTypeDef HAL_PCD_UnRegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd); 00324 00325 HAL_StatusTypeDef HAL_PCD_RegisterBcdCallback(PCD_HandleTypeDef *hpcd, 00326 pPCD_BcdCallbackTypeDef pCallback); 00327 00328 HAL_StatusTypeDef HAL_PCD_UnRegisterBcdCallback(PCD_HandleTypeDef *hpcd); 00329 00330 HAL_StatusTypeDef HAL_PCD_RegisterLpmCallback(PCD_HandleTypeDef *hpcd, 00331 pPCD_LpmCallbackTypeDef pCallback); 00332 00333 HAL_StatusTypeDef HAL_PCD_UnRegisterLpmCallback(PCD_HandleTypeDef *hpcd); 00334 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ 00335 /** 00336 * @} 00337 */ 00338 00339 /* I/O operation functions ***************************************************/ 00340 /* Non-Blocking mode: Interrupt */ 00341 /** @addtogroup PCD_Exported_Functions_Group2 Input and Output operation functions 00342 * @{ 00343 */ 00344 HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd); 00345 HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd); 00346 void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd); 00347 00348 void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd); 00349 void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd); 00350 void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd); 00351 void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd); 00352 void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd); 00353 void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd); 00354 void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd); 00355 00356 void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); 00357 void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); 00358 void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); 00359 void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); 00360 /** 00361 * @} 00362 */ 00363 00364 /* Peripheral Control functions **********************************************/ 00365 /** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions 00366 * @{ 00367 */ 00368 HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd); 00369 HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd); 00370 HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address); 00371 HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, 00372 uint16_t ep_mps, uint8_t ep_type); 00373 00374 HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); 00375 HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, 00376 uint8_t *pBuf, uint32_t len); 00377 00378 HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, 00379 uint8_t *pBuf, uint32_t len); 00380 00381 HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); 00382 HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); 00383 HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); 00384 HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); 00385 HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd); 00386 HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd); 00387 uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); 00388 /** 00389 * @} 00390 */ 00391 00392 /* Peripheral State functions ************************************************/ 00393 /** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions 00394 * @{ 00395 */ 00396 PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd); 00397 /** 00398 * @} 00399 */ 00400 00401 /** 00402 * @} 00403 */ 00404 00405 /* Private constants ---------------------------------------------------------*/ 00406 /** @defgroup PCD_Private_Constants PCD Private Constants 00407 * @{ 00408 */ 00409 /** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt 00410 * @{ 00411 */ 00412 #if defined (USB_OTG_FS) 00413 #define USB_OTG_FS_WAKEUP_EXTI_LINE (0x1U << 17) /*!< USB FS EXTI Line WakeUp Interrupt */ 00414 #endif /* defined (USB_OTG_FS) */ 00415 00416 #if defined (USB) 00417 #define USB_WAKEUP_EXTI_LINE (0x1U << 17) /*!< USB FS EXTI Line WakeUp Interrupt */ 00418 #endif /* defined (USB) */ 00419 00420 /** 00421 * @} 00422 */ 00423 #if defined (USB) 00424 /** @defgroup PCD_EP0_MPS PCD EP0 MPS 00425 * @{ 00426 */ 00427 #define PCD_EP0MPS_64 EP_MPS_64 00428 #define PCD_EP0MPS_32 EP_MPS_32 00429 #define PCD_EP0MPS_16 EP_MPS_16 00430 #define PCD_EP0MPS_08 EP_MPS_8 00431 /** 00432 * @} 00433 */ 00434 00435 /** @defgroup PCD_ENDP PCD ENDP 00436 * @{ 00437 */ 00438 #define PCD_ENDP0 0U 00439 #define PCD_ENDP1 1U 00440 #define PCD_ENDP2 2U 00441 #define PCD_ENDP3 3U 00442 #define PCD_ENDP4 4U 00443 #define PCD_ENDP5 5U 00444 #define PCD_ENDP6 6U 00445 #define PCD_ENDP7 7U 00446 /** 00447 * @} 00448 */ 00449 00450 /** @defgroup PCD_ENDP_Kind PCD Endpoint Kind 00451 * @{ 00452 */ 00453 #define PCD_SNG_BUF 0U 00454 #define PCD_DBL_BUF 1U 00455 /** 00456 * @} 00457 */ 00458 #endif /* defined (USB) */ 00459 /** 00460 * @} 00461 */ 00462 00463 #if defined (USB_OTG_FS) 00464 #ifndef USB_OTG_DOEPINT_OTEPSPR 00465 #define USB_OTG_DOEPINT_OTEPSPR (0x1UL << 5) /*!< Status Phase Received interrupt */ 00466 #endif /* defined USB_OTG_DOEPINT_OTEPSPR */ 00467 00468 #ifndef USB_OTG_DOEPMSK_OTEPSPRM 00469 #define USB_OTG_DOEPMSK_OTEPSPRM (0x1UL << 5) /*!< Setup Packet Received interrupt mask */ 00470 #endif /* defined USB_OTG_DOEPMSK_OTEPSPRM */ 00471 00472 #ifndef USB_OTG_DOEPINT_NAK 00473 #define USB_OTG_DOEPINT_NAK (0x1UL << 13) /*!< NAK interrupt */ 00474 #endif /* defined USB_OTG_DOEPINT_NAK */ 00475 00476 #ifndef USB_OTG_DOEPMSK_NAKM 00477 #define USB_OTG_DOEPMSK_NAKM (0x1UL << 13) /*!< OUT Packet NAK interrupt mask */ 00478 #endif /* defined USB_OTG_DOEPMSK_NAKM */ 00479 00480 #ifndef USB_OTG_DOEPINT_STPKTRX 00481 #define USB_OTG_DOEPINT_STPKTRX (0x1UL << 15) /*!< Setup Packet Received interrupt */ 00482 #endif /* defined USB_OTG_DOEPINT_STPKTRX */ 00483 00484 #ifndef USB_OTG_DOEPMSK_NYETM 00485 #define USB_OTG_DOEPMSK_NYETM (0x1UL << 14) /*!< Setup Packet Received interrupt mask */ 00486 #endif /* defined USB_OTG_DOEPMSK_NYETM */ 00487 #endif /* defined (USB_OTG_FS) */ 00488 00489 /* Private macros ------------------------------------------------------------*/ 00490 /** @defgroup PCD_Private_Macros PCD Private Macros 00491 * @{ 00492 */ 00493 #if defined (USB) 00494 /******************** Bit definition for USB_COUNTn_RX register *************/ 00495 #define USB_CNTRX_NBLK_MSK (0x1FU << 10) 00496 #define USB_CNTRX_BLSIZE (0x1U << 15) 00497 00498 /* SetENDPOINT */ 00499 #define PCD_SET_ENDPOINT(USBx, bEpNum, wRegValue) (*(__IO uint16_t *)\ 00500 (&(USBx)->EP0R + ((bEpNum) * 2U)) = (uint16_t)(wRegValue)) 00501 00502 /* GetENDPOINT */ 00503 #define PCD_GET_ENDPOINT(USBx, bEpNum) (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U))) 00504 00505 /* ENDPOINT transfer */ 00506 #define USB_EP0StartXfer USB_EPStartXfer 00507 00508 /** 00509 * @brief sets the type in the endpoint register(bits EP_TYPE[1:0]) 00510 * @param USBx USB peripheral instance register address. 00511 * @param bEpNum Endpoint Number. 00512 * @param wType Endpoint Type. 00513 * @retval None 00514 */ 00515 #define PCD_SET_EPTYPE(USBx, bEpNum, wType) (PCD_SET_ENDPOINT((USBx), (bEpNum), ((PCD_GET_ENDPOINT((USBx), (bEpNum))\ 00516 & USB_EP_T_MASK) | (wType) | USB_EP_CTR_TX | USB_EP_CTR_RX))) 00517 00518 00519 /** 00520 * @brief gets the type in the endpoint register(bits EP_TYPE[1:0]) 00521 * @param USBx USB peripheral instance register address. 00522 * @param bEpNum Endpoint Number. 00523 * @retval Endpoint Type 00524 */ 00525 #define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD) 00526 00527 /** 00528 * @brief free buffer used from the application realizing it to the line 00529 * toggles bit SW_BUF in the double buffered endpoint register 00530 * @param USBx USB device. 00531 * @param bEpNum, bDir 00532 * @retval None 00533 */ 00534 #define PCD_FREE_USER_BUFFER(USBx, bEpNum, bDir) \ 00535 do { \ 00536 if ((bDir) == 0U) \ 00537 { \ 00538 /* OUT double buffered endpoint */ \ 00539 PCD_TX_DTOG((USBx), (bEpNum)); \ 00540 } \ 00541 else if ((bDir) == 1U) \ 00542 { \ 00543 /* IN double buffered endpoint */ \ 00544 PCD_RX_DTOG((USBx), (bEpNum)); \ 00545 } \ 00546 } while(0) 00547 00548 /** 00549 * @brief sets the status for tx transfer (bits STAT_TX[1:0]). 00550 * @param USBx USB peripheral instance register address. 00551 * @param bEpNum Endpoint Number. 00552 * @param wState new state 00553 * @retval None 00554 */ 00555 #define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) \ 00556 do { \ 00557 uint16_t _wRegVal; \ 00558 \ 00559 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK; \ 00560 /* toggle first bit ? */ \ 00561 if ((USB_EPTX_DTOG1 & (wState))!= 0U) \ 00562 { \ 00563 _wRegVal ^= USB_EPTX_DTOG1; \ 00564 } \ 00565 /* toggle second bit ? */ \ 00566 if ((USB_EPTX_DTOG2 & (wState))!= 0U) \ 00567 { \ 00568 _wRegVal ^= USB_EPTX_DTOG2; \ 00569 } \ 00570 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ 00571 } while(0) /* PCD_SET_EP_TX_STATUS */ 00572 00573 /** 00574 * @brief sets the status for rx transfer (bits STAT_TX[1:0]) 00575 * @param USBx USB peripheral instance register address. 00576 * @param bEpNum Endpoint Number. 00577 * @param wState new state 00578 * @retval None 00579 */ 00580 #define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) \ 00581 do { \ 00582 uint16_t _wRegVal; \ 00583 \ 00584 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK; \ 00585 /* toggle first bit ? */ \ 00586 if ((USB_EPRX_DTOG1 & (wState))!= 0U) \ 00587 { \ 00588 _wRegVal ^= USB_EPRX_DTOG1; \ 00589 } \ 00590 /* toggle second bit ? */ \ 00591 if ((USB_EPRX_DTOG2 & (wState))!= 0U) \ 00592 { \ 00593 _wRegVal ^= USB_EPRX_DTOG2; \ 00594 } \ 00595 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ 00596 } while(0) /* PCD_SET_EP_RX_STATUS */ 00597 00598 /** 00599 * @brief sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0]) 00600 * @param USBx USB peripheral instance register address. 00601 * @param bEpNum Endpoint Number. 00602 * @param wStaterx new state. 00603 * @param wStatetx new state. 00604 * @retval None 00605 */ 00606 #define PCD_SET_EP_TXRX_STATUS(USBx, bEpNum, wStaterx, wStatetx) \ 00607 do { \ 00608 uint16_t _wRegVal; \ 00609 \ 00610 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK | USB_EPTX_STAT); \ 00611 /* toggle first bit ? */ \ 00612 if ((USB_EPRX_DTOG1 & (wStaterx))!= 0U) \ 00613 { \ 00614 _wRegVal ^= USB_EPRX_DTOG1; \ 00615 } \ 00616 /* toggle second bit ? */ \ 00617 if ((USB_EPRX_DTOG2 & (wStaterx))!= 0U) \ 00618 { \ 00619 _wRegVal ^= USB_EPRX_DTOG2; \ 00620 } \ 00621 /* toggle first bit ? */ \ 00622 if ((USB_EPTX_DTOG1 & (wStatetx))!= 0U) \ 00623 { \ 00624 _wRegVal ^= USB_EPTX_DTOG1; \ 00625 } \ 00626 /* toggle second bit ? */ \ 00627 if ((USB_EPTX_DTOG2 & (wStatetx))!= 0U) \ 00628 { \ 00629 _wRegVal ^= USB_EPTX_DTOG2; \ 00630 } \ 00631 \ 00632 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ 00633 } while(0) /* PCD_SET_EP_TXRX_STATUS */ 00634 00635 /** 00636 * @brief gets the status for tx/rx transfer (bits STAT_TX[1:0] 00637 * /STAT_RX[1:0]) 00638 * @param USBx USB peripheral instance register address. 00639 * @param bEpNum Endpoint Number. 00640 * @retval status 00641 */ 00642 #define PCD_GET_EP_TX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT) 00643 #define PCD_GET_EP_RX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT) 00644 00645 /** 00646 * @brief sets directly the VALID tx/rx-status into the endpoint register 00647 * @param USBx USB peripheral instance register address. 00648 * @param bEpNum Endpoint Number. 00649 * @retval None 00650 */ 00651 #define PCD_SET_EP_TX_VALID(USBx, bEpNum) (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID)) 00652 #define PCD_SET_EP_RX_VALID(USBx, bEpNum) (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID)) 00653 00654 /** 00655 * @brief checks stall condition in an endpoint. 00656 * @param USBx USB peripheral instance register address. 00657 * @param bEpNum Endpoint Number. 00658 * @retval TRUE = endpoint in stall condition. 00659 */ 00660 #define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) == USB_EP_TX_STALL) 00661 #define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) == USB_EP_RX_STALL) 00662 00663 /** 00664 * @brief set & clear EP_KIND bit. 00665 * @param USBx USB peripheral instance register address. 00666 * @param bEpNum Endpoint Number. 00667 * @retval None 00668 */ 00669 #define PCD_SET_EP_KIND(USBx, bEpNum) \ 00670 do { \ 00671 uint16_t _wRegVal; \ 00672 \ 00673 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \ 00674 \ 00675 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_KIND)); \ 00676 } while(0) /* PCD_SET_EP_KIND */ 00677 00678 #define PCD_CLEAR_EP_KIND(USBx, bEpNum) \ 00679 do { \ 00680 uint16_t _wRegVal; \ 00681 \ 00682 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK; \ 00683 \ 00684 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ 00685 } while(0) /* PCD_CLEAR_EP_KIND */ 00686 00687 /** 00688 * @brief Sets/clears directly STATUS_OUT bit in the endpoint register. 00689 * @param USBx USB peripheral instance register address. 00690 * @param bEpNum Endpoint Number. 00691 * @retval None 00692 */ 00693 #define PCD_SET_OUT_STATUS(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum)) 00694 #define PCD_CLEAR_OUT_STATUS(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum)) 00695 00696 /** 00697 * @brief Sets/clears directly EP_KIND bit in the endpoint register. 00698 * @param USBx USB peripheral instance register address. 00699 * @param bEpNum Endpoint Number. 00700 * @retval None 00701 */ 00702 #define PCD_SET_BULK_EP_DBUF(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum)) 00703 #define PCD_CLEAR_BULK_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum)) 00704 00705 /** 00706 * @brief Clears bit CTR_RX / CTR_TX in the endpoint register. 00707 * @param USBx USB peripheral instance register address. 00708 * @param bEpNum Endpoint Number. 00709 * @retval None 00710 */ 00711 #define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) \ 00712 do { \ 00713 uint16_t _wRegVal; \ 00714 \ 00715 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0x7FFFU & USB_EPREG_MASK); \ 00716 \ 00717 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_TX)); \ 00718 } while(0) /* PCD_CLEAR_RX_EP_CTR */ 00719 00720 #define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) \ 00721 do { \ 00722 uint16_t _wRegVal; \ 00723 \ 00724 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0xFF7FU & USB_EPREG_MASK); \ 00725 \ 00726 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX)); \ 00727 } while(0) /* PCD_CLEAR_TX_EP_CTR */ 00728 00729 /** 00730 * @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register. 00731 * @param USBx USB peripheral instance register address. 00732 * @param bEpNum Endpoint Number. 00733 * @retval None 00734 */ 00735 #define PCD_RX_DTOG(USBx, bEpNum) \ 00736 do { \ 00737 uint16_t _wEPVal; \ 00738 \ 00739 _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \ 00740 \ 00741 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_RX)); \ 00742 } while(0) /* PCD_RX_DTOG */ 00743 00744 #define PCD_TX_DTOG(USBx, bEpNum) \ 00745 do { \ 00746 uint16_t _wEPVal; \ 00747 \ 00748 _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \ 00749 \ 00750 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_TX)); \ 00751 } while(0) /* PCD_TX_DTOG */ 00752 /** 00753 * @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register. 00754 * @param USBx USB peripheral instance register address. 00755 * @param bEpNum Endpoint Number. 00756 * @retval None 00757 */ 00758 #define PCD_CLEAR_RX_DTOG(USBx, bEpNum) \ 00759 do { \ 00760 uint16_t _wRegVal; \ 00761 \ 00762 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \ 00763 \ 00764 if ((_wRegVal & USB_EP_DTOG_RX) != 0U)\ 00765 { \ 00766 PCD_RX_DTOG((USBx), (bEpNum)); \ 00767 } \ 00768 } while(0) /* PCD_CLEAR_RX_DTOG */ 00769 00770 #define PCD_CLEAR_TX_DTOG(USBx, bEpNum) \ 00771 do { \ 00772 uint16_t _wRegVal; \ 00773 \ 00774 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \ 00775 \ 00776 if ((_wRegVal & USB_EP_DTOG_TX) != 0U)\ 00777 { \ 00778 PCD_TX_DTOG((USBx), (bEpNum)); \ 00779 } \ 00780 } while(0) /* PCD_CLEAR_TX_DTOG */ 00781 00782 /** 00783 * @brief Sets address in an endpoint register. 00784 * @param USBx USB peripheral instance register address. 00785 * @param bEpNum Endpoint Number. 00786 * @param bAddr Address. 00787 * @retval None 00788 */ 00789 #define PCD_SET_EP_ADDRESS(USBx, bEpNum, bAddr) \ 00790 do { \ 00791 uint16_t _wRegVal; \ 00792 \ 00793 _wRegVal = (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr); \ 00794 \ 00795 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ 00796 } while(0) /* PCD_SET_EP_ADDRESS */ 00797 00798 /** 00799 * @brief Gets address in an endpoint register. 00800 * @param USBx USB peripheral instance register address. 00801 * @param bEpNum Endpoint Number. 00802 * @retval None 00803 */ 00804 #define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD)) 00805 00806 #define PCD_EP_TX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE\ 00807 + ((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U))) 00808 00809 #define PCD_EP_RX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE\ 00810 + ((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U))) 00811 00812 00813 /** 00814 * @brief sets address of the tx/rx buffer. 00815 * @param USBx USB peripheral instance register address. 00816 * @param bEpNum Endpoint Number. 00817 * @param wAddr address to be set (must be word aligned). 00818 * @retval None 00819 */ 00820 #define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum, wAddr) \ 00821 do { \ 00822 __IO uint16_t *_wRegVal; \ 00823 uint32_t _wRegBase = (uint32_t)USBx; \ 00824 \ 00825 _wRegBase += (uint32_t)(USBx)->BTABLE; \ 00826 _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + (((uint32_t)(bEpNum) * 8U) * PMA_ACCESS)); \ 00827 *_wRegVal = ((wAddr) >> 1) << 1; \ 00828 } while(0) /* PCD_SET_EP_TX_ADDRESS */ 00829 00830 #define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum, wAddr) \ 00831 do { \ 00832 __IO uint16_t *_wRegVal; \ 00833 uint32_t _wRegBase = (uint32_t)USBx; \ 00834 \ 00835 _wRegBase += (uint32_t)(USBx)->BTABLE; \ 00836 _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 4U) * PMA_ACCESS)); \ 00837 *_wRegVal = ((wAddr) >> 1) << 1; \ 00838 } while(0) /* PCD_SET_EP_RX_ADDRESS */ 00839 00840 /** 00841 * @brief Gets address of the tx/rx buffer. 00842 * @param USBx USB peripheral instance register address. 00843 * @param bEpNum Endpoint Number. 00844 * @retval address of the buffer. 00845 */ 00846 #define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum))) 00847 #define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum))) 00848 00849 /** 00850 * @brief Sets counter of rx buffer with no. of blocks. 00851 * @param pdwReg Register pointer 00852 * @param wCount Counter. 00853 * @param wNBlocks no. of Blocks. 00854 * @retval None 00855 */ 00856 #define PCD_CALC_BLK32(pdwReg, wCount, wNBlocks) \ 00857 do { \ 00858 (wNBlocks) = (wCount) >> 5; \ 00859 if (((wCount) & 0x1fU) == 0U) \ 00860 { \ 00861 (wNBlocks)--; \ 00862 } \ 00863 *(pdwReg) = (uint16_t)(((wNBlocks) << 10) | USB_CNTRX_BLSIZE); \ 00864 } while(0) /* PCD_CALC_BLK32 */ 00865 00866 #define PCD_CALC_BLK2(pdwReg, wCount, wNBlocks) \ 00867 do { \ 00868 (wNBlocks) = (wCount) >> 1; \ 00869 if (((wCount) & 0x1U) != 0U) \ 00870 { \ 00871 (wNBlocks)++; \ 00872 } \ 00873 *(pdwReg) = (uint16_t)((wNBlocks) << 10); \ 00874 } while(0) /* PCD_CALC_BLK2 */ 00875 00876 #define PCD_SET_EP_CNT_RX_REG(pdwReg, wCount) \ 00877 do { \ 00878 uint32_t wNBlocks; \ 00879 \ 00880 if ((wCount) > 62U) \ 00881 { \ 00882 PCD_CALC_BLK32((pdwReg), (wCount), wNBlocks); \ 00883 } \ 00884 else \ 00885 { \ 00886 if ((wCount) == 0U) \ 00887 { \ 00888 *(pdwReg) &= (uint16_t)~USB_CNTRX_NBLK_MSK; \ 00889 *(pdwReg) |= USB_CNTRX_BLSIZE; \ 00890 } \ 00891 else \ 00892 { \ 00893 PCD_CALC_BLK2((pdwReg), (wCount), wNBlocks); \ 00894 } \ 00895 } \ 00896 } while(0) /* PCD_SET_EP_CNT_RX_REG */ 00897 00898 #define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum, wCount) \ 00899 do { \ 00900 uint32_t _wRegBase = (uint32_t)(USBx); \ 00901 __IO uint16_t *pdwReg; \ 00902 \ 00903 _wRegBase += (uint32_t)(USBx)->BTABLE; \ 00904 pdwReg = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \ 00905 PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount)); \ 00906 } while(0) 00907 00908 /** 00909 * @brief sets counter for the tx/rx buffer. 00910 * @param USBx USB peripheral instance register address. 00911 * @param bEpNum Endpoint Number. 00912 * @param wCount Counter value. 00913 * @retval None 00914 */ 00915 #define PCD_SET_EP_TX_CNT(USBx, bEpNum, wCount) \ 00916 do { \ 00917 uint32_t _wRegBase = (uint32_t)(USBx); \ 00918 __IO uint16_t *_wRegVal; \ 00919 \ 00920 _wRegBase += (uint32_t)(USBx)->BTABLE; \ 00921 _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \ 00922 *_wRegVal = (uint16_t)(wCount); \ 00923 } while(0) 00924 00925 #define PCD_SET_EP_RX_CNT(USBx, bEpNum, wCount) \ 00926 do { \ 00927 uint32_t _wRegBase = (uint32_t)(USBx); \ 00928 __IO uint16_t *_wRegVal; \ 00929 \ 00930 _wRegBase += (uint32_t)(USBx)->BTABLE; \ 00931 _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \ 00932 PCD_SET_EP_CNT_RX_REG(_wRegVal, (wCount)); \ 00933 } while(0) 00934 00935 /** 00936 * @brief gets counter of the tx buffer. 00937 * @param USBx USB peripheral instance register address. 00938 * @param bEpNum Endpoint Number. 00939 * @retval Counter value 00940 */ 00941 #define PCD_GET_EP_TX_CNT(USBx, bEpNum) ((uint32_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ffU) 00942 #define PCD_GET_EP_RX_CNT(USBx, bEpNum) ((uint32_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ffU) 00943 00944 /** 00945 * @brief Sets buffer 0/1 address in a double buffer endpoint. 00946 * @param USBx USB peripheral instance register address. 00947 * @param bEpNum Endpoint Number. 00948 * @param wBuf0Addr buffer 0 address. 00949 * @retval Counter value 00950 */ 00951 #define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum, wBuf0Addr) \ 00952 do { \ 00953 PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr)); \ 00954 } while(0) /* PCD_SET_EP_DBUF0_ADDR */ 00955 00956 #define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum, wBuf1Addr) \ 00957 do { \ 00958 PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr)); \ 00959 } while(0) /* PCD_SET_EP_DBUF1_ADDR */ 00960 00961 /** 00962 * @brief Sets addresses in a double buffer endpoint. 00963 * @param USBx USB peripheral instance register address. 00964 * @param bEpNum Endpoint Number. 00965 * @param wBuf0Addr: buffer 0 address. 00966 * @param wBuf1Addr = buffer 1 address. 00967 * @retval None 00968 */ 00969 #define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum, wBuf0Addr, wBuf1Addr) \ 00970 do { \ 00971 PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr)); \ 00972 PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr)); \ 00973 } while(0) /* PCD_SET_EP_DBUF_ADDR */ 00974 00975 /** 00976 * @brief Gets buffer 0/1 address of a double buffer endpoint. 00977 * @param USBx USB peripheral instance register address. 00978 * @param bEpNum Endpoint Number. 00979 * @retval None 00980 */ 00981 #define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum) (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum))) 00982 #define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum) (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum))) 00983 00984 /** 00985 * @brief Gets buffer 0/1 address of a double buffer endpoint. 00986 * @param USBx USB peripheral instance register address. 00987 * @param bEpNum Endpoint Number. 00988 * @param bDir endpoint dir EP_DBUF_OUT = OUT 00989 * EP_DBUF_IN = IN 00990 * @param wCount: Counter value 00991 * @retval None 00992 */ 00993 #define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) \ 00994 do { \ 00995 if ((bDir) == 0U) \ 00996 /* OUT endpoint */ \ 00997 { \ 00998 PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum), (wCount)); \ 00999 } \ 01000 else \ 01001 { \ 01002 if ((bDir) == 1U) \ 01003 { \ 01004 /* IN endpoint */ \ 01005 PCD_SET_EP_TX_CNT((USBx), (bEpNum), (wCount)); \ 01006 } \ 01007 } \ 01008 } while(0) /* SetEPDblBuf0Count*/ 01009 01010 #define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) \ 01011 do { \ 01012 uint32_t _wBase = (uint32_t)(USBx); \ 01013 __IO uint16_t *_wEPRegVal; \ 01014 \ 01015 if ((bDir) == 0U) \ 01016 { \ 01017 /* OUT endpoint */ \ 01018 PCD_SET_EP_RX_CNT((USBx), (bEpNum), (wCount)); \ 01019 } \ 01020 else \ 01021 { \ 01022 if ((bDir) == 1U) \ 01023 { \ 01024 /* IN endpoint */ \ 01025 _wBase += (uint32_t)(USBx)->BTABLE; \ 01026 _wEPRegVal = (__IO uint16_t *)(_wBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \ 01027 *_wEPRegVal = (uint16_t)(wCount); \ 01028 } \ 01029 } \ 01030 } while(0) /* SetEPDblBuf1Count */ 01031 01032 #define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) \ 01033 do { \ 01034 PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \ 01035 PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \ 01036 } while(0) /* PCD_SET_EP_DBUF_CNT */ 01037 01038 /** 01039 * @brief Gets buffer 0/1 rx/tx counter for double buffering. 01040 * @param USBx USB peripheral instance register address. 01041 * @param bEpNum Endpoint Number. 01042 * @retval None 01043 */ 01044 #define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum) (PCD_GET_EP_TX_CNT((USBx), (bEpNum))) 01045 #define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum) (PCD_GET_EP_RX_CNT((USBx), (bEpNum))) 01046 01047 #endif /* defined (USB) */ 01048 01049 /** 01050 * @} 01051 */ 01052 01053 /** 01054 * @} 01055 */ 01056 01057 /** 01058 * @} 01059 */ 01060 #endif /* defined (USB) || defined (USB_OTG_FS) */ 01061 01062 #ifdef __cplusplus 01063 } 01064 #endif 01065 01066 #endif /* STM32L4xx_HAL_PCD_H */
1.7.6.1