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STM32L443xx HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32l4xx_hal_uart_ex.h 00004 * @author MCD Application Team 00005 * @brief Header file of UART HAL Extended module. 00006 ****************************************************************************** 00007 * @attention 00008 * 00009 * Copyright (c) 2017 STMicroelectronics. 00010 * All rights reserved. 00011 * 00012 * This software is licensed under terms that can be found in the LICENSE file 00013 * in the root directory of this software component. 00014 * If no LICENSE file comes with this software, it is provided AS-IS. 00015 * 00016 ****************************************************************************** 00017 */ 00018 00019 /* Define to prevent recursive inclusion -------------------------------------*/ 00020 #ifndef STM32L4xx_HAL_UART_EX_H 00021 #define STM32L4xx_HAL_UART_EX_H 00022 00023 #ifdef __cplusplus 00024 extern "C" { 00025 #endif 00026 00027 /* Includes ------------------------------------------------------------------*/ 00028 #include "stm32l4xx_hal_def.h" 00029 00030 /** @addtogroup STM32L4xx_HAL_Driver 00031 * @{ 00032 */ 00033 00034 /** @addtogroup UARTEx 00035 * @{ 00036 */ 00037 00038 /* Exported types ------------------------------------------------------------*/ 00039 /** @defgroup UARTEx_Exported_Types UARTEx Exported Types 00040 * @{ 00041 */ 00042 00043 /** 00044 * @brief UART wake up from stop mode parameters 00045 */ 00046 typedef struct 00047 { 00048 uint32_t WakeUpEvent; /*!< Specifies which event will activate the Wakeup from Stop mode flag (WUF). 00049 This parameter can be a value of @ref UART_WakeUp_from_Stop_Selection. 00050 If set to UART_WAKEUP_ON_ADDRESS, the two other fields below must 00051 be filled up. */ 00052 00053 uint16_t AddressLength; /*!< Specifies whether the address is 4 or 7-bit long. 00054 This parameter can be a value of @ref UARTEx_WakeUp_Address_Length. */ 00055 00056 uint8_t Address; /*!< UART/USART node address (7-bit long max). */ 00057 } UART_WakeUpTypeDef; 00058 00059 /** 00060 * @} 00061 */ 00062 00063 /* Exported constants --------------------------------------------------------*/ 00064 /** @defgroup UARTEx_Exported_Constants UARTEx Exported Constants 00065 * @{ 00066 */ 00067 00068 /** @defgroup UARTEx_Word_Length UARTEx Word Length 00069 * @{ 00070 */ 00071 #define UART_WORDLENGTH_7B USART_CR1_M1 /*!< 7-bit long UART frame */ 00072 #define UART_WORDLENGTH_8B 0x00000000U /*!< 8-bit long UART frame */ 00073 #define UART_WORDLENGTH_9B USART_CR1_M0 /*!< 9-bit long UART frame */ 00074 /** 00075 * @} 00076 */ 00077 00078 /** @defgroup UARTEx_WakeUp_Address_Length UARTEx WakeUp Address Length 00079 * @{ 00080 */ 00081 #define UART_ADDRESS_DETECT_4B 0x00000000U /*!< 4-bit long wake-up address */ 00082 #define UART_ADDRESS_DETECT_7B USART_CR2_ADDM7 /*!< 7-bit long wake-up address */ 00083 /** 00084 * @} 00085 */ 00086 00087 #if defined(USART_CR1_FIFOEN) 00088 /** @defgroup UARTEx_FIFO_mode UARTEx FIFO mode 00089 * @brief UART FIFO mode 00090 * @{ 00091 */ 00092 #define UART_FIFOMODE_DISABLE 0x00000000U /*!< FIFO mode disable */ 00093 #define UART_FIFOMODE_ENABLE USART_CR1_FIFOEN /*!< FIFO mode enable */ 00094 /** 00095 * @} 00096 */ 00097 00098 /** @defgroup UARTEx_TXFIFO_threshold_level UARTEx TXFIFO threshold level 00099 * @brief UART TXFIFO threshold level 00100 * @{ 00101 */ 00102 #define UART_TXFIFO_THRESHOLD_1_8 0x00000000U /*!< TX FIFO reaches 1/8 of its depth */ 00103 #define UART_TXFIFO_THRESHOLD_1_4 USART_CR3_TXFTCFG_0 /*!< TX FIFO reaches 1/4 of its depth */ 00104 #define UART_TXFIFO_THRESHOLD_1_2 USART_CR3_TXFTCFG_1 /*!< TX FIFO reaches 1/2 of its depth */ 00105 #define UART_TXFIFO_THRESHOLD_3_4 (USART_CR3_TXFTCFG_0|USART_CR3_TXFTCFG_1) /*!< TX FIFO reaches 3/4 of its depth */ 00106 #define UART_TXFIFO_THRESHOLD_7_8 USART_CR3_TXFTCFG_2 /*!< TX FIFO reaches 7/8 of its depth */ 00107 #define UART_TXFIFO_THRESHOLD_8_8 (USART_CR3_TXFTCFG_2|USART_CR3_TXFTCFG_0) /*!< TX FIFO becomes empty */ 00108 /** 00109 * @} 00110 */ 00111 00112 /** @defgroup UARTEx_RXFIFO_threshold_level UARTEx RXFIFO threshold level 00113 * @brief UART RXFIFO threshold level 00114 * @{ 00115 */ 00116 #define UART_RXFIFO_THRESHOLD_1_8 0x00000000U /*!< RX FIFO reaches 1/8 of its depth */ 00117 #define UART_RXFIFO_THRESHOLD_1_4 USART_CR3_RXFTCFG_0 /*!< RX FIFO reaches 1/4 of its depth */ 00118 #define UART_RXFIFO_THRESHOLD_1_2 USART_CR3_RXFTCFG_1 /*!< RX FIFO reaches 1/2 of its depth */ 00119 #define UART_RXFIFO_THRESHOLD_3_4 (USART_CR3_RXFTCFG_0|USART_CR3_RXFTCFG_1) /*!< RX FIFO reaches 3/4 of its depth */ 00120 #define UART_RXFIFO_THRESHOLD_7_8 USART_CR3_RXFTCFG_2 /*!< RX FIFO reaches 7/8 of its depth */ 00121 #define UART_RXFIFO_THRESHOLD_8_8 (USART_CR3_RXFTCFG_2|USART_CR3_RXFTCFG_0) /*!< RX FIFO becomes full */ 00122 /** 00123 * @} 00124 */ 00125 00126 #endif /* USART_CR1_FIFOEN */ 00127 /** 00128 * @} 00129 */ 00130 00131 /* Exported macros -----------------------------------------------------------*/ 00132 /* Exported functions --------------------------------------------------------*/ 00133 /** @addtogroup UARTEx_Exported_Functions 00134 * @{ 00135 */ 00136 00137 /** @addtogroup UARTEx_Exported_Functions_Group1 00138 * @{ 00139 */ 00140 00141 /* Initialization and de-initialization functions ****************************/ 00142 HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, uint32_t AssertionTime, 00143 uint32_t DeassertionTime); 00144 00145 /** 00146 * @} 00147 */ 00148 00149 /** @addtogroup UARTEx_Exported_Functions_Group2 00150 * @{ 00151 */ 00152 00153 void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart); 00154 00155 #if defined(USART_CR1_FIFOEN) 00156 void HAL_UARTEx_RxFifoFullCallback(UART_HandleTypeDef *huart); 00157 void HAL_UARTEx_TxFifoEmptyCallback(UART_HandleTypeDef *huart); 00158 00159 #endif /* USART_CR1_FIFOEN */ 00160 /** 00161 * @} 00162 */ 00163 00164 /** @addtogroup UARTEx_Exported_Functions_Group3 00165 * @{ 00166 */ 00167 00168 /* Peripheral Control functions **********************************************/ 00169 HAL_StatusTypeDef HAL_UARTEx_StopModeWakeUpSourceConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection); 00170 HAL_StatusTypeDef HAL_UARTEx_EnableStopMode(UART_HandleTypeDef *huart); 00171 HAL_StatusTypeDef HAL_UARTEx_DisableStopMode(UART_HandleTypeDef *huart); 00172 00173 #if defined(USART_CR3_UCESM) 00174 HAL_StatusTypeDef HAL_UARTEx_EnableClockStopMode(UART_HandleTypeDef *huart); 00175 HAL_StatusTypeDef HAL_UARTEx_DisableClockStopMode(UART_HandleTypeDef *huart); 00176 00177 #endif /* USART_CR3_UCESM */ 00178 HAL_StatusTypeDef HAL_MultiProcessorEx_AddressLength_Set(UART_HandleTypeDef *huart, uint32_t AddressLength); 00179 00180 #if defined(USART_CR1_FIFOEN) 00181 HAL_StatusTypeDef HAL_UARTEx_EnableFifoMode(UART_HandleTypeDef *huart); 00182 HAL_StatusTypeDef HAL_UARTEx_DisableFifoMode(UART_HandleTypeDef *huart); 00183 HAL_StatusTypeDef HAL_UARTEx_SetTxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold); 00184 HAL_StatusTypeDef HAL_UARTEx_SetRxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold); 00185 #endif /* USART_CR1_FIFOEN */ 00186 00187 HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint16_t *RxLen, 00188 uint32_t Timeout); 00189 HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 00190 HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 00191 00192 00193 /** 00194 * @} 00195 */ 00196 00197 /** 00198 * @} 00199 */ 00200 00201 /* Private macros ------------------------------------------------------------*/ 00202 /** @defgroup UARTEx_Private_Macros UARTEx Private Macros 00203 * @{ 00204 */ 00205 00206 /** @brief Report the UART clock source. 00207 * @param __HANDLE__ specifies the UART Handle. 00208 * @param __CLOCKSOURCE__ output variable. 00209 * @retval UART clocking source, written in __CLOCKSOURCE__. 00210 */ 00211 #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) \ 00212 || defined (STM32L496xx) || defined (STM32L4A6xx) \ 00213 || defined (STM32L4P5xx) || defined (STM32L4Q5xx) \ 00214 || defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) 00215 #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ 00216 do { \ 00217 if((__HANDLE__)->Instance == USART1) \ 00218 { \ 00219 switch(__HAL_RCC_GET_USART1_SOURCE()) \ 00220 { \ 00221 case RCC_USART1CLKSOURCE_PCLK2: \ 00222 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \ 00223 break; \ 00224 case RCC_USART1CLKSOURCE_HSI: \ 00225 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 00226 break; \ 00227 case RCC_USART1CLKSOURCE_SYSCLK: \ 00228 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 00229 break; \ 00230 case RCC_USART1CLKSOURCE_LSE: \ 00231 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 00232 break; \ 00233 default: \ 00234 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 00235 break; \ 00236 } \ 00237 } \ 00238 else if((__HANDLE__)->Instance == USART2) \ 00239 { \ 00240 switch(__HAL_RCC_GET_USART2_SOURCE()) \ 00241 { \ 00242 case RCC_USART2CLKSOURCE_PCLK1: \ 00243 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 00244 break; \ 00245 case RCC_USART2CLKSOURCE_HSI: \ 00246 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 00247 break; \ 00248 case RCC_USART2CLKSOURCE_SYSCLK: \ 00249 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 00250 break; \ 00251 case RCC_USART2CLKSOURCE_LSE: \ 00252 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 00253 break; \ 00254 default: \ 00255 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 00256 break; \ 00257 } \ 00258 } \ 00259 else if((__HANDLE__)->Instance == USART3) \ 00260 { \ 00261 switch(__HAL_RCC_GET_USART3_SOURCE()) \ 00262 { \ 00263 case RCC_USART3CLKSOURCE_PCLK1: \ 00264 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 00265 break; \ 00266 case RCC_USART3CLKSOURCE_HSI: \ 00267 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 00268 break; \ 00269 case RCC_USART3CLKSOURCE_SYSCLK: \ 00270 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 00271 break; \ 00272 case RCC_USART3CLKSOURCE_LSE: \ 00273 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 00274 break; \ 00275 default: \ 00276 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 00277 break; \ 00278 } \ 00279 } \ 00280 else if((__HANDLE__)->Instance == UART4) \ 00281 { \ 00282 switch(__HAL_RCC_GET_UART4_SOURCE()) \ 00283 { \ 00284 case RCC_UART4CLKSOURCE_PCLK1: \ 00285 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 00286 break; \ 00287 case RCC_UART4CLKSOURCE_HSI: \ 00288 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 00289 break; \ 00290 case RCC_UART4CLKSOURCE_SYSCLK: \ 00291 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 00292 break; \ 00293 case RCC_UART4CLKSOURCE_LSE: \ 00294 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 00295 break; \ 00296 default: \ 00297 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 00298 break; \ 00299 } \ 00300 } \ 00301 else if((__HANDLE__)->Instance == UART5) \ 00302 { \ 00303 switch(__HAL_RCC_GET_UART5_SOURCE()) \ 00304 { \ 00305 case RCC_UART5CLKSOURCE_PCLK1: \ 00306 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 00307 break; \ 00308 case RCC_UART5CLKSOURCE_HSI: \ 00309 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 00310 break; \ 00311 case RCC_UART5CLKSOURCE_SYSCLK: \ 00312 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 00313 break; \ 00314 case RCC_UART5CLKSOURCE_LSE: \ 00315 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 00316 break; \ 00317 default: \ 00318 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 00319 break; \ 00320 } \ 00321 } \ 00322 else if((__HANDLE__)->Instance == LPUART1) \ 00323 { \ 00324 switch(__HAL_RCC_GET_LPUART1_SOURCE()) \ 00325 { \ 00326 case RCC_LPUART1CLKSOURCE_PCLK1: \ 00327 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 00328 break; \ 00329 case RCC_LPUART1CLKSOURCE_HSI: \ 00330 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 00331 break; \ 00332 case RCC_LPUART1CLKSOURCE_SYSCLK: \ 00333 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 00334 break; \ 00335 case RCC_LPUART1CLKSOURCE_LSE: \ 00336 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 00337 break; \ 00338 default: \ 00339 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 00340 break; \ 00341 } \ 00342 } \ 00343 else \ 00344 { \ 00345 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 00346 } \ 00347 } while(0U) 00348 #elif defined (STM32L412xx) || defined (STM32L422xx) \ 00349 || defined (STM32L431xx) || defined (STM32L433xx) || defined (STM32L443xx) 00350 #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ 00351 do { \ 00352 if((__HANDLE__)->Instance == USART1) \ 00353 { \ 00354 switch(__HAL_RCC_GET_USART1_SOURCE()) \ 00355 { \ 00356 case RCC_USART1CLKSOURCE_PCLK2: \ 00357 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \ 00358 break; \ 00359 case RCC_USART1CLKSOURCE_HSI: \ 00360 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 00361 break; \ 00362 case RCC_USART1CLKSOURCE_SYSCLK: \ 00363 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 00364 break; \ 00365 case RCC_USART1CLKSOURCE_LSE: \ 00366 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 00367 break; \ 00368 default: \ 00369 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 00370 break; \ 00371 } \ 00372 } \ 00373 else if((__HANDLE__)->Instance == USART2) \ 00374 { \ 00375 switch(__HAL_RCC_GET_USART2_SOURCE()) \ 00376 { \ 00377 case RCC_USART2CLKSOURCE_PCLK1: \ 00378 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 00379 break; \ 00380 case RCC_USART2CLKSOURCE_HSI: \ 00381 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 00382 break; \ 00383 case RCC_USART2CLKSOURCE_SYSCLK: \ 00384 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 00385 break; \ 00386 case RCC_USART2CLKSOURCE_LSE: \ 00387 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 00388 break; \ 00389 default: \ 00390 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 00391 break; \ 00392 } \ 00393 } \ 00394 else if((__HANDLE__)->Instance == USART3) \ 00395 { \ 00396 switch(__HAL_RCC_GET_USART3_SOURCE()) \ 00397 { \ 00398 case RCC_USART3CLKSOURCE_PCLK1: \ 00399 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 00400 break; \ 00401 case RCC_USART3CLKSOURCE_HSI: \ 00402 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 00403 break; \ 00404 case RCC_USART3CLKSOURCE_SYSCLK: \ 00405 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 00406 break; \ 00407 case RCC_USART3CLKSOURCE_LSE: \ 00408 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 00409 break; \ 00410 default: \ 00411 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 00412 break; \ 00413 } \ 00414 } \ 00415 else if((__HANDLE__)->Instance == LPUART1) \ 00416 { \ 00417 switch(__HAL_RCC_GET_LPUART1_SOURCE()) \ 00418 { \ 00419 case RCC_LPUART1CLKSOURCE_PCLK1: \ 00420 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 00421 break; \ 00422 case RCC_LPUART1CLKSOURCE_HSI: \ 00423 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 00424 break; \ 00425 case RCC_LPUART1CLKSOURCE_SYSCLK: \ 00426 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 00427 break; \ 00428 case RCC_LPUART1CLKSOURCE_LSE: \ 00429 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 00430 break; \ 00431 default: \ 00432 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 00433 break; \ 00434 } \ 00435 } \ 00436 else \ 00437 { \ 00438 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 00439 } \ 00440 } while(0U) 00441 #elif defined (STM32L432xx) || defined (STM32L442xx) 00442 #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ 00443 do { \ 00444 if((__HANDLE__)->Instance == USART1) \ 00445 { \ 00446 switch(__HAL_RCC_GET_USART1_SOURCE()) \ 00447 { \ 00448 case RCC_USART1CLKSOURCE_PCLK2: \ 00449 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \ 00450 break; \ 00451 case RCC_USART1CLKSOURCE_HSI: \ 00452 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 00453 break; \ 00454 case RCC_USART1CLKSOURCE_SYSCLK: \ 00455 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 00456 break; \ 00457 case RCC_USART1CLKSOURCE_LSE: \ 00458 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 00459 break; \ 00460 default: \ 00461 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 00462 break; \ 00463 } \ 00464 } \ 00465 else if((__HANDLE__)->Instance == USART2) \ 00466 { \ 00467 switch(__HAL_RCC_GET_USART2_SOURCE()) \ 00468 { \ 00469 case RCC_USART2CLKSOURCE_PCLK1: \ 00470 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 00471 break; \ 00472 case RCC_USART2CLKSOURCE_HSI: \ 00473 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 00474 break; \ 00475 case RCC_USART2CLKSOURCE_SYSCLK: \ 00476 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 00477 break; \ 00478 case RCC_USART2CLKSOURCE_LSE: \ 00479 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 00480 break; \ 00481 default: \ 00482 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 00483 break; \ 00484 } \ 00485 } \ 00486 else if((__HANDLE__)->Instance == LPUART1) \ 00487 { \ 00488 switch(__HAL_RCC_GET_LPUART1_SOURCE()) \ 00489 { \ 00490 case RCC_LPUART1CLKSOURCE_PCLK1: \ 00491 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 00492 break; \ 00493 case RCC_LPUART1CLKSOURCE_HSI: \ 00494 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 00495 break; \ 00496 case RCC_LPUART1CLKSOURCE_SYSCLK: \ 00497 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 00498 break; \ 00499 case RCC_LPUART1CLKSOURCE_LSE: \ 00500 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 00501 break; \ 00502 default: \ 00503 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 00504 break; \ 00505 } \ 00506 } \ 00507 else \ 00508 { \ 00509 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 00510 } \ 00511 } while(0U) 00512 #elif defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) 00513 #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ 00514 do { \ 00515 if((__HANDLE__)->Instance == USART1) \ 00516 { \ 00517 switch(__HAL_RCC_GET_USART1_SOURCE()) \ 00518 { \ 00519 case RCC_USART1CLKSOURCE_PCLK2: \ 00520 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \ 00521 break; \ 00522 case RCC_USART1CLKSOURCE_HSI: \ 00523 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 00524 break; \ 00525 case RCC_USART1CLKSOURCE_SYSCLK: \ 00526 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 00527 break; \ 00528 case RCC_USART1CLKSOURCE_LSE: \ 00529 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 00530 break; \ 00531 default: \ 00532 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 00533 break; \ 00534 } \ 00535 } \ 00536 else if((__HANDLE__)->Instance == USART2) \ 00537 { \ 00538 switch(__HAL_RCC_GET_USART2_SOURCE()) \ 00539 { \ 00540 case RCC_USART2CLKSOURCE_PCLK1: \ 00541 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 00542 break; \ 00543 case RCC_USART2CLKSOURCE_HSI: \ 00544 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 00545 break; \ 00546 case RCC_USART2CLKSOURCE_SYSCLK: \ 00547 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 00548 break; \ 00549 case RCC_USART2CLKSOURCE_LSE: \ 00550 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 00551 break; \ 00552 default: \ 00553 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 00554 break; \ 00555 } \ 00556 } \ 00557 else if((__HANDLE__)->Instance == USART3) \ 00558 { \ 00559 switch(__HAL_RCC_GET_USART3_SOURCE()) \ 00560 { \ 00561 case RCC_USART3CLKSOURCE_PCLK1: \ 00562 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 00563 break; \ 00564 case RCC_USART3CLKSOURCE_HSI: \ 00565 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 00566 break; \ 00567 case RCC_USART3CLKSOURCE_SYSCLK: \ 00568 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 00569 break; \ 00570 case RCC_USART3CLKSOURCE_LSE: \ 00571 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 00572 break; \ 00573 default: \ 00574 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 00575 break; \ 00576 } \ 00577 } \ 00578 else if((__HANDLE__)->Instance == UART4) \ 00579 { \ 00580 switch(__HAL_RCC_GET_UART4_SOURCE()) \ 00581 { \ 00582 case RCC_UART4CLKSOURCE_PCLK1: \ 00583 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 00584 break; \ 00585 case RCC_UART4CLKSOURCE_HSI: \ 00586 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 00587 break; \ 00588 case RCC_UART4CLKSOURCE_SYSCLK: \ 00589 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 00590 break; \ 00591 case RCC_UART4CLKSOURCE_LSE: \ 00592 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 00593 break; \ 00594 default: \ 00595 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 00596 break; \ 00597 } \ 00598 } \ 00599 else if((__HANDLE__)->Instance == LPUART1) \ 00600 { \ 00601 switch(__HAL_RCC_GET_LPUART1_SOURCE()) \ 00602 { \ 00603 case RCC_LPUART1CLKSOURCE_PCLK1: \ 00604 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 00605 break; \ 00606 case RCC_LPUART1CLKSOURCE_HSI: \ 00607 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 00608 break; \ 00609 case RCC_LPUART1CLKSOURCE_SYSCLK: \ 00610 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 00611 break; \ 00612 case RCC_LPUART1CLKSOURCE_LSE: \ 00613 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 00614 break; \ 00615 default: \ 00616 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 00617 break; \ 00618 } \ 00619 } \ 00620 else \ 00621 { \ 00622 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 00623 } \ 00624 } while(0U) 00625 #endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || 00626 * STM32L496xx || STM32L4A6xx || 00627 * STM32L4P5xx || STM32L4Q5xx || 00628 * STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx 00629 */ 00630 00631 /** @brief Report the UART mask to apply to retrieve the received data 00632 * according to the word length and to the parity bits activation. 00633 * @note If PCE = 1, the parity bit is not included in the data extracted 00634 * by the reception API(). 00635 * This masking operation is not carried out in the case of 00636 * DMA transfers. 00637 * @param __HANDLE__ specifies the UART Handle. 00638 * @retval None, the mask to apply to UART RDR register is stored in (__HANDLE__)->Mask field. 00639 */ 00640 #define UART_MASK_COMPUTATION(__HANDLE__) \ 00641 do { \ 00642 if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_9B) \ 00643 { \ 00644 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ 00645 { \ 00646 (__HANDLE__)->Mask = 0x01FFU ; \ 00647 } \ 00648 else \ 00649 { \ 00650 (__HANDLE__)->Mask = 0x00FFU ; \ 00651 } \ 00652 } \ 00653 else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_8B) \ 00654 { \ 00655 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ 00656 { \ 00657 (__HANDLE__)->Mask = 0x00FFU ; \ 00658 } \ 00659 else \ 00660 { \ 00661 (__HANDLE__)->Mask = 0x007FU ; \ 00662 } \ 00663 } \ 00664 else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_7B) \ 00665 { \ 00666 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ 00667 { \ 00668 (__HANDLE__)->Mask = 0x007FU ; \ 00669 } \ 00670 else \ 00671 { \ 00672 (__HANDLE__)->Mask = 0x003FU ; \ 00673 } \ 00674 } \ 00675 else \ 00676 { \ 00677 (__HANDLE__)->Mask = 0x0000U; \ 00678 } \ 00679 } while(0U) 00680 00681 /** 00682 * @brief Ensure that UART frame length is valid. 00683 * @param __LENGTH__ UART frame length. 00684 * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) 00685 */ 00686 #define IS_UART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == UART_WORDLENGTH_7B) || \ 00687 ((__LENGTH__) == UART_WORDLENGTH_8B) || \ 00688 ((__LENGTH__) == UART_WORDLENGTH_9B)) 00689 00690 /** 00691 * @brief Ensure that UART wake-up address length is valid. 00692 * @param __ADDRESS__ UART wake-up address length. 00693 * @retval SET (__ADDRESS__ is valid) or RESET (__ADDRESS__ is invalid) 00694 */ 00695 #define IS_UART_ADDRESSLENGTH_DETECT(__ADDRESS__) (((__ADDRESS__) == UART_ADDRESS_DETECT_4B) || \ 00696 ((__ADDRESS__) == UART_ADDRESS_DETECT_7B)) 00697 00698 #if defined(USART_CR1_FIFOEN) 00699 /** 00700 * @brief Ensure that UART TXFIFO threshold level is valid. 00701 * @param __THRESHOLD__ UART TXFIFO threshold level. 00702 * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid) 00703 */ 00704 #define IS_UART_TXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_8) || \ 00705 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_4) || \ 00706 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_2) || \ 00707 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_3_4) || \ 00708 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_7_8) || \ 00709 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_8_8)) 00710 00711 /** 00712 * @brief Ensure that UART RXFIFO threshold level is valid. 00713 * @param __THRESHOLD__ UART RXFIFO threshold level. 00714 * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid) 00715 */ 00716 #define IS_UART_RXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_8) || \ 00717 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_4) || \ 00718 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_2) || \ 00719 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_3_4) || \ 00720 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_7_8) || \ 00721 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_8_8)) 00722 00723 #endif /* USART_CR1_FIFOEN */ 00724 /** 00725 * @} 00726 */ 00727 00728 /* Private functions ---------------------------------------------------------*/ 00729 00730 /** 00731 * @} 00732 */ 00733 00734 /** 00735 * @} 00736 */ 00737 00738 #ifdef __cplusplus 00739 } 00740 #endif 00741 00742 #endif /* STM32L4xx_HAL_UART_EX_H */ 00743
1.7.6.1