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STM32L443xx HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32l4xx_hal_usart_ex.h 00004 * @author MCD Application Team 00005 * @brief Header file of USART HAL Extended module. 00006 ****************************************************************************** 00007 * @attention 00008 * 00009 * Copyright (c) 2017 STMicroelectronics. 00010 * All rights reserved. 00011 * 00012 * This software is licensed under terms that can be found in the LICENSE file 00013 * in the root directory of this software component. 00014 * If no LICENSE file comes with this software, it is provided AS-IS. 00015 * 00016 ****************************************************************************** 00017 */ 00018 00019 /* Define to prevent recursive inclusion -------------------------------------*/ 00020 #ifndef STM32L4xx_HAL_USART_EX_H 00021 #define STM32L4xx_HAL_USART_EX_H 00022 00023 #ifdef __cplusplus 00024 extern "C" { 00025 #endif 00026 00027 /* Includes ------------------------------------------------------------------*/ 00028 #include "stm32l4xx_hal_def.h" 00029 00030 /** @addtogroup STM32L4xx_HAL_Driver 00031 * @{ 00032 */ 00033 00034 /** @addtogroup USARTEx 00035 * @{ 00036 */ 00037 00038 /* Exported types ------------------------------------------------------------*/ 00039 /* Exported constants --------------------------------------------------------*/ 00040 /** @defgroup USARTEx_Exported_Constants USARTEx Exported Constants 00041 * @{ 00042 */ 00043 00044 /** @defgroup USARTEx_Word_Length USARTEx Word Length 00045 * @{ 00046 */ 00047 #define USART_WORDLENGTH_7B (USART_CR1_M1) /*!< 7-bit long USART frame */ 00048 #define USART_WORDLENGTH_8B (0x00000000U) /*!< 8-bit long USART frame */ 00049 #define USART_WORDLENGTH_9B (USART_CR1_M0) /*!< 9-bit long USART frame */ 00050 /** 00051 * @} 00052 */ 00053 00054 #if defined(USART_CR2_SLVEN) 00055 /** @defgroup USARTEx_Slave_Select_management USARTEx Slave Select Management 00056 * @{ 00057 */ 00058 #define USART_NSS_HARD 0x00000000U /*!< SPI slave selection depends on NSS input pin */ 00059 #define USART_NSS_SOFT USART_CR2_DIS_NSS /*!< SPI slave is always selected and NSS input pin is ignored */ 00060 /** 00061 * @} 00062 */ 00063 00064 00065 /** @defgroup USARTEx_Slave_Mode USARTEx Synchronous Slave mode enable 00066 * @brief USART SLAVE mode 00067 * @{ 00068 */ 00069 #define USART_SLAVEMODE_DISABLE 0x00000000U /*!< USART SPI Slave Mode Enable */ 00070 #define USART_SLAVEMODE_ENABLE USART_CR2_SLVEN /*!< USART SPI Slave Mode Disable */ 00071 /** 00072 * @} 00073 */ 00074 #endif /* USART_CR2_SLVEN */ 00075 00076 #if defined(USART_CR1_FIFOEN) 00077 /** @defgroup USARTEx_FIFO_mode USARTEx FIFO mode 00078 * @brief USART FIFO mode 00079 * @{ 00080 */ 00081 #define USART_FIFOMODE_DISABLE 0x00000000U /*!< FIFO mode disable */ 00082 #define USART_FIFOMODE_ENABLE USART_CR1_FIFOEN /*!< FIFO mode enable */ 00083 /** 00084 * @} 00085 */ 00086 00087 /** @defgroup USARTEx_TXFIFO_threshold_level USARTEx TXFIFO threshold level 00088 * @brief USART TXFIFO level 00089 * @{ 00090 */ 00091 #define USART_TXFIFO_THRESHOLD_1_8 0x00000000U /*!< TXFIFO reaches 1/8 of its depth */ 00092 #define USART_TXFIFO_THRESHOLD_1_4 USART_CR3_TXFTCFG_0 /*!< TXFIFO reaches 1/4 of its depth */ 00093 #define USART_TXFIFO_THRESHOLD_1_2 USART_CR3_TXFTCFG_1 /*!< TXFIFO reaches 1/2 of its depth */ 00094 #define USART_TXFIFO_THRESHOLD_3_4 (USART_CR3_TXFTCFG_0|USART_CR3_TXFTCFG_1) /*!< TXFIFO reaches 3/4 of its depth */ 00095 #define USART_TXFIFO_THRESHOLD_7_8 USART_CR3_TXFTCFG_2 /*!< TXFIFO reaches 7/8 of its depth */ 00096 #define USART_TXFIFO_THRESHOLD_8_8 (USART_CR3_TXFTCFG_2|USART_CR3_TXFTCFG_0) /*!< TXFIFO becomes empty */ 00097 /** 00098 * @} 00099 */ 00100 00101 /** @defgroup USARTEx_RXFIFO_threshold_level USARTEx RXFIFO threshold level 00102 * @brief USART RXFIFO level 00103 * @{ 00104 */ 00105 #define USART_RXFIFO_THRESHOLD_1_8 0x00000000U /*!< RXFIFO FIFO reaches 1/8 of its depth */ 00106 #define USART_RXFIFO_THRESHOLD_1_4 USART_CR3_RXFTCFG_0 /*!< RXFIFO FIFO reaches 1/4 of its depth */ 00107 #define USART_RXFIFO_THRESHOLD_1_2 USART_CR3_RXFTCFG_1 /*!< RXFIFO FIFO reaches 1/2 of its depth */ 00108 #define USART_RXFIFO_THRESHOLD_3_4 (USART_CR3_RXFTCFG_0|USART_CR3_RXFTCFG_1) /*!< RXFIFO FIFO reaches 3/4 of its depth */ 00109 #define USART_RXFIFO_THRESHOLD_7_8 USART_CR3_RXFTCFG_2 /*!< RXFIFO FIFO reaches 7/8 of its depth */ 00110 #define USART_RXFIFO_THRESHOLD_8_8 (USART_CR3_RXFTCFG_2|USART_CR3_RXFTCFG_0) /*!< RXFIFO FIFO becomes full */ 00111 /** 00112 * @} 00113 */ 00114 00115 #endif /* USART_CR1_FIFOEN */ 00116 /** 00117 * @} 00118 */ 00119 00120 /* Private macros ------------------------------------------------------------*/ 00121 /** @defgroup USARTEx_Private_Macros USARTEx Private Macros 00122 * @{ 00123 */ 00124 00125 /** @brief Report the USART clock source. 00126 * @param __HANDLE__ specifies the USART Handle. 00127 * @param __CLOCKSOURCE__ output variable. 00128 * @retval the USART clocking source, written in __CLOCKSOURCE__. 00129 */ 00130 #if defined (STM32L432xx) || defined (STM32L442xx) 00131 #define USART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ 00132 do { \ 00133 if((__HANDLE__)->Instance == USART1) \ 00134 { \ 00135 switch(__HAL_RCC_GET_USART1_SOURCE()) \ 00136 { \ 00137 case RCC_USART1CLKSOURCE_PCLK2: \ 00138 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK2; \ 00139 break; \ 00140 case RCC_USART1CLKSOURCE_HSI: \ 00141 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ 00142 break; \ 00143 case RCC_USART1CLKSOURCE_SYSCLK: \ 00144 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \ 00145 break; \ 00146 case RCC_USART1CLKSOURCE_LSE: \ 00147 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ 00148 break; \ 00149 default: \ 00150 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ 00151 break; \ 00152 } \ 00153 } \ 00154 else if((__HANDLE__)->Instance == USART2) \ 00155 { \ 00156 switch(__HAL_RCC_GET_USART2_SOURCE()) \ 00157 { \ 00158 case RCC_USART2CLKSOURCE_PCLK1: \ 00159 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \ 00160 break; \ 00161 case RCC_USART2CLKSOURCE_HSI: \ 00162 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ 00163 break; \ 00164 case RCC_USART2CLKSOURCE_SYSCLK: \ 00165 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \ 00166 break; \ 00167 case RCC_USART2CLKSOURCE_LSE: \ 00168 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ 00169 break; \ 00170 default: \ 00171 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ 00172 break; \ 00173 } \ 00174 } \ 00175 else \ 00176 { \ 00177 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ 00178 } \ 00179 } while(0) 00180 #else 00181 #define USART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ 00182 do { \ 00183 if((__HANDLE__)->Instance == USART1) \ 00184 { \ 00185 switch(__HAL_RCC_GET_USART1_SOURCE()) \ 00186 { \ 00187 case RCC_USART1CLKSOURCE_PCLK2: \ 00188 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK2; \ 00189 break; \ 00190 case RCC_USART1CLKSOURCE_HSI: \ 00191 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ 00192 break; \ 00193 case RCC_USART1CLKSOURCE_SYSCLK: \ 00194 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \ 00195 break; \ 00196 case RCC_USART1CLKSOURCE_LSE: \ 00197 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ 00198 break; \ 00199 default: \ 00200 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ 00201 break; \ 00202 } \ 00203 } \ 00204 else if((__HANDLE__)->Instance == USART2) \ 00205 { \ 00206 switch(__HAL_RCC_GET_USART2_SOURCE()) \ 00207 { \ 00208 case RCC_USART2CLKSOURCE_PCLK1: \ 00209 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \ 00210 break; \ 00211 case RCC_USART2CLKSOURCE_HSI: \ 00212 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ 00213 break; \ 00214 case RCC_USART2CLKSOURCE_SYSCLK: \ 00215 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \ 00216 break; \ 00217 case RCC_USART2CLKSOURCE_LSE: \ 00218 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ 00219 break; \ 00220 default: \ 00221 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ 00222 break; \ 00223 } \ 00224 } \ 00225 else if((__HANDLE__)->Instance == USART3) \ 00226 { \ 00227 switch(__HAL_RCC_GET_USART3_SOURCE()) \ 00228 { \ 00229 case RCC_USART3CLKSOURCE_PCLK1: \ 00230 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \ 00231 break; \ 00232 case RCC_USART3CLKSOURCE_HSI: \ 00233 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ 00234 break; \ 00235 case RCC_USART3CLKSOURCE_SYSCLK: \ 00236 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \ 00237 break; \ 00238 case RCC_USART3CLKSOURCE_LSE: \ 00239 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ 00240 break; \ 00241 default: \ 00242 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ 00243 break; \ 00244 } \ 00245 } \ 00246 else \ 00247 { \ 00248 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ 00249 } \ 00250 } while(0) 00251 #endif /* STM32L432xx || STM32L442xx */ 00252 00253 /** @brief Compute the USART mask to apply to retrieve the received data 00254 * according to the word length and to the parity bits activation. 00255 * @note If PCE = 1, the parity bit is not included in the data extracted 00256 * by the reception API(). 00257 * This masking operation is not carried out in the case of 00258 * DMA transfers. 00259 * @param __HANDLE__ specifies the USART Handle. 00260 * @retval None, the mask to apply to USART RDR register is stored in (__HANDLE__)->Mask field. 00261 */ 00262 #define USART_MASK_COMPUTATION(__HANDLE__) \ 00263 do { \ 00264 if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_9B) \ 00265 { \ 00266 if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE) \ 00267 { \ 00268 (__HANDLE__)->Mask = 0x01FFU; \ 00269 } \ 00270 else \ 00271 { \ 00272 (__HANDLE__)->Mask = 0x00FFU; \ 00273 } \ 00274 } \ 00275 else if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_8B) \ 00276 { \ 00277 if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE) \ 00278 { \ 00279 (__HANDLE__)->Mask = 0x00FFU; \ 00280 } \ 00281 else \ 00282 { \ 00283 (__HANDLE__)->Mask = 0x007FU; \ 00284 } \ 00285 } \ 00286 else if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_7B) \ 00287 { \ 00288 if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE) \ 00289 { \ 00290 (__HANDLE__)->Mask = 0x007FU; \ 00291 } \ 00292 else \ 00293 { \ 00294 (__HANDLE__)->Mask = 0x003FU; \ 00295 } \ 00296 } \ 00297 else \ 00298 { \ 00299 (__HANDLE__)->Mask = 0x0000U; \ 00300 } \ 00301 } while(0U) 00302 00303 /** 00304 * @brief Ensure that USART frame length is valid. 00305 * @param __LENGTH__ USART frame length. 00306 * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) 00307 */ 00308 #define IS_USART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == USART_WORDLENGTH_7B) || \ 00309 ((__LENGTH__) == USART_WORDLENGTH_8B) || \ 00310 ((__LENGTH__) == USART_WORDLENGTH_9B)) 00311 00312 #if defined(USART_CR2_SLVEN) 00313 /** 00314 * @brief Ensure that USART Negative Slave Select (NSS) pin management is valid. 00315 * @param __NSS__ USART Negative Slave Select pin management. 00316 * @retval SET (__NSS__ is valid) or RESET (__NSS__ is invalid) 00317 */ 00318 #define IS_USART_NSS(__NSS__) (((__NSS__) == USART_NSS_HARD) || \ 00319 ((__NSS__) == USART_NSS_SOFT)) 00320 00321 /** 00322 * @brief Ensure that USART Slave Mode is valid. 00323 * @param __STATE__ USART Slave Mode. 00324 * @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid) 00325 */ 00326 #define IS_USART_SLAVEMODE(__STATE__) (((__STATE__) == USART_SLAVEMODE_DISABLE ) || \ 00327 ((__STATE__) == USART_SLAVEMODE_ENABLE)) 00328 #endif /* USART_CR2_SLVEN */ 00329 00330 #if defined(USART_CR1_FIFOEN) 00331 /** 00332 * @brief Ensure that USART FIFO mode is valid. 00333 * @param __STATE__ USART FIFO mode. 00334 * @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid) 00335 */ 00336 #define IS_USART_FIFO_MODE_STATE(__STATE__) (((__STATE__) == USART_FIFOMODE_DISABLE ) || \ 00337 ((__STATE__) == USART_FIFOMODE_ENABLE)) 00338 00339 /** 00340 * @brief Ensure that USART TXFIFO threshold level is valid. 00341 * @param __THRESHOLD__ USART TXFIFO threshold level. 00342 * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid) 00343 */ 00344 #define IS_USART_TXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == USART_TXFIFO_THRESHOLD_1_8) || \ 00345 ((__THRESHOLD__) == USART_TXFIFO_THRESHOLD_1_4) || \ 00346 ((__THRESHOLD__) == USART_TXFIFO_THRESHOLD_1_2) || \ 00347 ((__THRESHOLD__) == USART_TXFIFO_THRESHOLD_3_4) || \ 00348 ((__THRESHOLD__) == USART_TXFIFO_THRESHOLD_7_8) || \ 00349 ((__THRESHOLD__) == USART_TXFIFO_THRESHOLD_8_8)) 00350 00351 /** 00352 * @brief Ensure that USART RXFIFO threshold level is valid. 00353 * @param __THRESHOLD__ USART RXFIFO threshold level. 00354 * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid) 00355 */ 00356 #define IS_USART_RXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == USART_RXFIFO_THRESHOLD_1_8) || \ 00357 ((__THRESHOLD__) == USART_RXFIFO_THRESHOLD_1_4) || \ 00358 ((__THRESHOLD__) == USART_RXFIFO_THRESHOLD_1_2) || \ 00359 ((__THRESHOLD__) == USART_RXFIFO_THRESHOLD_3_4) || \ 00360 ((__THRESHOLD__) == USART_RXFIFO_THRESHOLD_7_8) || \ 00361 ((__THRESHOLD__) == USART_RXFIFO_THRESHOLD_8_8)) 00362 #endif /* USART_CR1_FIFOEN */ 00363 /** 00364 * @} 00365 */ 00366 00367 /* Exported functions --------------------------------------------------------*/ 00368 /** @addtogroup USARTEx_Exported_Functions 00369 * @{ 00370 */ 00371 00372 /** @addtogroup USARTEx_Exported_Functions_Group1 00373 * @{ 00374 */ 00375 00376 /* IO operation functions *****************************************************/ 00377 #if defined(USART_CR1_FIFOEN) 00378 void HAL_USARTEx_RxFifoFullCallback(USART_HandleTypeDef *husart); 00379 void HAL_USARTEx_TxFifoEmptyCallback(USART_HandleTypeDef *husart); 00380 #endif /* USART_CR1_FIFOEN */ 00381 00382 /** 00383 * @} 00384 */ 00385 00386 /** @addtogroup USARTEx_Exported_Functions_Group2 00387 * @{ 00388 */ 00389 00390 /* Peripheral Control functions ***********************************************/ 00391 #if defined(USART_CR2_SLVEN) 00392 HAL_StatusTypeDef HAL_USARTEx_EnableSlaveMode(USART_HandleTypeDef *husart); 00393 HAL_StatusTypeDef HAL_USARTEx_DisableSlaveMode(USART_HandleTypeDef *husart); 00394 HAL_StatusTypeDef HAL_USARTEx_ConfigNSS(USART_HandleTypeDef *husart, uint32_t NSSConfig); 00395 #endif /* USART_CR2_SLVEN */ 00396 #if defined(USART_CR1_FIFOEN) 00397 HAL_StatusTypeDef HAL_USARTEx_EnableFifoMode(USART_HandleTypeDef *husart); 00398 HAL_StatusTypeDef HAL_USARTEx_DisableFifoMode(USART_HandleTypeDef *husart); 00399 HAL_StatusTypeDef HAL_USARTEx_SetTxFifoThreshold(USART_HandleTypeDef *husart, uint32_t Threshold); 00400 HAL_StatusTypeDef HAL_USARTEx_SetRxFifoThreshold(USART_HandleTypeDef *husart, uint32_t Threshold); 00401 #endif /* USART_CR1_FIFOEN */ 00402 00403 /** 00404 * @} 00405 */ 00406 00407 /** 00408 * @} 00409 */ 00410 00411 /** 00412 * @} 00413 */ 00414 00415 /** 00416 * @} 00417 */ 00418 00419 #ifdef __cplusplus 00420 } 00421 #endif 00422 00423 #endif /* STM32L4xx_HAL_USART_EX_H */ 00424
1.7.6.1