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STM32L443xx HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32l4xx_ll_dma2d.h 00004 * @author MCD Application Team 00005 * @brief Header file of DMA2D LL module. 00006 ****************************************************************************** 00007 * @attention 00008 * 00009 * Copyright (c) 2017 STMicroelectronics. 00010 * All rights reserved. 00011 * 00012 * This software is licensed under terms that can be found in the LICENSE file 00013 * in the root directory of this software component. 00014 * If no LICENSE file comes with this software, it is provided AS-IS. 00015 * 00016 ****************************************************************************** 00017 */ 00018 00019 /* Define to prevent recursive inclusion -------------------------------------*/ 00020 #ifndef STM32L4xx_LL_DMA2D_H 00021 #define STM32L4xx_LL_DMA2D_H 00022 00023 #ifdef __cplusplus 00024 extern "C" { 00025 #endif 00026 00027 /* Includes ------------------------------------------------------------------*/ 00028 #include "stm32l4xx.h" 00029 00030 /** @addtogroup STM32L4xx_LL_Driver 00031 * @{ 00032 */ 00033 00034 #if defined (DMA2D) 00035 00036 /** @defgroup DMA2D_LL DMA2D 00037 * @{ 00038 */ 00039 00040 /* Private types -------------------------------------------------------------*/ 00041 /* Private variables ---------------------------------------------------------*/ 00042 /* Private constants ---------------------------------------------------------*/ 00043 /* Private macros ------------------------------------------------------------*/ 00044 #if defined(USE_FULL_LL_DRIVER) 00045 /** @defgroup DMA2D_LL_Private_Macros DMA2D Private Macros 00046 * @{ 00047 */ 00048 00049 /** 00050 * @} 00051 */ 00052 #endif /*USE_FULL_LL_DRIVER*/ 00053 00054 /* Exported types ------------------------------------------------------------*/ 00055 #if defined(USE_FULL_LL_DRIVER) 00056 /** @defgroup DMA2D_LL_ES_Init_Struct DMA2D Exported Init structures 00057 * @{ 00058 */ 00059 00060 /** 00061 * @brief LL DMA2D Init Structure Definition 00062 */ 00063 typedef struct 00064 { 00065 uint32_t Mode; /*!< Specifies the DMA2D transfer mode. 00066 - This parameter can be one value of @ref DMA2D_LL_EC_MODE. 00067 00068 This parameter can be modified afterwards, 00069 using unitary function @ref LL_DMA2D_SetMode(). */ 00070 00071 uint32_t ColorMode; /*!< Specifies the color format of the output image. 00072 - This parameter can be one value of @ref DMA2D_LL_EC_OUTPUT_COLOR_MODE. 00073 00074 This parameter can be modified afterwards using, 00075 unitary function @ref LL_DMA2D_SetOutputColorMode(). */ 00076 00077 uint32_t OutputBlue; /*!< Specifies the Blue value of the output image. 00078 - This parameter must be a number between: 00079 Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected. 00080 - This parameter must be a number between: 00081 Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected. 00082 - This parameter must be a number between: 00083 Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected. 00084 - This parameter must be a number between: 00085 Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected. 00086 - This parameter must be a number between: 00087 Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected. 00088 00089 This parameter can be modified afterwards, 00090 using unitary function @ref LL_DMA2D_SetOutputColor() or configuration 00091 function @ref LL_DMA2D_ConfigOutputColor(). */ 00092 00093 uint32_t OutputGreen; /*!< Specifies the Green value of the output image. 00094 - This parameter must be a number between: 00095 Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected. 00096 - This parameter must be a number between: 00097 Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected. 00098 - This parameter must be a number between: 00099 Min_Data = 0x00 and Max_Data = 0x3F if RGB565 color mode is selected. 00100 - This parameter must be a number between: 00101 Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected. 00102 - This parameter must be a number between: 00103 Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected. 00104 00105 This parameter can be modified afterwards 00106 using unitary function @ref LL_DMA2D_SetOutputColor() or configuration 00107 function @ref LL_DMA2D_ConfigOutputColor(). */ 00108 00109 uint32_t OutputRed; /*!< Specifies the Red value of the output image. 00110 - This parameter must be a number between: 00111 Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected. 00112 - This parameter must be a number between: 00113 Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected. 00114 - This parameter must be a number between: 00115 Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected. 00116 - This parameter must be a number between: 00117 Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected. 00118 - This parameter must be a number between: 00119 Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected. 00120 00121 This parameter can be modified afterwards 00122 using unitary function @ref LL_DMA2D_SetOutputColor() or configuration 00123 function @ref LL_DMA2D_ConfigOutputColor(). */ 00124 00125 uint32_t OutputAlpha; /*!< Specifies the Alpha channel of the output image. 00126 - This parameter must be a number between: 00127 Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected. 00128 - This parameter must be a number between: 00129 Min_Data = 0x00 and Max_Data = 0x01 if ARGB1555 color mode is selected. 00130 - This parameter must be a number between: 00131 Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected. 00132 - This parameter is not considered if RGB888 or RGB565 color mode is selected. 00133 00134 This parameter can be modified afterwards using, 00135 unitary function @ref LL_DMA2D_SetOutputColor() or configuration 00136 function @ref LL_DMA2D_ConfigOutputColor(). */ 00137 00138 uint32_t OutputMemoryAddress; /*!< Specifies the memory address. 00139 - This parameter must be a number between: 00140 Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF. 00141 00142 This parameter can be modified afterwards, 00143 using unitary function @ref LL_DMA2D_SetOutputMemAddr(). */ 00144 00145 #if defined(DMA2D_OUTPUT_TWO_BY_TWO_SWAP_SUPPORT) 00146 uint32_t OutputSwapMode; /*!< Specifies the output swap mode color format of the output image. 00147 - This parameter can be one value of @ref DMA2D_LL_EC_OUTPUT_SWAP_MODE. 00148 00149 This parameter can be modified afterwards, 00150 using unitary function @ref LL_DMA2D_SetOutputSwapMode(). */ 00151 #endif /* DMA2D_OUTPUT_TWO_BY_TWO_SWAP_SUPPORT */ 00152 00153 #if defined(DMA2D_LINE_OFFSET_MODE_SUPPORT) 00154 uint32_t LineOffsetMode; /*!< Specifies the output line offset mode. 00155 - This parameter can be one value of @ref DMA2D_LL_EC_LINE_OFFSET_MODE. 00156 00157 This parameter can be modified afterwards, 00158 using unitary function @ref LL_DMA2D_SetLineOffsetMode(). */ 00159 #endif /* DMA2D_LINE_OFFSET_MODE_SUPPORT */ 00160 00161 uint32_t LineOffset; /*!< Specifies the output line offset value. 00162 - This parameter must be a number between: 00163 Min_Data = 0x0000 and Max_Data = 0x3FFF on devices 00164 where the Line Offset Mode feature is available. 00165 else between Min_Data = 0x0000 and Max_Data = 0xFFFF on other devices. 00166 00167 This parameter can be modified afterwards, 00168 using unitary function @ref LL_DMA2D_SetLineOffset(). */ 00169 00170 uint32_t NbrOfLines; /*!< Specifies the number of lines of the area to be transferred. 00171 - This parameter must be a number between: 00172 Min_Data = 0x0000 and Max_Data = 0xFFFF. 00173 00174 This parameter can be modified afterwards, 00175 using unitary function @ref LL_DMA2D_SetNbrOfLines(). */ 00176 00177 uint32_t NbrOfPixelsPerLines; /*!< Specifies the number of pixels per lines of the area to be transferred. 00178 - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF. 00179 00180 This parameter can be modified afterwards using, 00181 unitary function @ref LL_DMA2D_SetNbrOfPixelsPerLines(). */ 00182 00183 uint32_t AlphaInversionMode; /*!< Specifies the output alpha inversion mode. 00184 - This parameter can be one value of @ref DMA2D_LL_EC_ALPHA_INVERSION. 00185 00186 This parameter can be modified afterwards, 00187 using unitary function @ref LL_DMA2D_SetOutputAlphaInvMode(). */ 00188 00189 uint32_t RBSwapMode; /*!< Specifies the output Red Blue swap mode. 00190 - This parameter can be one value of @ref DMA2D_LL_EC_RED_BLUE_SWAP. 00191 00192 This parameter can be modified afterwards, 00193 using unitary function @ref LL_DMA2D_SetOutputRBSwapMode(). */ 00194 00195 } LL_DMA2D_InitTypeDef; 00196 00197 /** 00198 * @brief LL DMA2D Layer Configuration Structure Definition 00199 */ 00200 typedef struct 00201 { 00202 uint32_t MemoryAddress; /*!< Specifies the foreground or background memory address. 00203 - This parameter must be a number between: 00204 Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF. 00205 00206 This parameter can be modified afterwards using unitary functions 00207 - @ref LL_DMA2D_FGND_SetMemAddr() for foreground layer, 00208 - @ref LL_DMA2D_BGND_SetMemAddr() for background layer. */ 00209 00210 uint32_t LineOffset; /*!< Specifies the foreground or background line offset value. 00211 - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF. 00212 00213 This parameter can be modified afterwards using unitary functions 00214 - @ref LL_DMA2D_FGND_SetLineOffset() for foreground layer, 00215 - @ref LL_DMA2D_BGND_SetLineOffset() for background layer. */ 00216 00217 uint32_t ColorMode; /*!< Specifies the foreground or background color mode. 00218 - This parameter can be one value of @ref DMA2D_LL_EC_INPUT_COLOR_MODE. 00219 00220 This parameter can be modified afterwards using unitary functions 00221 - @ref LL_DMA2D_FGND_SetColorMode() for foreground layer, 00222 - @ref LL_DMA2D_BGND_SetColorMode() for background layer. */ 00223 00224 uint32_t CLUTColorMode; /*!< Specifies the foreground or background CLUT color mode. 00225 - This parameter can be one value of @ref DMA2D_LL_EC_CLUT_COLOR_MODE. 00226 00227 This parameter can be modified afterwards using unitary functions 00228 - @ref LL_DMA2D_FGND_SetCLUTColorMode() for foreground layer, 00229 - @ref LL_DMA2D_BGND_SetCLUTColorMode() for background layer. */ 00230 00231 uint32_t CLUTSize; /*!< Specifies the foreground or background CLUT size. 00232 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. 00233 00234 This parameter can be modified afterwards using unitary functions 00235 - @ref LL_DMA2D_FGND_SetCLUTSize() for foreground layer, 00236 - @ref LL_DMA2D_BGND_SetCLUTSize() for background layer. */ 00237 00238 uint32_t AlphaMode; /*!< Specifies the foreground or background alpha mode. 00239 - This parameter can be one value of @ref DMA2D_LL_EC_ALPHA_MODE. 00240 00241 This parameter can be modified afterwards using unitary functions 00242 - @ref LL_DMA2D_FGND_SetAlphaMode() for foreground layer, 00243 - @ref LL_DMA2D_BGND_SetAlphaMode() for background layer. */ 00244 00245 uint32_t Alpha; /*!< Specifies the foreground or background Alpha value. 00246 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. 00247 00248 This parameter can be modified afterwards using unitary functions 00249 - @ref LL_DMA2D_FGND_SetAlpha() for foreground layer, 00250 - @ref LL_DMA2D_BGND_SetAlpha() for background layer. */ 00251 00252 uint32_t Blue; /*!< Specifies the foreground or background Blue color value. 00253 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. 00254 00255 This parameter can be modified afterwards using unitary functions 00256 - @ref LL_DMA2D_FGND_SetBlueColor() for foreground layer, 00257 - @ref LL_DMA2D_BGND_SetBlueColor() for background layer. */ 00258 00259 uint32_t Green; /*!< Specifies the foreground or background Green color value. 00260 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. 00261 00262 This parameter can be modified afterwards using unitary functions 00263 - @ref LL_DMA2D_FGND_SetGreenColor() for foreground layer, 00264 - @ref LL_DMA2D_BGND_SetGreenColor() for background layer. */ 00265 00266 uint32_t Red; /*!< Specifies the foreground or background Red color value. 00267 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. 00268 00269 This parameter can be modified afterwards using unitary functions 00270 - @ref LL_DMA2D_FGND_SetRedColor() for foreground layer, 00271 - @ref LL_DMA2D_BGND_SetRedColor() for background layer. */ 00272 00273 uint32_t CLUTMemoryAddress; /*!< Specifies the foreground or background CLUT memory address. 00274 - This parameter must be a number between: 00275 Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF. 00276 00277 This parameter can be modified afterwards using unitary functions 00278 - @ref LL_DMA2D_FGND_SetCLUTMemAddr() for foreground layer, 00279 - @ref LL_DMA2D_BGND_SetCLUTMemAddr() for background layer. */ 00280 00281 uint32_t AlphaInversionMode; /*!< Specifies the foreground or background alpha inversion mode. 00282 - This parameter can be one value of @ref DMA2D_LL_EC_ALPHA_INVERSION. 00283 00284 This parameter can be modified afterwards using unitary functions 00285 - @ref LL_DMA2D_FGND_SetAlphaInvMode() for foreground layer, 00286 - @ref LL_DMA2D_BGND_SetAlphaInvMode() for background layer. */ 00287 00288 uint32_t RBSwapMode; /*!< Specifies the foreground or background Red Blue swap mode. 00289 This parameter can be one value of @ref DMA2D_LL_EC_RED_BLUE_SWAP . 00290 00291 This parameter can be modified afterwards using unitary functions 00292 - @ref LL_DMA2D_FGND_SetRBSwapMode() for foreground layer, 00293 - @ref LL_DMA2D_BGND_SetRBSwapMode() for background layer. */ 00294 00295 00296 } LL_DMA2D_LayerCfgTypeDef; 00297 00298 /** 00299 * @brief LL DMA2D Output Color Structure Definition 00300 */ 00301 typedef struct 00302 { 00303 uint32_t ColorMode; /*!< Specifies the color format of the output image. 00304 - This parameter can be one value of @ref DMA2D_LL_EC_OUTPUT_COLOR_MODE. 00305 00306 This parameter can be modified afterwards using 00307 unitary function @ref LL_DMA2D_SetOutputColorMode(). */ 00308 00309 uint32_t OutputBlue; /*!< Specifies the Blue value of the output image. 00310 - This parameter must be a number between: 00311 Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected. 00312 - This parameter must be a number between: 00313 Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected. 00314 - This parameter must be a number between: 00315 Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected. 00316 - This parameter must be a number between: 00317 Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected. 00318 - This parameter must be a number between: 00319 Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected. 00320 00321 This parameter can be modified afterwards using, 00322 unitary function @ref LL_DMA2D_SetOutputColor() or configuration 00323 function @ref LL_DMA2D_ConfigOutputColor(). */ 00324 00325 uint32_t OutputGreen; /*!< Specifies the Green value of the output image. 00326 - This parameter must be a number between: 00327 Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected. 00328 - This parameter must be a number between 00329 Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected. 00330 - This parameter must be a number between: 00331 Min_Data = 0x00 and Max_Data = 0x3F if RGB565 color mode is selected. 00332 - This parameter must be a number between: 00333 Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected. 00334 - This parameter must be a number between: 00335 Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected. 00336 00337 This parameter can be modified afterwards, 00338 using unitary function @ref LL_DMA2D_SetOutputColor() or configuration 00339 function @ref LL_DMA2D_ConfigOutputColor(). */ 00340 00341 uint32_t OutputRed; /*!< Specifies the Red value of the output image. 00342 - This parameter must be a number between: 00343 Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected. 00344 - This parameter must be a number between: 00345 Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected. 00346 - This parameter must be a number between: 00347 Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected. 00348 - This parameter must be a number between: 00349 Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected. 00350 - This parameter must be a number between: 00351 Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected. 00352 00353 This parameter can be modified afterwards, 00354 using unitary function @ref LL_DMA2D_SetOutputColor() or configuration 00355 function @ref LL_DMA2D_ConfigOutputColor(). */ 00356 00357 uint32_t OutputAlpha; /*!< Specifies the Alpha channel of the output image. 00358 - This parameter must be a number between: 00359 Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected. 00360 - This parameter must be a number between: 00361 Min_Data = 0x00 and Max_Data = 0x01 if ARGB1555 color mode is selected. 00362 - This parameter must be a number between: 00363 Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected. 00364 - This parameter is not considered if RGB888 or RGB565 color mode is selected. 00365 00366 This parameter can be modified afterwards, 00367 using unitary function @ref LL_DMA2D_SetOutputColor() or configuration 00368 function @ref LL_DMA2D_ConfigOutputColor(). */ 00369 00370 } LL_DMA2D_ColorTypeDef; 00371 00372 /** 00373 * @} 00374 */ 00375 #endif /* USE_FULL_LL_DRIVER */ 00376 00377 /* Exported constants --------------------------------------------------------*/ 00378 /** @defgroup DMA2D_LL_Exported_Constants DMA2D Exported Constants 00379 * @{ 00380 */ 00381 00382 /** @defgroup DMA2D_LL_EC_GET_FLAG Get Flags Defines 00383 * @brief Flags defines which can be used with LL_DMA2D_ReadReg function 00384 * @{ 00385 */ 00386 #define LL_DMA2D_FLAG_CEIF DMA2D_ISR_CEIF /*!< Configuration Error Interrupt Flag */ 00387 #define LL_DMA2D_FLAG_CTCIF DMA2D_ISR_CTCIF /*!< CLUT Transfer Complete Interrupt Flag */ 00388 #define LL_DMA2D_FLAG_CAEIF DMA2D_ISR_CAEIF /*!< CLUT Access Error Interrupt Flag */ 00389 #define LL_DMA2D_FLAG_TWIF DMA2D_ISR_TWIF /*!< Transfer Watermark Interrupt Flag */ 00390 #define LL_DMA2D_FLAG_TCIF DMA2D_ISR_TCIF /*!< Transfer Complete Interrupt Flag */ 00391 #define LL_DMA2D_FLAG_TEIF DMA2D_ISR_TEIF /*!< Transfer Error Interrupt Flag */ 00392 /** 00393 * @} 00394 */ 00395 00396 /** @defgroup DMA2D_LL_EC_IT IT Defines 00397 * @brief IT defines which can be used with LL_DMA2D_ReadReg and LL_DMA2D_WriteReg functions 00398 * @{ 00399 */ 00400 #define LL_DMA2D_IT_CEIE DMA2D_CR_CEIE /*!< Configuration Error Interrupt */ 00401 #define LL_DMA2D_IT_CTCIE DMA2D_CR_CTCIE /*!< CLUT Transfer Complete Interrupt */ 00402 #define LL_DMA2D_IT_CAEIE DMA2D_CR_CAEIE /*!< CLUT Access Error Interrupt */ 00403 #define LL_DMA2D_IT_TWIE DMA2D_CR_TWIE /*!< Transfer Watermark Interrupt */ 00404 #define LL_DMA2D_IT_TCIE DMA2D_CR_TCIE /*!< Transfer Complete Interrupt */ 00405 #define LL_DMA2D_IT_TEIE DMA2D_CR_TEIE /*!< Transfer Error Interrupt */ 00406 /** 00407 * @} 00408 */ 00409 00410 /** @defgroup DMA2D_LL_EC_MODE Mode 00411 * @{ 00412 */ 00413 #define LL_DMA2D_MODE_M2M 0x00000000U /*!< DMA2D memory to memory transfer mode */ 00414 #define LL_DMA2D_MODE_M2M_PFC DMA2D_CR_MODE_0 /*!< DMA2D memory to memory with pixel format conversion transfer mode */ 00415 #define LL_DMA2D_MODE_M2M_BLEND DMA2D_CR_MODE_1 /*!< DMA2D memory to memory with blending transfer mode */ 00416 #define LL_DMA2D_MODE_R2M (DMA2D_CR_MODE_0|DMA2D_CR_MODE_1) /*!< DMA2D register to memory transfer mode */ 00417 #if defined(DMA2D_M2M_BLEND_FIXED_COLOR_FG_BG_SUPPORT) 00418 #define LL_DMA2D_MODE_M2M_BLEND_FIXED_COLOR_FG DMA2D_CR_MODE_2 /*!< DMA2D memory to memory with blending transfer mode and fixed color foreground */ 00419 #define LL_DMA2D_MODE_M2M_BLEND_FIXED_COLOR_BG (DMA2D_CR_MODE_0|DMA2D_CR_MODE_2) /*!< DMA2D memory to memory with blending transfer mode and fixed color background */ 00420 #endif /* DMA2D_M2M_BLEND_FIXED_COLOR_FG_BG_SUPPORT */ 00421 /** 00422 * @} 00423 */ 00424 00425 /** @defgroup DMA2D_LL_EC_OUTPUT_COLOR_MODE Output Color Mode 00426 * @{ 00427 */ 00428 #define LL_DMA2D_OUTPUT_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */ 00429 #define LL_DMA2D_OUTPUT_MODE_RGB888 DMA2D_OPFCCR_CM_0 /*!< RGB888 */ 00430 #define LL_DMA2D_OUTPUT_MODE_RGB565 DMA2D_OPFCCR_CM_1 /*!< RGB565 */ 00431 #define LL_DMA2D_OUTPUT_MODE_ARGB1555 (DMA2D_OPFCCR_CM_0|DMA2D_OPFCCR_CM_1) /*!< ARGB1555 */ 00432 #define LL_DMA2D_OUTPUT_MODE_ARGB4444 DMA2D_OPFCCR_CM_2 /*!< ARGB4444 */ 00433 /** 00434 * @} 00435 */ 00436 00437 /** @defgroup DMA2D_LL_EC_INPUT_COLOR_MODE Input Color Mode 00438 * @{ 00439 */ 00440 #define LL_DMA2D_INPUT_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */ 00441 #define LL_DMA2D_INPUT_MODE_RGB888 DMA2D_FGPFCCR_CM_0 /*!< RGB888 */ 00442 #define LL_DMA2D_INPUT_MODE_RGB565 DMA2D_FGPFCCR_CM_1 /*!< RGB565 */ 00443 #define LL_DMA2D_INPUT_MODE_ARGB1555 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_1) /*!< ARGB1555 */ 00444 #define LL_DMA2D_INPUT_MODE_ARGB4444 DMA2D_FGPFCCR_CM_2 /*!< ARGB4444 */ 00445 #define LL_DMA2D_INPUT_MODE_L8 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_2) /*!< L8 */ 00446 #define LL_DMA2D_INPUT_MODE_AL44 (DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_2) /*!< AL44 */ 00447 #define LL_DMA2D_INPUT_MODE_AL88 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_2) /*!< AL88 */ 00448 #define LL_DMA2D_INPUT_MODE_L4 DMA2D_FGPFCCR_CM_3 /*!< L4 */ 00449 #define LL_DMA2D_INPUT_MODE_A8 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_3) /*!< A8 */ 00450 #define LL_DMA2D_INPUT_MODE_A4 (DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_3) /*!< A4 */ 00451 /** 00452 * @} 00453 */ 00454 00455 /** @defgroup DMA2D_LL_EC_ALPHA_MODE Alpha Mode 00456 * @{ 00457 */ 00458 #define LL_DMA2D_ALPHA_MODE_NO_MODIF 0x00000000U /*!< No modification of the alpha channel value */ 00459 #define LL_DMA2D_ALPHA_MODE_REPLACE DMA2D_FGPFCCR_AM_0 /*!< Replace original alpha channel value by 00460 programmed alpha value */ 00461 #define LL_DMA2D_ALPHA_MODE_COMBINE DMA2D_FGPFCCR_AM_1 /*!< Replace original alpha channel value by 00462 programmed alpha value with, 00463 original alpha channel value */ 00464 /** 00465 * @} 00466 */ 00467 00468 #if defined(DMA2D_OUTPUT_TWO_BY_TWO_SWAP_SUPPORT) 00469 /** @defgroup DMA2D_LL_EC_OUTPUT_SWAP_MODE Swap Mode 00470 * @{ 00471 */ 00472 #define LL_DMA2D_SWAP_MODE_REGULAR 0x00000000U /*!< Regular order */ 00473 #define LL_DMA2D_SWAP_MODE_TWO_BY_TWO DMA2D_OPFCCR_SB /*!< Bytes swapped two by two */ 00474 /** 00475 * @} 00476 */ 00477 #endif /* DMA2D_OUTPUT_TWO_BY_TWO_SWAP_SUPPORT */ 00478 00479 /** @defgroup DMA2D_LL_EC_RED_BLUE_SWAP Red Blue Swap 00480 * @{ 00481 */ 00482 #define LL_DMA2D_RB_MODE_REGULAR 0x00000000U /*!< RGB or ARGB */ 00483 #define LL_DMA2D_RB_MODE_SWAP DMA2D_FGPFCCR_RBS /*!< BGR or ABGR */ 00484 /** 00485 * @} 00486 */ 00487 00488 /** @defgroup DMA2D_LL_EC_ALPHA_INVERSION Alpha Inversion 00489 * @{ 00490 */ 00491 #define LL_DMA2D_ALPHA_REGULAR 0x00000000U /*!< Regular alpha */ 00492 #define LL_DMA2D_ALPHA_INVERTED DMA2D_FGPFCCR_AI /*!< Inverted alpha */ 00493 /** 00494 * @} 00495 */ 00496 00497 00498 #if defined(DMA2D_LINE_OFFSET_MODE_SUPPORT) 00499 /** @defgroup DMA2D_LL_EC_LINE_OFFSET_MODE Line Offset Mode 00500 * @{ 00501 */ 00502 #define LL_DMA2D_LINE_OFFSET_PIXELS 0x00000000U /*!< Line offsets are expressed in pixels */ 00503 #define LL_DMA2D_LINE_OFFSET_BYTES DMA2D_CR_LOM /*!< Line offsets are expressed in bytes */ 00504 /** 00505 * @} 00506 */ 00507 #endif /* DMA2D_LINE_OFFSET_MODE_SUPPORT */ 00508 00509 /** @defgroup DMA2D_LL_EC_CLUT_COLOR_MODE CLUT Color Mode 00510 * @{ 00511 */ 00512 #define LL_DMA2D_CLUT_COLOR_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */ 00513 #define LL_DMA2D_CLUT_COLOR_MODE_RGB888 DMA2D_FGPFCCR_CCM /*!< RGB888 */ 00514 /** 00515 * @} 00516 */ 00517 00518 00519 /** 00520 * @} 00521 */ 00522 00523 /* Exported macro ------------------------------------------------------------*/ 00524 /** @defgroup DMA2D_LL_Exported_Macros DMA2D Exported Macros 00525 * @{ 00526 */ 00527 00528 /** @defgroup DMA2D_LL_EM_WRITE_READ Common Write and read registers Macros 00529 * @{ 00530 */ 00531 00532 /** 00533 * @brief Write a value in DMA2D register. 00534 * @param __INSTANCE__ DMA2D Instance 00535 * @param __REG__ Register to be written 00536 * @param __VALUE__ Value to be written in the register 00537 * @retval None 00538 */ 00539 #define LL_DMA2D_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG((__INSTANCE__)->__REG__, (__VALUE__)) 00540 00541 /** 00542 * @brief Read a value in DMA2D register. 00543 * @param __INSTANCE__ DMA2D Instance 00544 * @param __REG__ Register to be read 00545 * @retval Register value 00546 */ 00547 #define LL_DMA2D_ReadReg(__INSTANCE__, __REG__) READ_REG((__INSTANCE__)->__REG__) 00548 /** 00549 * @} 00550 */ 00551 00552 /** 00553 * @} 00554 */ 00555 00556 /* Exported functions --------------------------------------------------------*/ 00557 /** @defgroup DMA2D_LL_Exported_Functions DMA2D Exported Functions 00558 * @{ 00559 */ 00560 00561 /** @defgroup DMA2D_LL_EF_Configuration Configuration Functions 00562 * @{ 00563 */ 00564 00565 /** 00566 * @brief Start a DMA2D transfer. 00567 * @rmtoll CR START LL_DMA2D_Start 00568 * @param DMA2Dx DMA2D Instance 00569 * @retval None 00570 */ 00571 __STATIC_INLINE void LL_DMA2D_Start(DMA2D_TypeDef *DMA2Dx) 00572 { 00573 SET_BIT(DMA2Dx->CR, DMA2D_CR_START); 00574 } 00575 00576 /** 00577 * @brief Indicate if a DMA2D transfer is ongoing. 00578 * @rmtoll CR START LL_DMA2D_IsTransferOngoing 00579 * @param DMA2Dx DMA2D Instance 00580 * @retval State of bit (1 or 0). 00581 */ 00582 __STATIC_INLINE uint32_t LL_DMA2D_IsTransferOngoing(DMA2D_TypeDef *DMA2Dx) 00583 { 00584 return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_START) == (DMA2D_CR_START)) ? 1UL : 0UL); 00585 } 00586 00587 /** 00588 * @brief Suspend DMA2D transfer. 00589 * @note This API can be used to suspend automatic foreground or background CLUT loading. 00590 * @rmtoll CR SUSP LL_DMA2D_Suspend 00591 * @param DMA2Dx DMA2D Instance 00592 * @retval None 00593 */ 00594 __STATIC_INLINE void LL_DMA2D_Suspend(DMA2D_TypeDef *DMA2Dx) 00595 { 00596 MODIFY_REG(DMA2Dx->CR, DMA2D_CR_SUSP | DMA2D_CR_START, DMA2D_CR_SUSP); 00597 } 00598 00599 /** 00600 * @brief Resume DMA2D transfer. 00601 * @note This API can be used to resume automatic foreground or background CLUT loading. 00602 * @rmtoll CR SUSP LL_DMA2D_Resume 00603 * @param DMA2Dx DMA2D Instance 00604 * @retval None 00605 */ 00606 __STATIC_INLINE void LL_DMA2D_Resume(DMA2D_TypeDef *DMA2Dx) 00607 { 00608 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_SUSP | DMA2D_CR_START); 00609 } 00610 00611 /** 00612 * @brief Indicate if DMA2D transfer is suspended. 00613 * @note This API can be used to indicate whether or not automatic foreground or 00614 * background CLUT loading is suspended. 00615 * @rmtoll CR SUSP LL_DMA2D_IsSuspended 00616 * @param DMA2Dx DMA2D Instance 00617 * @retval State of bit (1 or 0). 00618 */ 00619 __STATIC_INLINE uint32_t LL_DMA2D_IsSuspended(DMA2D_TypeDef *DMA2Dx) 00620 { 00621 return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_SUSP) == (DMA2D_CR_SUSP)) ? 1UL : 0UL); 00622 } 00623 00624 /** 00625 * @brief Abort DMA2D transfer. 00626 * @note This API can be used to abort automatic foreground or background CLUT loading. 00627 * @rmtoll CR ABORT LL_DMA2D_Abort 00628 * @param DMA2Dx DMA2D Instance 00629 * @retval None 00630 */ 00631 __STATIC_INLINE void LL_DMA2D_Abort(DMA2D_TypeDef *DMA2Dx) 00632 { 00633 MODIFY_REG(DMA2Dx->CR, DMA2D_CR_ABORT | DMA2D_CR_START, DMA2D_CR_ABORT); 00634 } 00635 00636 /** 00637 * @brief Indicate if DMA2D transfer is aborted. 00638 * @note This API can be used to indicate whether or not automatic foreground or 00639 * background CLUT loading is aborted. 00640 * @rmtoll CR ABORT LL_DMA2D_IsAborted 00641 * @param DMA2Dx DMA2D Instance 00642 * @retval State of bit (1 or 0). 00643 */ 00644 __STATIC_INLINE uint32_t LL_DMA2D_IsAborted(DMA2D_TypeDef *DMA2Dx) 00645 { 00646 return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_ABORT) == (DMA2D_CR_ABORT)) ? 1UL : 0UL); 00647 } 00648 00649 /** 00650 * @brief Set DMA2D mode. 00651 * @rmtoll CR MODE LL_DMA2D_SetMode 00652 * @param DMA2Dx DMA2D Instance 00653 * @param Mode This parameter can be one of the following values: 00654 * @arg @ref LL_DMA2D_MODE_M2M 00655 * @arg @ref LL_DMA2D_MODE_M2M_PFC 00656 * @arg @ref LL_DMA2D_MODE_M2M_BLEND 00657 * @arg @ref LL_DMA2D_MODE_R2M 00658 * @arg @ref LL_DMA2D_MODE_M2M_BLEND_FIXED_COLOR_FG (*) 00659 * @arg @ref LL_DMA2D_MODE_M2M_BLEND_FIXED_COLOR_BG (*) 00660 * 00661 * (*) value not defined in all devices. 00662 * @retval None 00663 */ 00664 __STATIC_INLINE void LL_DMA2D_SetMode(DMA2D_TypeDef *DMA2Dx, uint32_t Mode) 00665 { 00666 MODIFY_REG(DMA2Dx->CR, DMA2D_CR_MODE, Mode); 00667 } 00668 00669 /** 00670 * @brief Return DMA2D mode 00671 * @rmtoll CR MODE LL_DMA2D_GetMode 00672 * @param DMA2Dx DMA2D Instance 00673 * @retval Returned value can be one of the following values: 00674 * @arg @ref LL_DMA2D_MODE_M2M 00675 * @arg @ref LL_DMA2D_MODE_M2M_PFC 00676 * @arg @ref LL_DMA2D_MODE_M2M_BLEND 00677 * @arg @ref LL_DMA2D_MODE_R2M 00678 * @arg @ref LL_DMA2D_MODE_M2M_BLEND_FIXED_COLOR_FG (*) 00679 * @arg @ref LL_DMA2D_MODE_M2M_BLEND_FIXED_COLOR_BG (*) 00680 * 00681 * (*) value not defined in all devices. 00682 */ 00683 __STATIC_INLINE uint32_t LL_DMA2D_GetMode(DMA2D_TypeDef *DMA2Dx) 00684 { 00685 return (uint32_t)(READ_BIT(DMA2Dx->CR, DMA2D_CR_MODE)); 00686 } 00687 00688 /** 00689 * @brief Set DMA2D output color mode. 00690 * @rmtoll OPFCCR CM LL_DMA2D_SetOutputColorMode 00691 * @param DMA2Dx DMA2D Instance 00692 * @param ColorMode This parameter can be one of the following values: 00693 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB8888 00694 * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB888 00695 * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB565 00696 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB1555 00697 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444 00698 * @retval None 00699 */ 00700 __STATIC_INLINE void LL_DMA2D_SetOutputColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode) 00701 { 00702 MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM, ColorMode); 00703 } 00704 00705 /** 00706 * @brief Return DMA2D output color mode. 00707 * @rmtoll OPFCCR CM LL_DMA2D_GetOutputColorMode 00708 * @param DMA2Dx DMA2D Instance 00709 * @retval Returned value can be one of the following values: 00710 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB8888 00711 * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB888 00712 * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB565 00713 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB1555 00714 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444 00715 */ 00716 __STATIC_INLINE uint32_t LL_DMA2D_GetOutputColorMode(DMA2D_TypeDef *DMA2Dx) 00717 { 00718 return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM)); 00719 } 00720 00721 /** 00722 * @brief Set DMA2D output Red Blue swap mode. 00723 * @rmtoll OPFCCR RBS LL_DMA2D_SetOutputRBSwapMode 00724 * @param DMA2Dx DMA2D Instance 00725 * @param RBSwapMode This parameter can be one of the following values: 00726 * @arg @ref LL_DMA2D_RB_MODE_REGULAR 00727 * @arg @ref LL_DMA2D_RB_MODE_SWAP 00728 * @retval None 00729 */ 00730 __STATIC_INLINE void LL_DMA2D_SetOutputRBSwapMode(DMA2D_TypeDef *DMA2Dx, uint32_t RBSwapMode) 00731 { 00732 MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_RBS, RBSwapMode); 00733 } 00734 00735 /** 00736 * @brief Return DMA2D output Red Blue swap mode. 00737 * @rmtoll OPFCCR RBS LL_DMA2D_GetOutputRBSwapMode 00738 * @param DMA2Dx DMA2D Instance 00739 * @retval Returned value can be one of the following values: 00740 * @arg @ref LL_DMA2D_RB_MODE_REGULAR 00741 * @arg @ref LL_DMA2D_RB_MODE_SWAP 00742 */ 00743 __STATIC_INLINE uint32_t LL_DMA2D_GetOutputRBSwapMode(DMA2D_TypeDef *DMA2Dx) 00744 { 00745 return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_RBS)); 00746 } 00747 00748 /** 00749 * @brief Set DMA2D output alpha inversion mode. 00750 * @rmtoll OPFCCR AI LL_DMA2D_SetOutputAlphaInvMode 00751 * @param DMA2Dx DMA2D Instance 00752 * @param AlphaInversionMode This parameter can be one of the following values: 00753 * @arg @ref LL_DMA2D_ALPHA_REGULAR 00754 * @arg @ref LL_DMA2D_ALPHA_INVERTED 00755 * @retval None 00756 */ 00757 __STATIC_INLINE void LL_DMA2D_SetOutputAlphaInvMode(DMA2D_TypeDef *DMA2Dx, uint32_t AlphaInversionMode) 00758 { 00759 MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_AI, AlphaInversionMode); 00760 } 00761 00762 /** 00763 * @brief Return DMA2D output alpha inversion mode. 00764 * @rmtoll OPFCCR AI LL_DMA2D_GetOutputAlphaInvMode 00765 * @param DMA2Dx DMA2D Instance 00766 * @retval Returned value can be one of the following values: 00767 * @arg @ref LL_DMA2D_ALPHA_REGULAR 00768 * @arg @ref LL_DMA2D_ALPHA_INVERTED 00769 */ 00770 __STATIC_INLINE uint32_t LL_DMA2D_GetOutputAlphaInvMode(DMA2D_TypeDef *DMA2Dx) 00771 { 00772 return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_AI)); 00773 } 00774 00775 00776 #if defined(DMA2D_OUTPUT_TWO_BY_TWO_SWAP_SUPPORT) 00777 /** 00778 * @brief Set DMA2D output swap mode. 00779 * @rmtoll OPFCCR SB LL_DMA2D_SetOutputSwapMode 00780 * @param DMA2Dx DMA2D Instance 00781 * @param OutputSwapMode This parameter can be one of the following values: 00782 * @arg @ref LL_DMA2D_SWAP_MODE_REGULAR 00783 * @arg @ref LL_DMA2D_SWAP_MODE_TWO_BY_TWO 00784 * @retval None 00785 */ 00786 __STATIC_INLINE void LL_DMA2D_SetOutputSwapMode(DMA2D_TypeDef *DMA2Dx, uint32_t OutputSwapMode) 00787 { 00788 MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_SB, OutputSwapMode); 00789 } 00790 00791 /** 00792 * @brief Return DMA2D output swap mode. 00793 * @rmtoll OPFCCR SB LL_DMA2D_GetOutputSwapMode 00794 * @param DMA2Dx DMA2D Instance 00795 * @retval Returned value can be one of the following values: 00796 * @arg @ref LL_DMA2D_SWAP_MODE_REGULAR 00797 * @arg @ref LL_DMA2D_SWAP_MODE_TWO_BY_TWO 00798 */ 00799 __STATIC_INLINE uint32_t LL_DMA2D_GetOutputSwapMode(DMA2D_TypeDef *DMA2Dx) 00800 { 00801 return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_SB)); 00802 } 00803 #endif /* DMA2D_OUTPUT_TWO_BY_TWO_SWAP_SUPPORT */ 00804 00805 #if defined(DMA2D_LINE_OFFSET_MODE_SUPPORT) 00806 /** 00807 * @brief Set DMA2D line offset mode. 00808 * @rmtoll CR LOM LL_DMA2D_SetLineOffsetMode 00809 * @param DMA2Dx DMA2D Instance 00810 * @param LineOffsetMode This parameter can be one of the following values: 00811 * @arg @ref LL_DMA2D_LINE_OFFSET_PIXELS 00812 * @arg @ref LL_DMA2D_LINE_OFFSET_BYTES 00813 * @retval None 00814 */ 00815 __STATIC_INLINE void LL_DMA2D_SetLineOffsetMode(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffsetMode) 00816 { 00817 MODIFY_REG(DMA2Dx->CR, DMA2D_CR_LOM, LineOffsetMode); 00818 } 00819 00820 /** 00821 * @brief Return DMA2D line offset mode. 00822 * @rmtoll CR LOM LL_DMA2D_GetLineOffsetMode 00823 * @param DMA2Dx DMA2D Instance 00824 * @retval Returned value can be one of the following values: 00825 * @arg @ref LL_DMA2D_LINE_OFFSET_PIXELS 00826 * @arg @ref LL_DMA2D_LINE_OFFSET_BYTES 00827 */ 00828 __STATIC_INLINE uint32_t LL_DMA2D_GetLineOffsetMode(DMA2D_TypeDef *DMA2Dx) 00829 { 00830 return (uint32_t)(READ_BIT(DMA2Dx->CR, DMA2D_CR_LOM)); 00831 } 00832 #endif /* DMA2D_LINE_OFFSET_MODE_SUPPORT */ 00833 00834 /** 00835 * @brief Set DMA2D line offset, expressed on 14 bits ([13:0] bits). 00836 * @rmtoll OOR LO LL_DMA2D_SetLineOffset 00837 * @param DMA2Dx DMA2D Instance 00838 @if DMA2D_LINE_OFFSET_MODE_SUPPORT 00839 * @param LineOffset Value between Min_Data=0 and Max_Data=0xFFFF 00840 @else 00841 * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FFF 00842 @endif 00843 * @retval None 00844 */ 00845 __STATIC_INLINE void LL_DMA2D_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset) 00846 { 00847 MODIFY_REG(DMA2Dx->OOR, DMA2D_OOR_LO, LineOffset); 00848 } 00849 00850 /** 00851 * @brief Return DMA2D line offset, expressed on 14 bits ([13:0] bits). 00852 * @rmtoll OOR LO LL_DMA2D_GetLineOffset 00853 * @param DMA2Dx DMA2D Instance 00854 @if DMA2D_LINE_OFFSET_MODE_SUPPORT 00855 * @retval Line offset value between Min_Data=0 and Max_Data=0xFFFF 00856 @else 00857 * @retval Line offset value between Min_Data=0 and Max_Data=0x3FFF 00858 @endif 00859 */ 00860 __STATIC_INLINE uint32_t LL_DMA2D_GetLineOffset(DMA2D_TypeDef *DMA2Dx) 00861 { 00862 return (uint32_t)(READ_BIT(DMA2Dx->OOR, DMA2D_OOR_LO)); 00863 } 00864 00865 /** 00866 * @brief Set DMA2D number of pixels per lines, expressed on 14 bits ([13:0] bits). 00867 * @rmtoll NLR PL LL_DMA2D_SetNbrOfPixelsPerLines 00868 * @param DMA2Dx DMA2D Instance 00869 * @param NbrOfPixelsPerLines Value between Min_Data=0 and Max_Data=0x3FFF 00870 * @retval None 00871 */ 00872 __STATIC_INLINE void LL_DMA2D_SetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfPixelsPerLines) 00873 { 00874 MODIFY_REG(DMA2Dx->NLR, DMA2D_NLR_PL, (NbrOfPixelsPerLines << DMA2D_NLR_PL_Pos)); 00875 } 00876 00877 /** 00878 * @brief Return DMA2D number of pixels per lines, expressed on 14 bits ([13:0] bits) 00879 * @rmtoll NLR PL LL_DMA2D_GetNbrOfPixelsPerLines 00880 * @param DMA2Dx DMA2D Instance 00881 * @retval Number of pixels per lines value between Min_Data=0 and Max_Data=0x3FFF 00882 */ 00883 __STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx) 00884 { 00885 return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_PL) >> DMA2D_NLR_PL_Pos); 00886 } 00887 00888 /** 00889 * @brief Set DMA2D number of lines, expressed on 16 bits ([15:0] bits). 00890 * @rmtoll NLR NL LL_DMA2D_SetNbrOfLines 00891 * @param DMA2Dx DMA2D Instance 00892 * @param NbrOfLines Value between Min_Data=0 and Max_Data=0xFFFF 00893 * @retval None 00894 */ 00895 __STATIC_INLINE void LL_DMA2D_SetNbrOfLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines) 00896 { 00897 MODIFY_REG(DMA2Dx->NLR, DMA2D_NLR_NL, NbrOfLines); 00898 } 00899 00900 /** 00901 * @brief Return DMA2D number of lines, expressed on 16 bits ([15:0] bits). 00902 * @rmtoll NLR NL LL_DMA2D_GetNbrOfLines 00903 * @param DMA2Dx DMA2D Instance 00904 * @retval Number of lines value between Min_Data=0 and Max_Data=0xFFFF 00905 */ 00906 __STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfLines(DMA2D_TypeDef *DMA2Dx) 00907 { 00908 return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_NL)); 00909 } 00910 00911 /** 00912 * @brief Set DMA2D output memory address, expressed on 32 bits ([31:0] bits). 00913 * @rmtoll OMAR MA LL_DMA2D_SetOutputMemAddr 00914 * @param DMA2Dx DMA2D Instance 00915 * @param OutputMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF 00916 * @retval None 00917 */ 00918 __STATIC_INLINE void LL_DMA2D_SetOutputMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t OutputMemoryAddress) 00919 { 00920 LL_DMA2D_WriteReg(DMA2Dx, OMAR, OutputMemoryAddress); 00921 } 00922 00923 /** 00924 * @brief Get DMA2D output memory address, expressed on 32 bits ([31:0] bits). 00925 * @rmtoll OMAR MA LL_DMA2D_GetOutputMemAddr 00926 * @param DMA2Dx DMA2D Instance 00927 * @retval Output memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF 00928 */ 00929 __STATIC_INLINE uint32_t LL_DMA2D_GetOutputMemAddr(DMA2D_TypeDef *DMA2Dx) 00930 { 00931 return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, OMAR)); 00932 } 00933 00934 /** 00935 * @brief Set DMA2D output color, expressed on 32 bits ([31:0] bits). 00936 * @note Output color format depends on output color mode, ARGB8888, RGB888, 00937 * RGB565, ARGB1555 or ARGB4444. 00938 * @note LL_DMA2D_ConfigOutputColor() API may be used instead if colors values formatting 00939 * with respect to color mode is not done by the user code. 00940 * @rmtoll OCOLR BLUE LL_DMA2D_SetOutputColor\n 00941 * OCOLR GREEN LL_DMA2D_SetOutputColor\n 00942 * OCOLR RED LL_DMA2D_SetOutputColor\n 00943 * OCOLR ALPHA LL_DMA2D_SetOutputColor 00944 * @param DMA2Dx DMA2D Instance 00945 * @param OutputColor Value between Min_Data=0 and Max_Data=0xFFFFFFFF 00946 * @retval None 00947 */ 00948 __STATIC_INLINE void LL_DMA2D_SetOutputColor(DMA2D_TypeDef *DMA2Dx, uint32_t OutputColor) 00949 { 00950 MODIFY_REG(DMA2Dx->OCOLR, (DMA2D_OCOLR_BLUE_1 | DMA2D_OCOLR_GREEN_1 | DMA2D_OCOLR_RED_1 | DMA2D_OCOLR_ALPHA_1), \ 00951 OutputColor); 00952 } 00953 00954 /** 00955 * @brief Get DMA2D output color, expressed on 32 bits ([31:0] bits). 00956 * @note Alpha channel and red, green, blue color values must be retrieved from the returned 00957 * value based on the output color mode (ARGB8888, RGB888, RGB565, ARGB1555 or ARGB4444) 00958 * as set by @ref LL_DMA2D_SetOutputColorMode. 00959 * @rmtoll OCOLR BLUE LL_DMA2D_GetOutputColor\n 00960 * OCOLR GREEN LL_DMA2D_GetOutputColor\n 00961 * OCOLR RED LL_DMA2D_GetOutputColor\n 00962 * OCOLR ALPHA LL_DMA2D_GetOutputColor 00963 * @param DMA2Dx DMA2D Instance 00964 * @retval Output color value between Min_Data=0 and Max_Data=0xFFFFFFFF 00965 */ 00966 __STATIC_INLINE uint32_t LL_DMA2D_GetOutputColor(DMA2D_TypeDef *DMA2Dx) 00967 { 00968 return (uint32_t)(READ_BIT(DMA2Dx->OCOLR, \ 00969 (DMA2D_OCOLR_BLUE_1 | DMA2D_OCOLR_GREEN_1 | DMA2D_OCOLR_RED_1 | DMA2D_OCOLR_ALPHA_1))); 00970 } 00971 00972 /** 00973 * @brief Set DMA2D line watermark, expressed on 16 bits ([15:0] bits). 00974 * @rmtoll LWR LW LL_DMA2D_SetLineWatermark 00975 * @param DMA2Dx DMA2D Instance 00976 * @param LineWatermark Value between Min_Data=0 and Max_Data=0xFFFF 00977 * @retval None 00978 */ 00979 __STATIC_INLINE void LL_DMA2D_SetLineWatermark(DMA2D_TypeDef *DMA2Dx, uint32_t LineWatermark) 00980 { 00981 MODIFY_REG(DMA2Dx->LWR, DMA2D_LWR_LW, LineWatermark); 00982 } 00983 00984 /** 00985 * @brief Return DMA2D line watermark, expressed on 16 bits ([15:0] bits). 00986 * @rmtoll LWR LW LL_DMA2D_GetLineWatermark 00987 * @param DMA2Dx DMA2D Instance 00988 * @retval Line watermark value between Min_Data=0 and Max_Data=0xFFFF 00989 */ 00990 __STATIC_INLINE uint32_t LL_DMA2D_GetLineWatermark(DMA2D_TypeDef *DMA2Dx) 00991 { 00992 return (uint32_t)(READ_BIT(DMA2Dx->LWR, DMA2D_LWR_LW)); 00993 } 00994 00995 /** 00996 * @brief Set DMA2D dead time, expressed on 8 bits ([7:0] bits). 00997 * @rmtoll AMTCR DT LL_DMA2D_SetDeadTime 00998 * @param DMA2Dx DMA2D Instance 00999 * @param DeadTime Value between Min_Data=0 and Max_Data=0xFF 01000 * @retval None 01001 */ 01002 __STATIC_INLINE void LL_DMA2D_SetDeadTime(DMA2D_TypeDef *DMA2Dx, uint32_t DeadTime) 01003 { 01004 MODIFY_REG(DMA2Dx->AMTCR, DMA2D_AMTCR_DT, (DeadTime << DMA2D_AMTCR_DT_Pos)); 01005 } 01006 01007 /** 01008 * @brief Return DMA2D dead time, expressed on 8 bits ([7:0] bits). 01009 * @rmtoll AMTCR DT LL_DMA2D_GetDeadTime 01010 * @param DMA2Dx DMA2D Instance 01011 * @retval Dead time value between Min_Data=0 and Max_Data=0xFF 01012 */ 01013 __STATIC_INLINE uint32_t LL_DMA2D_GetDeadTime(DMA2D_TypeDef *DMA2Dx) 01014 { 01015 return (uint32_t)(READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_DT) >> DMA2D_AMTCR_DT_Pos); 01016 } 01017 01018 /** 01019 * @brief Enable DMA2D dead time functionality. 01020 * @rmtoll AMTCR EN LL_DMA2D_EnableDeadTime 01021 * @param DMA2Dx DMA2D Instance 01022 * @retval None 01023 */ 01024 __STATIC_INLINE void LL_DMA2D_EnableDeadTime(DMA2D_TypeDef *DMA2Dx) 01025 { 01026 SET_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN); 01027 } 01028 01029 /** 01030 * @brief Disable DMA2D dead time functionality. 01031 * @rmtoll AMTCR EN LL_DMA2D_DisableDeadTime 01032 * @param DMA2Dx DMA2D Instance 01033 * @retval None 01034 */ 01035 __STATIC_INLINE void LL_DMA2D_DisableDeadTime(DMA2D_TypeDef *DMA2Dx) 01036 { 01037 CLEAR_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN); 01038 } 01039 01040 /** 01041 * @brief Indicate if DMA2D dead time functionality is enabled. 01042 * @rmtoll AMTCR EN LL_DMA2D_IsEnabledDeadTime 01043 * @param DMA2Dx DMA2D Instance 01044 * @retval State of bit (1 or 0). 01045 */ 01046 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledDeadTime(DMA2D_TypeDef *DMA2Dx) 01047 { 01048 return ((READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN) == (DMA2D_AMTCR_EN)) ? 1UL : 0UL); 01049 } 01050 01051 /** @defgroup DMA2D_LL_EF_FGND_Configuration Foreground Configuration Functions 01052 * @{ 01053 */ 01054 01055 /** 01056 * @brief Set DMA2D foreground memory address, expressed on 32 bits ([31:0] bits). 01057 * @rmtoll FGMAR MA LL_DMA2D_FGND_SetMemAddr 01058 * @param DMA2Dx DMA2D Instance 01059 * @param MemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF 01060 * @retval None 01061 */ 01062 __STATIC_INLINE void LL_DMA2D_FGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress) 01063 { 01064 LL_DMA2D_WriteReg(DMA2Dx, FGMAR, MemoryAddress); 01065 } 01066 01067 /** 01068 * @brief Get DMA2D foreground memory address, expressed on 32 bits ([31:0] bits). 01069 * @rmtoll FGMAR MA LL_DMA2D_FGND_GetMemAddr 01070 * @param DMA2Dx DMA2D Instance 01071 * @retval Foreground memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF 01072 */ 01073 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetMemAddr(DMA2D_TypeDef *DMA2Dx) 01074 { 01075 return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGMAR)); 01076 } 01077 01078 /** 01079 * @brief Enable DMA2D foreground CLUT loading. 01080 * @rmtoll FGPFCCR START LL_DMA2D_FGND_EnableCLUTLoad 01081 * @param DMA2Dx DMA2D Instance 01082 * @retval None 01083 */ 01084 __STATIC_INLINE void LL_DMA2D_FGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx) 01085 { 01086 SET_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START); 01087 } 01088 01089 /** 01090 * @brief Indicate if DMA2D foreground CLUT loading is enabled. 01091 * @rmtoll FGPFCCR START LL_DMA2D_FGND_IsEnabledCLUTLoad 01092 * @param DMA2Dx DMA2D Instance 01093 * @retval State of bit (1 or 0). 01094 */ 01095 __STATIC_INLINE uint32_t LL_DMA2D_FGND_IsEnabledCLUTLoad(DMA2D_TypeDef *DMA2Dx) 01096 { 01097 return ((READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START) == (DMA2D_FGPFCCR_START)) ? 1UL : 0UL); 01098 } 01099 01100 /** 01101 * @brief Set DMA2D foreground color mode. 01102 * @rmtoll FGPFCCR CM LL_DMA2D_FGND_SetColorMode 01103 * @param DMA2Dx DMA2D Instance 01104 * @param ColorMode This parameter can be one of the following values: 01105 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888 01106 * @arg @ref LL_DMA2D_INPUT_MODE_RGB888 01107 * @arg @ref LL_DMA2D_INPUT_MODE_RGB565 01108 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555 01109 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444 01110 * @arg @ref LL_DMA2D_INPUT_MODE_L8 01111 * @arg @ref LL_DMA2D_INPUT_MODE_AL44 01112 * @arg @ref LL_DMA2D_INPUT_MODE_AL88 01113 * @arg @ref LL_DMA2D_INPUT_MODE_L4 01114 * @arg @ref LL_DMA2D_INPUT_MODE_A8 01115 * @arg @ref LL_DMA2D_INPUT_MODE_A4 01116 * @retval None 01117 */ 01118 __STATIC_INLINE void LL_DMA2D_FGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode) 01119 { 01120 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM, ColorMode); 01121 } 01122 01123 /** 01124 * @brief Return DMA2D foreground color mode. 01125 * @rmtoll FGPFCCR CM LL_DMA2D_FGND_GetColorMode 01126 * @param DMA2Dx DMA2D Instance 01127 * @retval Returned value can be one of the following values: 01128 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888 01129 * @arg @ref LL_DMA2D_INPUT_MODE_RGB888 01130 * @arg @ref LL_DMA2D_INPUT_MODE_RGB565 01131 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555 01132 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444 01133 * @arg @ref LL_DMA2D_INPUT_MODE_L8 01134 * @arg @ref LL_DMA2D_INPUT_MODE_AL44 01135 * @arg @ref LL_DMA2D_INPUT_MODE_AL88 01136 * @arg @ref LL_DMA2D_INPUT_MODE_L4 01137 * @arg @ref LL_DMA2D_INPUT_MODE_A8 01138 * @arg @ref LL_DMA2D_INPUT_MODE_A4 01139 */ 01140 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetColorMode(DMA2D_TypeDef *DMA2Dx) 01141 { 01142 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM)); 01143 } 01144 01145 /** 01146 * @brief Set DMA2D foreground alpha mode. 01147 * @rmtoll FGPFCCR AM LL_DMA2D_FGND_SetAlphaMode 01148 * @param DMA2Dx DMA2D Instance 01149 * @param AphaMode This parameter can be one of the following values: 01150 * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF 01151 * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE 01152 * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE 01153 * @retval None 01154 */ 01155 __STATIC_INLINE void LL_DMA2D_FGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode) 01156 { 01157 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM, AphaMode); 01158 } 01159 01160 /** 01161 * @brief Return DMA2D foreground alpha mode. 01162 * @rmtoll FGPFCCR AM LL_DMA2D_FGND_GetAlphaMode 01163 * @param DMA2Dx DMA2D Instance 01164 * @retval Returned value can be one of the following values: 01165 * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF 01166 * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE 01167 * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE 01168 */ 01169 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlphaMode(DMA2D_TypeDef *DMA2Dx) 01170 { 01171 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM)); 01172 } 01173 01174 /** 01175 * @brief Set DMA2D foreground alpha value, expressed on 8 bits ([7:0] bits). 01176 * @rmtoll FGPFCCR ALPHA LL_DMA2D_FGND_SetAlpha 01177 * @param DMA2Dx DMA2D Instance 01178 * @param Alpha Value between Min_Data=0 and Max_Data=0xFF 01179 * @retval None 01180 */ 01181 __STATIC_INLINE void LL_DMA2D_FGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alpha) 01182 { 01183 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA, (Alpha << DMA2D_FGPFCCR_ALPHA_Pos)); 01184 } 01185 01186 /** 01187 * @brief Return DMA2D foreground alpha value, expressed on 8 bits ([7:0] bits). 01188 * @rmtoll FGPFCCR ALPHA LL_DMA2D_FGND_GetAlpha 01189 * @param DMA2Dx DMA2D Instance 01190 * @retval Alpha value between Min_Data=0 and Max_Data=0xFF 01191 */ 01192 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlpha(DMA2D_TypeDef *DMA2Dx) 01193 { 01194 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA) >> DMA2D_FGPFCCR_ALPHA_Pos); 01195 } 01196 01197 /** 01198 * @brief Set DMA2D foreground Red Blue swap mode. 01199 * @rmtoll FGPFCCR RBS LL_DMA2D_FGND_SetRBSwapMode 01200 * @param DMA2Dx DMA2D Instance 01201 * @param RBSwapMode This parameter can be one of the following values: 01202 * @arg @ref LL_DMA2D_RB_MODE_REGULAR 01203 * @arg @ref LL_DMA2D_RB_MODE_SWAP 01204 * @retval None 01205 */ 01206 __STATIC_INLINE void LL_DMA2D_FGND_SetRBSwapMode(DMA2D_TypeDef *DMA2Dx, uint32_t RBSwapMode) 01207 { 01208 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_RBS, RBSwapMode); 01209 } 01210 01211 /** 01212 * @brief Return DMA2D foreground Red Blue swap mode. 01213 * @rmtoll FGPFCCR RBS LL_DMA2D_FGND_GetRBSwapMode 01214 * @param DMA2Dx DMA2D Instance 01215 * @retval Returned value can be one of the following values: 01216 * @arg @ref LL_DMA2D_RB_MODE_REGULAR 01217 * @arg @ref LL_DMA2D_RB_MODE_SWAP 01218 */ 01219 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetRBSwapMode(DMA2D_TypeDef *DMA2Dx) 01220 { 01221 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_RBS)); 01222 } 01223 01224 /** 01225 * @brief Set DMA2D foreground alpha inversion mode. 01226 * @rmtoll FGPFCCR AI LL_DMA2D_FGND_SetAlphaInvMode 01227 * @param DMA2Dx DMA2D Instance 01228 * @param AlphaInversionMode This parameter can be one of the following values: 01229 * @arg @ref LL_DMA2D_ALPHA_REGULAR 01230 * @arg @ref LL_DMA2D_ALPHA_INVERTED 01231 * @retval None 01232 */ 01233 __STATIC_INLINE void LL_DMA2D_FGND_SetAlphaInvMode(DMA2D_TypeDef *DMA2Dx, uint32_t AlphaInversionMode) 01234 { 01235 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AI, AlphaInversionMode); 01236 } 01237 01238 /** 01239 * @brief Return DMA2D foreground alpha inversion mode. 01240 * @rmtoll FGPFCCR AI LL_DMA2D_FGND_GetAlphaInvMode 01241 * @param DMA2Dx DMA2D Instance 01242 * @retval Returned value can be one of the following values: 01243 * @arg @ref LL_DMA2D_ALPHA_REGULAR 01244 * @arg @ref LL_DMA2D_ALPHA_INVERTED 01245 */ 01246 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlphaInvMode(DMA2D_TypeDef *DMA2Dx) 01247 { 01248 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AI)); 01249 } 01250 01251 /** 01252 * @brief Set DMA2D foreground line offset, expressed on 14 bits ([13:0] bits). 01253 * @rmtoll FGOR LO LL_DMA2D_FGND_SetLineOffset 01254 * @param DMA2Dx DMA2D Instance 01255 * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FF 01256 * @retval None 01257 */ 01258 __STATIC_INLINE void LL_DMA2D_FGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset) 01259 { 01260 MODIFY_REG(DMA2Dx->FGOR, DMA2D_FGOR_LO, LineOffset); 01261 } 01262 01263 /** 01264 * @brief Return DMA2D foreground line offset, expressed on 14 bits ([13:0] bits). 01265 * @rmtoll FGOR LO LL_DMA2D_FGND_GetLineOffset 01266 * @param DMA2Dx DMA2D Instance 01267 * @retval Foreground line offset value between Min_Data=0 and Max_Data=0x3FF 01268 */ 01269 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetLineOffset(DMA2D_TypeDef *DMA2Dx) 01270 { 01271 return (uint32_t)(READ_BIT(DMA2Dx->FGOR, DMA2D_FGOR_LO)); 01272 } 01273 01274 /** 01275 * @brief Set DMA2D foreground color values, expressed on 24 bits ([23:0] bits). 01276 * @rmtoll FGCOLR RED LL_DMA2D_FGND_SetColor 01277 * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_SetColor 01278 * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_SetColor 01279 * @param DMA2Dx DMA2D Instance 01280 * @param Red Value between Min_Data=0 and Max_Data=0xFF 01281 * @param Green Value between Min_Data=0 and Max_Data=0xFF 01282 * @param Blue Value between Min_Data=0 and Max_Data=0xFF 01283 * @retval None 01284 */ 01285 __STATIC_INLINE void LL_DMA2D_FGND_SetColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue) 01286 { 01287 MODIFY_REG(DMA2Dx->FGCOLR, (DMA2D_FGCOLR_RED | DMA2D_FGCOLR_GREEN | DMA2D_FGCOLR_BLUE), \ 01288 ((Red << DMA2D_FGCOLR_RED_Pos) | (Green << DMA2D_FGCOLR_GREEN_Pos) | Blue)); 01289 } 01290 01291 /** 01292 * @brief Set DMA2D foreground red color value, expressed on 8 bits ([7:0] bits). 01293 * @rmtoll FGCOLR RED LL_DMA2D_FGND_SetRedColor 01294 * @param DMA2Dx DMA2D Instance 01295 * @param Red Value between Min_Data=0 and Max_Data=0xFF 01296 * @retval None 01297 */ 01298 __STATIC_INLINE void LL_DMA2D_FGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red) 01299 { 01300 MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_RED, (Red << DMA2D_FGCOLR_RED_Pos)); 01301 } 01302 01303 /** 01304 * @brief Return DMA2D foreground red color value, expressed on 8 bits ([7:0] bits). 01305 * @rmtoll FGCOLR RED LL_DMA2D_FGND_GetRedColor 01306 * @param DMA2Dx DMA2D Instance 01307 * @retval Red color value between Min_Data=0 and Max_Data=0xFF 01308 */ 01309 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetRedColor(DMA2D_TypeDef *DMA2Dx) 01310 { 01311 return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_RED) >> DMA2D_FGCOLR_RED_Pos); 01312 } 01313 01314 /** 01315 * @brief Set DMA2D foreground green color value, expressed on 8 bits ([7:0] bits). 01316 * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_SetGreenColor 01317 * @param DMA2Dx DMA2D Instance 01318 * @param Green Value between Min_Data=0 and Max_Data=0xFF 01319 * @retval None 01320 */ 01321 __STATIC_INLINE void LL_DMA2D_FGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t Green) 01322 { 01323 MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_GREEN, (Green << DMA2D_FGCOLR_GREEN_Pos)); 01324 } 01325 01326 /** 01327 * @brief Return DMA2D foreground green color value, expressed on 8 bits ([7:0] bits). 01328 * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_GetGreenColor 01329 * @param DMA2Dx DMA2D Instance 01330 * @retval Green color value between Min_Data=0 and Max_Data=0xFF 01331 */ 01332 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetGreenColor(DMA2D_TypeDef *DMA2Dx) 01333 { 01334 return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_GREEN) >> DMA2D_FGCOLR_GREEN_Pos); 01335 } 01336 01337 /** 01338 * @brief Set DMA2D foreground blue color value, expressed on 8 bits ([7:0] bits). 01339 * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_SetBlueColor 01340 * @param DMA2Dx DMA2D Instance 01341 * @param Blue Value between Min_Data=0 and Max_Data=0xFF 01342 * @retval None 01343 */ 01344 __STATIC_INLINE void LL_DMA2D_FGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t Blue) 01345 { 01346 MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_BLUE, Blue); 01347 } 01348 01349 /** 01350 * @brief Return DMA2D foreground blue color value, expressed on 8 bits ([7:0] bits). 01351 * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_GetBlueColor 01352 * @param DMA2Dx DMA2D Instance 01353 * @retval Blue color value between Min_Data=0 and Max_Data=0xFF 01354 */ 01355 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetBlueColor(DMA2D_TypeDef *DMA2Dx) 01356 { 01357 return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_BLUE)); 01358 } 01359 01360 /** 01361 * @brief Set DMA2D foreground CLUT memory address, expressed on 32 bits ([31:0] bits). 01362 * @rmtoll FGCMAR MA LL_DMA2D_FGND_SetCLUTMemAddr 01363 * @param DMA2Dx DMA2D Instance 01364 * @param CLUTMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF 01365 * @retval None 01366 */ 01367 __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress) 01368 { 01369 LL_DMA2D_WriteReg(DMA2Dx, FGCMAR, CLUTMemoryAddress); 01370 } 01371 01372 /** 01373 * @brief Get DMA2D foreground CLUT memory address, expressed on 32 bits ([31:0] bits). 01374 * @rmtoll FGCMAR MA LL_DMA2D_FGND_GetCLUTMemAddr 01375 * @param DMA2Dx DMA2D Instance 01376 * @retval Foreground CLUT memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF 01377 */ 01378 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx) 01379 { 01380 return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGCMAR)); 01381 } 01382 01383 /** 01384 * @brief Set DMA2D foreground CLUT size, expressed on 8 bits ([7:0] bits). 01385 * @rmtoll FGPFCCR CS LL_DMA2D_FGND_SetCLUTSize 01386 * @param DMA2Dx DMA2D Instance 01387 * @param CLUTSize Value between Min_Data=0 and Max_Data=0xFF 01388 * @retval None 01389 */ 01390 __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize) 01391 { 01392 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS, (CLUTSize << DMA2D_FGPFCCR_CS_Pos)); 01393 } 01394 01395 /** 01396 * @brief Get DMA2D foreground CLUT size, expressed on 8 bits ([7:0] bits). 01397 * @rmtoll FGPFCCR CS LL_DMA2D_FGND_GetCLUTSize 01398 * @param DMA2Dx DMA2D Instance 01399 * @retval Foreground CLUT size value between Min_Data=0 and Max_Data=0xFF 01400 */ 01401 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTSize(DMA2D_TypeDef *DMA2Dx) 01402 { 01403 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS) >> DMA2D_FGPFCCR_CS_Pos); 01404 } 01405 01406 /** 01407 * @brief Set DMA2D foreground CLUT color mode. 01408 * @rmtoll FGPFCCR CCM LL_DMA2D_FGND_SetCLUTColorMode 01409 * @param DMA2Dx DMA2D Instance 01410 * @param CLUTColorMode This parameter can be one of the following values: 01411 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888 01412 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888 01413 * @retval None 01414 */ 01415 __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode) 01416 { 01417 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CCM, CLUTColorMode); 01418 } 01419 01420 /** 01421 * @brief Return DMA2D foreground CLUT color mode. 01422 * @rmtoll FGPFCCR CCM LL_DMA2D_FGND_GetCLUTColorMode 01423 * @param DMA2Dx DMA2D Instance 01424 * @retval Returned value can be one of the following values: 01425 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888 01426 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888 01427 */ 01428 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx) 01429 { 01430 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CCM)); 01431 } 01432 01433 /** 01434 * @} 01435 */ 01436 01437 /** @defgroup DMA2D_LL_EF_BGND_Configuration Background Configuration Functions 01438 * @{ 01439 */ 01440 01441 /** 01442 * @brief Set DMA2D background memory address, expressed on 32 bits ([31:0] bits). 01443 * @rmtoll BGMAR MA LL_DMA2D_BGND_SetMemAddr 01444 * @param DMA2Dx DMA2D Instance 01445 * @param MemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF 01446 * @retval None 01447 */ 01448 __STATIC_INLINE void LL_DMA2D_BGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress) 01449 { 01450 LL_DMA2D_WriteReg(DMA2Dx, BGMAR, MemoryAddress); 01451 } 01452 01453 /** 01454 * @brief Get DMA2D background memory address, expressed on 32 bits ([31:0] bits). 01455 * @rmtoll BGMAR MA LL_DMA2D_BGND_GetMemAddr 01456 * @param DMA2Dx DMA2D Instance 01457 * @retval Background memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF 01458 */ 01459 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetMemAddr(DMA2D_TypeDef *DMA2Dx) 01460 { 01461 return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGMAR)); 01462 } 01463 01464 /** 01465 * @brief Enable DMA2D background CLUT loading. 01466 * @rmtoll BGPFCCR START LL_DMA2D_BGND_EnableCLUTLoad 01467 * @param DMA2Dx DMA2D Instance 01468 * @retval None 01469 */ 01470 __STATIC_INLINE void LL_DMA2D_BGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx) 01471 { 01472 SET_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_START); 01473 } 01474 01475 /** 01476 * @brief Indicate if DMA2D background CLUT loading is enabled. 01477 * @rmtoll BGPFCCR START LL_DMA2D_BGND_IsEnabledCLUTLoad 01478 * @param DMA2Dx DMA2D Instance 01479 * @retval State of bit (1 or 0). 01480 */ 01481 __STATIC_INLINE uint32_t LL_DMA2D_BGND_IsEnabledCLUTLoad(DMA2D_TypeDef *DMA2Dx) 01482 { 01483 return ((READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_START) == (DMA2D_BGPFCCR_START)) ? 1UL : 0UL); 01484 } 01485 01486 /** 01487 * @brief Set DMA2D background color mode. 01488 * @rmtoll BGPFCCR CM LL_DMA2D_BGND_SetColorMode 01489 * @param DMA2Dx DMA2D Instance 01490 * @param ColorMode This parameter can be one of the following values: 01491 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888 01492 * @arg @ref LL_DMA2D_INPUT_MODE_RGB888 01493 * @arg @ref LL_DMA2D_INPUT_MODE_RGB565 01494 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555 01495 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444 01496 * @arg @ref LL_DMA2D_INPUT_MODE_L8 01497 * @arg @ref LL_DMA2D_INPUT_MODE_AL44 01498 * @arg @ref LL_DMA2D_INPUT_MODE_AL88 01499 * @arg @ref LL_DMA2D_INPUT_MODE_L4 01500 * @arg @ref LL_DMA2D_INPUT_MODE_A8 01501 * @arg @ref LL_DMA2D_INPUT_MODE_A4 01502 * @retval None 01503 */ 01504 __STATIC_INLINE void LL_DMA2D_BGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode) 01505 { 01506 MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CM, ColorMode); 01507 } 01508 01509 /** 01510 * @brief Return DMA2D background color mode. 01511 * @rmtoll BGPFCCR CM LL_DMA2D_BGND_GetColorMode 01512 * @param DMA2Dx DMA2D Instance 01513 * @retval Returned value can be one of the following values: 01514 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888 01515 * @arg @ref LL_DMA2D_INPUT_MODE_RGB888 01516 * @arg @ref LL_DMA2D_INPUT_MODE_RGB565 01517 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555 01518 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444 01519 * @arg @ref LL_DMA2D_INPUT_MODE_L8 01520 * @arg @ref LL_DMA2D_INPUT_MODE_AL44 01521 * @arg @ref LL_DMA2D_INPUT_MODE_AL88 01522 * @arg @ref LL_DMA2D_INPUT_MODE_L4 01523 * @arg @ref LL_DMA2D_INPUT_MODE_A8 01524 * @arg @ref LL_DMA2D_INPUT_MODE_A4 01525 */ 01526 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetColorMode(DMA2D_TypeDef *DMA2Dx) 01527 { 01528 return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CM)); 01529 } 01530 01531 /** 01532 * @brief Set DMA2D background alpha mode. 01533 * @rmtoll BGPFCCR AM LL_DMA2D_BGND_SetAlphaMode 01534 * @param DMA2Dx DMA2D Instance 01535 * @param AphaMode This parameter can be one of the following values: 01536 * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF 01537 * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE 01538 * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE 01539 * @retval None 01540 */ 01541 __STATIC_INLINE void LL_DMA2D_BGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode) 01542 { 01543 MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AM, AphaMode); 01544 } 01545 01546 /** 01547 * @brief Return DMA2D background alpha mode. 01548 * @rmtoll BGPFCCR AM LL_DMA2D_BGND_GetAlphaMode 01549 * @param DMA2Dx DMA2D Instance 01550 * @retval Returned value can be one of the following values: 01551 * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF 01552 * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE 01553 * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE 01554 */ 01555 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlphaMode(DMA2D_TypeDef *DMA2Dx) 01556 { 01557 return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AM)); 01558 } 01559 01560 /** 01561 * @brief Set DMA2D background alpha value, expressed on 8 bits ([7:0] bits). 01562 * @rmtoll BGPFCCR ALPHA LL_DMA2D_BGND_SetAlpha 01563 * @param DMA2Dx DMA2D Instance 01564 * @param Alpha Value between Min_Data=0 and Max_Data=0xFF 01565 * @retval None 01566 */ 01567 __STATIC_INLINE void LL_DMA2D_BGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alpha) 01568 { 01569 MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_ALPHA, (Alpha << DMA2D_BGPFCCR_ALPHA_Pos)); 01570 } 01571 01572 /** 01573 * @brief Return DMA2D background alpha value, expressed on 8 bits ([7:0] bits). 01574 * @rmtoll BGPFCCR ALPHA LL_DMA2D_BGND_GetAlpha 01575 * @param DMA2Dx DMA2D Instance 01576 * @retval Alpha value between Min_Data=0 and Max_Data=0xFF 01577 */ 01578 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlpha(DMA2D_TypeDef *DMA2Dx) 01579 { 01580 return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_ALPHA) >> DMA2D_BGPFCCR_ALPHA_Pos); 01581 } 01582 01583 /** 01584 * @brief Set DMA2D background Red Blue swap mode. 01585 * @rmtoll BGPFCCR RBS LL_DMA2D_BGND_SetRBSwapMode 01586 * @param DMA2Dx DMA2D Instance 01587 * @param RBSwapMode This parameter can be one of the following values: 01588 * @arg @ref LL_DMA2D_RB_MODE_REGULAR 01589 * @arg @ref LL_DMA2D_RB_MODE_SWAP 01590 * @retval None 01591 */ 01592 __STATIC_INLINE void LL_DMA2D_BGND_SetRBSwapMode(DMA2D_TypeDef *DMA2Dx, uint32_t RBSwapMode) 01593 { 01594 MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_RBS, RBSwapMode); 01595 } 01596 01597 /** 01598 * @brief Return DMA2D background Red Blue swap mode. 01599 * @rmtoll BGPFCCR RBS LL_DMA2D_BGND_GetRBSwapMode 01600 * @param DMA2Dx DMA2D Instance 01601 * @retval Returned value can be one of the following values: 01602 * @arg @ref LL_DMA2D_RB_MODE_REGULAR 01603 * @arg @ref LL_DMA2D_RB_MODE_SWAP 01604 */ 01605 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetRBSwapMode(DMA2D_TypeDef *DMA2Dx) 01606 { 01607 return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_RBS)); 01608 } 01609 01610 /** 01611 * @brief Set DMA2D background alpha inversion mode. 01612 * @rmtoll BGPFCCR AI LL_DMA2D_BGND_SetAlphaInvMode 01613 * @param DMA2Dx DMA2D Instance 01614 * @param AlphaInversionMode This parameter can be one of the following values: 01615 * @arg @ref LL_DMA2D_ALPHA_REGULAR 01616 * @arg @ref LL_DMA2D_ALPHA_INVERTED 01617 * @retval None 01618 */ 01619 __STATIC_INLINE void LL_DMA2D_BGND_SetAlphaInvMode(DMA2D_TypeDef *DMA2Dx, uint32_t AlphaInversionMode) 01620 { 01621 MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AI, AlphaInversionMode); 01622 } 01623 01624 /** 01625 * @brief Return DMA2D background alpha inversion mode. 01626 * @rmtoll BGPFCCR AI LL_DMA2D_BGND_GetAlphaInvMode 01627 * @param DMA2Dx DMA2D Instance 01628 * @retval Returned value can be one of the following values: 01629 * @arg @ref LL_DMA2D_ALPHA_REGULAR 01630 * @arg @ref LL_DMA2D_ALPHA_INVERTED 01631 */ 01632 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlphaInvMode(DMA2D_TypeDef *DMA2Dx) 01633 { 01634 return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AI)); 01635 } 01636 01637 /** 01638 * @brief Set DMA2D background line offset, expressed on 14 bits ([13:0] bits). 01639 * @rmtoll BGOR LO LL_DMA2D_BGND_SetLineOffset 01640 * @param DMA2Dx DMA2D Instance 01641 * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FF 01642 * @retval None 01643 */ 01644 __STATIC_INLINE void LL_DMA2D_BGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset) 01645 { 01646 MODIFY_REG(DMA2Dx->BGOR, DMA2D_BGOR_LO, LineOffset); 01647 } 01648 01649 /** 01650 * @brief Return DMA2D background line offset, expressed on 14 bits ([13:0] bits). 01651 * @rmtoll BGOR LO LL_DMA2D_BGND_GetLineOffset 01652 * @param DMA2Dx DMA2D Instance 01653 * @retval Background line offset value between Min_Data=0 and Max_Data=0x3FF 01654 */ 01655 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetLineOffset(DMA2D_TypeDef *DMA2Dx) 01656 { 01657 return (uint32_t)(READ_BIT(DMA2Dx->BGOR, DMA2D_BGOR_LO)); 01658 } 01659 01660 /** 01661 * @brief Set DMA2D background color values, expressed on 24 bits ([23:0] bits). 01662 * @rmtoll BGCOLR RED LL_DMA2D_BGND_SetColor 01663 * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_SetColor 01664 * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_SetColor 01665 * @param DMA2Dx DMA2D Instance 01666 * @param Red Value between Min_Data=0 and Max_Data=0xFF 01667 * @param Green Value between Min_Data=0 and Max_Data=0xFF 01668 * @param Blue Value between Min_Data=0 and Max_Data=0xFF 01669 * @retval None 01670 */ 01671 __STATIC_INLINE void LL_DMA2D_BGND_SetColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue) 01672 { 01673 MODIFY_REG(DMA2Dx->BGCOLR, (DMA2D_BGCOLR_RED | DMA2D_BGCOLR_GREEN | DMA2D_BGCOLR_BLUE), \ 01674 ((Red << DMA2D_BGCOLR_RED_Pos) | (Green << DMA2D_BGCOLR_GREEN_Pos) | Blue)); 01675 } 01676 01677 /** 01678 * @brief Set DMA2D background red color value, expressed on 8 bits ([7:0] bits). 01679 * @rmtoll BGCOLR RED LL_DMA2D_BGND_SetRedColor 01680 * @param DMA2Dx DMA2D Instance 01681 * @param Red Value between Min_Data=0 and Max_Data=0xFF 01682 * @retval None 01683 */ 01684 __STATIC_INLINE void LL_DMA2D_BGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red) 01685 { 01686 MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_RED, (Red << DMA2D_BGCOLR_RED_Pos)); 01687 } 01688 01689 /** 01690 * @brief Return DMA2D background red color value, expressed on 8 bits ([7:0] bits). 01691 * @rmtoll BGCOLR RED LL_DMA2D_BGND_GetRedColor 01692 * @param DMA2Dx DMA2D Instance 01693 * @retval Red color value between Min_Data=0 and Max_Data=0xFF 01694 */ 01695 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetRedColor(DMA2D_TypeDef *DMA2Dx) 01696 { 01697 return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_RED) >> DMA2D_BGCOLR_RED_Pos); 01698 } 01699 01700 /** 01701 * @brief Set DMA2D background green color value, expressed on 8 bits ([7:0] bits). 01702 * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_SetGreenColor 01703 * @param DMA2Dx DMA2D Instance 01704 * @param Green Value between Min_Data=0 and Max_Data=0xFF 01705 * @retval None 01706 */ 01707 __STATIC_INLINE void LL_DMA2D_BGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t Green) 01708 { 01709 MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_GREEN, (Green << DMA2D_BGCOLR_GREEN_Pos)); 01710 } 01711 01712 /** 01713 * @brief Return DMA2D background green color value, expressed on 8 bits ([7:0] bits). 01714 * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_GetGreenColor 01715 * @param DMA2Dx DMA2D Instance 01716 * @retval Green color value between Min_Data=0 and Max_Data=0xFF 01717 */ 01718 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetGreenColor(DMA2D_TypeDef *DMA2Dx) 01719 { 01720 return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_GREEN) >> DMA2D_BGCOLR_GREEN_Pos); 01721 } 01722 01723 /** 01724 * @brief Set DMA2D background blue color value, expressed on 8 bits ([7:0] bits). 01725 * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_SetBlueColor 01726 * @param DMA2Dx DMA2D Instance 01727 * @param Blue Value between Min_Data=0 and Max_Data=0xFF 01728 * @retval None 01729 */ 01730 __STATIC_INLINE void LL_DMA2D_BGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t Blue) 01731 { 01732 MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_BLUE, Blue); 01733 } 01734 01735 /** 01736 * @brief Return DMA2D background blue color value, expressed on 8 bits ([7:0] bits). 01737 * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_GetBlueColor 01738 * @param DMA2Dx DMA2D Instance 01739 * @retval Blue color value between Min_Data=0 and Max_Data=0xFF 01740 */ 01741 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetBlueColor(DMA2D_TypeDef *DMA2Dx) 01742 { 01743 return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_BLUE)); 01744 } 01745 01746 /** 01747 * @brief Set DMA2D background CLUT memory address, expressed on 32 bits ([31:0] bits). 01748 * @rmtoll BGCMAR MA LL_DMA2D_BGND_SetCLUTMemAddr 01749 * @param DMA2Dx DMA2D Instance 01750 * @param CLUTMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF 01751 * @retval None 01752 */ 01753 __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress) 01754 { 01755 LL_DMA2D_WriteReg(DMA2Dx, BGCMAR, CLUTMemoryAddress); 01756 } 01757 01758 /** 01759 * @brief Get DMA2D background CLUT memory address, expressed on 32 bits ([31:0] bits). 01760 * @rmtoll BGCMAR MA LL_DMA2D_BGND_GetCLUTMemAddr 01761 * @param DMA2Dx DMA2D Instance 01762 * @retval Background CLUT memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF 01763 */ 01764 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx) 01765 { 01766 return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGCMAR)); 01767 } 01768 01769 /** 01770 * @brief Set DMA2D background CLUT size, expressed on 8 bits ([7:0] bits). 01771 * @rmtoll BGPFCCR CS LL_DMA2D_BGND_SetCLUTSize 01772 * @param DMA2Dx DMA2D Instance 01773 * @param CLUTSize Value between Min_Data=0 and Max_Data=0xFF 01774 * @retval None 01775 */ 01776 __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize) 01777 { 01778 MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CS, (CLUTSize << DMA2D_BGPFCCR_CS_Pos)); 01779 } 01780 01781 /** 01782 * @brief Get DMA2D background CLUT size, expressed on 8 bits ([7:0] bits). 01783 * @rmtoll BGPFCCR CS LL_DMA2D_BGND_GetCLUTSize 01784 * @param DMA2Dx DMA2D Instance 01785 * @retval Background CLUT size value between Min_Data=0 and Max_Data=0xFF 01786 */ 01787 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTSize(DMA2D_TypeDef *DMA2Dx) 01788 { 01789 return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CS) >> DMA2D_BGPFCCR_CS_Pos); 01790 } 01791 01792 /** 01793 * @brief Set DMA2D background CLUT color mode. 01794 * @rmtoll BGPFCCR CCM LL_DMA2D_BGND_SetCLUTColorMode 01795 * @param DMA2Dx DMA2D Instance 01796 * @param CLUTColorMode This parameter can be one of the following values: 01797 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888 01798 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888 01799 * @retval None 01800 */ 01801 __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode) 01802 { 01803 MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CCM, CLUTColorMode); 01804 } 01805 01806 /** 01807 * @brief Return DMA2D background CLUT color mode. 01808 * @rmtoll BGPFCCR CCM LL_DMA2D_BGND_GetCLUTColorMode 01809 * @param DMA2Dx DMA2D Instance 01810 * @retval Returned value can be one of the following values: 01811 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888 01812 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888 01813 */ 01814 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx) 01815 { 01816 return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CCM)); 01817 } 01818 01819 /** 01820 * @} 01821 */ 01822 01823 /** 01824 * @} 01825 */ 01826 01827 01828 /** @defgroup DMA2D_LL_EF_FLAG_MANAGEMENT Flag Management 01829 * @{ 01830 */ 01831 01832 /** 01833 * @brief Check if the DMA2D Configuration Error Interrupt Flag is set or not 01834 * @rmtoll ISR CEIF LL_DMA2D_IsActiveFlag_CE 01835 * @param DMA2Dx DMA2D Instance 01836 * @retval State of bit (1 or 0). 01837 */ 01838 __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CE(DMA2D_TypeDef *DMA2Dx) 01839 { 01840 return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CEIF) == (DMA2D_ISR_CEIF)) ? 1UL : 0UL); 01841 } 01842 01843 /** 01844 * @brief Check if the DMA2D CLUT Transfer Complete Interrupt Flag is set or not 01845 * @rmtoll ISR CTCIF LL_DMA2D_IsActiveFlag_CTC 01846 * @param DMA2Dx DMA2D Instance 01847 * @retval State of bit (1 or 0). 01848 */ 01849 __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CTC(DMA2D_TypeDef *DMA2Dx) 01850 { 01851 return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CTCIF) == (DMA2D_ISR_CTCIF)) ? 1UL : 0UL); 01852 } 01853 01854 /** 01855 * @brief Check if the DMA2D CLUT Access Error Interrupt Flag is set or not 01856 * @rmtoll ISR CAEIF LL_DMA2D_IsActiveFlag_CAE 01857 * @param DMA2Dx DMA2D Instance 01858 * @retval State of bit (1 or 0). 01859 */ 01860 __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CAE(DMA2D_TypeDef *DMA2Dx) 01861 { 01862 return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CAEIF) == (DMA2D_ISR_CAEIF)) ? 1UL : 0UL); 01863 } 01864 01865 /** 01866 * @brief Check if the DMA2D Transfer Watermark Interrupt Flag is set or not 01867 * @rmtoll ISR TWIF LL_DMA2D_IsActiveFlag_TW 01868 * @param DMA2Dx DMA2D Instance 01869 * @retval State of bit (1 or 0). 01870 */ 01871 __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TW(DMA2D_TypeDef *DMA2Dx) 01872 { 01873 return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TWIF) == (DMA2D_ISR_TWIF)) ? 1UL : 0UL); 01874 } 01875 01876 /** 01877 * @brief Check if the DMA2D Transfer Complete Interrupt Flag is set or not 01878 * @rmtoll ISR TCIF LL_DMA2D_IsActiveFlag_TC 01879 * @param DMA2Dx DMA2D Instance 01880 * @retval State of bit (1 or 0). 01881 */ 01882 __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TC(DMA2D_TypeDef *DMA2Dx) 01883 { 01884 return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TCIF) == (DMA2D_ISR_TCIF)) ? 1UL : 0UL); 01885 } 01886 01887 /** 01888 * @brief Check if the DMA2D Transfer Error Interrupt Flag is set or not 01889 * @rmtoll ISR TEIF LL_DMA2D_IsActiveFlag_TE 01890 * @param DMA2Dx DMA2D Instance 01891 * @retval State of bit (1 or 0). 01892 */ 01893 __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TE(DMA2D_TypeDef *DMA2Dx) 01894 { 01895 return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TEIF) == (DMA2D_ISR_TEIF)) ? 1UL : 0UL); 01896 } 01897 01898 /** 01899 * @brief Clear DMA2D Configuration Error Interrupt Flag 01900 * @rmtoll IFCR CCEIF LL_DMA2D_ClearFlag_CE 01901 * @param DMA2Dx DMA2D Instance 01902 * @retval None 01903 */ 01904 __STATIC_INLINE void LL_DMA2D_ClearFlag_CE(DMA2D_TypeDef *DMA2Dx) 01905 { 01906 WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CCEIF); 01907 } 01908 01909 /** 01910 * @brief Clear DMA2D CLUT Transfer Complete Interrupt Flag 01911 * @rmtoll IFCR CCTCIF LL_DMA2D_ClearFlag_CTC 01912 * @param DMA2Dx DMA2D Instance 01913 * @retval None 01914 */ 01915 __STATIC_INLINE void LL_DMA2D_ClearFlag_CTC(DMA2D_TypeDef *DMA2Dx) 01916 { 01917 WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CCTCIF); 01918 } 01919 01920 /** 01921 * @brief Clear DMA2D CLUT Access Error Interrupt Flag 01922 * @rmtoll IFCR CAECIF LL_DMA2D_ClearFlag_CAE 01923 * @param DMA2Dx DMA2D Instance 01924 * @retval None 01925 */ 01926 __STATIC_INLINE void LL_DMA2D_ClearFlag_CAE(DMA2D_TypeDef *DMA2Dx) 01927 { 01928 WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CAECIF); 01929 } 01930 01931 /** 01932 * @brief Clear DMA2D Transfer Watermark Interrupt Flag 01933 * @rmtoll IFCR CTWIF LL_DMA2D_ClearFlag_TW 01934 * @param DMA2Dx DMA2D Instance 01935 * @retval None 01936 */ 01937 __STATIC_INLINE void LL_DMA2D_ClearFlag_TW(DMA2D_TypeDef *DMA2Dx) 01938 { 01939 WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTWIF); 01940 } 01941 01942 /** 01943 * @brief Clear DMA2D Transfer Complete Interrupt Flag 01944 * @rmtoll IFCR CTCIF LL_DMA2D_ClearFlag_TC 01945 * @param DMA2Dx DMA2D Instance 01946 * @retval None 01947 */ 01948 __STATIC_INLINE void LL_DMA2D_ClearFlag_TC(DMA2D_TypeDef *DMA2Dx) 01949 { 01950 WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTCIF); 01951 } 01952 01953 /** 01954 * @brief Clear DMA2D Transfer Error Interrupt Flag 01955 * @rmtoll IFCR CTEIF LL_DMA2D_ClearFlag_TE 01956 * @param DMA2Dx DMA2D Instance 01957 * @retval None 01958 */ 01959 __STATIC_INLINE void LL_DMA2D_ClearFlag_TE(DMA2D_TypeDef *DMA2Dx) 01960 { 01961 WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTEIF); 01962 } 01963 01964 /** 01965 * @} 01966 */ 01967 01968 /** @defgroup DMA2D_LL_EF_IT_MANAGEMENT Interruption Management 01969 * @{ 01970 */ 01971 01972 /** 01973 * @brief Enable Configuration Error Interrupt 01974 * @rmtoll CR CEIE LL_DMA2D_EnableIT_CE 01975 * @param DMA2Dx DMA2D Instance 01976 * @retval None 01977 */ 01978 __STATIC_INLINE void LL_DMA2D_EnableIT_CE(DMA2D_TypeDef *DMA2Dx) 01979 { 01980 SET_BIT(DMA2Dx->CR, DMA2D_CR_CEIE); 01981 } 01982 01983 /** 01984 * @brief Enable CLUT Transfer Complete Interrupt 01985 * @rmtoll CR CTCIE LL_DMA2D_EnableIT_CTC 01986 * @param DMA2Dx DMA2D Instance 01987 * @retval None 01988 */ 01989 __STATIC_INLINE void LL_DMA2D_EnableIT_CTC(DMA2D_TypeDef *DMA2Dx) 01990 { 01991 SET_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE); 01992 } 01993 01994 /** 01995 * @brief Enable CLUT Access Error Interrupt 01996 * @rmtoll CR CAEIE LL_DMA2D_EnableIT_CAE 01997 * @param DMA2Dx DMA2D Instance 01998 * @retval None 01999 */ 02000 __STATIC_INLINE void LL_DMA2D_EnableIT_CAE(DMA2D_TypeDef *DMA2Dx) 02001 { 02002 SET_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE); 02003 } 02004 02005 /** 02006 * @brief Enable Transfer Watermark Interrupt 02007 * @rmtoll CR TWIE LL_DMA2D_EnableIT_TW 02008 * @param DMA2Dx DMA2D Instance 02009 * @retval None 02010 */ 02011 __STATIC_INLINE void LL_DMA2D_EnableIT_TW(DMA2D_TypeDef *DMA2Dx) 02012 { 02013 SET_BIT(DMA2Dx->CR, DMA2D_CR_TWIE); 02014 } 02015 02016 /** 02017 * @brief Enable Transfer Complete Interrupt 02018 * @rmtoll CR TCIE LL_DMA2D_EnableIT_TC 02019 * @param DMA2Dx DMA2D Instance 02020 * @retval None 02021 */ 02022 __STATIC_INLINE void LL_DMA2D_EnableIT_TC(DMA2D_TypeDef *DMA2Dx) 02023 { 02024 SET_BIT(DMA2Dx->CR, DMA2D_CR_TCIE); 02025 } 02026 02027 /** 02028 * @brief Enable Transfer Error Interrupt 02029 * @rmtoll CR TEIE LL_DMA2D_EnableIT_TE 02030 * @param DMA2Dx DMA2D Instance 02031 * @retval None 02032 */ 02033 __STATIC_INLINE void LL_DMA2D_EnableIT_TE(DMA2D_TypeDef *DMA2Dx) 02034 { 02035 SET_BIT(DMA2Dx->CR, DMA2D_CR_TEIE); 02036 } 02037 02038 /** 02039 * @brief Disable Configuration Error Interrupt 02040 * @rmtoll CR CEIE LL_DMA2D_DisableIT_CE 02041 * @param DMA2Dx DMA2D Instance 02042 * @retval None 02043 */ 02044 __STATIC_INLINE void LL_DMA2D_DisableIT_CE(DMA2D_TypeDef *DMA2Dx) 02045 { 02046 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CEIE); 02047 } 02048 02049 /** 02050 * @brief Disable CLUT Transfer Complete Interrupt 02051 * @rmtoll CR CTCIE LL_DMA2D_DisableIT_CTC 02052 * @param DMA2Dx DMA2D Instance 02053 * @retval None 02054 */ 02055 __STATIC_INLINE void LL_DMA2D_DisableIT_CTC(DMA2D_TypeDef *DMA2Dx) 02056 { 02057 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE); 02058 } 02059 02060 /** 02061 * @brief Disable CLUT Access Error Interrupt 02062 * @rmtoll CR CAEIE LL_DMA2D_DisableIT_CAE 02063 * @param DMA2Dx DMA2D Instance 02064 * @retval None 02065 */ 02066 __STATIC_INLINE void LL_DMA2D_DisableIT_CAE(DMA2D_TypeDef *DMA2Dx) 02067 { 02068 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE); 02069 } 02070 02071 /** 02072 * @brief Disable Transfer Watermark Interrupt 02073 * @rmtoll CR TWIE LL_DMA2D_DisableIT_TW 02074 * @param DMA2Dx DMA2D Instance 02075 * @retval None 02076 */ 02077 __STATIC_INLINE void LL_DMA2D_DisableIT_TW(DMA2D_TypeDef *DMA2Dx) 02078 { 02079 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TWIE); 02080 } 02081 02082 /** 02083 * @brief Disable Transfer Complete Interrupt 02084 * @rmtoll CR TCIE LL_DMA2D_DisableIT_TC 02085 * @param DMA2Dx DMA2D Instance 02086 * @retval None 02087 */ 02088 __STATIC_INLINE void LL_DMA2D_DisableIT_TC(DMA2D_TypeDef *DMA2Dx) 02089 { 02090 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TCIE); 02091 } 02092 02093 /** 02094 * @brief Disable Transfer Error Interrupt 02095 * @rmtoll CR TEIE LL_DMA2D_DisableIT_TE 02096 * @param DMA2Dx DMA2D Instance 02097 * @retval None 02098 */ 02099 __STATIC_INLINE void LL_DMA2D_DisableIT_TE(DMA2D_TypeDef *DMA2Dx) 02100 { 02101 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TEIE); 02102 } 02103 02104 /** 02105 * @brief Check if the DMA2D Configuration Error interrupt source is enabled or disabled. 02106 * @rmtoll CR CEIE LL_DMA2D_IsEnabledIT_CE 02107 * @param DMA2Dx DMA2D Instance 02108 * @retval State of bit (1 or 0). 02109 */ 02110 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CE(DMA2D_TypeDef *DMA2Dx) 02111 { 02112 return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_CEIE) == (DMA2D_CR_CEIE)) ? 1UL : 0UL); 02113 } 02114 02115 /** 02116 * @brief Check if the DMA2D CLUT Transfer Complete interrupt source is enabled or disabled. 02117 * @rmtoll CR CTCIE LL_DMA2D_IsEnabledIT_CTC 02118 * @param DMA2Dx DMA2D Instance 02119 * @retval State of bit (1 or 0). 02120 */ 02121 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CTC(DMA2D_TypeDef *DMA2Dx) 02122 { 02123 return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE) == (DMA2D_CR_CTCIE)) ? 1UL : 0UL); 02124 } 02125 02126 /** 02127 * @brief Check if the DMA2D CLUT Access Error interrupt source is enabled or disabled. 02128 * @rmtoll CR CAEIE LL_DMA2D_IsEnabledIT_CAE 02129 * @param DMA2Dx DMA2D Instance 02130 * @retval State of bit (1 or 0). 02131 */ 02132 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CAE(DMA2D_TypeDef *DMA2Dx) 02133 { 02134 return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE) == (DMA2D_CR_CAEIE)) ? 1UL : 0UL); 02135 } 02136 02137 /** 02138 * @brief Check if the DMA2D Transfer Watermark interrupt source is enabled or disabled. 02139 * @rmtoll CR TWIE LL_DMA2D_IsEnabledIT_TW 02140 * @param DMA2Dx DMA2D Instance 02141 * @retval State of bit (1 or 0). 02142 */ 02143 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TW(DMA2D_TypeDef *DMA2Dx) 02144 { 02145 return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TWIE) == (DMA2D_CR_TWIE)) ? 1UL : 0UL); 02146 } 02147 02148 /** 02149 * @brief Check if the DMA2D Transfer Complete interrupt source is enabled or disabled. 02150 * @rmtoll CR TCIE LL_DMA2D_IsEnabledIT_TC 02151 * @param DMA2Dx DMA2D Instance 02152 * @retval State of bit (1 or 0). 02153 */ 02154 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TC(DMA2D_TypeDef *DMA2Dx) 02155 { 02156 return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TCIE) == (DMA2D_CR_TCIE)) ? 1UL : 0UL); 02157 } 02158 02159 /** 02160 * @brief Check if the DMA2D Transfer Error interrupt source is enabled or disabled. 02161 * @rmtoll CR TEIE LL_DMA2D_IsEnabledIT_TE 02162 * @param DMA2Dx DMA2D Instance 02163 * @retval State of bit (1 or 0). 02164 */ 02165 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TE(DMA2D_TypeDef *DMA2Dx) 02166 { 02167 return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TEIE) == (DMA2D_CR_TEIE)) ? 1UL : 0UL); 02168 } 02169 02170 02171 02172 /** 02173 * @} 02174 */ 02175 02176 #if defined(USE_FULL_LL_DRIVER) 02177 /** @defgroup DMA2D_LL_EF_Init_Functions Initialization and De-initialization Functions 02178 * @{ 02179 */ 02180 02181 ErrorStatus LL_DMA2D_DeInit(DMA2D_TypeDef *DMA2Dx); 02182 ErrorStatus LL_DMA2D_Init(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_InitTypeDef *DMA2D_InitStruct); 02183 void LL_DMA2D_StructInit(LL_DMA2D_InitTypeDef *DMA2D_InitStruct); 02184 void LL_DMA2D_ConfigLayer(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg, uint32_t LayerIdx); 02185 void LL_DMA2D_LayerCfgStructInit(LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg); 02186 void LL_DMA2D_ConfigOutputColor(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_ColorTypeDef *DMA2D_ColorStruct); 02187 uint32_t LL_DMA2D_GetOutputBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode); 02188 uint32_t LL_DMA2D_GetOutputGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode); 02189 uint32_t LL_DMA2D_GetOutputRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode); 02190 uint32_t LL_DMA2D_GetOutputAlphaColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode); 02191 void LL_DMA2D_ConfigSize(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines, uint32_t NbrOfPixelsPerLines); 02192 02193 /** 02194 * @} 02195 */ 02196 #endif /* USE_FULL_LL_DRIVER */ 02197 02198 /** 02199 * @} 02200 */ 02201 02202 /** 02203 * @} 02204 */ 02205 02206 #endif /* defined (DMA2D) */ 02207 02208 /** 02209 * @} 02210 */ 02211 02212 #ifdef __cplusplus 02213 } 02214 #endif 02215 02216 #endif /* STM32L4xx_LL_DMA2D_H */
1.7.6.1