STM32L443xx HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32l4xx_ll_dmamux.h 00004 * @author MCD Application Team 00005 * @brief Header file of DMAMUX LL module. 00006 ****************************************************************************** 00007 * @attention 00008 * 00009 * Copyright (c) 2017 STMicroelectronics. 00010 * All rights reserved. 00011 * 00012 * This software is licensed under terms that can be found in the LICENSE file 00013 * in the root directory of this software component. 00014 * If no LICENSE file comes with this software, it is provided AS-IS. 00015 * 00016 ****************************************************************************** 00017 */ 00018 00019 /* Define to prevent recursive inclusion -------------------------------------*/ 00020 #ifndef STM32L4xx_LL_DMAMUX_H 00021 #define STM32L4xx_LL_DMAMUX_H 00022 00023 #ifdef __cplusplus 00024 extern "C" { 00025 #endif 00026 00027 /* Includes ------------------------------------------------------------------*/ 00028 #include "stm32l4xx.h" 00029 00030 /** @addtogroup STM32L4xx_LL_Driver 00031 * @{ 00032 */ 00033 00034 #if defined (DMAMUX1) 00035 00036 /** @defgroup DMAMUX_LL DMAMUX 00037 * @{ 00038 */ 00039 00040 /* Private types -------------------------------------------------------------*/ 00041 /* Private variables ---------------------------------------------------------*/ 00042 /* Private constants ---------------------------------------------------------*/ 00043 /** @defgroup DMAMUX_LL_Private_Constants DMAMUX Private Constants 00044 * @{ 00045 */ 00046 /* Define used to get DMAMUX CCR register size */ 00047 #define DMAMUX_CCR_SIZE 0x00000004UL 00048 00049 /* Define used to get DMAMUX RGCR register size */ 00050 #define DMAMUX_RGCR_SIZE 0x00000004UL 00051 /** 00052 * @} 00053 */ 00054 00055 /* Private macros ------------------------------------------------------------*/ 00056 /* Exported types ------------------------------------------------------------*/ 00057 /* Exported constants --------------------------------------------------------*/ 00058 /** @defgroup DMAMUX_LL_Exported_Constants DMAMUX Exported Constants 00059 * @{ 00060 */ 00061 /** @defgroup DMAMUX_LL_EC_CLEAR_FLAG Clear Flags Defines 00062 * @brief Flags defines which can be used with LL_DMAMUX_WriteReg function 00063 * @{ 00064 */ 00065 #define LL_DMAMUX_CFR_CSOF0 DMAMUX_CFR_CSOF0 /*!< Synchronization Event Overrun Flag Channel 0 */ 00066 #define LL_DMAMUX_CFR_CSOF1 DMAMUX_CFR_CSOF1 /*!< Synchronization Event Overrun Flag Channel 1 */ 00067 #define LL_DMAMUX_CFR_CSOF2 DMAMUX_CFR_CSOF2 /*!< Synchronization Event Overrun Flag Channel 2 */ 00068 #define LL_DMAMUX_CFR_CSOF3 DMAMUX_CFR_CSOF3 /*!< Synchronization Event Overrun Flag Channel 3 */ 00069 #define LL_DMAMUX_CFR_CSOF4 DMAMUX_CFR_CSOF4 /*!< Synchronization Event Overrun Flag Channel 4 */ 00070 #define LL_DMAMUX_CFR_CSOF5 DMAMUX_CFR_CSOF5 /*!< Synchronization Event Overrun Flag Channel 5 */ 00071 #define LL_DMAMUX_CFR_CSOF6 DMAMUX_CFR_CSOF6 /*!< Synchronization Event Overrun Flag Channel 6 */ 00072 #define LL_DMAMUX_CFR_CSOF7 DMAMUX_CFR_CSOF7 /*!< Synchronization Event Overrun Flag Channel 7 */ 00073 #define LL_DMAMUX_CFR_CSOF8 DMAMUX_CFR_CSOF8 /*!< Synchronization Event Overrun Flag Channel 8 */ 00074 #define LL_DMAMUX_CFR_CSOF9 DMAMUX_CFR_CSOF9 /*!< Synchronization Event Overrun Flag Channel 9 */ 00075 #define LL_DMAMUX_CFR_CSOF10 DMAMUX_CFR_CSOF10 /*!< Synchronization Event Overrun Flag Channel 10 */ 00076 #define LL_DMAMUX_CFR_CSOF11 DMAMUX_CFR_CSOF11 /*!< Synchronization Event Overrun Flag Channel 11 */ 00077 #define LL_DMAMUX_CFR_CSOF12 DMAMUX_CFR_CSOF12 /*!< Synchronization Event Overrun Flag Channel 12 */ 00078 #define LL_DMAMUX_CFR_CSOF13 DMAMUX_CFR_CSOF13 /*!< Synchronization Event Overrun Flag Channel 13 */ 00079 #define LL_DMAMUX_RGCFR_RGCOF0 DMAMUX_RGCFR_COF0 /*!< Request Generator 0 Trigger Event Overrun Flag */ 00080 #define LL_DMAMUX_RGCFR_RGCOF1 DMAMUX_RGCFR_COF1 /*!< Request Generator 1 Trigger Event Overrun Flag */ 00081 #define LL_DMAMUX_RGCFR_RGCOF2 DMAMUX_RGCFR_COF2 /*!< Request Generator 2 Trigger Event Overrun Flag */ 00082 #define LL_DMAMUX_RGCFR_RGCOF3 DMAMUX_RGCFR_COF3 /*!< Request Generator 3 Trigger Event Overrun Flag */ 00083 /** 00084 * @} 00085 */ 00086 00087 /** @defgroup DMAMUX_LL_EC_GET_FLAG Get Flags Defines 00088 * @brief Flags defines which can be used with LL_DMAMUX_ReadReg function 00089 * @{ 00090 */ 00091 #define LL_DMAMUX_CSR_SOF0 DMAMUX_CSR_SOF0 /*!< Synchronization Event Overrun Flag Channel 0 */ 00092 #define LL_DMAMUX_CSR_SOF1 DMAMUX_CSR_SOF1 /*!< Synchronization Event Overrun Flag Channel 1 */ 00093 #define LL_DMAMUX_CSR_SOF2 DMAMUX_CSR_SOF2 /*!< Synchronization Event Overrun Flag Channel 2 */ 00094 #define LL_DMAMUX_CSR_SOF3 DMAMUX_CSR_SOF3 /*!< Synchronization Event Overrun Flag Channel 3 */ 00095 #define LL_DMAMUX_CSR_SOF4 DMAMUX_CSR_SOF4 /*!< Synchronization Event Overrun Flag Channel 4 */ 00096 #define LL_DMAMUX_CSR_SOF5 DMAMUX_CSR_SOF5 /*!< Synchronization Event Overrun Flag Channel 5 */ 00097 #define LL_DMAMUX_CSR_SOF6 DMAMUX_CSR_SOF6 /*!< Synchronization Event Overrun Flag Channel 6 */ 00098 #define LL_DMAMUX_CSR_SOF7 DMAMUX_CSR_SOF7 /*!< Synchronization Event Overrun Flag Channel 7 */ 00099 #define LL_DMAMUX_CSR_SOF8 DMAMUX_CSR_SOF8 /*!< Synchronization Event Overrun Flag Channel 8 */ 00100 #define LL_DMAMUX_CSR_SOF9 DMAMUX_CSR_SOF9 /*!< Synchronization Event Overrun Flag Channel 9 */ 00101 #define LL_DMAMUX_CSR_SOF10 DMAMUX_CSR_SOF10 /*!< Synchronization Event Overrun Flag Channel 10 */ 00102 #define LL_DMAMUX_CSR_SOF11 DMAMUX_CSR_SOF11 /*!< Synchronization Event Overrun Flag Channel 11 */ 00103 #define LL_DMAMUX_CSR_SOF12 DMAMUX_CSR_SOF12 /*!< Synchronization Event Overrun Flag Channel 12 */ 00104 #define LL_DMAMUX_CSR_SOF13 DMAMUX_CSR_SOF13 /*!< Synchronization Event Overrun Flag Channel 13 */ 00105 #define LL_DMAMUX_RGSR_RGOF0 DMAMUX_RGSR_OF0 /*!< Request Generator 0 Trigger Event Overrun Flag */ 00106 #define LL_DMAMUX_RGSR_RGOF1 DMAMUX_RGSR_OF1 /*!< Request Generator 1 Trigger Event Overrun Flag */ 00107 #define LL_DMAMUX_RGSR_RGOF2 DMAMUX_RGSR_OF2 /*!< Request Generator 2 Trigger Event Overrun Flag */ 00108 #define LL_DMAMUX_RGSR_RGOF3 DMAMUX_RGSR_OF3 /*!< Request Generator 3 Trigger Event Overrun Flag */ 00109 /** 00110 * @} 00111 */ 00112 00113 /** @defgroup DMAMUX_LL_EC_IT IT Defines 00114 * @brief IT defines which can be used with LL_DMA_ReadReg and LL_DMAMUX_WriteReg functions 00115 * @{ 00116 */ 00117 #define LL_DMAMUX_CCR_SOIE DMAMUX_CxCR_SOIE /*!< Synchronization Event Overrun Interrupt */ 00118 #define LL_DMAMUX_RGCR_RGOIE DMAMUX_RGxCR_OIE /*!< Request Generation Trigger Event Overrun Interrupt */ 00119 /** 00120 * @} 00121 */ 00122 00123 /** @defgroup DMAMUX_LL_EC_REQUEST Transfer request 00124 * @{ 00125 */ 00126 #define LL_DMAMUX_REQ_MEM2MEM 0U /*!< Memory to memory transfer */ 00127 00128 #define LL_DMAMUX_REQ_GENERATOR0 1U /*!< DMAMUX request generator 0 */ 00129 #define LL_DMAMUX_REQ_GENERATOR1 2U /*!< DMAMUX request generator 1 */ 00130 #define LL_DMAMUX_REQ_GENERATOR2 3U /*!< DMAMUX request generator 2 */ 00131 #define LL_DMAMUX_REQ_GENERATOR3 4U /*!< DMAMUX request generator 3 */ 00132 00133 #define LL_DMAMUX_REQ_ADC1 5U /*!< DMAMUX ADC1 request */ 00134 00135 #if defined (ADC2) 00136 00137 #define LL_DMAMUX_REQ_ADC2 6U /*!< DMAMUX ADC1 request */ 00138 00139 #define LL_DMAMUX_REQ_DAC1_CH1 7U /*!< DMAMUX DAC1 CH1 request */ 00140 #define LL_DMAMUX_REQ_DAC1_CH2 8U /*!< DMAMUX DAC1 CH2 request */ 00141 00142 #define LL_DMAMUX_REQ_TIM6_UP 9U /*!< DMAMUX TIM6 UP request */ 00143 #define LL_DMAMUX_REQ_TIM7_UP 10U /*!< DMAMUX TIM7 UP request */ 00144 00145 #define LL_DMAMUX_REQ_SPI1_RX 11U /*!< DMAMUX SPI1 RX request */ 00146 #define LL_DMAMUX_REQ_SPI1_TX 12U /*!< DMAMUX SPI1 TX request */ 00147 #define LL_DMAMUX_REQ_SPI2_RX 13U /*!< DMAMUX SPI2 RX request */ 00148 #define LL_DMAMUX_REQ_SPI2_TX 14U /*!< DMAMUX SPI2 TX request */ 00149 #define LL_DMAMUX_REQ_SPI3_RX 15U /*!< DMAMUX SPI3 RX request */ 00150 #define LL_DMAMUX_REQ_SPI3_TX 16U /*!< DMAMUX SPI3 TX request */ 00151 00152 #define LL_DMAMUX_REQ_I2C1_RX 17U /*!< DMAMUX I2C1 RX request */ 00153 #define LL_DMAMUX_REQ_I2C1_TX 18U /*!< DMAMUX I2C1 TX request */ 00154 #define LL_DMAMUX_REQ_I2C2_RX 19U /*!< DMAMUX I2C2 RX request */ 00155 #define LL_DMAMUX_REQ_I2C2_TX 20U /*!< DMAMUX I2C2 TX request */ 00156 #define LL_DMAMUX_REQ_I2C3_RX 21U /*!< DMAMUX I2C3 RX request */ 00157 #define LL_DMAMUX_REQ_I2C3_TX 22U /*!< DMAMUX I2C3 TX request */ 00158 #define LL_DMAMUX_REQ_I2C4_RX 23U /*!< DMAMUX I2C4 RX request */ 00159 #define LL_DMAMUX_REQ_I2C4_TX 24U /*!< DMAMUX I2C4 TX request */ 00160 00161 #define LL_DMAMUX_REQ_USART1_RX 25U /*!< DMAMUX USART1 RX request */ 00162 #define LL_DMAMUX_REQ_USART1_TX 26U /*!< DMAMUX USART1 TX request */ 00163 #define LL_DMAMUX_REQ_USART2_RX 27U /*!< DMAMUX USART2 RX request */ 00164 #define LL_DMAMUX_REQ_USART2_TX 28U /*!< DMAMUX USART2 TX request */ 00165 #define LL_DMAMUX_REQ_USART3_RX 29U /*!< DMAMUX USART3 RX request */ 00166 #define LL_DMAMUX_REQ_USART3_TX 30U /*!< DMAMUX USART3 TX request */ 00167 00168 #define LL_DMAMUX_REQ_UART4_RX 31U /*!< DMAMUX UART4 RX request */ 00169 #define LL_DMAMUX_REQ_UART4_TX 32U /*!< DMAMUX UART4 TX request */ 00170 #define LL_DMAMUX_REQ_UART5_RX 33U /*!< DMAMUX UART5 RX request */ 00171 #define LL_DMAMUX_REQ_UART5_TX 34U /*!< DMAMUX UART5 TX request */ 00172 00173 #define LL_DMAMUX_REQ_LPUART1_RX 35U /*!< DMAMUX LPUART1 RX request */ 00174 #define LL_DMAMUX_REQ_LPUART1_TX 36U /*!< DMAMUX LPUART1 TX request */ 00175 00176 #define LL_DMAMUX_REQ_SAI1_A 37U /*!< DMAMUX SAI1 A request */ 00177 #define LL_DMAMUX_REQ_SAI1_B 38U /*!< DMAMUX SAI1 B request */ 00178 #define LL_DMAMUX_REQ_SAI2_A 39U /*!< DMAMUX SAI2 A request */ 00179 #define LL_DMAMUX_REQ_SAI2_B 40U /*!< DMAMUX SAI2 B request */ 00180 00181 #define LL_DMAMUX_REQ_OSPI1 41U /*!< DMAMUX OCTOSPI1 request */ 00182 #define LL_DMAMUX_REQ_OSPI2 42U /*!< DMAMUX OCTOSPI2 request */ 00183 00184 #define LL_DMAMUX_REQ_TIM1_CH1 43U /*!< DMAMUX TIM1 CH1 request */ 00185 #define LL_DMAMUX_REQ_TIM1_CH2 44U /*!< DMAMUX TIM1 CH2 request */ 00186 #define LL_DMAMUX_REQ_TIM1_CH3 45U /*!< DMAMUX TIM1 CH3 request */ 00187 #define LL_DMAMUX_REQ_TIM1_CH4 46U /*!< DMAMUX TIM1 CH4 request */ 00188 #define LL_DMAMUX_REQ_TIM1_UP 47U /*!< DMAMUX TIM1 UP request */ 00189 #define LL_DMAMUX_REQ_TIM1_TRIG 48U /*!< DMAMUX TIM1 TRIG request */ 00190 #define LL_DMAMUX_REQ_TIM1_COM 49U /*!< DMAMUX TIM1 COM request */ 00191 00192 #define LL_DMAMUX_REQ_TIM8_CH1 50U /*!< DMAMUX TIM8 CH1 request */ 00193 #define LL_DMAMUX_REQ_TIM8_CH2 51U /*!< DMAMUX TIM8 CH2 request */ 00194 #define LL_DMAMUX_REQ_TIM8_CH3 52U /*!< DMAMUX TIM8 CH3 request */ 00195 #define LL_DMAMUX_REQ_TIM8_CH4 53U /*!< DMAMUX TIM8 CH4 request */ 00196 #define LL_DMAMUX_REQ_TIM8_UP 54U /*!< DMAMUX TIM8 UP request */ 00197 #define LL_DMAMUX_REQ_TIM8_TRIG 55U /*!< DMAMUX TIM8 TRIG request */ 00198 #define LL_DMAMUX_REQ_TIM8_COM 56U /*!< DMAMUX TIM8 COM request */ 00199 00200 #define LL_DMAMUX_REQ_TIM2_CH1 57U /*!< DMAMUX TIM2 CH1 request */ 00201 #define LL_DMAMUX_REQ_TIM2_CH2 58U /*!< DMAMUX TIM2 CH2 request */ 00202 #define LL_DMAMUX_REQ_TIM2_CH3 59U /*!< DMAMUX TIM2 CH3 request */ 00203 #define LL_DMAMUX_REQ_TIM2_CH4 60U /*!< DMAMUX TIM2 CH4 request */ 00204 #define LL_DMAMUX_REQ_TIM2_UP 61U /*!< DMAMUX TIM2 UP request */ 00205 00206 #define LL_DMAMUX_REQ_TIM3_CH1 62U /*!< DMAMUX TIM3 CH1 request */ 00207 #define LL_DMAMUX_REQ_TIM3_CH2 63U /*!< DMAMUX TIM3 CH2 request */ 00208 #define LL_DMAMUX_REQ_TIM3_CH3 64U /*!< DMAMUX TIM3 CH3 request */ 00209 #define LL_DMAMUX_REQ_TIM3_CH4 65U /*!< DMAMUX TIM3 CH4 request */ 00210 #define LL_DMAMUX_REQ_TIM3_UP 66U /*!< DMAMUX TIM3 UP request */ 00211 #define LL_DMAMUX_REQ_TIM3_TRIG 67U /*!< DMAMUX TIM3 TRIG request */ 00212 00213 #define LL_DMAMUX_REQ_TIM4_CH1 68U /*!< DMAMUX TIM4 CH1 request */ 00214 #define LL_DMAMUX_REQ_TIM4_CH2 69U /*!< DMAMUX TIM4 CH2 request */ 00215 #define LL_DMAMUX_REQ_TIM4_CH3 70U /*!< DMAMUX TIM4 CH3 request */ 00216 #define LL_DMAMUX_REQ_TIM4_CH4 71U /*!< DMAMUX TIM4 CH4 request */ 00217 #define LL_DMAMUX_REQ_TIM4_UP 72U /*!< DMAMUX TIM4 UP request */ 00218 00219 #define LL_DMAMUX_REQ_TIM5_CH1 73U /*!< DMAMUX TIM5 CH1 request */ 00220 #define LL_DMAMUX_REQ_TIM5_CH2 74U /*!< DMAMUX TIM5 CH2 request */ 00221 #define LL_DMAMUX_REQ_TIM5_CH3 75U /*!< DMAMUX TIM5 CH3 request */ 00222 #define LL_DMAMUX_REQ_TIM5_CH4 76U /*!< DMAMUX TIM5 CH4 request */ 00223 #define LL_DMAMUX_REQ_TIM5_UP 77U /*!< DMAMUX TIM5 UP request */ 00224 #define LL_DMAMUX_REQ_TIM5_TRIG 78U /*!< DMAMUX TIM5 TRIG request */ 00225 #define LL_DMAMUX_REQ_TIM15_CH1 79U /*!< DMAMUX TIM15 CH1 request */ 00226 #define LL_DMAMUX_REQ_TIM15_UP 80U /*!< DMAMUX TIM15 UP request */ 00227 #define LL_DMAMUX_REQ_TIM15_TRIG 81U /*!< DMAMUX TIM15 TRIG request */ 00228 #define LL_DMAMUX_REQ_TIM15_COM 82U /*!< DMAMUX TIM15 COM request */ 00229 00230 #define LL_DMAMUX_REQ_TIM16_CH1 83U /*!< DMAMUX TIM16 CH1 request */ 00231 #define LL_DMAMUX_REQ_TIM16_UP 84U /*!< DMAMUX TIM16 UP request */ 00232 #define LL_DMAMUX_REQ_TIM17_CH1 85U /*!< DMAMUX TIM17 CH1 request */ 00233 #define LL_DMAMUX_REQ_TIM17_UP 86U /*!< DMAMUX TIM17 UP request */ 00234 00235 #define LL_DMAMUX_REQ_DFSDM1_FLT0 87U /*!< DMAMUX DFSDM1_FLT0 request */ 00236 #define LL_DMAMUX_REQ_DFSDM1_FLT1 88U /*!< DMAMUX DFSDM1_FLT1 request */ 00237 #define LL_DMAMUX_REQ_DFSDM1_FLT2 89U /*!< DMAMUX DFSDM1_FLT2 request */ 00238 #define LL_DMAMUX_REQ_DFSDM1_FLT3 90U /*!< DMAMUX DFSDM1_FLT3 request */ 00239 00240 #define LL_DMAMUX_REQ_DCMI 91U /*!< DMAMUX DCMI request */ 00241 #define LL_DMAMUX_REQ_DCMI_PSSI 91U /*!< DMAMUX PSSI request */ 00242 00243 #define LL_DMAMUX_REQ_AES_IN 92U /*!< DMAMUX AES_IN request */ 00244 #define LL_DMAMUX_REQ_AES_OUT 93U /*!< DMAMUX AES_OUT request */ 00245 00246 #define LL_DMAMUX_REQ_HASH_IN 94U /*!< DMAMUX HASH_IN request */ 00247 00248 #else 00249 00250 #define LL_DMAMUX_REQ_DAC1_CH1 6U /*!< DMAMUX DAC1 CH1 request */ 00251 #define LL_DMAMUX_REQ_DAC1_CH2 7U /*!< DMAMUX DAC1 CH2 request */ 00252 00253 #define LL_DMAMUX_REQ_TIM6_UP 8U /*!< DMAMUX TIM6 UP request */ 00254 #define LL_DMAMUX_REQ_TIM7_UP 9U /*!< DMAMUX TIM7 UP request */ 00255 00256 #define LL_DMAMUX_REQ_SPI1_RX 10U /*!< DMAMUX SPI1 RX request */ 00257 #define LL_DMAMUX_REQ_SPI1_TX 11U /*!< DMAMUX SPI1 TX request */ 00258 #define LL_DMAMUX_REQ_SPI2_RX 12U /*!< DMAMUX SPI2 RX request */ 00259 #define LL_DMAMUX_REQ_SPI2_TX 13U /*!< DMAMUX SPI2 TX request */ 00260 #define LL_DMAMUX_REQ_SPI3_RX 14U /*!< DMAMUX SPI3 RX request */ 00261 #define LL_DMAMUX_REQ_SPI3_TX 15U /*!< DMAMUX SPI3 TX request */ 00262 00263 #define LL_DMAMUX_REQ_I2C1_RX 16U /*!< DMAMUX I2C1 RX request */ 00264 #define LL_DMAMUX_REQ_I2C1_TX 17U /*!< DMAMUX I2C1 TX request */ 00265 #define LL_DMAMUX_REQ_I2C2_RX 18U /*!< DMAMUX I2C2 RX request */ 00266 #define LL_DMAMUX_REQ_I2C2_TX 19U /*!< DMAMUX I2C2 TX request */ 00267 #define LL_DMAMUX_REQ_I2C3_RX 20U /*!< DMAMUX I2C3 RX request */ 00268 #define LL_DMAMUX_REQ_I2C3_TX 21U /*!< DMAMUX I2C3 TX request */ 00269 #define LL_DMAMUX_REQ_I2C4_RX 22U /*!< DMAMUX I2C4 RX request */ 00270 #define LL_DMAMUX_REQ_I2C4_TX 23U /*!< DMAMUX I2C4 TX request */ 00271 00272 #define LL_DMAMUX_REQ_USART1_RX 24U /*!< DMAMUX USART1 RX request */ 00273 #define LL_DMAMUX_REQ_USART1_TX 25U /*!< DMAMUX USART1 TX request */ 00274 #define LL_DMAMUX_REQ_USART2_RX 26U /*!< DMAMUX USART2 RX request */ 00275 #define LL_DMAMUX_REQ_USART2_TX 27U /*!< DMAMUX USART2 TX request */ 00276 #define LL_DMAMUX_REQ_USART3_RX 28U /*!< DMAMUX USART3 RX request */ 00277 #define LL_DMAMUX_REQ_USART3_TX 29U /*!< DMAMUX USART3 TX request */ 00278 00279 #define LL_DMAMUX_REQ_UART4_RX 30U /*!< DMAMUX UART4 RX request */ 00280 #define LL_DMAMUX_REQ_UART4_TX 31U /*!< DMAMUX UART4 TX request */ 00281 #define LL_DMAMUX_REQ_UART5_RX 32U /*!< DMAMUX UART5 RX request */ 00282 #define LL_DMAMUX_REQ_UART5_TX 33U /*!< DMAMUX UART5 TX request */ 00283 00284 #define LL_DMAMUX_REQ_LPUART1_RX 34U /*!< DMAMUX LPUART1 RX request */ 00285 #define LL_DMAMUX_REQ_LPUART1_TX 35U /*!< DMAMUX LPUART1 TX request */ 00286 00287 #define LL_DMAMUX_REQ_SAI1_A 36U /*!< DMAMUX SAI1 A request */ 00288 #define LL_DMAMUX_REQ_SAI1_B 37U /*!< DMAMUX SAI1 B request */ 00289 #define LL_DMAMUX_REQ_SAI2_A 38U /*!< DMAMUX SAI2 A request */ 00290 #define LL_DMAMUX_REQ_SAI2_B 39U /*!< DMAMUX SAI2 B request */ 00291 00292 #define LL_DMAMUX_REQ_OSPI1 40U /*!< DMAMUX OCTOSPI1 request */ 00293 #define LL_DMAMUX_REQ_OSPI2 41U /*!< DMAMUX OCTOSPI2 request */ 00294 00295 #define LL_DMAMUX_REQ_TIM1_CH1 42U /*!< DMAMUX TIM1 CH1 request */ 00296 #define LL_DMAMUX_REQ_TIM1_CH2 43U /*!< DMAMUX TIM1 CH2 request */ 00297 #define LL_DMAMUX_REQ_TIM1_CH3 44U /*!< DMAMUX TIM1 CH3 request */ 00298 #define LL_DMAMUX_REQ_TIM1_CH4 45U /*!< DMAMUX TIM1 CH4 request */ 00299 #define LL_DMAMUX_REQ_TIM1_UP 46U /*!< DMAMUX TIM1 UP request */ 00300 #define LL_DMAMUX_REQ_TIM1_TRIG 47U /*!< DMAMUX TIM1 TRIG request */ 00301 #define LL_DMAMUX_REQ_TIM1_COM 48U /*!< DMAMUX TIM1 COM request */ 00302 00303 #define LL_DMAMUX_REQ_TIM8_CH1 49U /*!< DMAMUX TIM8 CH1 request */ 00304 #define LL_DMAMUX_REQ_TIM8_CH2 50U /*!< DMAMUX TIM8 CH2 request */ 00305 #define LL_DMAMUX_REQ_TIM8_CH3 51U /*!< DMAMUX TIM8 CH3 request */ 00306 #define LL_DMAMUX_REQ_TIM8_CH4 52U /*!< DMAMUX TIM8 CH4 request */ 00307 #define LL_DMAMUX_REQ_TIM8_UP 53U /*!< DMAMUX TIM8 UP request */ 00308 #define LL_DMAMUX_REQ_TIM8_TRIG 54U /*!< DMAMUX TIM8 TRIG request */ 00309 #define LL_DMAMUX_REQ_TIM8_COM 55U /*!< DMAMUX TIM8 COM request */ 00310 00311 #define LL_DMAMUX_REQ_TIM2_CH1 56U /*!< DMAMUX TIM2 CH1 request */ 00312 #define LL_DMAMUX_REQ_TIM2_CH2 57U /*!< DMAMUX TIM2 CH2 request */ 00313 #define LL_DMAMUX_REQ_TIM2_CH3 58U /*!< DMAMUX TIM2 CH3 request */ 00314 #define LL_DMAMUX_REQ_TIM2_CH4 59U /*!< DMAMUX TIM2 CH4 request */ 00315 #define LL_DMAMUX_REQ_TIM2_UP 60U /*!< DMAMUX TIM2 UP request */ 00316 00317 #define LL_DMAMUX_REQ_TIM3_CH1 61U /*!< DMAMUX TIM3 CH1 request */ 00318 #define LL_DMAMUX_REQ_TIM3_CH2 62U /*!< DMAMUX TIM3 CH2 request */ 00319 #define LL_DMAMUX_REQ_TIM3_CH3 63U /*!< DMAMUX TIM3 CH3 request */ 00320 #define LL_DMAMUX_REQ_TIM3_CH4 64U /*!< DMAMUX TIM3 CH4 request */ 00321 #define LL_DMAMUX_REQ_TIM3_UP 65U /*!< DMAMUX TIM3 UP request */ 00322 #define LL_DMAMUX_REQ_TIM3_TRIG 66U /*!< DMAMUX TIM3 TRIG request */ 00323 00324 #define LL_DMAMUX_REQ_TIM4_CH1 67U /*!< DMAMUX TIM4 CH1 request */ 00325 #define LL_DMAMUX_REQ_TIM4_CH2 68U /*!< DMAMUX TIM4 CH2 request */ 00326 #define LL_DMAMUX_REQ_TIM4_CH3 69U /*!< DMAMUX TIM4 CH3 request */ 00327 #define LL_DMAMUX_REQ_TIM4_CH4 70U /*!< DMAMUX TIM4 CH4 request */ 00328 #define LL_DMAMUX_REQ_TIM4_UP 71U /*!< DMAMUX TIM4 UP request */ 00329 00330 #define LL_DMAMUX_REQ_TIM5_CH1 72U /*!< DMAMUX TIM5 CH1 request */ 00331 #define LL_DMAMUX_REQ_TIM5_CH2 73U /*!< DMAMUX TIM5 CH2 request */ 00332 #define LL_DMAMUX_REQ_TIM5_CH3 74U /*!< DMAMUX TIM5 CH3 request */ 00333 #define LL_DMAMUX_REQ_TIM5_CH4 75U /*!< DMAMUX TIM5 CH4 request */ 00334 #define LL_DMAMUX_REQ_TIM5_UP 76U /*!< DMAMUX TIM5 UP request */ 00335 #define LL_DMAMUX_REQ_TIM5_TRIG 77U /*!< DMAMUX TIM5 TRIG request */ 00336 #define LL_DMAMUX_REQ_TIM15_CH1 78U /*!< DMAMUX TIM15 CH1 request */ 00337 #define LL_DMAMUX_REQ_TIM15_UP 79U /*!< DMAMUX TIM15 UP request */ 00338 #define LL_DMAMUX_REQ_TIM15_TRIG 80U /*!< DMAMUX TIM15 TRIG request */ 00339 #define LL_DMAMUX_REQ_TIM15_COM 81U /*!< DMAMUX TIM15 COM request */ 00340 00341 #define LL_DMAMUX_REQ_TIM16_CH1 82U /*!< DMAMUX TIM16 CH1 request */ 00342 #define LL_DMAMUX_REQ_TIM16_UP 83U /*!< DMAMUX TIM16 UP request */ 00343 #define LL_DMAMUX_REQ_TIM17_CH1 84U /*!< DMAMUX TIM17 CH1 request */ 00344 #define LL_DMAMUX_REQ_TIM17_UP 85U /*!< DMAMUX TIM17 UP request */ 00345 00346 #define LL_DMAMUX_REQ_DFSDM1_FLT0 86U /*!< DMAMUX DFSDM1_FLT0 request */ 00347 #define LL_DMAMUX_REQ_DFSDM1_FLT1 87U /*!< DMAMUX DFSDM1_FLT1 request */ 00348 #define LL_DMAMUX_REQ_DFSDM1_FLT2 88U /*!< DMAMUX DFSDM1_FLT2 request */ 00349 #define LL_DMAMUX_REQ_DFSDM1_FLT3 89U /*!< DMAMUX DFSDM1_FLT3 request */ 00350 00351 #define LL_DMAMUX_REQ_DCMI 90U /*!< DMAMUX DCMI request */ 00352 00353 #define LL_DMAMUX_REQ_AES_IN 91U /*!< DMAMUX AES_IN request */ 00354 #define LL_DMAMUX_REQ_AES_OUT 92U /*!< DMAMUX AES_OUT request */ 00355 00356 #define LL_DMAMUX_REQ_HASH_IN 93U /*!< DMAMUX HASH_IN request */ 00357 00358 #endif 00359 00360 /** 00361 * @} 00362 */ 00363 00364 /** @defgroup DMAMUX_LL_EC_CHANNEL DMAMUX Channel 00365 * @{ 00366 */ 00367 #define LL_DMAMUX_CHANNEL_0 0x00000000U /*!< DMAMUX Channel 0 connected to DMA1 Channel 1 */ 00368 #define LL_DMAMUX_CHANNEL_1 0x00000001U /*!< DMAMUX Channel 1 connected to DMA1 Channel 2 */ 00369 #define LL_DMAMUX_CHANNEL_2 0x00000002U /*!< DMAMUX Channel 2 connected to DMA1 Channel 3 */ 00370 #define LL_DMAMUX_CHANNEL_3 0x00000003U /*!< DMAMUX Channel 3 connected to DMA1 Channel 4 */ 00371 #define LL_DMAMUX_CHANNEL_4 0x00000004U /*!< DMAMUX Channel 4 connected to DMA1 Channel 5 */ 00372 #define LL_DMAMUX_CHANNEL_5 0x00000005U /*!< DMAMUX Channel 5 connected to DMA1 Channel 6 */ 00373 #define LL_DMAMUX_CHANNEL_6 0x00000006U /*!< DMAMUX Channel 6 connected to DMA1 Channel 7 */ 00374 #define LL_DMAMUX_CHANNEL_7 0x00000007U /*!< DMAMUX Channel 7 connected to DMA2 Channel 1 */ 00375 #define LL_DMAMUX_CHANNEL_8 0x00000008U /*!< DMAMUX Channel 8 connected to DMA2 Channel 2 */ 00376 #define LL_DMAMUX_CHANNEL_9 0x00000009U /*!< DMAMUX Channel 9 connected to DMA2 Channel 3 */ 00377 #define LL_DMAMUX_CHANNEL_10 0x0000000AU /*!< DMAMUX Channel 10 connected to DMA2 Channel 4 */ 00378 #define LL_DMAMUX_CHANNEL_11 0x0000000BU /*!< DMAMUX Channel 11 connected to DMA2 Channel 5 */ 00379 #define LL_DMAMUX_CHANNEL_12 0x0000000CU /*!< DMAMUX Channel 12 connected to DMA2 Channel 6 */ 00380 #define LL_DMAMUX_CHANNEL_13 0x0000000DU /*!< DMAMUX Channel 13 connected to DMA2 Channel 7 */ 00381 /** 00382 * @} 00383 */ 00384 00385 /** @defgroup DMAMUX_LL_EC_SYNC_NO Synchronization Signal Polarity 00386 * @{ 00387 */ 00388 #define LL_DMAMUX_SYNC_NO_EVENT 0x00000000U /*!< All requests are blocked */ 00389 #define LL_DMAMUX_SYNC_POL_RISING DMAMUX_CxCR_SPOL_0 /*!< Synchronization on event on rising edge */ 00390 #define LL_DMAMUX_SYNC_POL_FALLING DMAMUX_CxCR_SPOL_1 /*!< Synchronization on event on falling edge */ 00391 #define LL_DMAMUX_SYNC_POL_RISING_FALLING (DMAMUX_CxCR_SPOL_0 | DMAMUX_CxCR_SPOL_1) /*!< Synchronization on event on rising and falling edge */ 00392 /** 00393 * @} 00394 */ 00395 00396 /** @defgroup DMAMUX_LL_EC_SYNC_EVT Synchronization Signal Event 00397 * @{ 00398 */ 00399 #define LL_DMAMUX_SYNC_EXTI_LINE0 0x00000000U /*!< Synchronization signal from EXTI Line0 */ 00400 #define LL_DMAMUX_SYNC_EXTI_LINE1 DMAMUX_CxCR_SYNC_ID_0 /*!< Synchronization signal from EXTI Line1 */ 00401 #define LL_DMAMUX_SYNC_EXTI_LINE2 DMAMUX_CxCR_SYNC_ID_1 /*!< Synchronization signal from EXTI Line2 */ 00402 #define LL_DMAMUX_SYNC_EXTI_LINE3 (DMAMUX_CxCR_SYNC_ID_1 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from EXTI Line3 */ 00403 #define LL_DMAMUX_SYNC_EXTI_LINE4 DMAMUX_CxCR_SYNC_ID_2 /*!< Synchronization signal from EXTI Line4 */ 00404 #define LL_DMAMUX_SYNC_EXTI_LINE5 (DMAMUX_CxCR_SYNC_ID_2 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from EXTI Line5 */ 00405 #define LL_DMAMUX_SYNC_EXTI_LINE6 (DMAMUX_CxCR_SYNC_ID_2 | DMAMUX_CxCR_SYNC_ID_1) /*!< Synchronization signal from EXTI Line6 */ 00406 #define LL_DMAMUX_SYNC_EXTI_LINE7 (DMAMUX_CxCR_SYNC_ID_2 | DMAMUX_CxCR_SYNC_ID_1 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from EXTI Line7 */ 00407 #define LL_DMAMUX_SYNC_EXTI_LINE8 DMAMUX_CxCR_SYNC_ID_3 /*!< Synchronization signal from EXTI Line8 */ 00408 #define LL_DMAMUX_SYNC_EXTI_LINE9 (DMAMUX_CxCR_SYNC_ID_3 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from EXTI Line9 */ 00409 #define LL_DMAMUX_SYNC_EXTI_LINE10 (DMAMUX_CxCR_SYNC_ID_3 | DMAMUX_CxCR_SYNC_ID_1) /*!< Synchronization signal from EXTI Line10 */ 00410 #define LL_DMAMUX_SYNC_EXTI_LINE11 (DMAMUX_CxCR_SYNC_ID_3 | DMAMUX_CxCR_SYNC_ID_1 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from EXTI Line11 */ 00411 #define LL_DMAMUX_SYNC_EXTI_LINE12 (DMAMUX_CxCR_SYNC_ID_3 | DMAMUX_CxCR_SYNC_ID_2) /*!< Synchronization signal from EXTI Line12 */ 00412 #define LL_DMAMUX_SYNC_EXTI_LINE13 (DMAMUX_CxCR_SYNC_ID_3 | DMAMUX_CxCR_SYNC_ID_2 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from EXTI Line13 */ 00413 #define LL_DMAMUX_SYNC_EXTI_LINE14 (DMAMUX_CxCR_SYNC_ID_3 | DMAMUX_CxCR_SYNC_ID_2 | DMAMUX_CxCR_SYNC_ID_1) /*!< Synchronization signal from EXTI Line14 */ 00414 #define LL_DMAMUX_SYNC_EXTI_LINE15 (DMAMUX_CxCR_SYNC_ID_3 | DMAMUX_CxCR_SYNC_ID_2 | DMAMUX_CxCR_SYNC_ID_1 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from EXTI Line15 */ 00415 #define LL_DMAMUX_SYNC_DMAMUX_CH0 DMAMUX_CxCR_SYNC_ID_4 /*!< Synchronization signal from DMAMUX channel0 Event */ 00416 #define LL_DMAMUX_SYNC_DMAMUX_CH1 (DMAMUX_CxCR_SYNC_ID_4 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from DMAMUX channel1 Event */ 00417 #define LL_DMAMUX_SYNC_DMAMUX_CH2 (DMAMUX_CxCR_SYNC_ID_4 | DMAMUX_CxCR_SYNC_ID_1) /*!< Synchronization signal from DMAMUX channel2 Event */ 00418 #define LL_DMAMUX_SYNC_DMAMUX_CH3 (DMAMUX_CxCR_SYNC_ID_4 | DMAMUX_CxCR_SYNC_ID_1 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from DMAMUX channel3 Event */ 00419 #define LL_DMAMUX_SYNC_LPTIM1_OUT (DMAMUX_CxCR_SYNC_ID_4 | DMAMUX_CxCR_SYNC_ID_2) /*!< Synchronization signal from LPTIM1 Ouput */ 00420 #define LL_DMAMUX_SYNC_LPTIM2_OUT (DMAMUX_CxCR_SYNC_ID_4 | DMAMUX_CxCR_SYNC_ID_2 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from LPTIM2 Ouput */ 00421 #define LL_DMAMUX_SYNC_DSI_TE (DMAMUX_CxCR_SYNC_ID_4 | DMAMUX_CxCR_SYNC_ID_2 | DMAMUX_CxCR_SYNC_ID_1) /*!< Synchronization signal from DSI Tearing Effect */ 00422 #define LL_DMAMUX_SYNC_DSI_REFRESH_END (DMAMUX_CxCR_SYNC_ID_4 | DMAMUX_CxCR_SYNC_ID_2 | DMAMUX_CxCR_SYNC_ID_1 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from DSI End of Refresh */ 00423 #define LL_DMAMUX_SYNC_DMA2D_TX_END (DMAMUX_CxCR_SYNC_ID_4 | DMAMUX_CxCR_SYNC_ID_3) /*!< Synchronization signal from DMA2D End of Transfer */ 00424 #define LL_DMAMUX_SYNC_LTDC_LINE_IT (DMAMUX_CxCR_SYNC_ID_4 | DMAMUX_CxCR_SYNC_ID_3 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from LTDC Line Interrupt */ 00425 /** 00426 * @} 00427 */ 00428 00429 /** @defgroup DMAMUX_LL_EC_REQUEST_GENERATOR Request Generator Channel 00430 * @{ 00431 */ 00432 #define LL_DMAMUX_REQ_GEN_0 0x00000000U 00433 #define LL_DMAMUX_REQ_GEN_1 0x00000001U 00434 #define LL_DMAMUX_REQ_GEN_2 0x00000002U 00435 #define LL_DMAMUX_REQ_GEN_3 0x00000003U 00436 /** 00437 * @} 00438 */ 00439 00440 /** @defgroup DMAMUX_LL_EC_REQUEST_GEN_POLARITY External Request Signal Generation Polarity 00441 * @{ 00442 */ 00443 #define LL_DMAMUX_REQ_GEN_NO_EVENT 0x00000000U /*!< No external DMA request generation */ 00444 #define LL_DMAMUX_REQ_GEN_POL_RISING DMAMUX_RGxCR_GPOL_0 /*!< External DMA request generation on event on rising edge */ 00445 #define LL_DMAMUX_REQ_GEN_POL_FALLING DMAMUX_RGxCR_GPOL_1 /*!< External DMA request generation on event on falling edge */ 00446 #define LL_DMAMUX_REQ_GEN_POL_RISING_FALLING (DMAMUX_RGxCR_GPOL_0 | DMAMUX_RGxCR_GPOL_1) /*!< External DMA request generation on rising and falling edge */ 00447 /** 00448 * @} 00449 */ 00450 00451 /** @defgroup DMAMUX_LL_EC_REQUEST_GEN External Request Signal Generation 00452 * @{ 00453 */ 00454 #define LL_DMAMUX_REQ_GEN_EXTI_LINE0 0x00000000U /*!< Request signal generation from EXTI Line0 */ 00455 #define LL_DMAMUX_REQ_GEN_EXTI_LINE1 DMAMUX_RGxCR_SIG_ID_0 /*!< Request signal generation from EXTI Line1 */ 00456 #define LL_DMAMUX_REQ_GEN_EXTI_LINE2 DMAMUX_RGxCR_SIG_ID_1 /*!< Request signal generation from EXTI Line2 */ 00457 #define LL_DMAMUX_REQ_GEN_EXTI_LINE3 (DMAMUX_RGxCR_SIG_ID_1 |DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from EXTI Line3 */ 00458 #define LL_DMAMUX_REQ_GEN_EXTI_LINE4 DMAMUX_RGxCR_SIG_ID_2 /*!< Request signal generation from EXTI Line4 */ 00459 #define LL_DMAMUX_REQ_GEN_EXTI_LINE5 (DMAMUX_RGxCR_SIG_ID_2 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from EXTI Line5 */ 00460 #define LL_DMAMUX_REQ_GEN_EXTI_LINE6 (DMAMUX_RGxCR_SIG_ID_2 | DMAMUX_RGxCR_SIG_ID_1) /*!< Request signal generation from EXTI Line6 */ 00461 #define LL_DMAMUX_REQ_GEN_EXTI_LINE7 (DMAMUX_RGxCR_SIG_ID_2 | DMAMUX_RGxCR_SIG_ID_1 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from EXTI Line7 */ 00462 #define LL_DMAMUX_REQ_GEN_EXTI_LINE8 DMAMUX_RGxCR_SIG_ID_3 /*!< Request signal generation from EXTI Line8 */ 00463 #define LL_DMAMUX_REQ_GEN_EXTI_LINE9 (DMAMUX_RGxCR_SIG_ID_3 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from EXTI Line9 */ 00464 #define LL_DMAMUX_REQ_GEN_EXTI_LINE10 (DMAMUX_RGxCR_SIG_ID_3 | DMAMUX_RGxCR_SIG_ID_1) /*!< Request signal generation from EXTI Line10 */ 00465 #define LL_DMAMUX_REQ_GEN_EXTI_LINE11 (DMAMUX_RGxCR_SIG_ID_3 | DMAMUX_RGxCR_SIG_ID_1 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from EXTI Line11 */ 00466 #define LL_DMAMUX_REQ_GEN_EXTI_LINE12 (DMAMUX_RGxCR_SIG_ID_3 | DMAMUX_RGxCR_SIG_ID_2) /*!< Request signal generation from EXTI Line12 */ 00467 #define LL_DMAMUX_REQ_GEN_EXTI_LINE13 (DMAMUX_RGxCR_SIG_ID_3 | DMAMUX_RGxCR_SIG_ID_2 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from EXTI Line13 */ 00468 #define LL_DMAMUX_REQ_GEN_EXTI_LINE14 (DMAMUX_RGxCR_SIG_ID_3 | DMAMUX_RGxCR_SIG_ID_2 | DMAMUX_RGxCR_SIG_ID_1) /*!< Request signal generation from EXTI Line14 */ 00469 #define LL_DMAMUX_REQ_GEN_EXTI_LINE15 (DMAMUX_RGxCR_SIG_ID_3 | DMAMUX_RGxCR_SIG_ID_2 | DMAMUX_RGxCR_SIG_ID_1 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from EXTI Line15 */ 00470 #define LL_DMAMUX_REQ_GEN_DMAMUX_CH0 DMAMUX_RGxCR_SIG_ID_4 /*!< Request signal generation from DMAMUX channel0 Event */ 00471 #define LL_DMAMUX_REQ_GEN_DMAMUX_CH1 (DMAMUX_RGxCR_SIG_ID_4 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from DMAMUX channel1 Event */ 00472 #define LL_DMAMUX_REQ_GEN_DMAMUX_CH2 (DMAMUX_RGxCR_SIG_ID_4 | DMAMUX_RGxCR_SIG_ID_1) /*!< Request signal generation from DMAMUX channel2 Event */ 00473 #define LL_DMAMUX_REQ_GEN_DMAMUX_CH3 (DMAMUX_RGxCR_SIG_ID_4 | DMAMUX_RGxCR_SIG_ID_1 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from DMAMUX channel3 Event */ 00474 #define LL_DMAMUX_REQ_GEN_LPTIM1_OUT (DMAMUX_RGxCR_SIG_ID_4 | DMAMUX_RGxCR_SIG_ID_2) /*!< Request signal generation from LPTIM1 Ouput */ 00475 #define LL_DMAMUX_REQ_GEN_LPTIM2_OUT (DMAMUX_RGxCR_SIG_ID_4 | DMAMUX_RGxCR_SIG_ID_2 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from LPTIM2 Ouput */ 00476 #define LL_DMAMUX_REQ_GEN_DSI_TE (DMAMUX_RGxCR_SIG_ID_4 | DMAMUX_RGxCR_SIG_ID_2 | DMAMUX_RGxCR_SIG_ID_1) /*!< Request signal generation from DSI Tearing Effect */ 00477 #define LL_DMAMUX_REQ_GEN_DSI_REFRESH_END (DMAMUX_RGxCR_SIG_ID_4 | DMAMUX_RGxCR_SIG_ID_2 | DMAMUX_RGxCR_SIG_ID_1 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from DSI End of Refresh */ 00478 #define LL_DMAMUX_REQ_GEN_DMA2D_TX_END (DMAMUX_RGxCR_SIG_ID_4 | DMAMUX_RGxCR_SIG_ID_3) /*!< Request signal generation from DMA2D End of Transfer */ 00479 #define LL_DMAMUX_REQ_GEN_LTDC_LINE_IT (DMAMUX_RGxCR_SIG_ID_4 | DMAMUX_RGxCR_SIG_ID_3 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from LTDC Line Interrupt */ 00480 /** 00481 * @} 00482 */ 00483 00484 /** 00485 * @} 00486 */ 00487 00488 /* Exported macro ------------------------------------------------------------*/ 00489 /** @defgroup DMAMUX_LL_Exported_Macros DMAMUX Exported Macros 00490 * @{ 00491 */ 00492 00493 /** @defgroup DMAMUX_LL_EM_WRITE_READ Common Write and read registers macros 00494 * @{ 00495 */ 00496 /** 00497 * @brief Write a value in DMAMUX register 00498 * @param __INSTANCE__ DMAMUX Instance 00499 * @param __REG__ Register to be written 00500 * @param __VALUE__ Value to be written in the register 00501 * @retval None 00502 */ 00503 #define LL_DMAMUX_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__)) 00504 00505 /** 00506 * @brief Read a value in DMAMUX register 00507 * @param __INSTANCE__ DMAMUX Instance 00508 * @param __REG__ Register to be read 00509 * @retval Register value 00510 */ 00511 #define LL_DMAMUX_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) 00512 /** 00513 * @} 00514 */ 00515 00516 /** 00517 * @} 00518 */ 00519 00520 /* Exported functions --------------------------------------------------------*/ 00521 /** @defgroup DMAMUX_LL_Exported_Functions DMAMUX Exported Functions 00522 * @{ 00523 */ 00524 00525 /** @defgroup DMAMUX_LL_EF_Configuration Configuration 00526 * @{ 00527 */ 00528 /** 00529 * @brief Set DMAMUX request ID for DMAMUX Channel x. 00530 * @note DMAMUX channel 0 to 6 are mapped to DMA1 channel 1 to 7. 00531 * DMAMUX channel 7 to 13 are mapped to DMA2 channel 1 to 7. 00532 * @rmtoll CxCR DMAREQ_ID LL_DMAMUX_SetRequestID 00533 * @param DMAMUXx DMAMUXx Instance 00534 * @param Channel This parameter can be one of the following values: 00535 * @arg @ref LL_DMAMUX_CHANNEL_0 00536 * @arg @ref LL_DMAMUX_CHANNEL_1 00537 * @arg @ref LL_DMAMUX_CHANNEL_2 00538 * @arg @ref LL_DMAMUX_CHANNEL_3 00539 * @arg @ref LL_DMAMUX_CHANNEL_4 00540 * @arg @ref LL_DMAMUX_CHANNEL_5 00541 * @arg @ref LL_DMAMUX_CHANNEL_6 00542 * @arg @ref LL_DMAMUX_CHANNEL_7 00543 * @arg @ref LL_DMAMUX_CHANNEL_8 00544 * @arg @ref LL_DMAMUX_CHANNEL_9 00545 * @arg @ref LL_DMAMUX_CHANNEL_10 00546 * @arg @ref LL_DMAMUX_CHANNEL_11 00547 * @arg @ref LL_DMAMUX_CHANNEL_12 00548 * @arg @ref LL_DMAMUX_CHANNEL_13 00549 * @param Request This parameter can be one of the following values: 00550 * @arg @ref LL_DMAMUX_REQ_MEM2MEM 00551 * @arg @ref LL_DMAMUX_REQ_GENERATOR0 00552 * @arg @ref LL_DMAMUX_REQ_GENERATOR1 00553 * @arg @ref LL_DMAMUX_REQ_GENERATOR2 00554 * @arg @ref LL_DMAMUX_REQ_GENERATOR3 00555 * @arg @ref LL_DMAMUX_REQ_ADC1 00556 * @arg @ref LL_DMAMUX_REQ_DAC1_CH1 00557 * @arg @ref LL_DMAMUX_REQ_DAC1_CH2 00558 * @arg @ref LL_DMAMUX_REQ_TIM6_UP 00559 * @arg @ref LL_DMAMUX_REQ_TIM7_UP 00560 * @arg @ref LL_DMAMUX_REQ_SPI1_RX 00561 * @arg @ref LL_DMAMUX_REQ_SPI1_TX 00562 * @arg @ref LL_DMAMUX_REQ_SPI2_RX 00563 * @arg @ref LL_DMAMUX_REQ_SPI2_TX 00564 * @arg @ref LL_DMAMUX_REQ_SPI3_RX 00565 * @arg @ref LL_DMAMUX_REQ_SPI3_TX 00566 * @arg @ref LL_DMAMUX_REQ_I2C1_RX 00567 * @arg @ref LL_DMAMUX_REQ_I2C1_TX 00568 * @arg @ref LL_DMAMUX_REQ_I2C2_RX 00569 * @arg @ref LL_DMAMUX_REQ_I2C2_TX 00570 * @arg @ref LL_DMAMUX_REQ_I2C3_RX 00571 * @arg @ref LL_DMAMUX_REQ_I2C3_TX 00572 * @arg @ref LL_DMAMUX_REQ_I2C4_RX 00573 * @arg @ref LL_DMAMUX_REQ_I2C4_TX 00574 * @arg @ref LL_DMAMUX_REQ_USART1_RX 00575 * @arg @ref LL_DMAMUX_REQ_USART1_TX 00576 * @arg @ref LL_DMAMUX_REQ_USART2_RX 00577 * @arg @ref LL_DMAMUX_REQ_USART2_TX 00578 * @arg @ref LL_DMAMUX_REQ_USART3_RX 00579 * @arg @ref LL_DMAMUX_REQ_USART3_TX 00580 * @arg @ref LL_DMAMUX_REQ_UART4_RX 00581 * @arg @ref LL_DMAMUX_REQ_UART4_TX 00582 * @arg @ref LL_DMAMUX_REQ_UART5_RX 00583 * @arg @ref LL_DMAMUX_REQ_UART5_TX 00584 * @arg @ref LL_DMAMUX_REQ_LPUART1_RX 00585 * @arg @ref LL_DMAMUX_REQ_LPUART1_TX 00586 * @arg @ref LL_DMAMUX_REQ_SAI1_A 00587 * @arg @ref LL_DMAMUX_REQ_SAI1_B 00588 * @arg @ref LL_DMAMUX_REQ_SAI2_A 00589 * @arg @ref LL_DMAMUX_REQ_SAI2_B 00590 * @arg @ref LL_DMAMUX_REQ_OSPI1 00591 * @arg @ref LL_DMAMUX_REQ_OSPI2 00592 * @arg @ref LL_DMAMUX_REQ_TIM1_CH1 00593 * @arg @ref LL_DMAMUX_REQ_TIM1_CH2 00594 * @arg @ref LL_DMAMUX_REQ_TIM1_CH3 00595 * @arg @ref LL_DMAMUX_REQ_TIM1_CH4 00596 * @arg @ref LL_DMAMUX_REQ_TIM1_UP 00597 * @arg @ref LL_DMAMUX_REQ_TIM1_TRIG 00598 * @arg @ref LL_DMAMUX_REQ_TIM1_COM 00599 * @arg @ref LL_DMAMUX_REQ_TIM8_CH1 00600 * @arg @ref LL_DMAMUX_REQ_TIM8_CH2 00601 * @arg @ref LL_DMAMUX_REQ_TIM8_CH3 00602 * @arg @ref LL_DMAMUX_REQ_TIM8_CH4 00603 * @arg @ref LL_DMAMUX_REQ_TIM8_UP 00604 * @arg @ref LL_DMAMUX_REQ_TIM8_TRIG 00605 * @arg @ref LL_DMAMUX_REQ_TIM8_COM 00606 * @arg @ref LL_DMAMUX_REQ_TIM2_CH1 00607 * @arg @ref LL_DMAMUX_REQ_TIM2_CH2 00608 * @arg @ref LL_DMAMUX_REQ_TIM2_CH3 00609 * @arg @ref LL_DMAMUX_REQ_TIM2_CH4 00610 * @arg @ref LL_DMAMUX_REQ_TIM2_UP 00611 * @arg @ref LL_DMAMUX_REQ_TIM3_CH1 00612 * @arg @ref LL_DMAMUX_REQ_TIM3_CH2 00613 * @arg @ref LL_DMAMUX_REQ_TIM3_CH3 00614 * @arg @ref LL_DMAMUX_REQ_TIM3_CH4 00615 * @arg @ref LL_DMAMUX_REQ_TIM3_UP 00616 * @arg @ref LL_DMAMUX_REQ_TIM3_TRIG 00617 * @arg @ref LL_DMAMUX_REQ_TIM4_CH1 00618 * @arg @ref LL_DMAMUX_REQ_TIM4_CH2 00619 * @arg @ref LL_DMAMUX_REQ_TIM4_CH3 00620 * @arg @ref LL_DMAMUX_REQ_TIM4_CH4 00621 * @arg @ref LL_DMAMUX_REQ_TIM4_UP 00622 * @arg @ref LL_DMAMUX_REQ_TIM5_CH1 00623 * @arg @ref LL_DMAMUX_REQ_TIM5_CH2 00624 * @arg @ref LL_DMAMUX_REQ_TIM5_CH3 00625 * @arg @ref LL_DMAMUX_REQ_TIM5_CH4 00626 * @arg @ref LL_DMAMUX_REQ_TIM5_UP 00627 * @arg @ref LL_DMAMUX_REQ_TIM5_TRIG 00628 * @arg @ref LL_DMAMUX_REQ_TIM15_CH1 00629 * @arg @ref LL_DMAMUX_REQ_TIM15_UP 00630 * @arg @ref LL_DMAMUX_REQ_TIM15_TRIG 00631 * @arg @ref LL_DMAMUX_REQ_TIM15_COM 00632 * @arg @ref LL_DMAMUX_REQ_TIM16_CH1 00633 * @arg @ref LL_DMAMUX_REQ_TIM16_UP 00634 * @arg @ref LL_DMAMUX_REQ_TIM17_CH1 00635 * @arg @ref LL_DMAMUX_REQ_TIM17_UP 00636 * @arg @ref LL_DMAMUX_REQ_DFSDM1_FLT0 00637 * @arg @ref LL_DMAMUX_REQ_DFSDM1_FLT1 00638 * @arg @ref LL_DMAMUX_REQ_DFSDM1_FLT2 00639 * @arg @ref LL_DMAMUX_REQ_DFSDM1_FLT3 00640 * @arg @ref LL_DMAMUX_REQ_DCMI 00641 * @arg @ref LL_DMAMUX_REQ_AES_IN 00642 * @arg @ref LL_DMAMUX_REQ_AES_OUT 00643 * @arg @ref LL_DMAMUX_REQ_HASH_IN 00644 * @retval None 00645 */ 00646 __STATIC_INLINE void LL_DMAMUX_SetRequestID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel, uint32_t Request) 00647 { 00648 (void)(DMAMUXx); 00649 MODIFY_REG((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_DMAREQ_ID, Request); 00650 } 00651 00652 /** 00653 * @brief Get DMAMUX request ID for DMAMUX Channel x. 00654 * @note DMAMUX channel 0 to 6 are mapped to DMA1 channel 1 to 7. 00655 * DMAMUX channel 7 to 13 are mapped to DMA2 channel 1 to 7. 00656 * @rmtoll CxCR DMAREQ_ID LL_DMAMUX_GetRequestID 00657 * @param DMAMUXx DMAMUXx Instance 00658 * @param Channel This parameter can be one of the following values: 00659 * @arg @ref LL_DMAMUX_CHANNEL_0 00660 * @arg @ref LL_DMAMUX_CHANNEL_1 00661 * @arg @ref LL_DMAMUX_CHANNEL_2 00662 * @arg @ref LL_DMAMUX_CHANNEL_3 00663 * @arg @ref LL_DMAMUX_CHANNEL_4 00664 * @arg @ref LL_DMAMUX_CHANNEL_5 00665 * @arg @ref LL_DMAMUX_CHANNEL_6 00666 * @arg @ref LL_DMAMUX_CHANNEL_7 00667 * @arg @ref LL_DMAMUX_CHANNEL_8 00668 * @arg @ref LL_DMAMUX_CHANNEL_9 00669 * @arg @ref LL_DMAMUX_CHANNEL_10 00670 * @arg @ref LL_DMAMUX_CHANNEL_11 00671 * @arg @ref LL_DMAMUX_CHANNEL_12 00672 * @arg @ref LL_DMAMUX_CHANNEL_13 00673 * @retval Returned value can be one of the following values: 00674 * @arg @ref LL_DMAMUX_REQ_MEM2MEM 00675 * @arg @ref LL_DMAMUX_REQ_GENERATOR0 00676 * @arg @ref LL_DMAMUX_REQ_GENERATOR1 00677 * @arg @ref LL_DMAMUX_REQ_GENERATOR2 00678 * @arg @ref LL_DMAMUX_REQ_GENERATOR3 00679 * @arg @ref LL_DMAMUX_REQ_ADC1 00680 * @arg @ref LL_DMAMUX_REQ_DAC1_CH1 00681 * @arg @ref LL_DMAMUX_REQ_DAC1_CH2 00682 * @arg @ref LL_DMAMUX_REQ_TIM6_UP 00683 * @arg @ref LL_DMAMUX_REQ_TIM7_UP 00684 * @arg @ref LL_DMAMUX_REQ_SPI1_RX 00685 * @arg @ref LL_DMAMUX_REQ_SPI1_TX 00686 * @arg @ref LL_DMAMUX_REQ_SPI2_RX 00687 * @arg @ref LL_DMAMUX_REQ_SPI2_TX 00688 * @arg @ref LL_DMAMUX_REQ_SPI3_RX 00689 * @arg @ref LL_DMAMUX_REQ_SPI3_TX 00690 * @arg @ref LL_DMAMUX_REQ_I2C1_RX 00691 * @arg @ref LL_DMAMUX_REQ_I2C1_TX 00692 * @arg @ref LL_DMAMUX_REQ_I2C2_RX 00693 * @arg @ref LL_DMAMUX_REQ_I2C2_TX 00694 * @arg @ref LL_DMAMUX_REQ_I2C3_RX 00695 * @arg @ref LL_DMAMUX_REQ_I2C3_TX 00696 * @arg @ref LL_DMAMUX_REQ_I2C4_RX 00697 * @arg @ref LL_DMAMUX_REQ_I2C4_TX 00698 * @arg @ref LL_DMAMUX_REQ_USART1_RX 00699 * @arg @ref LL_DMAMUX_REQ_USART1_TX 00700 * @arg @ref LL_DMAMUX_REQ_USART2_RX 00701 * @arg @ref LL_DMAMUX_REQ_USART2_TX 00702 * @arg @ref LL_DMAMUX_REQ_USART3_RX 00703 * @arg @ref LL_DMAMUX_REQ_USART3_TX 00704 * @arg @ref LL_DMAMUX_REQ_UART4_RX 00705 * @arg @ref LL_DMAMUX_REQ_UART4_TX 00706 * @arg @ref LL_DMAMUX_REQ_UART5_RX 00707 * @arg @ref LL_DMAMUX_REQ_UART5_TX 00708 * @arg @ref LL_DMAMUX_REQ_LPUART1_RX 00709 * @arg @ref LL_DMAMUX_REQ_LPUART1_TX 00710 * @arg @ref LL_DMAMUX_REQ_SAI1_A 00711 * @arg @ref LL_DMAMUX_REQ_SAI1_B 00712 * @arg @ref LL_DMAMUX_REQ_SAI2_A 00713 * @arg @ref LL_DMAMUX_REQ_SAI2_B 00714 * @arg @ref LL_DMAMUX_REQ_OSPI1 00715 * @arg @ref LL_DMAMUX_REQ_OSPI2 00716 * @arg @ref LL_DMAMUX_REQ_TIM1_CH1 00717 * @arg @ref LL_DMAMUX_REQ_TIM1_CH2 00718 * @arg @ref LL_DMAMUX_REQ_TIM1_CH3 00719 * @arg @ref LL_DMAMUX_REQ_TIM1_CH4 00720 * @arg @ref LL_DMAMUX_REQ_TIM1_UP 00721 * @arg @ref LL_DMAMUX_REQ_TIM1_TRIG 00722 * @arg @ref LL_DMAMUX_REQ_TIM1_COM 00723 * @arg @ref LL_DMAMUX_REQ_TIM8_CH1 00724 * @arg @ref LL_DMAMUX_REQ_TIM8_CH2 00725 * @arg @ref LL_DMAMUX_REQ_TIM8_CH3 00726 * @arg @ref LL_DMAMUX_REQ_TIM8_CH4 00727 * @arg @ref LL_DMAMUX_REQ_TIM8_UP 00728 * @arg @ref LL_DMAMUX_REQ_TIM8_TRIG 00729 * @arg @ref LL_DMAMUX_REQ_TIM8_COM 00730 * @arg @ref LL_DMAMUX_REQ_TIM2_CH1 00731 * @arg @ref LL_DMAMUX_REQ_TIM2_CH2 00732 * @arg @ref LL_DMAMUX_REQ_TIM2_CH3 00733 * @arg @ref LL_DMAMUX_REQ_TIM2_CH4 00734 * @arg @ref LL_DMAMUX_REQ_TIM2_UP 00735 * @arg @ref LL_DMAMUX_REQ_TIM3_CH1 00736 * @arg @ref LL_DMAMUX_REQ_TIM3_CH2 00737 * @arg @ref LL_DMAMUX_REQ_TIM3_CH3 00738 * @arg @ref LL_DMAMUX_REQ_TIM3_CH4 00739 * @arg @ref LL_DMAMUX_REQ_TIM3_UP 00740 * @arg @ref LL_DMAMUX_REQ_TIM3_TRIG 00741 * @arg @ref LL_DMAMUX_REQ_TIM4_CH1 00742 * @arg @ref LL_DMAMUX_REQ_TIM4_CH2 00743 * @arg @ref LL_DMAMUX_REQ_TIM4_CH3 00744 * @arg @ref LL_DMAMUX_REQ_TIM4_CH4 00745 * @arg @ref LL_DMAMUX_REQ_TIM4_UP 00746 * @arg @ref LL_DMAMUX_REQ_TIM5_CH1 00747 * @arg @ref LL_DMAMUX_REQ_TIM5_CH2 00748 * @arg @ref LL_DMAMUX_REQ_TIM5_CH3 00749 * @arg @ref LL_DMAMUX_REQ_TIM5_CH4 00750 * @arg @ref LL_DMAMUX_REQ_TIM5_UP 00751 * @arg @ref LL_DMAMUX_REQ_TIM5_TRIG 00752 * @arg @ref LL_DMAMUX_REQ_TIM15_CH1 00753 * @arg @ref LL_DMAMUX_REQ_TIM15_UP 00754 * @arg @ref LL_DMAMUX_REQ_TIM15_TRIG 00755 * @arg @ref LL_DMAMUX_REQ_TIM15_COM 00756 * @arg @ref LL_DMAMUX_REQ_TIM16_CH1 00757 * @arg @ref LL_DMAMUX_REQ_TIM16_UP 00758 * @arg @ref LL_DMAMUX_REQ_TIM17_CH1 00759 * @arg @ref LL_DMAMUX_REQ_TIM17_UP 00760 * @arg @ref LL_DMAMUX_REQ_DFSDM1_FLT0 00761 * @arg @ref LL_DMAMUX_REQ_DFSDM1_FLT1 00762 * @arg @ref LL_DMAMUX_REQ_DFSDM1_FLT2 00763 * @arg @ref LL_DMAMUX_REQ_DFSDM1_FLT3 00764 * @arg @ref LL_DMAMUX_REQ_DCMI 00765 * @arg @ref LL_DMAMUX_REQ_AES_IN 00766 * @arg @ref LL_DMAMUX_REQ_AES_OUT 00767 * @arg @ref LL_DMAMUX_REQ_HASH_IN 00768 */ 00769 __STATIC_INLINE uint32_t LL_DMAMUX_GetRequestID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel) 00770 { 00771 (void)(DMAMUXx); 00772 return (uint32_t)(READ_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_DMAREQ_ID)); 00773 } 00774 00775 /** 00776 * @brief Set the number of DMA request that will be autorized after a synchronization event and/or the number of DMA request needed to generate an event. 00777 * @rmtoll CxCR NBREQ LL_DMAMUX_SetSyncRequestNb 00778 * @param DMAMUXx DMAMUXx Instance 00779 * @param Channel This parameter can be one of the following values: 00780 * @arg @ref LL_DMAMUX_CHANNEL_0 00781 * @arg @ref LL_DMAMUX_CHANNEL_1 00782 * @arg @ref LL_DMAMUX_CHANNEL_2 00783 * @arg @ref LL_DMAMUX_CHANNEL_3 00784 * @arg @ref LL_DMAMUX_CHANNEL_4 00785 * @arg @ref LL_DMAMUX_CHANNEL_5 00786 * @arg @ref LL_DMAMUX_CHANNEL_6 00787 * @arg @ref LL_DMAMUX_CHANNEL_7 00788 * @arg @ref LL_DMAMUX_CHANNEL_8 00789 * @arg @ref LL_DMAMUX_CHANNEL_9 00790 * @arg @ref LL_DMAMUX_CHANNEL_10 00791 * @arg @ref LL_DMAMUX_CHANNEL_11 00792 * @arg @ref LL_DMAMUX_CHANNEL_12 00793 * @arg @ref LL_DMAMUX_CHANNEL_13 00794 * @param RequestNb This parameter must be a value between Min_Data = 1 and Max_Data = 32. 00795 * @retval None 00796 */ 00797 __STATIC_INLINE void LL_DMAMUX_SetSyncRequestNb(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel, uint32_t RequestNb) 00798 { 00799 (void)(DMAMUXx); 00800 MODIFY_REG((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_NBREQ, ((RequestNb - 1U) << DMAMUX_CxCR_NBREQ_Pos)); 00801 } 00802 00803 /** 00804 * @brief Get the number of DMA request that will be autorized after a synchronization event and/or the number of DMA request needed to generate an event. 00805 * @rmtoll CxCR NBREQ LL_DMAMUX_GetSyncRequestNb 00806 * @param DMAMUXx DMAMUXx Instance 00807 * @param Channel This parameter can be one of the following values: 00808 * @arg @ref LL_DMAMUX_CHANNEL_0 00809 * @arg @ref LL_DMAMUX_CHANNEL_1 00810 * @arg @ref LL_DMAMUX_CHANNEL_2 00811 * @arg @ref LL_DMAMUX_CHANNEL_3 00812 * @arg @ref LL_DMAMUX_CHANNEL_4 00813 * @arg @ref LL_DMAMUX_CHANNEL_5 00814 * @arg @ref LL_DMAMUX_CHANNEL_6 00815 * @arg @ref LL_DMAMUX_CHANNEL_7 00816 * @arg @ref LL_DMAMUX_CHANNEL_8 00817 * @arg @ref LL_DMAMUX_CHANNEL_9 00818 * @arg @ref LL_DMAMUX_CHANNEL_10 00819 * @arg @ref LL_DMAMUX_CHANNEL_11 00820 * @arg @ref LL_DMAMUX_CHANNEL_12 00821 * @arg @ref LL_DMAMUX_CHANNEL_13 00822 * @retval Between Min_Data = 1 and Max_Data = 32 00823 */ 00824 __STATIC_INLINE uint32_t LL_DMAMUX_GetSyncRequestNb(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel) 00825 { 00826 (void)(DMAMUXx); 00827 return (uint32_t)(((READ_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_NBREQ)) >> DMAMUX_CxCR_NBREQ_Pos) + 1U); 00828 } 00829 00830 /** 00831 * @brief Set the polarity of the signal on which the DMA request is synchronized. 00832 * @rmtoll CxCR SPOL LL_DMAMUX_SetSyncPolarity 00833 * @param DMAMUXx DMAMUXx Instance 00834 * @param Channel This parameter can be one of the following values: 00835 * @arg @ref LL_DMAMUX_CHANNEL_0 00836 * @arg @ref LL_DMAMUX_CHANNEL_1 00837 * @arg @ref LL_DMAMUX_CHANNEL_2 00838 * @arg @ref LL_DMAMUX_CHANNEL_3 00839 * @arg @ref LL_DMAMUX_CHANNEL_4 00840 * @arg @ref LL_DMAMUX_CHANNEL_5 00841 * @arg @ref LL_DMAMUX_CHANNEL_6 00842 * @arg @ref LL_DMAMUX_CHANNEL_7 00843 * @arg @ref LL_DMAMUX_CHANNEL_8 00844 * @arg @ref LL_DMAMUX_CHANNEL_9 00845 * @arg @ref LL_DMAMUX_CHANNEL_10 00846 * @arg @ref LL_DMAMUX_CHANNEL_11 00847 * @arg @ref LL_DMAMUX_CHANNEL_12 00848 * @arg @ref LL_DMAMUX_CHANNEL_13 00849 * @param Polarity This parameter can be one of the following values: 00850 * @arg @ref LL_DMAMUX_SYNC_NO_EVENT 00851 * @arg @ref LL_DMAMUX_SYNC_POL_RISING 00852 * @arg @ref LL_DMAMUX_SYNC_POL_FALLING 00853 * @arg @ref LL_DMAMUX_SYNC_POL_RISING_FALLING 00854 * @retval None 00855 */ 00856 __STATIC_INLINE void LL_DMAMUX_SetSyncPolarity(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel, uint32_t Polarity) 00857 { 00858 (void)(DMAMUXx); 00859 MODIFY_REG((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SPOL, Polarity); 00860 } 00861 00862 /** 00863 * @brief Get the polarity of the signal on which the DMA request is synchronized. 00864 * @rmtoll CxCR SPOL LL_DMAMUX_GetSyncPolarity 00865 * @param DMAMUXx DMAMUXx Instance 00866 * @param Channel This parameter can be one of the following values: 00867 * @arg @ref LL_DMAMUX_CHANNEL_0 00868 * @arg @ref LL_DMAMUX_CHANNEL_1 00869 * @arg @ref LL_DMAMUX_CHANNEL_2 00870 * @arg @ref LL_DMAMUX_CHANNEL_3 00871 * @arg @ref LL_DMAMUX_CHANNEL_4 00872 * @arg @ref LL_DMAMUX_CHANNEL_5 00873 * @arg @ref LL_DMAMUX_CHANNEL_6 00874 * @arg @ref LL_DMAMUX_CHANNEL_7 00875 * @arg @ref LL_DMAMUX_CHANNEL_8 00876 * @arg @ref LL_DMAMUX_CHANNEL_9 00877 * @arg @ref LL_DMAMUX_CHANNEL_10 00878 * @arg @ref LL_DMAMUX_CHANNEL_11 00879 * @arg @ref LL_DMAMUX_CHANNEL_12 00880 * @arg @ref LL_DMAMUX_CHANNEL_13 00881 * @retval Returned value can be one of the following values: 00882 * @arg @ref LL_DMAMUX_SYNC_NO_EVENT 00883 * @arg @ref LL_DMAMUX_SYNC_POL_RISING 00884 * @arg @ref LL_DMAMUX_SYNC_POL_FALLING 00885 * @arg @ref LL_DMAMUX_SYNC_POL_RISING_FALLING 00886 */ 00887 __STATIC_INLINE uint32_t LL_DMAMUX_GetSyncPolarity(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel) 00888 { 00889 (void)(DMAMUXx); 00890 return (uint32_t)(READ_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SPOL)); 00891 } 00892 00893 /** 00894 * @brief Enable the Event Generation on DMAMUX channel x. 00895 * @rmtoll CxCR EGE LL_DMAMUX_EnableEventGeneration 00896 * @param DMAMUXx DMAMUXx Instance 00897 * @param Channel This parameter can be one of the following values: 00898 * @arg @ref LL_DMAMUX_CHANNEL_0 00899 * @arg @ref LL_DMAMUX_CHANNEL_1 00900 * @arg @ref LL_DMAMUX_CHANNEL_2 00901 * @arg @ref LL_DMAMUX_CHANNEL_3 00902 * @arg @ref LL_DMAMUX_CHANNEL_4 00903 * @arg @ref LL_DMAMUX_CHANNEL_5 00904 * @arg @ref LL_DMAMUX_CHANNEL_6 00905 * @arg @ref LL_DMAMUX_CHANNEL_7 00906 * @arg @ref LL_DMAMUX_CHANNEL_8 00907 * @arg @ref LL_DMAMUX_CHANNEL_9 00908 * @arg @ref LL_DMAMUX_CHANNEL_10 00909 * @arg @ref LL_DMAMUX_CHANNEL_11 00910 * @arg @ref LL_DMAMUX_CHANNEL_12 00911 * @arg @ref LL_DMAMUX_CHANNEL_13 00912 * @retval None 00913 */ 00914 __STATIC_INLINE void LL_DMAMUX_EnableEventGeneration(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel) 00915 { 00916 (void)(DMAMUXx); 00917 SET_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_EGE); 00918 } 00919 00920 /** 00921 * @brief Disable the Event Generation on DMAMUX channel x. 00922 * @rmtoll CxCR EGE LL_DMAMUX_DisableEventGeneration 00923 * @param DMAMUXx DMAMUXx Instance 00924 * @param Channel This parameter can be one of the following values: 00925 * @arg @ref LL_DMAMUX_CHANNEL_0 00926 * @arg @ref LL_DMAMUX_CHANNEL_1 00927 * @arg @ref LL_DMAMUX_CHANNEL_2 00928 * @arg @ref LL_DMAMUX_CHANNEL_3 00929 * @arg @ref LL_DMAMUX_CHANNEL_4 00930 * @arg @ref LL_DMAMUX_CHANNEL_5 00931 * @arg @ref LL_DMAMUX_CHANNEL_6 00932 * @arg @ref LL_DMAMUX_CHANNEL_7 00933 * @arg @ref LL_DMAMUX_CHANNEL_8 00934 * @arg @ref LL_DMAMUX_CHANNEL_9 00935 * @arg @ref LL_DMAMUX_CHANNEL_10 00936 * @arg @ref LL_DMAMUX_CHANNEL_11 00937 * @arg @ref LL_DMAMUX_CHANNEL_12 00938 * @arg @ref LL_DMAMUX_CHANNEL_13 00939 * @retval None 00940 */ 00941 __STATIC_INLINE void LL_DMAMUX_DisableEventGeneration(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel) 00942 { 00943 (void)(DMAMUXx); 00944 CLEAR_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_EGE); 00945 } 00946 00947 /** 00948 * @brief Check if the Event Generation on DMAMUX channel x is enabled or disabled. 00949 * @rmtoll CxCR EGE LL_DMAMUX_IsEnabledEventGeneration 00950 * @param DMAMUXx DMAMUXx Instance 00951 * @param Channel This parameter can be one of the following values: 00952 * @arg @ref LL_DMAMUX_CHANNEL_0 00953 * @arg @ref LL_DMAMUX_CHANNEL_1 00954 * @arg @ref LL_DMAMUX_CHANNEL_2 00955 * @arg @ref LL_DMAMUX_CHANNEL_3 00956 * @arg @ref LL_DMAMUX_CHANNEL_4 00957 * @arg @ref LL_DMAMUX_CHANNEL_5 00958 * @arg @ref LL_DMAMUX_CHANNEL_6 00959 * @arg @ref LL_DMAMUX_CHANNEL_7 00960 * @arg @ref LL_DMAMUX_CHANNEL_8 00961 * @arg @ref LL_DMAMUX_CHANNEL_9 00962 * @arg @ref LL_DMAMUX_CHANNEL_10 00963 * @arg @ref LL_DMAMUX_CHANNEL_11 00964 * @arg @ref LL_DMAMUX_CHANNEL_12 00965 * @arg @ref LL_DMAMUX_CHANNEL_13 00966 * @retval State of bit (1 or 0). 00967 */ 00968 __STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledEventGeneration(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel) 00969 { 00970 (void)(DMAMUXx); 00971 return ((READ_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_EGE) == (DMAMUX_CxCR_EGE))? 1UL : 0UL); 00972 } 00973 00974 /** 00975 * @brief Enable the synchronization mode. 00976 * @rmtoll CxCR SE LL_DMAMUX_EnableSync 00977 * @param DMAMUXx DMAMUXx Instance 00978 * @param Channel This parameter can be one of the following values: 00979 * @arg @ref LL_DMAMUX_CHANNEL_0 00980 * @arg @ref LL_DMAMUX_CHANNEL_1 00981 * @arg @ref LL_DMAMUX_CHANNEL_2 00982 * @arg @ref LL_DMAMUX_CHANNEL_3 00983 * @arg @ref LL_DMAMUX_CHANNEL_4 00984 * @arg @ref LL_DMAMUX_CHANNEL_5 00985 * @arg @ref LL_DMAMUX_CHANNEL_6 00986 * @arg @ref LL_DMAMUX_CHANNEL_7 00987 * @arg @ref LL_DMAMUX_CHANNEL_8 00988 * @arg @ref LL_DMAMUX_CHANNEL_9 00989 * @arg @ref LL_DMAMUX_CHANNEL_10 00990 * @arg @ref LL_DMAMUX_CHANNEL_11 00991 * @arg @ref LL_DMAMUX_CHANNEL_12 00992 * @arg @ref LL_DMAMUX_CHANNEL_13 00993 * @retval None 00994 */ 00995 __STATIC_INLINE void LL_DMAMUX_EnableSync(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel) 00996 { 00997 (void)(DMAMUXx); 00998 SET_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SE); 00999 } 01000 01001 /** 01002 * @brief Disable the synchronization mode. 01003 * @rmtoll CxCR SE LL_DMAMUX_DisableSync 01004 * @param DMAMUXx DMAMUXx Instance 01005 * @param Channel This parameter can be one of the following values: 01006 * @arg @ref LL_DMAMUX_CHANNEL_0 01007 * @arg @ref LL_DMAMUX_CHANNEL_1 01008 * @arg @ref LL_DMAMUX_CHANNEL_2 01009 * @arg @ref LL_DMAMUX_CHANNEL_3 01010 * @arg @ref LL_DMAMUX_CHANNEL_4 01011 * @arg @ref LL_DMAMUX_CHANNEL_5 01012 * @arg @ref LL_DMAMUX_CHANNEL_6 01013 * @arg @ref LL_DMAMUX_CHANNEL_7 01014 * @arg @ref LL_DMAMUX_CHANNEL_8 01015 * @arg @ref LL_DMAMUX_CHANNEL_9 01016 * @arg @ref LL_DMAMUX_CHANNEL_10 01017 * @arg @ref LL_DMAMUX_CHANNEL_11 01018 * @arg @ref LL_DMAMUX_CHANNEL_12 01019 * @arg @ref LL_DMAMUX_CHANNEL_13 01020 * @retval None 01021 */ 01022 __STATIC_INLINE void LL_DMAMUX_DisableSync(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel) 01023 { 01024 (void)(DMAMUXx); 01025 CLEAR_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SE); 01026 } 01027 01028 /** 01029 * @brief Check if the synchronization mode is enabled or disabled. 01030 * @rmtoll CxCR SE LL_DMAMUX_IsEnabledSync 01031 * @param DMAMUXx DMAMUXx Instance 01032 * @param Channel This parameter can be one of the following values: 01033 * @arg @ref LL_DMAMUX_CHANNEL_0 01034 * @arg @ref LL_DMAMUX_CHANNEL_1 01035 * @arg @ref LL_DMAMUX_CHANNEL_2 01036 * @arg @ref LL_DMAMUX_CHANNEL_3 01037 * @arg @ref LL_DMAMUX_CHANNEL_4 01038 * @arg @ref LL_DMAMUX_CHANNEL_5 01039 * @arg @ref LL_DMAMUX_CHANNEL_6 01040 * @arg @ref LL_DMAMUX_CHANNEL_7 01041 * @arg @ref LL_DMAMUX_CHANNEL_8 01042 * @arg @ref LL_DMAMUX_CHANNEL_9 01043 * @arg @ref LL_DMAMUX_CHANNEL_10 01044 * @arg @ref LL_DMAMUX_CHANNEL_11 01045 * @arg @ref LL_DMAMUX_CHANNEL_12 01046 * @arg @ref LL_DMAMUX_CHANNEL_13 01047 * @retval State of bit (1 or 0). 01048 */ 01049 __STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledSync(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel) 01050 { 01051 (void)(DMAMUXx); 01052 return ((READ_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SE) == (DMAMUX_CxCR_SE))? 1UL : 0UL); 01053 } 01054 01055 /** 01056 * @brief Set DMAMUX synchronization ID on DMAMUX Channel x. 01057 * @rmtoll CxCR SYNC_ID LL_DMAMUX_SetSyncID 01058 * @param DMAMUXx DMAMUXx Instance 01059 * @param Channel This parameter can be one of the following values: 01060 * @arg @ref LL_DMAMUX_CHANNEL_0 01061 * @arg @ref LL_DMAMUX_CHANNEL_1 01062 * @arg @ref LL_DMAMUX_CHANNEL_2 01063 * @arg @ref LL_DMAMUX_CHANNEL_3 01064 * @arg @ref LL_DMAMUX_CHANNEL_4 01065 * @arg @ref LL_DMAMUX_CHANNEL_5 01066 * @arg @ref LL_DMAMUX_CHANNEL_6 01067 * @arg @ref LL_DMAMUX_CHANNEL_7 01068 * @arg @ref LL_DMAMUX_CHANNEL_8 01069 * @arg @ref LL_DMAMUX_CHANNEL_9 01070 * @arg @ref LL_DMAMUX_CHANNEL_10 01071 * @arg @ref LL_DMAMUX_CHANNEL_11 01072 * @arg @ref LL_DMAMUX_CHANNEL_12 01073 * @arg @ref LL_DMAMUX_CHANNEL_13 01074 * @param SyncID This parameter can be one of the following values: 01075 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE0 01076 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE1 01077 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE2 01078 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE3 01079 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE4 01080 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE5 01081 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE6 01082 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE7 01083 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE8 01084 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE9 01085 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE10 01086 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE11 01087 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE12 01088 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE13 01089 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE14 01090 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE15 01091 * @arg @ref LL_DMAMUX_SYNC_DMAMUX_CH0 01092 * @arg @ref LL_DMAMUX_SYNC_DMAMUX_CH1 01093 * @arg @ref LL_DMAMUX_SYNC_DMAMUX_CH2 01094 * @arg @ref LL_DMAMUX_SYNC_DMAMUX_CH3 01095 * @arg @ref LL_DMAMUX_SYNC_LPTIM1_OUT 01096 * @arg @ref LL_DMAMUX_SYNC_LPTIM2_OUT 01097 * @arg @ref LL_DMAMUX_SYNC_DSI_TE 01098 * @arg @ref LL_DMAMUX_SYNC_DSI_REFRESH_END 01099 * @arg @ref LL_DMAMUX_SYNC_DMA2D_TX_END 01100 * @arg @ref LL_DMAMUX_SYNC_LTDC_LINE_IT 01101 * @retval None 01102 */ 01103 __STATIC_INLINE void LL_DMAMUX_SetSyncID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel, uint32_t SyncID) 01104 { 01105 (void)(DMAMUXx); 01106 MODIFY_REG((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SYNC_ID, SyncID); 01107 } 01108 01109 /** 01110 * @brief Get DMAMUX synchronization ID on DMAMUX Channel x. 01111 * @rmtoll CxCR SYNC_ID LL_DMAMUX_GetSyncID 01112 * @param DMAMUXx DMAMUXx Instance 01113 * @param Channel This parameter can be one of the following values: 01114 * @arg @ref LL_DMAMUX_CHANNEL_0 01115 * @arg @ref LL_DMAMUX_CHANNEL_1 01116 * @arg @ref LL_DMAMUX_CHANNEL_2 01117 * @arg @ref LL_DMAMUX_CHANNEL_3 01118 * @arg @ref LL_DMAMUX_CHANNEL_4 01119 * @arg @ref LL_DMAMUX_CHANNEL_5 01120 * @arg @ref LL_DMAMUX_CHANNEL_6 01121 * @arg @ref LL_DMAMUX_CHANNEL_7 01122 * @arg @ref LL_DMAMUX_CHANNEL_8 01123 * @arg @ref LL_DMAMUX_CHANNEL_9 01124 * @arg @ref LL_DMAMUX_CHANNEL_10 01125 * @arg @ref LL_DMAMUX_CHANNEL_11 01126 * @arg @ref LL_DMAMUX_CHANNEL_12 01127 * @arg @ref LL_DMAMUX_CHANNEL_13 01128 * @retval Returned value can be one of the following values: 01129 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE0 01130 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE1 01131 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE2 01132 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE3 01133 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE4 01134 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE5 01135 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE6 01136 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE7 01137 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE8 01138 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE9 01139 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE10 01140 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE11 01141 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE12 01142 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE13 01143 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE14 01144 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE15 01145 * @arg @ref LL_DMAMUX_SYNC_DMAMUX_CH0 01146 * @arg @ref LL_DMAMUX_SYNC_DMAMUX_CH1 01147 * @arg @ref LL_DMAMUX_SYNC_DMAMUX_CH2 01148 * @arg @ref LL_DMAMUX_SYNC_DMAMUX_CH3 01149 * @arg @ref LL_DMAMUX_SYNC_LPTIM1_OUT 01150 * @arg @ref LL_DMAMUX_SYNC_LPTIM2_OUT 01151 * @arg @ref LL_DMAMUX_SYNC_DSI_TE 01152 * @arg @ref LL_DMAMUX_SYNC_DSI_REFRESH_END 01153 * @arg @ref LL_DMAMUX_SYNC_DMA2D_TX_END 01154 * @arg @ref LL_DMAMUX_SYNC_LTDC_LINE_IT 01155 */ 01156 __STATIC_INLINE uint32_t LL_DMAMUX_GetSyncID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel) 01157 { 01158 (void)(DMAMUXx); 01159 return (uint32_t)(READ_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SYNC_ID)); 01160 } 01161 01162 /** 01163 * @brief Enable the Request Generator. 01164 * @rmtoll RGxCR GE LL_DMAMUX_EnableRequestGen 01165 * @param DMAMUXx DMAMUXx Instance 01166 * @param RequestGenChannel This parameter can be one of the following values: 01167 * @arg @ref LL_DMAMUX_REQ_GEN_0 01168 * @arg @ref LL_DMAMUX_REQ_GEN_1 01169 * @arg @ref LL_DMAMUX_REQ_GEN_2 01170 * @arg @ref LL_DMAMUX_REQ_GEN_3 01171 * @retval None 01172 */ 01173 __STATIC_INLINE void LL_DMAMUX_EnableRequestGen(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel) 01174 { 01175 (void)(DMAMUXx); 01176 SET_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_GE); 01177 } 01178 01179 /** 01180 * @brief Disable the Request Generator. 01181 * @rmtoll RGxCR GE LL_DMAMUX_DisableRequestGen 01182 * @param DMAMUXx DMAMUXx Instance 01183 * @param RequestGenChannel This parameter can be one of the following values: 01184 * @arg @ref LL_DMAMUX_REQ_GEN_0 01185 * @arg @ref LL_DMAMUX_REQ_GEN_1 01186 * @arg @ref LL_DMAMUX_REQ_GEN_2 01187 * @arg @ref LL_DMAMUX_REQ_GEN_3 01188 * @retval None 01189 */ 01190 __STATIC_INLINE void LL_DMAMUX_DisableRequestGen(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel) 01191 { 01192 (void)(DMAMUXx); 01193 CLEAR_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_GE); 01194 } 01195 01196 /** 01197 * @brief Check if the Request Generator is enabled or disabled. 01198 * @rmtoll RGxCR GE LL_DMAMUX_IsEnabledRequestGen 01199 * @param DMAMUXx DMAMUXx Instance 01200 * @param RequestGenChannel This parameter can be one of the following values: 01201 * @arg @ref LL_DMAMUX_REQ_GEN_0 01202 * @arg @ref LL_DMAMUX_REQ_GEN_1 01203 * @arg @ref LL_DMAMUX_REQ_GEN_2 01204 * @arg @ref LL_DMAMUX_REQ_GEN_3 01205 * @retval State of bit (1 or 0). 01206 */ 01207 __STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledRequestGen(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel) 01208 { 01209 (void)(DMAMUXx); 01210 return ((READ_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_GE) == (DMAMUX_RGxCR_GE))? 1UL : 0UL); 01211 } 01212 01213 /** 01214 * @brief Set the polarity of the signal on which the DMA request is generated. 01215 * @rmtoll RGxCR GPOL LL_DMAMUX_SetRequestGenPolarity 01216 * @param DMAMUXx DMAMUXx Instance 01217 * @param RequestGenChannel This parameter can be one of the following values: 01218 * @arg @ref LL_DMAMUX_REQ_GEN_0 01219 * @arg @ref LL_DMAMUX_REQ_GEN_1 01220 * @arg @ref LL_DMAMUX_REQ_GEN_2 01221 * @arg @ref LL_DMAMUX_REQ_GEN_3 01222 * @param Polarity This parameter can be one of the following values: 01223 * @arg @ref LL_DMAMUX_REQ_GEN_NO_EVENT 01224 * @arg @ref LL_DMAMUX_REQ_GEN_POL_RISING 01225 * @arg @ref LL_DMAMUX_REQ_GEN_POL_FALLING 01226 * @arg @ref LL_DMAMUX_REQ_GEN_POL_RISING_FALLING 01227 * @retval None 01228 */ 01229 __STATIC_INLINE void LL_DMAMUX_SetRequestGenPolarity(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel, uint32_t Polarity) 01230 { 01231 (void)(DMAMUXx); 01232 MODIFY_REG(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_GPOL, Polarity); 01233 } 01234 01235 /** 01236 * @brief Get the polarity of the signal on which the DMA request is generated. 01237 * @rmtoll RGxCR GPOL LL_DMAMUX_GetRequestGenPolarity 01238 * @param DMAMUXx DMAMUXx Instance 01239 * @param RequestGenChannel This parameter can be one of the following values: 01240 * @arg @ref LL_DMAMUX_REQ_GEN_0 01241 * @arg @ref LL_DMAMUX_REQ_GEN_1 01242 * @arg @ref LL_DMAMUX_REQ_GEN_2 01243 * @arg @ref LL_DMAMUX_REQ_GEN_3 01244 * @retval Returned value can be one of the following values: 01245 * @arg @ref LL_DMAMUX_REQ_GEN_NO_EVENT 01246 * @arg @ref LL_DMAMUX_REQ_GEN_POL_RISING 01247 * @arg @ref LL_DMAMUX_REQ_GEN_POL_FALLING 01248 * @arg @ref LL_DMAMUX_REQ_GEN_POL_RISING_FALLING 01249 */ 01250 __STATIC_INLINE uint32_t LL_DMAMUX_GetRequestGenPolarity(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel) 01251 { 01252 (void)(DMAMUXx); 01253 return (uint32_t)(READ_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_GPOL)); 01254 } 01255 01256 /** 01257 * @brief Set the number of DMA request that will be autorized after a generation event. 01258 * @note This field can only be written when Generator is disabled. 01259 * @rmtoll RGxCR GNBREQ LL_DMAMUX_SetGenRequestNb 01260 * @param DMAMUXx DMAMUXx Instance 01261 * @param RequestGenChannel This parameter can be one of the following values: 01262 * @arg @ref LL_DMAMUX_REQ_GEN_0 01263 * @arg @ref LL_DMAMUX_REQ_GEN_1 01264 * @arg @ref LL_DMAMUX_REQ_GEN_2 01265 * @arg @ref LL_DMAMUX_REQ_GEN_3 01266 * @param RequestNb This parameter must be a value between Min_Data = 1 and Max_Data = 32. 01267 * @retval None 01268 */ 01269 __STATIC_INLINE void LL_DMAMUX_SetGenRequestNb(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel, uint32_t RequestNb) 01270 { 01271 (void)(DMAMUXx); 01272 MODIFY_REG(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_GNBREQ, (RequestNb - 1U) << DMAMUX_RGxCR_GNBREQ_Pos); 01273 } 01274 01275 /** 01276 * @brief Get the number of DMA request that will be autorized after a generation event. 01277 * @rmtoll RGxCR GNBREQ LL_DMAMUX_GetGenRequestNb 01278 * @param DMAMUXx DMAMUXx Instance 01279 * @param RequestGenChannel This parameter can be one of the following values: 01280 * @arg @ref LL_DMAMUX_REQ_GEN_0 01281 * @arg @ref LL_DMAMUX_REQ_GEN_1 01282 * @arg @ref LL_DMAMUX_REQ_GEN_2 01283 * @arg @ref LL_DMAMUX_REQ_GEN_3 01284 * @retval Between Min_Data = 1 and Max_Data = 32 01285 */ 01286 __STATIC_INLINE uint32_t LL_DMAMUX_GetGenRequestNb(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel) 01287 { 01288 (void)(DMAMUXx); 01289 return (uint32_t)((READ_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_GNBREQ) >> DMAMUX_RGxCR_GNBREQ_Pos) + 1U); 01290 } 01291 01292 /** 01293 * @brief Set DMAMUX external Request Signal ID on DMAMUX Request Generation Trigger Event Channel x. 01294 * @rmtoll RGxCR SIG_ID LL_DMAMUX_SetRequestSignalID 01295 * @param DMAMUXx DMAMUXx Instance 01296 * @param RequestGenChannel This parameter can be one of the following values: 01297 * @arg @ref LL_DMAMUX_REQ_GEN_0 01298 * @arg @ref LL_DMAMUX_REQ_GEN_1 01299 * @arg @ref LL_DMAMUX_REQ_GEN_2 01300 * @arg @ref LL_DMAMUX_REQ_GEN_3 01301 * @param RequestSignalID This parameter can be one of the following values: 01302 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE0 01303 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE1 01304 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE2 01305 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE3 01306 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE4 01307 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE5 01308 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE6 01309 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE7 01310 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE8 01311 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE9 01312 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE10 01313 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE11 01314 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE12 01315 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE13 01316 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE14 01317 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE15 01318 * @arg @ref LL_DMAMUX_REQ_GEN_DMAMUX_CH0 01319 * @arg @ref LL_DMAMUX_REQ_GEN_DMAMUX_CH1 01320 * @arg @ref LL_DMAMUX_REQ_GEN_DMAMUX_CH2 01321 * @arg @ref LL_DMAMUX_REQ_GEN_DMAMUX_CH3 01322 * @arg @ref LL_DMAMUX_REQ_GEN_LPTIM1_OUT 01323 * @arg @ref LL_DMAMUX_REQ_GEN_LPTIM2_OUT 01324 * @arg @ref LL_DMAMUX_REQ_GEN_DSI_TE 01325 * @arg @ref LL_DMAMUX_REQ_GEN_DSI_REFRESH_END 01326 * @arg @ref LL_DMAMUX_REQ_GEN_DMA2D_TX_END 01327 * @arg @ref LL_DMAMUX_REQ_GEN_LTDC_LINE_IT 01328 * @retval None 01329 */ 01330 __STATIC_INLINE void LL_DMAMUX_SetRequestSignalID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel, uint32_t RequestSignalID) 01331 { 01332 (void)(DMAMUXx); 01333 MODIFY_REG(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_SIG_ID, RequestSignalID); 01334 } 01335 01336 /** 01337 * @brief Get DMAMUX external Request Signal ID set on DMAMUX Channel x. 01338 * @rmtoll RGxCR SIG_ID LL_DMAMUX_GetRequestSignalID 01339 * @param DMAMUXx DMAMUXx Instance 01340 * @param RequestGenChannel This parameter can be one of the following values: 01341 * @arg @ref LL_DMAMUX_REQ_GEN_0 01342 * @arg @ref LL_DMAMUX_REQ_GEN_1 01343 * @arg @ref LL_DMAMUX_REQ_GEN_2 01344 * @arg @ref LL_DMAMUX_REQ_GEN_3 01345 * @retval Returned value can be one of the following values: 01346 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE0 01347 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE1 01348 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE2 01349 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE3 01350 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE4 01351 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE5 01352 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE6 01353 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE7 01354 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE8 01355 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE9 01356 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE10 01357 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE11 01358 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE12 01359 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE13 01360 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE14 01361 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE15 01362 * @arg @ref LL_DMAMUX_REQ_GEN_DMAMUX_CH0 01363 * @arg @ref LL_DMAMUX_REQ_GEN_DMAMUX_CH1 01364 * @arg @ref LL_DMAMUX_REQ_GEN_DMAMUX_CH2 01365 * @arg @ref LL_DMAMUX_REQ_GEN_DMAMUX_CH3 01366 * @arg @ref LL_DMAMUX_REQ_GEN_LPTIM1_OUT 01367 * @arg @ref LL_DMAMUX_REQ_GEN_LPTIM2_OUT 01368 * @arg @ref LL_DMAMUX_REQ_GEN_DSI_TE 01369 * @arg @ref LL_DMAMUX_REQ_GEN_DSI_REFRESH_END 01370 * @arg @ref LL_DMAMUX_REQ_GEN_DMA2D_TX_END 01371 * @arg @ref LL_DMAMUX_REQ_GEN_LTDC_LINE_IT 01372 */ 01373 __STATIC_INLINE uint32_t LL_DMAMUX_GetRequestSignalID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel) 01374 { 01375 (void)(DMAMUXx); 01376 return (uint32_t)(READ_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE * (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_SIG_ID)); 01377 } 01378 01379 /** 01380 * @} 01381 */ 01382 01383 /** @defgroup DMAMUX_LL_EF_FLAG_Management FLAG_Management 01384 * @{ 01385 */ 01386 01387 /** 01388 * @brief Get Synchronization Event Overrun Flag Channel 0. 01389 * @rmtoll CSR SOF0 LL_DMAMUX_IsActiveFlag_SO0 01390 * @param DMAMUXx DMAMUXx DMAMUXx Instance 01391 * @retval State of bit (1 or 0). 01392 */ 01393 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO0(DMAMUX_Channel_TypeDef *DMAMUXx) 01394 { 01395 (void)(DMAMUXx); 01396 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF0) == (DMAMUX_CSR_SOF0)) ? 1UL : 0UL); 01397 } 01398 01399 /** 01400 * @brief Get Synchronization Event Overrun Flag Channel 1. 01401 * @rmtoll CSR SOF1 LL_DMAMUX_IsActiveFlag_SO1 01402 * @param DMAMUXx DMAMUXx DMAMUXx Instance 01403 * @retval State of bit (1 or 0). 01404 */ 01405 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO1(DMAMUX_Channel_TypeDef *DMAMUXx) 01406 { 01407 (void)(DMAMUXx); 01408 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF1) == (DMAMUX_CSR_SOF1)) ? 1UL : 0UL); 01409 } 01410 01411 /** 01412 * @brief Get Synchronization Event Overrun Flag Channel 2. 01413 * @rmtoll CSR SOF2 LL_DMAMUX_IsActiveFlag_SO2 01414 * @param DMAMUXx DMAMUXx DMAMUXx Instance 01415 * @retval State of bit (1 or 0). 01416 */ 01417 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO2(DMAMUX_Channel_TypeDef *DMAMUXx) 01418 { 01419 (void)(DMAMUXx); 01420 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF2) == (DMAMUX_CSR_SOF2)) ? 1UL : 0UL); 01421 } 01422 01423 /** 01424 * @brief Get Synchronization Event Overrun Flag Channel 3. 01425 * @rmtoll CSR SOF3 LL_DMAMUX_IsActiveFlag_SO3 01426 * @param DMAMUXx DMAMUXx DMAMUXx Instance 01427 * @retval State of bit (1 or 0). 01428 */ 01429 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO3(DMAMUX_Channel_TypeDef *DMAMUXx) 01430 { 01431 (void)(DMAMUXx); 01432 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF3) == (DMAMUX_CSR_SOF3)) ? 1UL : 0UL); 01433 } 01434 01435 /** 01436 * @brief Get Synchronization Event Overrun Flag Channel 4. 01437 * @rmtoll CSR SOF4 LL_DMAMUX_IsActiveFlag_SO4 01438 * @param DMAMUXx DMAMUXx DMAMUXx Instance 01439 * @retval State of bit (1 or 0). 01440 */ 01441 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO4(DMAMUX_Channel_TypeDef *DMAMUXx) 01442 { 01443 (void)(DMAMUXx); 01444 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF4) == (DMAMUX_CSR_SOF4)) ? 1UL : 0UL); 01445 } 01446 01447 /** 01448 * @brief Get Synchronization Event Overrun Flag Channel 5. 01449 * @rmtoll CSR SOF5 LL_DMAMUX_IsActiveFlag_SO5 01450 * @param DMAMUXx DMAMUXx DMAMUXx Instance 01451 * @retval State of bit (1 or 0). 01452 */ 01453 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO5(DMAMUX_Channel_TypeDef *DMAMUXx) 01454 { 01455 (void)(DMAMUXx); 01456 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF5) == (DMAMUX_CSR_SOF5)) ? 1UL : 0UL); 01457 } 01458 01459 /** 01460 * @brief Get Synchronization Event Overrun Flag Channel 6. 01461 * @rmtoll CSR SOF6 LL_DMAMUX_IsActiveFlag_SO6 01462 * @param DMAMUXx DMAMUXx DMAMUXx Instance 01463 * @retval State of bit (1 or 0). 01464 */ 01465 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO6(DMAMUX_Channel_TypeDef *DMAMUXx) 01466 { 01467 (void)(DMAMUXx); 01468 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF6) == (DMAMUX_CSR_SOF6)) ? 1UL : 0UL); 01469 } 01470 01471 /** 01472 * @brief Get Synchronization Event Overrun Flag Channel 7. 01473 * @rmtoll CSR SOF7 LL_DMAMUX_IsActiveFlag_SO7 01474 * @param DMAMUXx DMAMUXx DMAMUXx Instance 01475 * @retval State of bit (1 or 0). 01476 */ 01477 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO7(DMAMUX_Channel_TypeDef *DMAMUXx) 01478 { 01479 (void)(DMAMUXx); 01480 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF7) == (DMAMUX_CSR_SOF7)) ? 1UL : 0UL); 01481 } 01482 01483 /** 01484 * @brief Get Synchronization Event Overrun Flag Channel 8. 01485 * @rmtoll CSR SOF8 LL_DMAMUX_IsActiveFlag_SO8 01486 * @param DMAMUXx DMAMUXx DMAMUXx Instance 01487 * @retval State of bit (1 or 0). 01488 */ 01489 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO8(DMAMUX_Channel_TypeDef *DMAMUXx) 01490 { 01491 (void)(DMAMUXx); 01492 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF8) == (DMAMUX_CSR_SOF8)) ? 1UL : 0UL); 01493 } 01494 01495 /** 01496 * @brief Get Synchronization Event Overrun Flag Channel 9. 01497 * @rmtoll CSR SOF9 LL_DMAMUX_IsActiveFlag_SO9 01498 * @param DMAMUXx DMAMUXx DMAMUXx Instance 01499 * @retval State of bit (1 or 0). 01500 */ 01501 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO9(DMAMUX_Channel_TypeDef *DMAMUXx) 01502 { 01503 (void)(DMAMUXx); 01504 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF9) == (DMAMUX_CSR_SOF9)) ? 1UL : 0UL); 01505 } 01506 01507 /** 01508 * @brief Get Synchronization Event Overrun Flag Channel 10. 01509 * @rmtoll CSR SOF10 LL_DMAMUX_IsActiveFlag_SO10 01510 * @param DMAMUXx DMAMUXx DMAMUXx Instance 01511 * @retval State of bit (1 or 0). 01512 */ 01513 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO10(DMAMUX_Channel_TypeDef *DMAMUXx) 01514 { 01515 (void)(DMAMUXx); 01516 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF10) == (DMAMUX_CSR_SOF10)) ? 1UL : 0UL); 01517 } 01518 01519 /** 01520 * @brief Get Synchronization Event Overrun Flag Channel 11. 01521 * @rmtoll CSR SOF11 LL_DMAMUX_IsActiveFlag_SO11 01522 * @param DMAMUXx DMAMUXx DMAMUXx Instance 01523 * @retval State of bit (1 or 0). 01524 */ 01525 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO11(DMAMUX_Channel_TypeDef *DMAMUXx) 01526 { 01527 (void)(DMAMUXx); 01528 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF11) == (DMAMUX_CSR_SOF11)) ? 1UL : 0UL); 01529 } 01530 01531 /** 01532 * @brief Get Synchronization Event Overrun Flag Channel 12. 01533 * @rmtoll CSR SOF12 LL_DMAMUX_IsActiveFlag_SO12 01534 * @param DMAMUXx DMAMUXx DMAMUXx Instance 01535 * @retval State of bit (1 or 0). 01536 */ 01537 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO12(DMAMUX_Channel_TypeDef *DMAMUXx) 01538 { 01539 (void)(DMAMUXx); 01540 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF12) == (DMAMUX_CSR_SOF12)) ? 1UL : 0UL); 01541 } 01542 01543 /** 01544 * @brief Get Synchronization Event Overrun Flag Channel 13. 01545 * @rmtoll CSR SOF13 LL_DMAMUX_IsActiveFlag_SO13 01546 * @param DMAMUXx DMAMUXx DMAMUXx Instance 01547 * @retval State of bit (1 or 0). 01548 */ 01549 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO13(DMAMUX_Channel_TypeDef *DMAMUXx) 01550 { 01551 (void)(DMAMUXx); 01552 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF13) == (DMAMUX_CSR_SOF13)) ? 1UL : 0UL); 01553 } 01554 01555 /** 01556 * @brief Get Request Generator 0 Trigger Event Overrun Flag. 01557 * @rmtoll RGSR OF0 LL_DMAMUX_IsActiveFlag_RGO0 01558 * @param DMAMUXx DMAMUXx DMAMUXx Instance 01559 * @retval State of bit (1 or 0). 01560 */ 01561 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_RGO0(DMAMUX_Channel_TypeDef *DMAMUXx) 01562 { 01563 (void)(DMAMUXx); 01564 return ((READ_BIT(DMAMUX1_RequestGenStatus->RGSR, DMAMUX_RGSR_OF0) == (DMAMUX_RGSR_OF0)) ? 1UL : 0UL); 01565 } 01566 01567 /** 01568 * @brief Get Request Generator 1 Trigger Event Overrun Flag. 01569 * @rmtoll RGSR OF1 LL_DMAMUX_IsActiveFlag_RGO1 01570 * @param DMAMUXx DMAMUXx DMAMUXx Instance 01571 * @retval State of bit (1 or 0). 01572 */ 01573 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_RGO1(DMAMUX_Channel_TypeDef *DMAMUXx) 01574 { 01575 (void)(DMAMUXx); 01576 return ((READ_BIT(DMAMUX1_RequestGenStatus->RGSR, DMAMUX_RGSR_OF1) == (DMAMUX_RGSR_OF1)) ? 1UL : 0UL); 01577 } 01578 01579 /** 01580 * @brief Get Request Generator 2 Trigger Event Overrun Flag. 01581 * @rmtoll RGSR OF2 LL_DMAMUX_IsActiveFlag_RGO2 01582 * @param DMAMUXx DMAMUXx DMAMUXx Instance 01583 * @retval State of bit (1 or 0). 01584 */ 01585 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_RGO2(DMAMUX_Channel_TypeDef *DMAMUXx) 01586 { 01587 (void)(DMAMUXx); 01588 return ((READ_BIT(DMAMUX1_RequestGenStatus->RGSR, DMAMUX_RGSR_OF2) == (DMAMUX_RGSR_OF2)) ? 1UL : 0UL); 01589 } 01590 01591 /** 01592 * @brief Get Request Generator 3 Trigger Event Overrun Flag. 01593 * @rmtoll RGSR OF3 LL_DMAMUX_IsActiveFlag_RGO3 01594 * @param DMAMUXx DMAMUXx DMAMUXx Instance 01595 * @retval State of bit (1 or 0). 01596 */ 01597 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_RGO3(DMAMUX_Channel_TypeDef *DMAMUXx) 01598 { 01599 (void)(DMAMUXx); 01600 return ((READ_BIT(DMAMUX1_RequestGenStatus->RGSR, DMAMUX_RGSR_OF3) == (DMAMUX_RGSR_OF3)) ? 1UL : 0UL); 01601 } 01602 01603 /** 01604 * @brief Clear Synchronization Event Overrun Flag Channel 0. 01605 * @rmtoll CFR CSOF0 LL_DMAMUX_ClearFlag_SO0 01606 * @param DMAMUXx DMAMUXx DMAMUXx Instance 01607 * @retval None 01608 */ 01609 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO0(DMAMUX_Channel_TypeDef * DMAMUXx) 01610 { 01611 (void)(DMAMUXx); 01612 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF0); 01613 } 01614 01615 /** 01616 * @brief Clear Synchronization Event Overrun Flag Channel 1. 01617 * @rmtoll CFR CSOF1 LL_DMAMUX_ClearFlag_SO1 01618 * @param DMAMUXx DMAMUXx DMAMUXx Instance 01619 * @retval None 01620 */ 01621 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO1(DMAMUX_Channel_TypeDef *DMAMUXx) 01622 { 01623 (void)(DMAMUXx); 01624 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF1); 01625 } 01626 01627 /** 01628 * @brief Clear Synchronization Event Overrun Flag Channel 2. 01629 * @rmtoll CFR CSOF2 LL_DMAMUX_ClearFlag_SO2 01630 * @param DMAMUXx DMAMUXx DMAMUXx Instance 01631 * @retval None 01632 */ 01633 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO2(DMAMUX_Channel_TypeDef *DMAMUXx) 01634 { 01635 (void)(DMAMUXx); 01636 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF2); 01637 } 01638 01639 /** 01640 * @brief Clear Synchronization Event Overrun Flag Channel 3. 01641 * @rmtoll CFR CSOF3 LL_DMAMUX_ClearFlag_SO3 01642 * @param DMAMUXx DMAMUXx DMAMUXx Instance 01643 * @retval None 01644 */ 01645 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO3(DMAMUX_Channel_TypeDef *DMAMUXx) 01646 { 01647 (void)(DMAMUXx); 01648 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF3); 01649 } 01650 01651 /** 01652 * @brief Clear Synchronization Event Overrun Flag Channel 4. 01653 * @rmtoll CFR CSOF4 LL_DMAMUX_ClearFlag_SO4 01654 * @param DMAMUXx DMAMUXx DMAMUXx Instance 01655 * @retval None 01656 */ 01657 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO4(DMAMUX_Channel_TypeDef *DMAMUXx) 01658 { 01659 (void)(DMAMUXx); 01660 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF4); 01661 } 01662 01663 /** 01664 * @brief Clear Synchronization Event Overrun Flag Channel 5. 01665 * @rmtoll CFR CSOF5 LL_DMAMUX_ClearFlag_SO5 01666 * @param DMAMUXx DMAMUXx DMAMUXx Instance 01667 * @retval None 01668 */ 01669 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO5(DMAMUX_Channel_TypeDef *DMAMUXx) 01670 { 01671 (void)(DMAMUXx); 01672 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF5); 01673 } 01674 01675 /** 01676 * @brief Clear Synchronization Event Overrun Flag Channel 6. 01677 * @rmtoll CFR CSOF6 LL_DMAMUX_ClearFlag_SO6 01678 * @param DMAMUXx DMAMUXx DMAMUXx Instance 01679 * @retval None 01680 */ 01681 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO6(DMAMUX_Channel_TypeDef *DMAMUXx) 01682 { 01683 (void)(DMAMUXx); 01684 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF6); 01685 } 01686 01687 /** 01688 * @brief Clear Synchronization Event Overrun Flag Channel 7. 01689 * @rmtoll CFR CSOF7 LL_DMAMUX_ClearFlag_SO7 01690 * @param DMAMUXx DMAMUXx DMAMUXx Instance 01691 * @retval None 01692 */ 01693 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO7(DMAMUX_Channel_TypeDef *DMAMUXx) 01694 { 01695 (void)(DMAMUXx); 01696 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF7); 01697 } 01698 01699 /** 01700 * @brief Clear Synchronization Event Overrun Flag Channel 8. 01701 * @rmtoll CFR CSOF8 LL_DMAMUX_ClearFlag_SO8 01702 * @param DMAMUXx DMAMUXx DMAMUXx Instance 01703 * @retval None 01704 */ 01705 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO8(DMAMUX_Channel_TypeDef *DMAMUXx) 01706 { 01707 (void)(DMAMUXx); 01708 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF8); 01709 } 01710 01711 /** 01712 * @brief Clear Synchronization Event Overrun Flag Channel 9. 01713 * @rmtoll CFR CSOF9 LL_DMAMUX_ClearFlag_SO9 01714 * @param DMAMUXx DMAMUXx DMAMUXx Instance 01715 * @retval None 01716 */ 01717 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO9(DMAMUX_Channel_TypeDef *DMAMUXx) 01718 { 01719 (void)(DMAMUXx); 01720 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF9); 01721 } 01722 01723 /** 01724 * @brief Clear Synchronization Event Overrun Flag Channel 10. 01725 * @rmtoll CFR CSOF10 LL_DMAMUX_ClearFlag_SO10 01726 * @param DMAMUXx DMAMUXx DMAMUXx Instance 01727 * @retval None 01728 */ 01729 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO10(DMAMUX_Channel_TypeDef *DMAMUXx) 01730 { 01731 (void)(DMAMUXx); 01732 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF10); 01733 } 01734 01735 /** 01736 * @brief Clear Synchronization Event Overrun Flag Channel 11. 01737 * @rmtoll CFR CSOF11 LL_DMAMUX_ClearFlag_SO11 01738 * @param DMAMUXx DMAMUXx DMAMUXx Instance 01739 * @retval None 01740 */ 01741 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO11(DMAMUX_Channel_TypeDef *DMAMUXx) 01742 { 01743 (void)(DMAMUXx); 01744 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF11); 01745 } 01746 01747 /** 01748 * @brief Clear Synchronization Event Overrun Flag Channel 12. 01749 * @rmtoll CFR CSOF12 LL_DMAMUX_ClearFlag_SO12 01750 * @param DMAMUXx DMAMUXx DMAMUXx Instance 01751 * @retval None 01752 */ 01753 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO12(DMAMUX_Channel_TypeDef *DMAMUXx) 01754 { 01755 (void)(DMAMUXx); 01756 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF12); 01757 } 01758 01759 /** 01760 * @brief Clear Synchronization Event Overrun Flag Channel 13. 01761 * @rmtoll CFR CSOF13 LL_DMAMUX_ClearFlag_SO13 01762 * @param DMAMUXx DMAMUXx DMAMUXx Instance 01763 * @retval None 01764 */ 01765 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO13(DMAMUX_Channel_TypeDef *DMAMUXx) 01766 { 01767 (void)(DMAMUXx); 01768 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF13); 01769 } 01770 01771 /** 01772 * @brief Clear Request Generator 0 Trigger Event Overrun Flag. 01773 * @rmtoll RGCFR COF0 LL_DMAMUX_ClearFlag_RGO0 01774 * @param DMAMUXx DMAMUXx DMAMUXx Instance 01775 * @retval None 01776 */ 01777 __STATIC_INLINE void LL_DMAMUX_ClearFlag_RGO0(DMAMUX_Channel_TypeDef *DMAMUXx) 01778 { 01779 (void)(DMAMUXx); 01780 SET_BIT(DMAMUX1_RequestGenStatus->RGCFR, DMAMUX_RGCFR_COF0); 01781 } 01782 01783 /** 01784 * @brief Clear Request Generator 1 Trigger Event Overrun Flag. 01785 * @rmtoll RGCFR COF1 LL_DMAMUX_ClearFlag_RGO1 01786 * @param DMAMUXx DMAMUXx DMAMUXx Instance 01787 * @retval None 01788 */ 01789 __STATIC_INLINE void LL_DMAMUX_ClearFlag_RGO1(DMAMUX_Channel_TypeDef *DMAMUXx) 01790 { 01791 (void)(DMAMUXx); 01792 SET_BIT(DMAMUX1_RequestGenStatus->RGCFR, DMAMUX_RGCFR_COF1); 01793 } 01794 01795 /** 01796 * @brief Clear Request Generator 2 Trigger Event Overrun Flag. 01797 * @rmtoll RGCFR COF2 LL_DMAMUX_ClearFlag_RGO2 01798 * @param DMAMUXx DMAMUXx DMAMUXx Instance 01799 * @retval None 01800 */ 01801 __STATIC_INLINE void LL_DMAMUX_ClearFlag_RGO2(DMAMUX_Channel_TypeDef *DMAMUXx) 01802 { 01803 (void)(DMAMUXx); 01804 SET_BIT(DMAMUX1_RequestGenStatus->RGCFR, DMAMUX_RGCFR_COF2); 01805 } 01806 01807 /** 01808 * @brief Clear Request Generator 3 Trigger Event Overrun Flag. 01809 * @rmtoll RGCFR COF3 LL_DMAMUX_ClearFlag_RGO3 01810 * @param DMAMUXx DMAMUXx DMAMUXx Instance 01811 * @retval None 01812 */ 01813 __STATIC_INLINE void LL_DMAMUX_ClearFlag_RGO3(DMAMUX_Channel_TypeDef *DMAMUXx) 01814 { 01815 (void)(DMAMUXx); 01816 SET_BIT(DMAMUX1_RequestGenStatus->RGCFR, DMAMUX_RGCFR_COF3); 01817 } 01818 01819 /** 01820 * @} 01821 */ 01822 01823 /** @defgroup DMAMUX_LL_EF_IT_Management IT_Management 01824 * @{ 01825 */ 01826 01827 /** 01828 * @brief Enable the Synchronization Event Overrun Interrupt on DMAMUX channel x. 01829 * @rmtoll CxCR SOIE LL_DMAMUX_EnableIT_SO 01830 * @param DMAMUXx DMAMUXx Instance 01831 * @param Channel This parameter can be one of the following values: 01832 * @arg @ref LL_DMAMUX_CHANNEL_0 01833 * @arg @ref LL_DMAMUX_CHANNEL_1 01834 * @arg @ref LL_DMAMUX_CHANNEL_2 01835 * @arg @ref LL_DMAMUX_CHANNEL_3 01836 * @arg @ref LL_DMAMUX_CHANNEL_4 01837 * @arg @ref LL_DMAMUX_CHANNEL_5 01838 * @arg @ref LL_DMAMUX_CHANNEL_6 01839 * @arg @ref LL_DMAMUX_CHANNEL_7 01840 * @arg @ref LL_DMAMUX_CHANNEL_8 01841 * @arg @ref LL_DMAMUX_CHANNEL_9 01842 * @arg @ref LL_DMAMUX_CHANNEL_10 01843 * @arg @ref LL_DMAMUX_CHANNEL_11 01844 * @arg @ref LL_DMAMUX_CHANNEL_12 01845 * @arg @ref LL_DMAMUX_CHANNEL_13 01846 * @retval None 01847 */ 01848 __STATIC_INLINE void LL_DMAMUX_EnableIT_SO(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel) 01849 { 01850 (void)(DMAMUXx); 01851 SET_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SOIE); 01852 } 01853 01854 /** 01855 * @brief Disable the Synchronization Event Overrun Interrupt on DMAMUX channel x. 01856 * @rmtoll CxCR SOIE LL_DMAMUX_DisableIT_SO 01857 * @param DMAMUXx DMAMUXx Instance 01858 * @param Channel This parameter can be one of the following values: 01859 * @arg @ref LL_DMAMUX_CHANNEL_0 01860 * @arg @ref LL_DMAMUX_CHANNEL_1 01861 * @arg @ref LL_DMAMUX_CHANNEL_2 01862 * @arg @ref LL_DMAMUX_CHANNEL_3 01863 * @arg @ref LL_DMAMUX_CHANNEL_4 01864 * @arg @ref LL_DMAMUX_CHANNEL_5 01865 * @arg @ref LL_DMAMUX_CHANNEL_6 01866 * @arg @ref LL_DMAMUX_CHANNEL_7 01867 * @arg @ref LL_DMAMUX_CHANNEL_8 01868 * @arg @ref LL_DMAMUX_CHANNEL_9 01869 * @arg @ref LL_DMAMUX_CHANNEL_10 01870 * @arg @ref LL_DMAMUX_CHANNEL_11 01871 * @arg @ref LL_DMAMUX_CHANNEL_12 01872 * @arg @ref LL_DMAMUX_CHANNEL_13 01873 * @retval None 01874 */ 01875 __STATIC_INLINE void LL_DMAMUX_DisableIT_SO(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel) 01876 { 01877 (void)(DMAMUXx); 01878 CLEAR_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SOIE); 01879 } 01880 01881 /** 01882 * @brief Check if the Synchronization Event Overrun Interrupt on DMAMUX channel x is enabled or disabled. 01883 * @rmtoll CxCR SOIE LL_DMAMUX_IsEnabledIT_SO 01884 * @param DMAMUXx DMAMUXx Instance 01885 * @param Channel This parameter can be one of the following values: 01886 * @arg @ref LL_DMAMUX_CHANNEL_0 01887 * @arg @ref LL_DMAMUX_CHANNEL_1 01888 * @arg @ref LL_DMAMUX_CHANNEL_2 01889 * @arg @ref LL_DMAMUX_CHANNEL_3 01890 * @arg @ref LL_DMAMUX_CHANNEL_4 01891 * @arg @ref LL_DMAMUX_CHANNEL_5 01892 * @arg @ref LL_DMAMUX_CHANNEL_6 01893 * @arg @ref LL_DMAMUX_CHANNEL_7 01894 * @arg @ref LL_DMAMUX_CHANNEL_8 01895 * @arg @ref LL_DMAMUX_CHANNEL_9 01896 * @arg @ref LL_DMAMUX_CHANNEL_10 01897 * @arg @ref LL_DMAMUX_CHANNEL_11 01898 * @arg @ref LL_DMAMUX_CHANNEL_12 01899 * @arg @ref LL_DMAMUX_CHANNEL_13 01900 * @retval State of bit (1 or 0). 01901 */ 01902 __STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledIT_SO(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel) 01903 { 01904 (void)(DMAMUXx); 01905 return (((READ_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SOIE)) == (DMAMUX_CxCR_SOIE))? 1UL : 0UL); 01906 } 01907 01908 /** 01909 * @brief Enable the Request Generation Trigger Event Overrun Interrupt on DMAMUX channel x. 01910 * @rmtoll RGxCR OIE LL_DMAMUX_EnableIT_RGO 01911 * @param DMAMUXx DMAMUXx Instance 01912 * @param RequestGenChannel This parameter can be one of the following values: 01913 * @arg @ref LL_DMAMUX_REQ_GEN_0 01914 * @arg @ref LL_DMAMUX_REQ_GEN_1 01915 * @arg @ref LL_DMAMUX_REQ_GEN_2 01916 * @arg @ref LL_DMAMUX_REQ_GEN_3 01917 * @retval None 01918 */ 01919 __STATIC_INLINE void LL_DMAMUX_EnableIT_RGO(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel) 01920 { 01921 (void)(DMAMUXx); 01922 SET_BIT((DMAMUX1_RequestGenerator0 + RequestGenChannel)->RGCR, DMAMUX_RGxCR_OIE); 01923 } 01924 01925 /** 01926 * @brief Disable the Request Generation Trigger Event Overrun Interrupt on DMAMUX channel x. 01927 * @rmtoll RGxCR OIE LL_DMAMUX_DisableIT_RGO 01928 * @param DMAMUXx DMAMUXx Instance 01929 * @param RequestGenChannel This parameter can be one of the following values: 01930 * @arg @ref LL_DMAMUX_REQ_GEN_0 01931 * @arg @ref LL_DMAMUX_REQ_GEN_1 01932 * @arg @ref LL_DMAMUX_REQ_GEN_2 01933 * @arg @ref LL_DMAMUX_REQ_GEN_3 01934 * @retval None 01935 */ 01936 __STATIC_INLINE void LL_DMAMUX_DisableIT_RGO(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel) 01937 { 01938 (void)(DMAMUXx); 01939 CLEAR_BIT((DMAMUX1_RequestGenerator0 + RequestGenChannel)->RGCR, DMAMUX_RGxCR_OIE); 01940 } 01941 01942 /** 01943 * @brief Check if the Request Generation Trigger Event Overrun Interrupt on DMAMUX channel x is enabled or disabled. 01944 * @rmtoll RGxCR OIE LL_DMAMUX_IsEnabledIT_RGO 01945 * @param DMAMUXx DMAMUXx Instance 01946 * @param RequestGenChannel This parameter can be one of the following values: 01947 * @arg @ref LL_DMAMUX_REQ_GEN_0 01948 * @arg @ref LL_DMAMUX_REQ_GEN_1 01949 * @arg @ref LL_DMAMUX_REQ_GEN_2 01950 * @arg @ref LL_DMAMUX_REQ_GEN_3 01951 * @retval State of bit (1 or 0). 01952 */ 01953 __STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledIT_RGO(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel) 01954 { 01955 (void)(DMAMUXx); 01956 return ((READ_BIT((DMAMUX1_RequestGenerator0 + RequestGenChannel)->RGCR, DMAMUX_RGxCR_OIE) == (DMAMUX_RGxCR_OIE))? 1UL : 0UL); 01957 } 01958 01959 /** 01960 * @} 01961 */ 01962 01963 /** 01964 * @} 01965 */ 01966 01967 /** 01968 * @} 01969 */ 01970 01971 #endif /* DMAMUX1 */ 01972 01973 /** 01974 * @} 01975 */ 01976 01977 #ifdef __cplusplus 01978 } 01979 #endif 01980 01981 #endif /* STM32L4xx_LL_DMAMUX_H */