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STM32L443xx HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32l4xx_ll_exti.h 00004 * @author MCD Application Team 00005 * @brief Header file of EXTI LL module. 00006 ****************************************************************************** 00007 * @attention 00008 * 00009 * Copyright (c) 2017 STMicroelectronics. 00010 * All rights reserved. 00011 * 00012 * This software is licensed under terms that can be found in the LICENSE file 00013 * in the root directory of this software component. 00014 * If no LICENSE file comes with this software, it is provided AS-IS. 00015 * 00016 ****************************************************************************** 00017 */ 00018 00019 /* Define to prevent recursive inclusion -------------------------------------*/ 00020 #ifndef STM32L4xx_LL_EXTI_H 00021 #define STM32L4xx_LL_EXTI_H 00022 00023 #ifdef __cplusplus 00024 extern "C" { 00025 #endif 00026 00027 /* Includes ------------------------------------------------------------------*/ 00028 #include "stm32l4xx.h" 00029 00030 /** @addtogroup STM32L4xx_LL_Driver 00031 * @{ 00032 */ 00033 00034 #if defined (EXTI) 00035 00036 /** @defgroup EXTI_LL EXTI 00037 * @{ 00038 */ 00039 00040 /* Private types -------------------------------------------------------------*/ 00041 /* Private variables ---------------------------------------------------------*/ 00042 /* Private constants ---------------------------------------------------------*/ 00043 /* Private Macros ------------------------------------------------------------*/ 00044 #if defined(USE_FULL_LL_DRIVER) 00045 /** @defgroup EXTI_LL_Private_Macros EXTI Private Macros 00046 * @{ 00047 */ 00048 /** 00049 * @} 00050 */ 00051 #endif /*USE_FULL_LL_DRIVER*/ 00052 /* Exported types ------------------------------------------------------------*/ 00053 #if defined(USE_FULL_LL_DRIVER) 00054 /** @defgroup EXTI_LL_ES_INIT EXTI Exported Init structure 00055 * @{ 00056 */ 00057 typedef struct 00058 { 00059 00060 uint32_t Line_0_31; /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range 0 to 31 00061 This parameter can be any combination of @ref EXTI_LL_EC_LINE */ 00062 00063 uint32_t Line_32_63; /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range 32 to 63 00064 This parameter can be any combination of @ref EXTI_LL_EC_LINE */ 00065 00066 FunctionalState LineCommand; /*!< Specifies the new state of the selected EXTI lines. 00067 This parameter can be set either to ENABLE or DISABLE */ 00068 00069 uint8_t Mode; /*!< Specifies the mode for the EXTI lines. 00070 This parameter can be a value of @ref EXTI_LL_EC_MODE. */ 00071 00072 uint8_t Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines. 00073 This parameter can be a value of @ref EXTI_LL_EC_TRIGGER. */ 00074 } LL_EXTI_InitTypeDef; 00075 00076 /** 00077 * @} 00078 */ 00079 #endif /*USE_FULL_LL_DRIVER*/ 00080 00081 /* Exported constants --------------------------------------------------------*/ 00082 /** @defgroup EXTI_LL_Exported_Constants EXTI Exported Constants 00083 * @{ 00084 */ 00085 00086 /** @defgroup EXTI_LL_EC_LINE LINE 00087 * @{ 00088 */ 00089 #define LL_EXTI_LINE_0 EXTI_IMR1_IM0 /*!< Extended line 0 */ 00090 #define LL_EXTI_LINE_1 EXTI_IMR1_IM1 /*!< Extended line 1 */ 00091 #define LL_EXTI_LINE_2 EXTI_IMR1_IM2 /*!< Extended line 2 */ 00092 #define LL_EXTI_LINE_3 EXTI_IMR1_IM3 /*!< Extended line 3 */ 00093 #define LL_EXTI_LINE_4 EXTI_IMR1_IM4 /*!< Extended line 4 */ 00094 #define LL_EXTI_LINE_5 EXTI_IMR1_IM5 /*!< Extended line 5 */ 00095 #define LL_EXTI_LINE_6 EXTI_IMR1_IM6 /*!< Extended line 6 */ 00096 #define LL_EXTI_LINE_7 EXTI_IMR1_IM7 /*!< Extended line 7 */ 00097 #define LL_EXTI_LINE_8 EXTI_IMR1_IM8 /*!< Extended line 8 */ 00098 #define LL_EXTI_LINE_9 EXTI_IMR1_IM9 /*!< Extended line 9 */ 00099 #define LL_EXTI_LINE_10 EXTI_IMR1_IM10 /*!< Extended line 10 */ 00100 #define LL_EXTI_LINE_11 EXTI_IMR1_IM11 /*!< Extended line 11 */ 00101 #define LL_EXTI_LINE_12 EXTI_IMR1_IM12 /*!< Extended line 12 */ 00102 #define LL_EXTI_LINE_13 EXTI_IMR1_IM13 /*!< Extended line 13 */ 00103 #define LL_EXTI_LINE_14 EXTI_IMR1_IM14 /*!< Extended line 14 */ 00104 #define LL_EXTI_LINE_15 EXTI_IMR1_IM15 /*!< Extended line 15 */ 00105 #if defined(EXTI_IMR1_IM16) 00106 #define LL_EXTI_LINE_16 EXTI_IMR1_IM16 /*!< Extended line 16 */ 00107 #endif 00108 #define LL_EXTI_LINE_17 EXTI_IMR1_IM17 /*!< Extended line 17 */ 00109 #if defined(EXTI_IMR1_IM18) 00110 #define LL_EXTI_LINE_18 EXTI_IMR1_IM18 /*!< Extended line 18 */ 00111 #endif 00112 #define LL_EXTI_LINE_19 EXTI_IMR1_IM19 /*!< Extended line 19 */ 00113 #if defined(EXTI_IMR1_IM20) 00114 #define LL_EXTI_LINE_20 EXTI_IMR1_IM20 /*!< Extended line 20 */ 00115 #endif 00116 #if defined(EXTI_IMR1_IM21) 00117 #define LL_EXTI_LINE_21 EXTI_IMR1_IM21 /*!< Extended line 21 */ 00118 #endif 00119 #if defined(EXTI_IMR1_IM22) 00120 #define LL_EXTI_LINE_22 EXTI_IMR1_IM22 /*!< Extended line 22 */ 00121 #endif 00122 #define LL_EXTI_LINE_23 EXTI_IMR1_IM23 /*!< Extended line 23 */ 00123 #if defined(EXTI_IMR1_IM24) 00124 #define LL_EXTI_LINE_24 EXTI_IMR1_IM24 /*!< Extended line 24 */ 00125 #endif 00126 #if defined(EXTI_IMR1_IM25) 00127 #define LL_EXTI_LINE_25 EXTI_IMR1_IM25 /*!< Extended line 25 */ 00128 #endif 00129 #if defined(EXTI_IMR1_IM26) 00130 #define LL_EXTI_LINE_26 EXTI_IMR1_IM26 /*!< Extended line 26 */ 00131 #endif 00132 #if defined(EXTI_IMR1_IM27) 00133 #define LL_EXTI_LINE_27 EXTI_IMR1_IM27 /*!< Extended line 27 */ 00134 #endif 00135 #if defined(EXTI_IMR1_IM28) 00136 #define LL_EXTI_LINE_28 EXTI_IMR1_IM28 /*!< Extended line 28 */ 00137 #endif 00138 #if defined(EXTI_IMR1_IM29) 00139 #define LL_EXTI_LINE_29 EXTI_IMR1_IM29 /*!< Extended line 29 */ 00140 #endif 00141 #if defined(EXTI_IMR1_IM30) 00142 #define LL_EXTI_LINE_30 EXTI_IMR1_IM30 /*!< Extended line 30 */ 00143 #endif 00144 #if defined(EXTI_IMR1_IM31) 00145 #define LL_EXTI_LINE_31 EXTI_IMR1_IM31 /*!< Extended line 31 */ 00146 #endif 00147 #define LL_EXTI_LINE_ALL_0_31 EXTI_IMR1_IM /*!< All Extended line not reserved*/ 00148 00149 #define LL_EXTI_LINE_32 EXTI_IMR2_IM32 /*!< Extended line 32 */ 00150 #if defined(EXTI_IMR2_IM33) 00151 #define LL_EXTI_LINE_33 EXTI_IMR2_IM33 /*!< Extended line 33 */ 00152 #endif 00153 #if defined(EXTI_IMR2_IM34) 00154 #define LL_EXTI_LINE_34 EXTI_IMR2_IM34 /*!< Extended line 34 */ 00155 #endif 00156 #if defined(EXTI_IMR2_IM35) 00157 #define LL_EXTI_LINE_35 EXTI_IMR2_IM35 /*!< Extended line 35 */ 00158 #endif 00159 #if defined(EXTI_IMR2_IM36) 00160 #define LL_EXTI_LINE_36 EXTI_IMR2_IM36 /*!< Extended line 36 */ 00161 #endif 00162 #if defined(EXTI_IMR2_IM37) 00163 #define LL_EXTI_LINE_37 EXTI_IMR2_IM37 /*!< Extended line 37 */ 00164 #endif 00165 #if defined(EXTI_IMR2_IM38) 00166 #define LL_EXTI_LINE_38 EXTI_IMR2_IM38 /*!< Extended line 38 */ 00167 #endif 00168 #if defined(EXTI_IMR2_IM39) 00169 #define LL_EXTI_LINE_39 EXTI_IMR2_IM39 /*!< Extended line 39 */ 00170 #endif 00171 #if defined(EXTI_IMR2_IM40) 00172 #define LL_EXTI_LINE_40 EXTI_IMR2_IM40 /*!< Extended line 40 */ 00173 #endif 00174 #define LL_EXTI_LINE_ALL_32_63 EXTI_IMR2_IM /*!< All Extended line not reserved*/ 00175 00176 00177 #define LL_EXTI_LINE_ALL (0xFFFFFFFFU) /*!< All Extended line */ 00178 00179 #if defined(USE_FULL_LL_DRIVER) 00180 #define LL_EXTI_LINE_NONE (0x00000000U) /*!< None Extended line */ 00181 #endif /*USE_FULL_LL_DRIVER*/ 00182 00183 /** 00184 * @} 00185 */ 00186 00187 00188 #if defined(USE_FULL_LL_DRIVER) 00189 00190 /** @defgroup EXTI_LL_EC_MODE Mode 00191 * @{ 00192 */ 00193 #define LL_EXTI_MODE_IT ((uint8_t)0x00U) /*!< Interrupt Mode */ 00194 #define LL_EXTI_MODE_EVENT ((uint8_t)0x01U) /*!< Event Mode */ 00195 #define LL_EXTI_MODE_IT_EVENT ((uint8_t)0x02U) /*!< Interrupt & Event Mode */ 00196 /** 00197 * @} 00198 */ 00199 00200 /** @defgroup EXTI_LL_EC_TRIGGER Edge Trigger 00201 * @{ 00202 */ 00203 #define LL_EXTI_TRIGGER_NONE ((uint8_t)0x00U) /*!< No Trigger Mode */ 00204 #define LL_EXTI_TRIGGER_RISING ((uint8_t)0x01U) /*!< Trigger Rising Mode */ 00205 #define LL_EXTI_TRIGGER_FALLING ((uint8_t)0x02U) /*!< Trigger Falling Mode */ 00206 #define LL_EXTI_TRIGGER_RISING_FALLING ((uint8_t)0x03U) /*!< Trigger Rising & Falling Mode */ 00207 00208 /** 00209 * @} 00210 */ 00211 00212 00213 #endif /*USE_FULL_LL_DRIVER*/ 00214 00215 00216 /** 00217 * @} 00218 */ 00219 00220 /* Exported macro ------------------------------------------------------------*/ 00221 /** @defgroup EXTI_LL_Exported_Macros EXTI Exported Macros 00222 * @{ 00223 */ 00224 00225 /** @defgroup EXTI_LL_EM_WRITE_READ Common Write and read registers Macros 00226 * @{ 00227 */ 00228 00229 /** 00230 * @brief Write a value in EXTI register 00231 * @param __REG__ Register to be written 00232 * @param __VALUE__ Value to be written in the register 00233 * @retval None 00234 */ 00235 #define LL_EXTI_WriteReg(__REG__, __VALUE__) WRITE_REG(EXTI->__REG__, (__VALUE__)) 00236 00237 /** 00238 * @brief Read a value in EXTI register 00239 * @param __REG__ Register to be read 00240 * @retval Register value 00241 */ 00242 #define LL_EXTI_ReadReg(__REG__) READ_REG(EXTI->__REG__) 00243 /** 00244 * @} 00245 */ 00246 00247 00248 /** 00249 * @} 00250 */ 00251 00252 00253 00254 /* Exported functions --------------------------------------------------------*/ 00255 /** @defgroup EXTI_LL_Exported_Functions EXTI Exported Functions 00256 * @{ 00257 */ 00258 /** @defgroup EXTI_LL_EF_IT_Management IT_Management 00259 * @{ 00260 */ 00261 00262 /** 00263 * @brief Enable ExtiLine Interrupt request for Lines in range 0 to 31 00264 * @note The reset value for the direct or internal lines (see RM) 00265 * is set to 1 in order to enable the interrupt by default. 00266 * Bits are set automatically at Power on. 00267 * @rmtoll IMR1 IMx LL_EXTI_EnableIT_0_31 00268 * @param ExtiLine This parameter can be one of the following values: 00269 * @arg @ref LL_EXTI_LINE_0 00270 * @arg @ref LL_EXTI_LINE_1 00271 * @arg @ref LL_EXTI_LINE_2 00272 * @arg @ref LL_EXTI_LINE_3 00273 * @arg @ref LL_EXTI_LINE_4 00274 * @arg @ref LL_EXTI_LINE_5 00275 * @arg @ref LL_EXTI_LINE_6 00276 * @arg @ref LL_EXTI_LINE_7 00277 * @arg @ref LL_EXTI_LINE_8 00278 * @arg @ref LL_EXTI_LINE_9 00279 * @arg @ref LL_EXTI_LINE_10 00280 * @arg @ref LL_EXTI_LINE_11 00281 * @arg @ref LL_EXTI_LINE_12 00282 * @arg @ref LL_EXTI_LINE_13 00283 * @arg @ref LL_EXTI_LINE_14 00284 * @arg @ref LL_EXTI_LINE_15 00285 * @arg @ref LL_EXTI_LINE_16 00286 * @arg @ref LL_EXTI_LINE_17 00287 * @arg @ref LL_EXTI_LINE_18 00288 * @arg @ref LL_EXTI_LINE_19 00289 * @arg @ref LL_EXTI_LINE_20 00290 * @arg @ref LL_EXTI_LINE_21 00291 * @arg @ref LL_EXTI_LINE_22 00292 * @arg @ref LL_EXTI_LINE_23 00293 * @arg @ref LL_EXTI_LINE_24 00294 * @arg @ref LL_EXTI_LINE_25 00295 * @arg @ref LL_EXTI_LINE_26 00296 * @arg @ref LL_EXTI_LINE_27 00297 * @arg @ref LL_EXTI_LINE_28 00298 * @arg @ref LL_EXTI_LINE_29 00299 * @arg @ref LL_EXTI_LINE_30 00300 * @arg @ref LL_EXTI_LINE_31 00301 * @arg @ref LL_EXTI_LINE_ALL_0_31 00302 * @note Please check each device line mapping for EXTI Line availability 00303 * @retval None 00304 */ 00305 __STATIC_INLINE void LL_EXTI_EnableIT_0_31(uint32_t ExtiLine) 00306 { 00307 SET_BIT(EXTI->IMR1, ExtiLine); 00308 } 00309 /** 00310 * @brief Enable ExtiLine Interrupt request for Lines in range 32 to 63 00311 * @note The reset value for the direct lines (lines from 32 to 34, line 00312 * 39) is set to 1 in order to enable the interrupt by default. 00313 * Bits are set automatically at Power on. 00314 * @rmtoll IMR2 IMx LL_EXTI_EnableIT_32_63 00315 * @param ExtiLine This parameter can be one of the following values: 00316 * @arg @ref LL_EXTI_LINE_32 00317 * @arg @ref LL_EXTI_LINE_33 00318 * @arg @ref LL_EXTI_LINE_34(*) 00319 * @arg @ref LL_EXTI_LINE_35 00320 * @arg @ref LL_EXTI_LINE_36 00321 * @arg @ref LL_EXTI_LINE_37 00322 * @arg @ref LL_EXTI_LINE_38 00323 * @arg @ref LL_EXTI_LINE_39(*) 00324 * @arg @ref LL_EXTI_LINE_40(*) 00325 * @arg @ref LL_EXTI_LINE_ALL_32_63 00326 * @note (*): Available in some devices 00327 * @retval None 00328 */ 00329 __STATIC_INLINE void LL_EXTI_EnableIT_32_63(uint32_t ExtiLine) 00330 { 00331 SET_BIT(EXTI->IMR2, ExtiLine); 00332 } 00333 00334 /** 00335 * @brief Disable ExtiLine Interrupt request for Lines in range 0 to 31 00336 * @note The reset value for the direct or internal lines (see RM) 00337 * is set to 1 in order to enable the interrupt by default. 00338 * Bits are set automatically at Power on. 00339 * @rmtoll IMR1 IMx LL_EXTI_DisableIT_0_31 00340 * @param ExtiLine This parameter can be one of the following values: 00341 * @arg @ref LL_EXTI_LINE_0 00342 * @arg @ref LL_EXTI_LINE_1 00343 * @arg @ref LL_EXTI_LINE_2 00344 * @arg @ref LL_EXTI_LINE_3 00345 * @arg @ref LL_EXTI_LINE_4 00346 * @arg @ref LL_EXTI_LINE_5 00347 * @arg @ref LL_EXTI_LINE_6 00348 * @arg @ref LL_EXTI_LINE_7 00349 * @arg @ref LL_EXTI_LINE_8 00350 * @arg @ref LL_EXTI_LINE_9 00351 * @arg @ref LL_EXTI_LINE_10 00352 * @arg @ref LL_EXTI_LINE_11 00353 * @arg @ref LL_EXTI_LINE_12 00354 * @arg @ref LL_EXTI_LINE_13 00355 * @arg @ref LL_EXTI_LINE_14 00356 * @arg @ref LL_EXTI_LINE_15 00357 * @arg @ref LL_EXTI_LINE_16 00358 * @arg @ref LL_EXTI_LINE_17 00359 * @arg @ref LL_EXTI_LINE_18 00360 * @arg @ref LL_EXTI_LINE_19 00361 * @arg @ref LL_EXTI_LINE_20 00362 * @arg @ref LL_EXTI_LINE_21 00363 * @arg @ref LL_EXTI_LINE_22 00364 * @arg @ref LL_EXTI_LINE_23 00365 * @arg @ref LL_EXTI_LINE_24 00366 * @arg @ref LL_EXTI_LINE_25 00367 * @arg @ref LL_EXTI_LINE_26 00368 * @arg @ref LL_EXTI_LINE_27 00369 * @arg @ref LL_EXTI_LINE_28 00370 * @arg @ref LL_EXTI_LINE_29 00371 * @arg @ref LL_EXTI_LINE_30 00372 * @arg @ref LL_EXTI_LINE_31 00373 * @arg @ref LL_EXTI_LINE_ALL_0_31 00374 * @note Please check each device line mapping for EXTI Line availability 00375 * @retval None 00376 */ 00377 __STATIC_INLINE void LL_EXTI_DisableIT_0_31(uint32_t ExtiLine) 00378 { 00379 CLEAR_BIT(EXTI->IMR1, ExtiLine); 00380 } 00381 00382 /** 00383 * @brief Disable ExtiLine Interrupt request for Lines in range 32 to 63 00384 * @note The reset value for the direct lines (lines from 32 to 34, line 00385 * 39) is set to 1 in order to enable the interrupt by default. 00386 * Bits are set automatically at Power on. 00387 * @rmtoll IMR2 IMx LL_EXTI_DisableIT_32_63 00388 * @param ExtiLine This parameter can be one of the following values: 00389 * @arg @ref LL_EXTI_LINE_32 00390 * @arg @ref LL_EXTI_LINE_33 00391 * @arg @ref LL_EXTI_LINE_34(*) 00392 * @arg @ref LL_EXTI_LINE_35 00393 * @arg @ref LL_EXTI_LINE_36 00394 * @arg @ref LL_EXTI_LINE_37 00395 * @arg @ref LL_EXTI_LINE_38 00396 * @arg @ref LL_EXTI_LINE_39(*) 00397 * @arg @ref LL_EXTI_LINE_40(*) 00398 * @arg @ref LL_EXTI_LINE_ALL_32_63 00399 * @note (*): Available in some devices 00400 * @retval None 00401 */ 00402 __STATIC_INLINE void LL_EXTI_DisableIT_32_63(uint32_t ExtiLine) 00403 { 00404 CLEAR_BIT(EXTI->IMR2, ExtiLine); 00405 } 00406 00407 /** 00408 * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 0 to 31 00409 * @note The reset value for the direct or internal lines (see RM) 00410 * is set to 1 in order to enable the interrupt by default. 00411 * Bits are set automatically at Power on. 00412 * @rmtoll IMR1 IMx LL_EXTI_IsEnabledIT_0_31 00413 * @param ExtiLine This parameter can be one of the following values: 00414 * @arg @ref LL_EXTI_LINE_0 00415 * @arg @ref LL_EXTI_LINE_1 00416 * @arg @ref LL_EXTI_LINE_2 00417 * @arg @ref LL_EXTI_LINE_3 00418 * @arg @ref LL_EXTI_LINE_4 00419 * @arg @ref LL_EXTI_LINE_5 00420 * @arg @ref LL_EXTI_LINE_6 00421 * @arg @ref LL_EXTI_LINE_7 00422 * @arg @ref LL_EXTI_LINE_8 00423 * @arg @ref LL_EXTI_LINE_9 00424 * @arg @ref LL_EXTI_LINE_10 00425 * @arg @ref LL_EXTI_LINE_11 00426 * @arg @ref LL_EXTI_LINE_12 00427 * @arg @ref LL_EXTI_LINE_13 00428 * @arg @ref LL_EXTI_LINE_14 00429 * @arg @ref LL_EXTI_LINE_15 00430 * @arg @ref LL_EXTI_LINE_16 00431 * @arg @ref LL_EXTI_LINE_17 00432 * @arg @ref LL_EXTI_LINE_18 00433 * @arg @ref LL_EXTI_LINE_19 00434 * @arg @ref LL_EXTI_LINE_20 00435 * @arg @ref LL_EXTI_LINE_21 00436 * @arg @ref LL_EXTI_LINE_22 00437 * @arg @ref LL_EXTI_LINE_23 00438 * @arg @ref LL_EXTI_LINE_24 00439 * @arg @ref LL_EXTI_LINE_25 00440 * @arg @ref LL_EXTI_LINE_26 00441 * @arg @ref LL_EXTI_LINE_27 00442 * @arg @ref LL_EXTI_LINE_28 00443 * @arg @ref LL_EXTI_LINE_29 00444 * @arg @ref LL_EXTI_LINE_30 00445 * @arg @ref LL_EXTI_LINE_31 00446 * @arg @ref LL_EXTI_LINE_ALL_0_31 00447 * @note Please check each device line mapping for EXTI Line availability 00448 * @retval State of bit (1 or 0). 00449 */ 00450 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_0_31(uint32_t ExtiLine) 00451 { 00452 return ((READ_BIT(EXTI->IMR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL); 00453 } 00454 00455 /** 00456 * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 32 to 63 00457 * @note The reset value for the direct lines (lines from 32 to 34, line 00458 * 39) is set to 1 in order to enable the interrupt by default. 00459 * Bits are set automatically at Power on. 00460 * @rmtoll IMR2 IMx LL_EXTI_IsEnabledIT_32_63 00461 * @param ExtiLine This parameter can be one of the following values: 00462 * @arg @ref LL_EXTI_LINE_32 00463 * @arg @ref LL_EXTI_LINE_33 00464 * @arg @ref LL_EXTI_LINE_34(*) 00465 * @arg @ref LL_EXTI_LINE_35 00466 * @arg @ref LL_EXTI_LINE_36 00467 * @arg @ref LL_EXTI_LINE_37 00468 * @arg @ref LL_EXTI_LINE_38 00469 * @arg @ref LL_EXTI_LINE_39(*) 00470 * @arg @ref LL_EXTI_LINE_40(*) 00471 * @arg @ref LL_EXTI_LINE_ALL_32_63 00472 * @note (*): Available in some devices 00473 * @retval State of bit (1 or 0). 00474 */ 00475 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_32_63(uint32_t ExtiLine) 00476 { 00477 return ((READ_BIT(EXTI->IMR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL); 00478 } 00479 00480 /** 00481 * @} 00482 */ 00483 00484 /** @defgroup EXTI_LL_EF_Event_Management Event_Management 00485 * @{ 00486 */ 00487 00488 /** 00489 * @brief Enable ExtiLine Event request for Lines in range 0 to 31 00490 * @rmtoll EMR1 EMx LL_EXTI_EnableEvent_0_31 00491 * @param ExtiLine This parameter can be one of the following values: 00492 * @arg @ref LL_EXTI_LINE_0 00493 * @arg @ref LL_EXTI_LINE_1 00494 * @arg @ref LL_EXTI_LINE_2 00495 * @arg @ref LL_EXTI_LINE_3 00496 * @arg @ref LL_EXTI_LINE_4 00497 * @arg @ref LL_EXTI_LINE_5 00498 * @arg @ref LL_EXTI_LINE_6 00499 * @arg @ref LL_EXTI_LINE_7 00500 * @arg @ref LL_EXTI_LINE_8 00501 * @arg @ref LL_EXTI_LINE_9 00502 * @arg @ref LL_EXTI_LINE_10 00503 * @arg @ref LL_EXTI_LINE_11 00504 * @arg @ref LL_EXTI_LINE_12 00505 * @arg @ref LL_EXTI_LINE_13 00506 * @arg @ref LL_EXTI_LINE_14 00507 * @arg @ref LL_EXTI_LINE_15 00508 * @arg @ref LL_EXTI_LINE_16 00509 * @arg @ref LL_EXTI_LINE_17 00510 * @arg @ref LL_EXTI_LINE_18 00511 * @arg @ref LL_EXTI_LINE_19 00512 * @arg @ref LL_EXTI_LINE_20 00513 * @arg @ref LL_EXTI_LINE_21 00514 * @arg @ref LL_EXTI_LINE_22 00515 * @arg @ref LL_EXTI_LINE_23 00516 * @arg @ref LL_EXTI_LINE_24 00517 * @arg @ref LL_EXTI_LINE_25 00518 * @arg @ref LL_EXTI_LINE_26 00519 * @arg @ref LL_EXTI_LINE_27 00520 * @arg @ref LL_EXTI_LINE_28 00521 * @arg @ref LL_EXTI_LINE_29 00522 * @arg @ref LL_EXTI_LINE_30 00523 * @arg @ref LL_EXTI_LINE_31 00524 * @arg @ref LL_EXTI_LINE_ALL_0_31 00525 * @note Please check each device line mapping for EXTI Line availability 00526 * @retval None 00527 */ 00528 __STATIC_INLINE void LL_EXTI_EnableEvent_0_31(uint32_t ExtiLine) 00529 { 00530 SET_BIT(EXTI->EMR1, ExtiLine); 00531 00532 } 00533 00534 /** 00535 * @brief Enable ExtiLine Event request for Lines in range 32 to 63 00536 * @rmtoll EMR2 EMx LL_EXTI_EnableEvent_32_63 00537 * @param ExtiLine This parameter can be a combination of the following values: 00538 * @arg @ref LL_EXTI_LINE_32 00539 * @arg @ref LL_EXTI_LINE_33 00540 * @arg @ref LL_EXTI_LINE_34(*) 00541 * @arg @ref LL_EXTI_LINE_35 00542 * @arg @ref LL_EXTI_LINE_36 00543 * @arg @ref LL_EXTI_LINE_37 00544 * @arg @ref LL_EXTI_LINE_38 00545 * @arg @ref LL_EXTI_LINE_39(*) 00546 * @arg @ref LL_EXTI_LINE_40(*) 00547 * @arg @ref LL_EXTI_LINE_ALL_32_63 00548 * @note (*): Available in some devices 00549 * @retval None 00550 */ 00551 __STATIC_INLINE void LL_EXTI_EnableEvent_32_63(uint32_t ExtiLine) 00552 { 00553 SET_BIT(EXTI->EMR2, ExtiLine); 00554 } 00555 00556 /** 00557 * @brief Disable ExtiLine Event request for Lines in range 0 to 31 00558 * @rmtoll EMR1 EMx LL_EXTI_DisableEvent_0_31 00559 * @param ExtiLine This parameter can be one of the following values: 00560 * @arg @ref LL_EXTI_LINE_0 00561 * @arg @ref LL_EXTI_LINE_1 00562 * @arg @ref LL_EXTI_LINE_2 00563 * @arg @ref LL_EXTI_LINE_3 00564 * @arg @ref LL_EXTI_LINE_4 00565 * @arg @ref LL_EXTI_LINE_5 00566 * @arg @ref LL_EXTI_LINE_6 00567 * @arg @ref LL_EXTI_LINE_7 00568 * @arg @ref LL_EXTI_LINE_8 00569 * @arg @ref LL_EXTI_LINE_9 00570 * @arg @ref LL_EXTI_LINE_10 00571 * @arg @ref LL_EXTI_LINE_11 00572 * @arg @ref LL_EXTI_LINE_12 00573 * @arg @ref LL_EXTI_LINE_13 00574 * @arg @ref LL_EXTI_LINE_14 00575 * @arg @ref LL_EXTI_LINE_15 00576 * @arg @ref LL_EXTI_LINE_16 00577 * @arg @ref LL_EXTI_LINE_17 00578 * @arg @ref LL_EXTI_LINE_18 00579 * @arg @ref LL_EXTI_LINE_19 00580 * @arg @ref LL_EXTI_LINE_20 00581 * @arg @ref LL_EXTI_LINE_21 00582 * @arg @ref LL_EXTI_LINE_22 00583 * @arg @ref LL_EXTI_LINE_23 00584 * @arg @ref LL_EXTI_LINE_24 00585 * @arg @ref LL_EXTI_LINE_25 00586 * @arg @ref LL_EXTI_LINE_26 00587 * @arg @ref LL_EXTI_LINE_27 00588 * @arg @ref LL_EXTI_LINE_28 00589 * @arg @ref LL_EXTI_LINE_29 00590 * @arg @ref LL_EXTI_LINE_30 00591 * @arg @ref LL_EXTI_LINE_31 00592 * @arg @ref LL_EXTI_LINE_ALL_0_31 00593 * @note Please check each device line mapping for EXTI Line availability 00594 * @retval None 00595 */ 00596 __STATIC_INLINE void LL_EXTI_DisableEvent_0_31(uint32_t ExtiLine) 00597 { 00598 CLEAR_BIT(EXTI->EMR1, ExtiLine); 00599 } 00600 00601 /** 00602 * @brief Disable ExtiLine Event request for Lines in range 32 to 63 00603 * @rmtoll EMR2 EMx LL_EXTI_DisableEvent_32_63 00604 * @param ExtiLine This parameter can be a combination of the following values: 00605 * @arg @ref LL_EXTI_LINE_32 00606 * @arg @ref LL_EXTI_LINE_33 00607 * @arg @ref LL_EXTI_LINE_34(*) 00608 * @arg @ref LL_EXTI_LINE_35 00609 * @arg @ref LL_EXTI_LINE_36 00610 * @arg @ref LL_EXTI_LINE_37 00611 * @arg @ref LL_EXTI_LINE_38 00612 * @arg @ref LL_EXTI_LINE_39(*) 00613 * @arg @ref LL_EXTI_LINE_40(*) 00614 * @arg @ref LL_EXTI_LINE_ALL_32_63 00615 * @note (*): Available in some devices 00616 * @retval None 00617 */ 00618 __STATIC_INLINE void LL_EXTI_DisableEvent_32_63(uint32_t ExtiLine) 00619 { 00620 CLEAR_BIT(EXTI->EMR2, ExtiLine); 00621 } 00622 00623 /** 00624 * @brief Indicate if ExtiLine Event request is enabled for Lines in range 0 to 31 00625 * @rmtoll EMR1 EMx LL_EXTI_IsEnabledEvent_0_31 00626 * @param ExtiLine This parameter can be one of the following values: 00627 * @arg @ref LL_EXTI_LINE_0 00628 * @arg @ref LL_EXTI_LINE_1 00629 * @arg @ref LL_EXTI_LINE_2 00630 * @arg @ref LL_EXTI_LINE_3 00631 * @arg @ref LL_EXTI_LINE_4 00632 * @arg @ref LL_EXTI_LINE_5 00633 * @arg @ref LL_EXTI_LINE_6 00634 * @arg @ref LL_EXTI_LINE_7 00635 * @arg @ref LL_EXTI_LINE_8 00636 * @arg @ref LL_EXTI_LINE_9 00637 * @arg @ref LL_EXTI_LINE_10 00638 * @arg @ref LL_EXTI_LINE_11 00639 * @arg @ref LL_EXTI_LINE_12 00640 * @arg @ref LL_EXTI_LINE_13 00641 * @arg @ref LL_EXTI_LINE_14 00642 * @arg @ref LL_EXTI_LINE_15 00643 * @arg @ref LL_EXTI_LINE_16 00644 * @arg @ref LL_EXTI_LINE_17 00645 * @arg @ref LL_EXTI_LINE_18 00646 * @arg @ref LL_EXTI_LINE_19 00647 * @arg @ref LL_EXTI_LINE_20 00648 * @arg @ref LL_EXTI_LINE_21 00649 * @arg @ref LL_EXTI_LINE_22 00650 * @arg @ref LL_EXTI_LINE_23 00651 * @arg @ref LL_EXTI_LINE_24 00652 * @arg @ref LL_EXTI_LINE_25 00653 * @arg @ref LL_EXTI_LINE_26 00654 * @arg @ref LL_EXTI_LINE_27 00655 * @arg @ref LL_EXTI_LINE_28 00656 * @arg @ref LL_EXTI_LINE_29 00657 * @arg @ref LL_EXTI_LINE_30 00658 * @arg @ref LL_EXTI_LINE_31 00659 * @arg @ref LL_EXTI_LINE_ALL_0_31 00660 * @note Please check each device line mapping for EXTI Line availability 00661 * @retval State of bit (1 or 0). 00662 */ 00663 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_0_31(uint32_t ExtiLine) 00664 { 00665 return ((READ_BIT(EXTI->EMR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL); 00666 00667 } 00668 00669 /** 00670 * @brief Indicate if ExtiLine Event request is enabled for Lines in range 32 to 63 00671 * @rmtoll EMR2 EMx LL_EXTI_IsEnabledEvent_32_63 00672 * @param ExtiLine This parameter can be a combination of the following values: 00673 * @arg @ref LL_EXTI_LINE_32 00674 * @arg @ref LL_EXTI_LINE_33 00675 * @arg @ref LL_EXTI_LINE_34(*) 00676 * @arg @ref LL_EXTI_LINE_35 00677 * @arg @ref LL_EXTI_LINE_36 00678 * @arg @ref LL_EXTI_LINE_37 00679 * @arg @ref LL_EXTI_LINE_38 00680 * @arg @ref LL_EXTI_LINE_39(*) 00681 * @arg @ref LL_EXTI_LINE_40(*) 00682 * @arg @ref LL_EXTI_LINE_ALL_32_63 00683 * @note (*): Available in some devices 00684 * @retval State of bit (1 or 0). 00685 */ 00686 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_32_63(uint32_t ExtiLine) 00687 { 00688 return ((READ_BIT(EXTI->EMR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL); 00689 } 00690 00691 /** 00692 * @} 00693 */ 00694 00695 /** @defgroup EXTI_LL_EF_Rising_Trigger_Management Rising_Trigger_Management 00696 * @{ 00697 */ 00698 00699 /** 00700 * @brief Enable ExtiLine Rising Edge Trigger for Lines in range 0 to 31 00701 * @note The configurable wakeup lines are edge-triggered. No glitch must be 00702 * generated on these lines. If a rising edge on a configurable interrupt 00703 * line occurs during a write operation in the EXTI_RTSR register, the 00704 * pending bit is not set. 00705 * Rising and falling edge triggers can be set for 00706 * the same interrupt line. In this case, both generate a trigger 00707 * condition. 00708 * @rmtoll RTSR1 RTx LL_EXTI_EnableRisingTrig_0_31 00709 * @param ExtiLine This parameter can be a combination of the following values: 00710 * @arg @ref LL_EXTI_LINE_0 00711 * @arg @ref LL_EXTI_LINE_1 00712 * @arg @ref LL_EXTI_LINE_2 00713 * @arg @ref LL_EXTI_LINE_3 00714 * @arg @ref LL_EXTI_LINE_4 00715 * @arg @ref LL_EXTI_LINE_5 00716 * @arg @ref LL_EXTI_LINE_6 00717 * @arg @ref LL_EXTI_LINE_7 00718 * @arg @ref LL_EXTI_LINE_8 00719 * @arg @ref LL_EXTI_LINE_9 00720 * @arg @ref LL_EXTI_LINE_10 00721 * @arg @ref LL_EXTI_LINE_11 00722 * @arg @ref LL_EXTI_LINE_12 00723 * @arg @ref LL_EXTI_LINE_13 00724 * @arg @ref LL_EXTI_LINE_14 00725 * @arg @ref LL_EXTI_LINE_15 00726 * @arg @ref LL_EXTI_LINE_16 00727 * @arg @ref LL_EXTI_LINE_18 00728 * @arg @ref LL_EXTI_LINE_19 00729 * @arg @ref LL_EXTI_LINE_20 00730 * @arg @ref LL_EXTI_LINE_21 00731 * @arg @ref LL_EXTI_LINE_22 00732 * @arg @ref LL_EXTI_LINE_29 00733 * @arg @ref LL_EXTI_LINE_30 00734 * @arg @ref LL_EXTI_LINE_31 00735 * @note Please check each device line mapping for EXTI Line availability 00736 * @retval None 00737 */ 00738 __STATIC_INLINE void LL_EXTI_EnableRisingTrig_0_31(uint32_t ExtiLine) 00739 { 00740 SET_BIT(EXTI->RTSR1, ExtiLine); 00741 00742 } 00743 00744 /** 00745 * @brief Enable ExtiLine Rising Edge Trigger for Lines in range 32 to 63 00746 * @note The configurable wakeup lines are edge-triggered. No glitch must be 00747 * generated on these lines. If a rising edge on a configurable interrupt 00748 * line occurs during a write operation in the EXTI_RTSR register, the 00749 * pending bit is not set.Rising and falling edge triggers can be set for 00750 * the same interrupt line. In this case, both generate a trigger 00751 * condition. 00752 * @rmtoll RTSR2 RTx LL_EXTI_EnableRisingTrig_32_63 00753 * @param ExtiLine This parameter can be a combination of the following values: 00754 * @arg @ref LL_EXTI_LINE_35 00755 * @arg @ref LL_EXTI_LINE_36 00756 * @arg @ref LL_EXTI_LINE_37 00757 * @arg @ref LL_EXTI_LINE_38 00758 * @retval None 00759 */ 00760 __STATIC_INLINE void LL_EXTI_EnableRisingTrig_32_63(uint32_t ExtiLine) 00761 { 00762 SET_BIT(EXTI->RTSR2, ExtiLine); 00763 } 00764 00765 /** 00766 * @brief Disable ExtiLine Rising Edge Trigger for Lines in range 0 to 31 00767 * @note The configurable wakeup lines are edge-triggered. No glitch must be 00768 * generated on these lines. If a rising edge on a configurable interrupt 00769 * line occurs during a write operation in the EXTI_RTSR register, the 00770 * pending bit is not set. 00771 * Rising and falling edge triggers can be set for 00772 * the same interrupt line. In this case, both generate a trigger 00773 * condition. 00774 * @rmtoll RTSR1 RTx LL_EXTI_DisableRisingTrig_0_31 00775 * @param ExtiLine This parameter can be a combination of the following values: 00776 * @arg @ref LL_EXTI_LINE_0 00777 * @arg @ref LL_EXTI_LINE_1 00778 * @arg @ref LL_EXTI_LINE_2 00779 * @arg @ref LL_EXTI_LINE_3 00780 * @arg @ref LL_EXTI_LINE_4 00781 * @arg @ref LL_EXTI_LINE_5 00782 * @arg @ref LL_EXTI_LINE_6 00783 * @arg @ref LL_EXTI_LINE_7 00784 * @arg @ref LL_EXTI_LINE_8 00785 * @arg @ref LL_EXTI_LINE_9 00786 * @arg @ref LL_EXTI_LINE_10 00787 * @arg @ref LL_EXTI_LINE_11 00788 * @arg @ref LL_EXTI_LINE_12 00789 * @arg @ref LL_EXTI_LINE_13 00790 * @arg @ref LL_EXTI_LINE_14 00791 * @arg @ref LL_EXTI_LINE_15 00792 * @arg @ref LL_EXTI_LINE_16 00793 * @arg @ref LL_EXTI_LINE_18 00794 * @arg @ref LL_EXTI_LINE_19 00795 * @arg @ref LL_EXTI_LINE_20 00796 * @arg @ref LL_EXTI_LINE_21 00797 * @arg @ref LL_EXTI_LINE_22 00798 * @arg @ref LL_EXTI_LINE_29 00799 * @arg @ref LL_EXTI_LINE_30 00800 * @arg @ref LL_EXTI_LINE_31 00801 * @note Please check each device line mapping for EXTI Line availability 00802 * @retval None 00803 */ 00804 __STATIC_INLINE void LL_EXTI_DisableRisingTrig_0_31(uint32_t ExtiLine) 00805 { 00806 CLEAR_BIT(EXTI->RTSR1, ExtiLine); 00807 00808 } 00809 00810 /** 00811 * @brief Disable ExtiLine Rising Edge Trigger for Lines in range 32 to 63 00812 * @note The configurable wakeup lines are edge-triggered. No glitch must be 00813 * generated on these lines. If a rising edge on a configurable interrupt 00814 * line occurs during a write operation in the EXTI_RTSR register, the 00815 * pending bit is not set. 00816 * Rising and falling edge triggers can be set for 00817 * the same interrupt line. In this case, both generate a trigger 00818 * condition. 00819 * @rmtoll RTSR2 RTx LL_EXTI_DisableRisingTrig_32_63 00820 * @param ExtiLine This parameter can be a combination of the following values: 00821 * @arg @ref LL_EXTI_LINE_35 00822 * @arg @ref LL_EXTI_LINE_36 00823 * @arg @ref LL_EXTI_LINE_37 00824 * @arg @ref LL_EXTI_LINE_38 00825 * @retval None 00826 */ 00827 __STATIC_INLINE void LL_EXTI_DisableRisingTrig_32_63(uint32_t ExtiLine) 00828 { 00829 CLEAR_BIT(EXTI->RTSR2, ExtiLine); 00830 } 00831 00832 /** 00833 * @brief Check if rising edge trigger is enabled for Lines in range 0 to 31 00834 * @rmtoll RTSR1 RTx LL_EXTI_IsEnabledRisingTrig_0_31 00835 * @param ExtiLine This parameter can be a combination of the following values: 00836 * @arg @ref LL_EXTI_LINE_0 00837 * @arg @ref LL_EXTI_LINE_1 00838 * @arg @ref LL_EXTI_LINE_2 00839 * @arg @ref LL_EXTI_LINE_3 00840 * @arg @ref LL_EXTI_LINE_4 00841 * @arg @ref LL_EXTI_LINE_5 00842 * @arg @ref LL_EXTI_LINE_6 00843 * @arg @ref LL_EXTI_LINE_7 00844 * @arg @ref LL_EXTI_LINE_8 00845 * @arg @ref LL_EXTI_LINE_9 00846 * @arg @ref LL_EXTI_LINE_10 00847 * @arg @ref LL_EXTI_LINE_11 00848 * @arg @ref LL_EXTI_LINE_12 00849 * @arg @ref LL_EXTI_LINE_13 00850 * @arg @ref LL_EXTI_LINE_14 00851 * @arg @ref LL_EXTI_LINE_15 00852 * @arg @ref LL_EXTI_LINE_16 00853 * @arg @ref LL_EXTI_LINE_18 00854 * @arg @ref LL_EXTI_LINE_19 00855 * @arg @ref LL_EXTI_LINE_20 00856 * @arg @ref LL_EXTI_LINE_21 00857 * @arg @ref LL_EXTI_LINE_22 00858 * @arg @ref LL_EXTI_LINE_29 00859 * @arg @ref LL_EXTI_LINE_30 00860 * @arg @ref LL_EXTI_LINE_31 00861 * @note Please check each device line mapping for EXTI Line availability 00862 * @retval State of bit (1 or 0). 00863 */ 00864 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_0_31(uint32_t ExtiLine) 00865 { 00866 return ((READ_BIT(EXTI->RTSR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL); 00867 } 00868 00869 /** 00870 * @brief Check if rising edge trigger is enabled for Lines in range 32 to 63 00871 * @rmtoll RTSR2 RTx LL_EXTI_IsEnabledRisingTrig_32_63 00872 * @param ExtiLine This parameter can be a combination of the following values: 00873 * @arg @ref LL_EXTI_LINE_35 00874 * @arg @ref LL_EXTI_LINE_36 00875 * @arg @ref LL_EXTI_LINE_37 00876 * @arg @ref LL_EXTI_LINE_38 00877 * @retval State of bit (1 or 0). 00878 */ 00879 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_32_63(uint32_t ExtiLine) 00880 { 00881 return ((READ_BIT(EXTI->RTSR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL); 00882 } 00883 00884 /** 00885 * @} 00886 */ 00887 00888 /** @defgroup EXTI_LL_EF_Falling_Trigger_Management Falling_Trigger_Management 00889 * @{ 00890 */ 00891 00892 /** 00893 * @brief Enable ExtiLine Falling Edge Trigger for Lines in range 0 to 31 00894 * @note The configurable wakeup lines are edge-triggered. No glitch must be 00895 * generated on these lines. If a falling edge on a configurable interrupt 00896 * line occurs during a write operation in the EXTI_FTSR register, the 00897 * pending bit is not set. 00898 * Rising and falling edge triggers can be set for 00899 * the same interrupt line. In this case, both generate a trigger 00900 * condition. 00901 * @rmtoll FTSR1 FTx LL_EXTI_EnableFallingTrig_0_31 00902 * @param ExtiLine This parameter can be a combination of the following values: 00903 * @arg @ref LL_EXTI_LINE_0 00904 * @arg @ref LL_EXTI_LINE_1 00905 * @arg @ref LL_EXTI_LINE_2 00906 * @arg @ref LL_EXTI_LINE_3 00907 * @arg @ref LL_EXTI_LINE_4 00908 * @arg @ref LL_EXTI_LINE_5 00909 * @arg @ref LL_EXTI_LINE_6 00910 * @arg @ref LL_EXTI_LINE_7 00911 * @arg @ref LL_EXTI_LINE_8 00912 * @arg @ref LL_EXTI_LINE_9 00913 * @arg @ref LL_EXTI_LINE_10 00914 * @arg @ref LL_EXTI_LINE_11 00915 * @arg @ref LL_EXTI_LINE_12 00916 * @arg @ref LL_EXTI_LINE_13 00917 * @arg @ref LL_EXTI_LINE_14 00918 * @arg @ref LL_EXTI_LINE_15 00919 * @arg @ref LL_EXTI_LINE_16 00920 * @arg @ref LL_EXTI_LINE_18 00921 * @arg @ref LL_EXTI_LINE_19 00922 * @arg @ref LL_EXTI_LINE_20 00923 * @arg @ref LL_EXTI_LINE_21 00924 * @arg @ref LL_EXTI_LINE_22 00925 * @arg @ref LL_EXTI_LINE_29 00926 * @arg @ref LL_EXTI_LINE_30 00927 * @arg @ref LL_EXTI_LINE_31 00928 * @note Please check each device line mapping for EXTI Line availability 00929 * @retval None 00930 */ 00931 __STATIC_INLINE void LL_EXTI_EnableFallingTrig_0_31(uint32_t ExtiLine) 00932 { 00933 SET_BIT(EXTI->FTSR1, ExtiLine); 00934 } 00935 00936 /** 00937 * @brief Enable ExtiLine Falling Edge Trigger for Lines in range 32 to 63 00938 * @note The configurable wakeup lines are edge-triggered. No glitch must be 00939 * generated on these lines. If a Falling edge on a configurable interrupt 00940 * line occurs during a write operation in the EXTI_FTSR register, the 00941 * pending bit is not set. 00942 * Rising and falling edge triggers can be set for 00943 * the same interrupt line. In this case, both generate a trigger 00944 * condition. 00945 * @rmtoll FTSR2 FTx LL_EXTI_EnableFallingTrig_32_63 00946 * @param ExtiLine This parameter can be a combination of the following values: 00947 * @arg @ref LL_EXTI_LINE_35 00948 * @arg @ref LL_EXTI_LINE_36 00949 * @arg @ref LL_EXTI_LINE_37 00950 * @arg @ref LL_EXTI_LINE_38 00951 * @retval None 00952 */ 00953 __STATIC_INLINE void LL_EXTI_EnableFallingTrig_32_63(uint32_t ExtiLine) 00954 { 00955 SET_BIT(EXTI->FTSR2, ExtiLine); 00956 } 00957 00958 /** 00959 * @brief Disable ExtiLine Falling Edge Trigger for Lines in range 0 to 31 00960 * @note The configurable wakeup lines are edge-triggered. No glitch must be 00961 * generated on these lines. If a Falling edge on a configurable interrupt 00962 * line occurs during a write operation in the EXTI_FTSR register, the 00963 * pending bit is not set. 00964 * Rising and falling edge triggers can be set for the same interrupt line. 00965 * In this case, both generate a trigger condition. 00966 * @rmtoll FTSR1 FTx LL_EXTI_DisableFallingTrig_0_31 00967 * @param ExtiLine This parameter can be a combination of the following values: 00968 * @arg @ref LL_EXTI_LINE_0 00969 * @arg @ref LL_EXTI_LINE_1 00970 * @arg @ref LL_EXTI_LINE_2 00971 * @arg @ref LL_EXTI_LINE_3 00972 * @arg @ref LL_EXTI_LINE_4 00973 * @arg @ref LL_EXTI_LINE_5 00974 * @arg @ref LL_EXTI_LINE_6 00975 * @arg @ref LL_EXTI_LINE_7 00976 * @arg @ref LL_EXTI_LINE_8 00977 * @arg @ref LL_EXTI_LINE_9 00978 * @arg @ref LL_EXTI_LINE_10 00979 * @arg @ref LL_EXTI_LINE_11 00980 * @arg @ref LL_EXTI_LINE_12 00981 * @arg @ref LL_EXTI_LINE_13 00982 * @arg @ref LL_EXTI_LINE_14 00983 * @arg @ref LL_EXTI_LINE_15 00984 * @arg @ref LL_EXTI_LINE_16 00985 * @arg @ref LL_EXTI_LINE_18 00986 * @arg @ref LL_EXTI_LINE_19 00987 * @arg @ref LL_EXTI_LINE_20 00988 * @arg @ref LL_EXTI_LINE_21 00989 * @arg @ref LL_EXTI_LINE_22 00990 * @arg @ref LL_EXTI_LINE_29 00991 * @arg @ref LL_EXTI_LINE_30 00992 * @arg @ref LL_EXTI_LINE_31 00993 * @note Please check each device line mapping for EXTI Line availability 00994 * @retval None 00995 */ 00996 __STATIC_INLINE void LL_EXTI_DisableFallingTrig_0_31(uint32_t ExtiLine) 00997 { 00998 CLEAR_BIT(EXTI->FTSR1, ExtiLine); 00999 } 01000 01001 /** 01002 * @brief Disable ExtiLine Falling Edge Trigger for Lines in range 32 to 63 01003 * @note The configurable wakeup lines are edge-triggered. No glitch must be 01004 * generated on these lines. If a Falling edge on a configurable interrupt 01005 * line occurs during a write operation in the EXTI_FTSR register, the 01006 * pending bit is not set. 01007 * Rising and falling edge triggers can be set for the same interrupt line. 01008 * In this case, both generate a trigger condition. 01009 * @rmtoll FTSR2 FTx LL_EXTI_DisableFallingTrig_32_63 01010 * @param ExtiLine This parameter can be a combination of the following values: 01011 * @arg @ref LL_EXTI_LINE_35 01012 * @arg @ref LL_EXTI_LINE_36 01013 * @arg @ref LL_EXTI_LINE_37 01014 * @arg @ref LL_EXTI_LINE_38 01015 * @retval None 01016 */ 01017 __STATIC_INLINE void LL_EXTI_DisableFallingTrig_32_63(uint32_t ExtiLine) 01018 { 01019 CLEAR_BIT(EXTI->FTSR2, ExtiLine); 01020 } 01021 01022 /** 01023 * @brief Check if falling edge trigger is enabled for Lines in range 0 to 31 01024 * @rmtoll FTSR1 FTx LL_EXTI_IsEnabledFallingTrig_0_31 01025 * @param ExtiLine This parameter can be a combination of the following values: 01026 * @arg @ref LL_EXTI_LINE_0 01027 * @arg @ref LL_EXTI_LINE_1 01028 * @arg @ref LL_EXTI_LINE_2 01029 * @arg @ref LL_EXTI_LINE_3 01030 * @arg @ref LL_EXTI_LINE_4 01031 * @arg @ref LL_EXTI_LINE_5 01032 * @arg @ref LL_EXTI_LINE_6 01033 * @arg @ref LL_EXTI_LINE_7 01034 * @arg @ref LL_EXTI_LINE_8 01035 * @arg @ref LL_EXTI_LINE_9 01036 * @arg @ref LL_EXTI_LINE_10 01037 * @arg @ref LL_EXTI_LINE_11 01038 * @arg @ref LL_EXTI_LINE_12 01039 * @arg @ref LL_EXTI_LINE_13 01040 * @arg @ref LL_EXTI_LINE_14 01041 * @arg @ref LL_EXTI_LINE_15 01042 * @arg @ref LL_EXTI_LINE_16 01043 * @arg @ref LL_EXTI_LINE_18 01044 * @arg @ref LL_EXTI_LINE_19 01045 * @arg @ref LL_EXTI_LINE_20 01046 * @arg @ref LL_EXTI_LINE_21 01047 * @arg @ref LL_EXTI_LINE_22 01048 * @arg @ref LL_EXTI_LINE_29 01049 * @arg @ref LL_EXTI_LINE_30 01050 * @arg @ref LL_EXTI_LINE_31 01051 * @note Please check each device line mapping for EXTI Line availability 01052 * @retval State of bit (1 or 0). 01053 */ 01054 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_0_31(uint32_t ExtiLine) 01055 { 01056 return ((READ_BIT(EXTI->FTSR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL); 01057 } 01058 01059 /** 01060 * @brief Check if falling edge trigger is enabled for Lines in range 32 to 63 01061 * @rmtoll FTSR2 FTx LL_EXTI_IsEnabledFallingTrig_32_63 01062 * @param ExtiLine This parameter can be a combination of the following values: 01063 * @arg @ref LL_EXTI_LINE_35 01064 * @arg @ref LL_EXTI_LINE_36 01065 * @arg @ref LL_EXTI_LINE_37 01066 * @arg @ref LL_EXTI_LINE_38 01067 * @retval State of bit (1 or 0). 01068 */ 01069 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_32_63(uint32_t ExtiLine) 01070 { 01071 return ((READ_BIT(EXTI->FTSR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL); 01072 } 01073 01074 /** 01075 * @} 01076 */ 01077 01078 /** @defgroup EXTI_LL_EF_Software_Interrupt_Management Software_Interrupt_Management 01079 * @{ 01080 */ 01081 01082 /** 01083 * @brief Generate a software Interrupt Event for Lines in range 0 to 31 01084 * @note If the interrupt is enabled on this line in the EXTI_IMR1, writing a 1 to 01085 * this bit when it is at '0' sets the corresponding pending bit in EXTI_PR1 01086 * resulting in an interrupt request generation. 01087 * This bit is cleared by clearing the corresponding bit in the EXTI_PR1 01088 * register (by writing a 1 into the bit) 01089 * @rmtoll SWIER1 SWIx LL_EXTI_GenerateSWI_0_31 01090 * @param ExtiLine This parameter can be a combination of the following values: 01091 * @arg @ref LL_EXTI_LINE_0 01092 * @arg @ref LL_EXTI_LINE_1 01093 * @arg @ref LL_EXTI_LINE_2 01094 * @arg @ref LL_EXTI_LINE_3 01095 * @arg @ref LL_EXTI_LINE_4 01096 * @arg @ref LL_EXTI_LINE_5 01097 * @arg @ref LL_EXTI_LINE_6 01098 * @arg @ref LL_EXTI_LINE_7 01099 * @arg @ref LL_EXTI_LINE_8 01100 * @arg @ref LL_EXTI_LINE_9 01101 * @arg @ref LL_EXTI_LINE_10 01102 * @arg @ref LL_EXTI_LINE_11 01103 * @arg @ref LL_EXTI_LINE_12 01104 * @arg @ref LL_EXTI_LINE_13 01105 * @arg @ref LL_EXTI_LINE_14 01106 * @arg @ref LL_EXTI_LINE_15 01107 * @arg @ref LL_EXTI_LINE_16 01108 * @arg @ref LL_EXTI_LINE_18 01109 * @arg @ref LL_EXTI_LINE_19 01110 * @arg @ref LL_EXTI_LINE_20 01111 * @arg @ref LL_EXTI_LINE_21 01112 * @arg @ref LL_EXTI_LINE_22 01113 * @arg @ref LL_EXTI_LINE_29 01114 * @arg @ref LL_EXTI_LINE_30 01115 * @arg @ref LL_EXTI_LINE_31 01116 * @note Please check each device line mapping for EXTI Line availability 01117 * @retval None 01118 */ 01119 __STATIC_INLINE void LL_EXTI_GenerateSWI_0_31(uint32_t ExtiLine) 01120 { 01121 SET_BIT(EXTI->SWIER1, ExtiLine); 01122 } 01123 01124 /** 01125 * @brief Generate a software Interrupt Event for Lines in range 32 to 63 01126 * @note If the interrupt is enabled on this line inthe EXTI_IMR2, writing a 1 to 01127 * this bit when it is at '0' sets the corresponding pending bit in EXTI_PR2 01128 * resulting in an interrupt request generation. 01129 * This bit is cleared by clearing the corresponding bit in the EXTI_PR2 01130 * register (by writing a 1 into the bit) 01131 * @rmtoll SWIER2 SWIx LL_EXTI_GenerateSWI_32_63 01132 * @param ExtiLine This parameter can be a combination of the following values: 01133 * @arg @ref LL_EXTI_LINE_35 01134 * @arg @ref LL_EXTI_LINE_36 01135 * @arg @ref LL_EXTI_LINE_37 01136 * @arg @ref LL_EXTI_LINE_38 01137 * @retval None 01138 */ 01139 __STATIC_INLINE void LL_EXTI_GenerateSWI_32_63(uint32_t ExtiLine) 01140 { 01141 SET_BIT(EXTI->SWIER2, ExtiLine); 01142 } 01143 01144 /** 01145 * @} 01146 */ 01147 01148 /** @defgroup EXTI_LL_EF_Flag_Management Flag_Management 01149 * @{ 01150 */ 01151 01152 /** 01153 * @brief Check if the ExtLine Flag is set or not for Lines in range 0 to 31 01154 * @note This bit is set when the selected edge event arrives on the interrupt 01155 * line. This bit is cleared by writing a 1 to the bit. 01156 * @rmtoll PR1 PIFx LL_EXTI_IsActiveFlag_0_31 01157 * @param ExtiLine This parameter can be a combination of the following values: 01158 * @arg @ref LL_EXTI_LINE_0 01159 * @arg @ref LL_EXTI_LINE_1 01160 * @arg @ref LL_EXTI_LINE_2 01161 * @arg @ref LL_EXTI_LINE_3 01162 * @arg @ref LL_EXTI_LINE_4 01163 * @arg @ref LL_EXTI_LINE_5 01164 * @arg @ref LL_EXTI_LINE_6 01165 * @arg @ref LL_EXTI_LINE_7 01166 * @arg @ref LL_EXTI_LINE_8 01167 * @arg @ref LL_EXTI_LINE_9 01168 * @arg @ref LL_EXTI_LINE_10 01169 * @arg @ref LL_EXTI_LINE_11 01170 * @arg @ref LL_EXTI_LINE_12 01171 * @arg @ref LL_EXTI_LINE_13 01172 * @arg @ref LL_EXTI_LINE_14 01173 * @arg @ref LL_EXTI_LINE_15 01174 * @arg @ref LL_EXTI_LINE_16 01175 * @arg @ref LL_EXTI_LINE_18 01176 * @arg @ref LL_EXTI_LINE_19 01177 * @arg @ref LL_EXTI_LINE_20 01178 * @arg @ref LL_EXTI_LINE_21 01179 * @arg @ref LL_EXTI_LINE_22 01180 * @arg @ref LL_EXTI_LINE_29 01181 * @arg @ref LL_EXTI_LINE_30 01182 * @arg @ref LL_EXTI_LINE_31 01183 * @note Please check each device line mapping for EXTI Line availability 01184 * @retval State of bit (1 or 0). 01185 */ 01186 __STATIC_INLINE uint32_t LL_EXTI_IsActiveFlag_0_31(uint32_t ExtiLine) 01187 { 01188 return ((READ_BIT(EXTI->PR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL); 01189 } 01190 01191 /** 01192 * @brief Check if the ExtLine Flag is set or not for Lines in range 32 to 63 01193 * @note This bit is set when the selected edge event arrives on the interrupt 01194 * line. This bit is cleared by writing a 1 to the bit. 01195 * @rmtoll PR2 PIFx LL_EXTI_IsActiveFlag_32_63 01196 * @param ExtiLine This parameter can be a combination of the following values: 01197 * @arg @ref LL_EXTI_LINE_35 01198 * @arg @ref LL_EXTI_LINE_36 01199 * @arg @ref LL_EXTI_LINE_37 01200 * @arg @ref LL_EXTI_LINE_38 01201 * @retval State of bit (1 or 0). 01202 */ 01203 __STATIC_INLINE uint32_t LL_EXTI_IsActiveFlag_32_63(uint32_t ExtiLine) 01204 { 01205 return ((READ_BIT(EXTI->PR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL); 01206 } 01207 01208 /** 01209 * @brief Read ExtLine Combination Flag for Lines in range 0 to 31 01210 * @note This bit is set when the selected edge event arrives on the interrupt 01211 * line. This bit is cleared by writing a 1 to the bit. 01212 * @rmtoll PR1 PIFx LL_EXTI_ReadFlag_0_31 01213 * @param ExtiLine This parameter can be a combination of the following values: 01214 * @arg @ref LL_EXTI_LINE_0 01215 * @arg @ref LL_EXTI_LINE_1 01216 * @arg @ref LL_EXTI_LINE_2 01217 * @arg @ref LL_EXTI_LINE_3 01218 * @arg @ref LL_EXTI_LINE_4 01219 * @arg @ref LL_EXTI_LINE_5 01220 * @arg @ref LL_EXTI_LINE_6 01221 * @arg @ref LL_EXTI_LINE_7 01222 * @arg @ref LL_EXTI_LINE_8 01223 * @arg @ref LL_EXTI_LINE_9 01224 * @arg @ref LL_EXTI_LINE_10 01225 * @arg @ref LL_EXTI_LINE_11 01226 * @arg @ref LL_EXTI_LINE_12 01227 * @arg @ref LL_EXTI_LINE_13 01228 * @arg @ref LL_EXTI_LINE_14 01229 * @arg @ref LL_EXTI_LINE_15 01230 * @arg @ref LL_EXTI_LINE_16 01231 * @arg @ref LL_EXTI_LINE_18 01232 * @arg @ref LL_EXTI_LINE_19 01233 * @arg @ref LL_EXTI_LINE_20 01234 * @arg @ref LL_EXTI_LINE_21 01235 * @arg @ref LL_EXTI_LINE_22 01236 * @arg @ref LL_EXTI_LINE_29 01237 * @arg @ref LL_EXTI_LINE_30 01238 * @arg @ref LL_EXTI_LINE_31 01239 * @note Please check each device line mapping for EXTI Line availability 01240 * @retval @note This bit is set when the selected edge event arrives on the interrupt 01241 */ 01242 __STATIC_INLINE uint32_t LL_EXTI_ReadFlag_0_31(uint32_t ExtiLine) 01243 { 01244 return (uint32_t)(READ_BIT(EXTI->PR1, ExtiLine)); 01245 } 01246 01247 /** 01248 * @brief Read ExtLine Combination Flag for Lines in range 32 to 63 01249 * @note This bit is set when the selected edge event arrives on the interrupt 01250 * line. This bit is cleared by writing a 1 to the bit. 01251 * @rmtoll PR2 PIFx LL_EXTI_ReadFlag_32_63 01252 * @param ExtiLine This parameter can be a combination of the following values: 01253 * @arg @ref LL_EXTI_LINE_35 01254 * @arg @ref LL_EXTI_LINE_36 01255 * @arg @ref LL_EXTI_LINE_37 01256 * @arg @ref LL_EXTI_LINE_38 01257 * @retval @note This bit is set when the selected edge event arrives on the interrupt 01258 */ 01259 __STATIC_INLINE uint32_t LL_EXTI_ReadFlag_32_63(uint32_t ExtiLine) 01260 { 01261 return (uint32_t)(READ_BIT(EXTI->PR2, ExtiLine)); 01262 } 01263 01264 /** 01265 * @brief Clear ExtLine Flags for Lines in range 0 to 31 01266 * @note This bit is set when the selected edge event arrives on the interrupt 01267 * line. This bit is cleared by writing a 1 to the bit. 01268 * @rmtoll PR1 PIFx LL_EXTI_ClearFlag_0_31 01269 * @param ExtiLine This parameter can be a combination of the following values: 01270 * @arg @ref LL_EXTI_LINE_0 01271 * @arg @ref LL_EXTI_LINE_1 01272 * @arg @ref LL_EXTI_LINE_2 01273 * @arg @ref LL_EXTI_LINE_3 01274 * @arg @ref LL_EXTI_LINE_4 01275 * @arg @ref LL_EXTI_LINE_5 01276 * @arg @ref LL_EXTI_LINE_6 01277 * @arg @ref LL_EXTI_LINE_7 01278 * @arg @ref LL_EXTI_LINE_8 01279 * @arg @ref LL_EXTI_LINE_9 01280 * @arg @ref LL_EXTI_LINE_10 01281 * @arg @ref LL_EXTI_LINE_11 01282 * @arg @ref LL_EXTI_LINE_12 01283 * @arg @ref LL_EXTI_LINE_13 01284 * @arg @ref LL_EXTI_LINE_14 01285 * @arg @ref LL_EXTI_LINE_15 01286 * @arg @ref LL_EXTI_LINE_16 01287 * @arg @ref LL_EXTI_LINE_18 01288 * @arg @ref LL_EXTI_LINE_19 01289 * @arg @ref LL_EXTI_LINE_20 01290 * @arg @ref LL_EXTI_LINE_21 01291 * @arg @ref LL_EXTI_LINE_22 01292 * @arg @ref LL_EXTI_LINE_29 01293 * @arg @ref LL_EXTI_LINE_30 01294 * @arg @ref LL_EXTI_LINE_31 01295 * @note Please check each device line mapping for EXTI Line availability 01296 * @retval None 01297 */ 01298 __STATIC_INLINE void LL_EXTI_ClearFlag_0_31(uint32_t ExtiLine) 01299 { 01300 WRITE_REG(EXTI->PR1, ExtiLine); 01301 } 01302 01303 /** 01304 * @brief Clear ExtLine Flags for Lines in range 32 to 63 01305 * @note This bit is set when the selected edge event arrives on the interrupt 01306 * line. This bit is cleared by writing a 1 to the bit. 01307 * @rmtoll PR2 PIFx LL_EXTI_ClearFlag_32_63 01308 * @param ExtiLine This parameter can be a combination of the following values: 01309 * @arg @ref LL_EXTI_LINE_35 01310 * @arg @ref LL_EXTI_LINE_36 01311 * @arg @ref LL_EXTI_LINE_37 01312 * @arg @ref LL_EXTI_LINE_38 01313 * @retval None 01314 */ 01315 __STATIC_INLINE void LL_EXTI_ClearFlag_32_63(uint32_t ExtiLine) 01316 { 01317 WRITE_REG(EXTI->PR2, ExtiLine); 01318 } 01319 01320 01321 /** 01322 * @} 01323 */ 01324 01325 #if defined(USE_FULL_LL_DRIVER) 01326 /** @defgroup EXTI_LL_EF_Init Initialization and de-initialization functions 01327 * @{ 01328 */ 01329 01330 uint32_t LL_EXTI_Init(LL_EXTI_InitTypeDef *EXTI_InitStruct); 01331 uint32_t LL_EXTI_DeInit(void); 01332 void LL_EXTI_StructInit(LL_EXTI_InitTypeDef *EXTI_InitStruct); 01333 01334 01335 /** 01336 * @} 01337 */ 01338 #endif /* USE_FULL_LL_DRIVER */ 01339 01340 /** 01341 * @} 01342 */ 01343 01344 /** 01345 * @} 01346 */ 01347 01348 #endif /* EXTI */ 01349 01350 /** 01351 * @} 01352 */ 01353 01354 #ifdef __cplusplus 01355 } 01356 #endif 01357 01358 #endif /* STM32L4xx_LL_EXTI_H */ 01359
1.7.6.1