PREDIV Division factor

Defines
#define	LL_RCC_PREDIV_DIV_1   0x00000000U
#define	LL_RCC_PREDIV_DIV_2   RCC_CFGR_PLLXTPRE

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Define Documentation

#define LL_RCC_PREDIV_DIV_1   0x00000000U

HSE divider clock clock not divided

Definition at line 473 of file stm32f1xx_ll_rcc.h.

#define LL_RCC_PREDIV_DIV_2   RCC_CFGR_PLLXTPRE

HSE divider clock divided by 2 for PLL entry

Definition at line 474 of file stm32f1xx_ll_rcc.h.

Referenced by LL_PLL_ConfigSystemClock_HSI().