STM32F103xB HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32f1xx_hal_dac.c 00004 * @author MCD Application Team 00005 * @brief DAC HAL module driver. 00006 * This file provides firmware functions to manage the following 00007 * functionalities of the Digital to Analog Converter (DAC) peripheral: 00008 * + Initialization and de-initialization functions 00009 * + IO operation functions 00010 * + Peripheral Control functions 00011 * + Peripheral State and Errors functions 00012 * 00013 * 00014 @verbatim 00015 ============================================================================== 00016 ##### DAC Peripheral features ##### 00017 ============================================================================== 00018 [..] 00019 *** DAC Channels *** 00020 ==================== 00021 [..] 00022 STM32F1 devices integrate two 12-bit Digital Analog Converters 00023 00024 The 2 converters (i.e. channel1 & channel2) 00025 can be used independently or simultaneously (dual mode): 00026 (#) DAC channel1 with DAC_OUT1 (PA4) as output or connected to on-chip 00027 peripherals (ex. timers). 00028 (#) DAC channel2 with DAC_OUT2 (PA5) as output or connected to on-chip 00029 peripherals (ex. timers). 00030 00031 *** DAC Triggers *** 00032 ==================== 00033 [..] 00034 Digital to Analog conversion can be non-triggered using DAC_TRIGGER_NONE 00035 and DAC_OUT1/DAC_OUT2 is available once writing to DHRx register. 00036 [..] 00037 Digital to Analog conversion can be triggered by: 00038 (#) External event: EXTI Line 9 (any GPIOx_PIN_9) using DAC_TRIGGER_EXT_IT9. 00039 The used pin (GPIOx_PIN_9) must be configured in input mode. 00040 00041 (#) Timers TRGO: TIM2, TIM4, TIM6, TIM7 00042 For STM32F10x connectivity line devices and STM32F100x devices: TIM3 00043 For STM32F10x high-density and XL-density devices: TIM8 00044 For STM32F100x high-density value line devices: TIM15 as 00045 replacement of TIM5. 00046 (DAC_TRIGGER_T2_TRGO, DAC_TRIGGER_T4_TRGO...) 00047 00048 (#) Software using DAC_TRIGGER_SOFTWARE 00049 00050 *** DAC Buffer mode feature *** 00051 =============================== 00052 [..] 00053 Each DAC channel integrates an output buffer that can be used to 00054 reduce the output impedance, and to drive external loads directly 00055 without having to add an external operational amplifier. 00056 To enable, the output buffer use 00057 sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE; 00058 [..] 00059 (@) Refer to the device datasheet for more details about output 00060 impedance value with and without output buffer. 00061 00062 *** GPIO configurations guidelines *** 00063 ===================== 00064 [..] 00065 When a DAC channel is used (ex channel1 on PA4) and the other is not 00066 (ex channel2 on PA5 is configured in Analog and disabled). 00067 Channel1 may disturb channel2 as coupling effect. 00068 Note that there is no coupling on channel2 as soon as channel2 is turned on. 00069 Coupling on adjacent channel could be avoided as follows: 00070 when unused PA5 is configured as INPUT PULL-UP or DOWN. 00071 PA5 is configured in ANALOG just before it is turned on. 00072 00073 *** DAC wave generation feature *** 00074 =================================== 00075 [..] 00076 Both DAC channels can be used to generate 00077 (#) Noise wave 00078 (#) Triangle wave 00079 00080 *** DAC data format *** 00081 ======================= 00082 [..] 00083 The DAC data format can be: 00084 (#) 8-bit right alignment using DAC_ALIGN_8B_R 00085 (#) 12-bit left alignment using DAC_ALIGN_12B_L 00086 (#) 12-bit right alignment using DAC_ALIGN_12B_R 00087 00088 *** DAC data value to voltage correspondence *** 00089 ================================================ 00090 [..] 00091 The analog output voltage on each DAC channel pin is determined 00092 by the following equation: 00093 [..] 00094 DAC_OUTx = VREF+ * DOR / 4095 00095 (+) with DOR is the Data Output Register 00096 [..] 00097 VREF+ is the input voltage reference (refer to the device datasheet) 00098 [..] 00099 e.g. To set DAC_OUT1 to 0.7V, use 00100 (+) Assuming that VREF+ = 3.3V, DAC_OUT1 = (3.3 * 868) / 4095 = 0.7V 00101 00102 *** DMA requests *** 00103 ===================== 00104 [..] 00105 A DMA request can be generated when an external trigger (but not a software trigger) 00106 occurs if DMA1 requests are enabled using HAL_DAC_Start_DMA(). 00107 DMA1 requests are mapped as following: 00108 (#) DAC channel1 mapped on DMA1 channel3 00109 for STM32F100x low-density, medium-density, high-density with DAC 00110 DMA remap: 00111 (#) DAC channel2 mapped on DMA2 channel3 00112 for STM32F100x high-density without DAC DMA remap and other 00113 STM32F1 devices 00114 00115 [..] 00116 (@) For Dual mode and specific signal (Triangle and noise) generation please 00117 refer to Extended Features Driver description 00118 00119 ##### How to use this driver ##### 00120 ============================================================================== 00121 [..] 00122 (+) DAC APB clock must be enabled to get write access to DAC 00123 registers using HAL_DAC_Init() 00124 (+) Configure DAC_OUTx (DAC_OUT1: PA4, DAC_OUT2: PA5) in analog mode. 00125 (+) Configure the DAC channel using HAL_DAC_ConfigChannel() function. 00126 (+) Enable the DAC channel using HAL_DAC_Start() or HAL_DAC_Start_DMA() functions. 00127 00128 00129 *** Polling mode IO operation *** 00130 ================================= 00131 [..] 00132 (+) Start the DAC peripheral using HAL_DAC_Start() 00133 (+) To read the DAC last data output value, use the HAL_DAC_GetValue() function. 00134 (+) Stop the DAC peripheral using HAL_DAC_Stop() 00135 00136 *** DMA mode IO operation *** 00137 ============================== 00138 [..] 00139 (+) Start the DAC peripheral using HAL_DAC_Start_DMA(), at this stage the user specify the length 00140 of data to be transferred at each end of conversion 00141 First issued trigger will start the conversion of the value previously set by HAL_DAC_SetValue(). 00142 (+) At the middle of data transfer HAL_DAC_ConvHalfCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2() 00143 function is executed and user can add his own code by customization of function pointer 00144 HAL_DAC_ConvHalfCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2() 00145 (+) At The end of data transfer HAL_DAC_ConvCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2() 00146 function is executed and user can add his own code by customization of function pointer 00147 HAL_DAC_ConvCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2() 00148 (+) In case of transfer Error, HAL_DAC_ErrorCallbackCh1() function is executed and user can 00149 add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1 00150 (+) For STM32F100x devices with specific feature: DMA underrun. 00151 In case of DMA underrun, DAC interruption triggers and execute internal function HAL_DAC_IRQHandler. 00152 HAL_DAC_DMAUnderrunCallbackCh1() or HAL_DACEx_DMAUnderrunCallbackCh2() 00153 function is executed and user can add his own code by customization of function pointer 00154 HAL_DAC_DMAUnderrunCallbackCh1() or HAL_DACEx_DMAUnderrunCallbackCh2() and 00155 add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1() 00156 (+) Stop the DAC peripheral using HAL_DAC_Stop_DMA() 00157 00158 *** Callback registration *** 00159 ============================================= 00160 [..] 00161 The compilation define USE_HAL_DAC_REGISTER_CALLBACKS when set to 1 00162 allows the user to configure dynamically the driver callbacks. 00163 00164 Use Functions @ref HAL_DAC_RegisterCallback() to register a user callback, 00165 it allows to register following callbacks: 00166 (+) ConvCpltCallbackCh1 : callback when a half transfer is completed on Ch1. 00167 (+) ConvHalfCpltCallbackCh1 : callback when a transfer is completed on Ch1. 00168 (+) ErrorCallbackCh1 : callback when an error occurs on Ch1. 00169 (+) DMAUnderrunCallbackCh1 : callback when an underrun error occurs on Ch1. 00170 (+) ConvCpltCallbackCh2 : callback when a half transfer is completed on Ch2. 00171 (+) ConvHalfCpltCallbackCh2 : callback when a transfer is completed on Ch2. 00172 (+) ErrorCallbackCh2 : callback when an error occurs on Ch2. 00173 (+) DMAUnderrunCallbackCh2 : callback when an underrun error occurs on Ch2. 00174 (+) MspInitCallback : DAC MspInit. 00175 (+) MspDeInitCallback : DAC MspdeInit. 00176 This function takes as parameters the HAL peripheral handle, the Callback ID 00177 and a pointer to the user callback function. 00178 00179 Use function @ref HAL_DAC_UnRegisterCallback() to reset a callback to the default 00180 weak (surcharged) function. It allows to reset following callbacks: 00181 (+) ConvCpltCallbackCh1 : callback when a half transfer is completed on Ch1. 00182 (+) ConvHalfCpltCallbackCh1 : callback when a transfer is completed on Ch1. 00183 (+) ErrorCallbackCh1 : callback when an error occurs on Ch1. 00184 (+) DMAUnderrunCallbackCh1 : callback when an underrun error occurs on Ch1. 00185 (+) ConvCpltCallbackCh2 : callback when a half transfer is completed on Ch2. 00186 (+) ConvHalfCpltCallbackCh2 : callback when a transfer is completed on Ch2. 00187 (+) ErrorCallbackCh2 : callback when an error occurs on Ch2. 00188 (+) DMAUnderrunCallbackCh2 : callback when an underrun error occurs on Ch2. 00189 (+) MspInitCallback : DAC MspInit. 00190 (+) MspDeInitCallback : DAC MspdeInit. 00191 (+) All Callbacks 00192 This function) takes as parameters the HAL peripheral handle and the Callback ID. 00193 00194 By default, after the @ref HAL_DAC_Init and if the state is HAL_DAC_STATE_RESET 00195 all callbacks are reset to the corresponding legacy weak (surcharged) functions. 00196 Exception done for MspInit and MspDeInit callbacks that are respectively 00197 reset to the legacy weak (surcharged) functions in the @ref HAL_DAC_Init 00198 and @ref HAL_DAC_DeInit only when these callbacks are null (not registered beforehand). 00199 If not, MspInit or MspDeInit are not null, the @ref HAL_DAC_Init and @ref HAL_DAC_DeInit 00200 keep and use the user MspInit/MspDeInit callbacks (registered beforehand) 00201 00202 Callbacks can be registered/unregistered in READY state only. 00203 Exception done for MspInit/MspDeInit callbacks that can be registered/unregistered 00204 in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used 00205 during the Init/DeInit. 00206 In that case first register the MspInit/MspDeInit user callbacks 00207 using @ref HAL_DAC_RegisterCallback before calling @ref HAL_DAC_DeInit 00208 or @ref HAL_DAC_Init function. 00209 00210 When The compilation define USE_HAL_DAC_REGISTER_CALLBACKS is set to 0 or 00211 not defined, the callback registering feature is not available 00212 and weak (surcharged) callbacks are used. 00213 00214 *** DAC HAL driver macros list *** 00215 ============================================= 00216 [..] 00217 Below the list of most used macros in DAC HAL driver. 00218 00219 (+) __HAL_DAC_ENABLE : Enable the DAC peripheral (For STM32F100x devices with specific feature: DMA underrun) 00220 (+) __HAL_DAC_DISABLE : Disable the DAC peripheral (For STM32F100x devices with specific feature: DMA underrun) 00221 (+) __HAL_DAC_CLEAR_FLAG: Clear the DAC's pending flags (For STM32F100x devices with specific feature: DMA underrun) 00222 (+) __HAL_DAC_GET_FLAG: Get the selected DAC's flag status (For STM32F100x devices with specific feature: DMA underrun) 00223 00224 [..] 00225 (@) You can refer to the DAC HAL driver header file for more useful macros 00226 00227 @endverbatim 00228 ****************************************************************************** 00229 * @attention 00230 * 00231 * <h2><center>© Copyright (c) 2016 STMicroelectronics. 00232 * All rights reserved.</center></h2> 00233 * 00234 * This software component is licensed by ST under BSD 3-Clause license, 00235 * the "License"; You may not use this file except in compliance with the 00236 * License. You may obtain a copy of the License at: 00237 * opensource.org/licenses/BSD-3-Clause 00238 * 00239 ****************************************************************************** 00240 */ 00241 00242 /* Includes ------------------------------------------------------------------*/ 00243 #include "stm32f1xx_hal.h" 00244 00245 /** @addtogroup STM32F1xx_HAL_Driver 00246 * @{ 00247 */ 00248 00249 #ifdef HAL_DAC_MODULE_ENABLED 00250 #if defined(DAC) 00251 00252 /** @defgroup DAC DAC 00253 * @brief DAC driver modules 00254 * @{ 00255 */ 00256 00257 /* Private typedef -----------------------------------------------------------*/ 00258 /* Private define ------------------------------------------------------------*/ 00259 /* Private constants ---------------------------------------------------------*/ 00260 /* Private macro -------------------------------------------------------------*/ 00261 /* Private variables ---------------------------------------------------------*/ 00262 /* Private function prototypes -----------------------------------------------*/ 00263 /* Exported functions -------------------------------------------------------*/ 00264 00265 /** @defgroup DAC_Exported_Functions DAC Exported Functions 00266 * @{ 00267 */ 00268 00269 /** @defgroup DAC_Exported_Functions_Group1 Initialization and de-initialization functions 00270 * @brief Initialization and Configuration functions 00271 * 00272 @verbatim 00273 ============================================================================== 00274 ##### Initialization and de-initialization functions ##### 00275 ============================================================================== 00276 [..] This section provides functions allowing to: 00277 (+) Initialize and configure the DAC. 00278 (+) De-initialize the DAC. 00279 00280 @endverbatim 00281 * @{ 00282 */ 00283 00284 /** 00285 * @brief Initialize the DAC peripheral according to the specified parameters 00286 * in the DAC_InitStruct and initialize the associated handle. 00287 * @param hdac pointer to a DAC_HandleTypeDef structure that contains 00288 * the configuration information for the specified DAC. 00289 * @retval HAL status 00290 */ 00291 HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef *hdac) 00292 { 00293 /* Check DAC handle */ 00294 if (hdac == NULL) 00295 { 00296 return HAL_ERROR; 00297 } 00298 /* Check the parameters */ 00299 assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance)); 00300 00301 if (hdac->State == HAL_DAC_STATE_RESET) 00302 { 00303 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 00304 /* Init the DAC Callback settings */ 00305 hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1; 00306 hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1; 00307 hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1; 00308 hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1; 00309 00310 hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2; 00311 hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2; 00312 hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2; 00313 hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2; 00314 00315 if (hdac->MspInitCallback == NULL) 00316 { 00317 hdac->MspInitCallback = HAL_DAC_MspInit; 00318 } 00319 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 00320 00321 /* Allocate lock resource and initialize it */ 00322 hdac->Lock = HAL_UNLOCKED; 00323 00324 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 00325 /* Init the low level hardware */ 00326 hdac->MspInitCallback(hdac); 00327 #else 00328 /* Init the low level hardware */ 00329 HAL_DAC_MspInit(hdac); 00330 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 00331 } 00332 00333 /* Initialize the DAC state*/ 00334 hdac->State = HAL_DAC_STATE_BUSY; 00335 00336 /* Set DAC error code to none */ 00337 hdac->ErrorCode = HAL_DAC_ERROR_NONE; 00338 00339 /* Initialize the DAC state*/ 00340 hdac->State = HAL_DAC_STATE_READY; 00341 00342 /* Return function status */ 00343 return HAL_OK; 00344 } 00345 00346 /** 00347 * @brief Deinitialize the DAC peripheral registers to their default reset values. 00348 * @param hdac pointer to a DAC_HandleTypeDef structure that contains 00349 * the configuration information for the specified DAC. 00350 * @retval HAL status 00351 */ 00352 HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef *hdac) 00353 { 00354 /* Check DAC handle */ 00355 if (hdac == NULL) 00356 { 00357 return HAL_ERROR; 00358 } 00359 00360 /* Check the parameters */ 00361 assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance)); 00362 00363 /* Change DAC state */ 00364 hdac->State = HAL_DAC_STATE_BUSY; 00365 00366 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 00367 if (hdac->MspDeInitCallback == NULL) 00368 { 00369 hdac->MspDeInitCallback = HAL_DAC_MspDeInit; 00370 } 00371 /* DeInit the low level hardware */ 00372 hdac->MspDeInitCallback(hdac); 00373 #else 00374 /* DeInit the low level hardware */ 00375 HAL_DAC_MspDeInit(hdac); 00376 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 00377 00378 /* Set DAC error code to none */ 00379 hdac->ErrorCode = HAL_DAC_ERROR_NONE; 00380 00381 /* Change DAC state */ 00382 hdac->State = HAL_DAC_STATE_RESET; 00383 00384 /* Release Lock */ 00385 __HAL_UNLOCK(hdac); 00386 00387 /* Return function status */ 00388 return HAL_OK; 00389 } 00390 00391 /** 00392 * @brief Initialize the DAC MSP. 00393 * @param hdac pointer to a DAC_HandleTypeDef structure that contains 00394 * the configuration information for the specified DAC. 00395 * @retval None 00396 */ 00397 __weak void HAL_DAC_MspInit(DAC_HandleTypeDef *hdac) 00398 { 00399 /* Prevent unused argument(s) compilation warning */ 00400 UNUSED(hdac); 00401 00402 /* NOTE : This function should not be modified, when the callback is needed, 00403 the HAL_DAC_MspInit could be implemented in the user file 00404 */ 00405 } 00406 00407 /** 00408 * @brief DeInitialize the DAC MSP. 00409 * @param hdac pointer to a DAC_HandleTypeDef structure that contains 00410 * the configuration information for the specified DAC. 00411 * @retval None 00412 */ 00413 __weak void HAL_DAC_MspDeInit(DAC_HandleTypeDef *hdac) 00414 { 00415 /* Prevent unused argument(s) compilation warning */ 00416 UNUSED(hdac); 00417 00418 /* NOTE : This function should not be modified, when the callback is needed, 00419 the HAL_DAC_MspDeInit could be implemented in the user file 00420 */ 00421 } 00422 00423 /** 00424 * @} 00425 */ 00426 00427 /** @defgroup DAC_Exported_Functions_Group2 IO operation functions 00428 * @brief IO operation functions 00429 * 00430 @verbatim 00431 ============================================================================== 00432 ##### IO operation functions ##### 00433 ============================================================================== 00434 [..] This section provides functions allowing to: 00435 (+) Start conversion. 00436 (+) Stop conversion. 00437 (+) Start conversion and enable DMA transfer. 00438 (+) Stop conversion and disable DMA transfer. 00439 (+) Get result of conversion. 00440 00441 @endverbatim 00442 * @{ 00443 */ 00444 00445 /** 00446 * @brief Enables DAC and starts conversion of channel. 00447 * @param hdac pointer to a DAC_HandleTypeDef structure that contains 00448 * the configuration information for the specified DAC. 00449 * @param Channel The selected DAC channel. 00450 * This parameter can be one of the following values: 00451 * @arg DAC_CHANNEL_1: DAC Channel1 selected 00452 * @arg DAC_CHANNEL_2: DAC Channel2 selected 00453 * @retval HAL status 00454 */ 00455 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef *hdac, uint32_t Channel) 00456 { 00457 /* Check the parameters */ 00458 assert_param(IS_DAC_CHANNEL(Channel)); 00459 00460 /* Process locked */ 00461 __HAL_LOCK(hdac); 00462 00463 /* Change DAC state */ 00464 hdac->State = HAL_DAC_STATE_BUSY; 00465 00466 /* Enable the Peripheral */ 00467 __HAL_DAC_ENABLE(hdac, Channel); 00468 00469 if (Channel == DAC_CHANNEL_1) 00470 { 00471 /* Check if software trigger enabled */ 00472 if ((hdac->Instance->CR & (DAC_CR_TEN1 | DAC_CR_TSEL1)) == DAC_TRIGGER_SOFTWARE) 00473 { 00474 /* Enable the selected DAC software conversion */ 00475 SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG1); 00476 } 00477 } 00478 00479 else 00480 { 00481 /* Check if software trigger enabled */ 00482 if ((hdac->Instance->CR & (DAC_CR_TEN2 | DAC_CR_TSEL2)) == (DAC_TRIGGER_SOFTWARE << (Channel & 0x10UL))) 00483 { 00484 /* Enable the selected DAC software conversion*/ 00485 SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG2); 00486 } 00487 } 00488 00489 00490 /* Change DAC state */ 00491 hdac->State = HAL_DAC_STATE_READY; 00492 00493 /* Process unlocked */ 00494 __HAL_UNLOCK(hdac); 00495 00496 /* Return function status */ 00497 return HAL_OK; 00498 } 00499 00500 /** 00501 * @brief Disables DAC and stop conversion of channel. 00502 * @param hdac pointer to a DAC_HandleTypeDef structure that contains 00503 * the configuration information for the specified DAC. 00504 * @param Channel The selected DAC channel. 00505 * This parameter can be one of the following values: 00506 * @arg DAC_CHANNEL_1: DAC Channel1 selected 00507 * @arg DAC_CHANNEL_2: DAC Channel2 selected 00508 * @retval HAL status 00509 */ 00510 HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef *hdac, uint32_t Channel) 00511 { 00512 /* Check the parameters */ 00513 assert_param(IS_DAC_CHANNEL(Channel)); 00514 00515 /* Disable the Peripheral */ 00516 __HAL_DAC_DISABLE(hdac, Channel); 00517 00518 /* Change DAC state */ 00519 hdac->State = HAL_DAC_STATE_READY; 00520 00521 /* Return function status */ 00522 return HAL_OK; 00523 } 00524 00525 /** 00526 * @brief Enables DAC and starts conversion of channel. 00527 * @param hdac pointer to a DAC_HandleTypeDef structure that contains 00528 * the configuration information for the specified DAC. 00529 * @param Channel The selected DAC channel. 00530 * This parameter can be one of the following values: 00531 * @arg DAC_CHANNEL_1: DAC Channel1 selected 00532 * @arg DAC_CHANNEL_2: DAC Channel2 selected 00533 * @param pData The source Buffer address. 00534 * @param Length The length of data to be transferred from memory to DAC peripheral 00535 * @param Alignment Specifies the data alignment for DAC channel. 00536 * This parameter can be one of the following values: 00537 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected 00538 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected 00539 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected 00540 * @retval HAL status 00541 */ 00542 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t *pData, uint32_t Length, 00543 uint32_t Alignment) 00544 { 00545 HAL_StatusTypeDef status; 00546 uint32_t tmpreg = 0U; 00547 00548 /* Check the parameters */ 00549 assert_param(IS_DAC_CHANNEL(Channel)); 00550 assert_param(IS_DAC_ALIGN(Alignment)); 00551 00552 /* Process locked */ 00553 __HAL_LOCK(hdac); 00554 00555 /* Change DAC state */ 00556 hdac->State = HAL_DAC_STATE_BUSY; 00557 00558 if (Channel == DAC_CHANNEL_1) 00559 { 00560 /* Set the DMA transfer complete callback for channel1 */ 00561 hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1; 00562 00563 /* Set the DMA half transfer complete callback for channel1 */ 00564 hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1; 00565 00566 /* Set the DMA error callback for channel1 */ 00567 hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1; 00568 00569 /* Enable the selected DAC channel1 DMA request */ 00570 SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1); 00571 00572 /* Case of use of channel 1 */ 00573 switch (Alignment) 00574 { 00575 case DAC_ALIGN_12B_R: 00576 /* Get DHR12R1 address */ 00577 tmpreg = (uint32_t)&hdac->Instance->DHR12R1; 00578 break; 00579 case DAC_ALIGN_12B_L: 00580 /* Get DHR12L1 address */ 00581 tmpreg = (uint32_t)&hdac->Instance->DHR12L1; 00582 break; 00583 case DAC_ALIGN_8B_R: 00584 /* Get DHR8R1 address */ 00585 tmpreg = (uint32_t)&hdac->Instance->DHR8R1; 00586 break; 00587 default: 00588 break; 00589 } 00590 } 00591 00592 else 00593 { 00594 /* Set the DMA transfer complete callback for channel2 */ 00595 hdac->DMA_Handle2->XferCpltCallback = DAC_DMAConvCpltCh2; 00596 00597 /* Set the DMA half transfer complete callback for channel2 */ 00598 hdac->DMA_Handle2->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh2; 00599 00600 /* Set the DMA error callback for channel2 */ 00601 hdac->DMA_Handle2->XferErrorCallback = DAC_DMAErrorCh2; 00602 00603 /* Enable the selected DAC channel2 DMA request */ 00604 SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN2); 00605 00606 /* Case of use of channel 2 */ 00607 switch (Alignment) 00608 { 00609 case DAC_ALIGN_12B_R: 00610 /* Get DHR12R2 address */ 00611 tmpreg = (uint32_t)&hdac->Instance->DHR12R2; 00612 break; 00613 case DAC_ALIGN_12B_L: 00614 /* Get DHR12L2 address */ 00615 tmpreg = (uint32_t)&hdac->Instance->DHR12L2; 00616 break; 00617 case DAC_ALIGN_8B_R: 00618 /* Get DHR8R2 address */ 00619 tmpreg = (uint32_t)&hdac->Instance->DHR8R2; 00620 break; 00621 default: 00622 break; 00623 } 00624 } 00625 00626 00627 /* Enable the DMA Stream */ 00628 if (Channel == DAC_CHANNEL_1) 00629 { 00630 #if defined(DAC_CR_DMAUDRIE1) 00631 /* Enable the DAC DMA underrun interrupt */ 00632 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1); 00633 #endif /* DAC_CR_DMAUDRIE1 */ 00634 00635 /* Enable the DMA Stream */ 00636 status = HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length); 00637 } 00638 00639 else 00640 { 00641 #if defined(DAC_CR_DMAUDRIE2) 00642 /* Enable the DAC DMA underrun interrupt */ 00643 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR2); 00644 #endif /* DAC_CR_DMAUDRIE2 */ 00645 00646 /* Enable the DMA Stream */ 00647 status = HAL_DMA_Start_IT(hdac->DMA_Handle2, (uint32_t)pData, tmpreg, Length); 00648 } 00649 00650 00651 /* Process Unlocked */ 00652 __HAL_UNLOCK(hdac); 00653 00654 if (status == HAL_OK) 00655 { 00656 /* Enable the Peripheral */ 00657 __HAL_DAC_ENABLE(hdac, Channel); 00658 } 00659 else 00660 { 00661 hdac->ErrorCode |= HAL_DAC_ERROR_DMA; 00662 } 00663 00664 /* Return function status */ 00665 return status; 00666 } 00667 00668 /** 00669 * @brief Disables DAC and stop conversion of channel. 00670 * @param hdac pointer to a DAC_HandleTypeDef structure that contains 00671 * the configuration information for the specified DAC. 00672 * @param Channel The selected DAC channel. 00673 * This parameter can be one of the following values: 00674 * @arg DAC_CHANNEL_1: DAC Channel1 selected 00675 * @arg DAC_CHANNEL_2: DAC Channel2 selected 00676 * @retval HAL status 00677 */ 00678 HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel) 00679 { 00680 /* Check the parameters */ 00681 assert_param(IS_DAC_CHANNEL(Channel)); 00682 00683 /* Disable the selected DAC channel DMA request */ 00684 hdac->Instance->CR &= ~(DAC_CR_DMAEN1 << (Channel & 0x10UL)); 00685 00686 /* Disable the Peripheral */ 00687 __HAL_DAC_DISABLE(hdac, Channel); 00688 00689 /* Disable the DMA Stream */ 00690 00691 /* Channel1 is used */ 00692 if (Channel == DAC_CHANNEL_1) 00693 { 00694 /* Disable the DMA Stream */ 00695 (void)HAL_DMA_Abort(hdac->DMA_Handle1); 00696 #if defined(DAC_CR_DMAUDRIE1) 00697 /* Disable the DAC DMA underrun interrupt */ 00698 __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR1); 00699 #endif /* DAC_CR_DMAUDRIE1 */ 00700 } 00701 00702 else /* Channel2 is used for */ 00703 { 00704 /* Disable the DMA Stream */ 00705 (void)HAL_DMA_Abort(hdac->DMA_Handle2); 00706 #if defined(DAC_CR_DMAUDRIE2) 00707 /* Disable the DAC DMA underrun interrupt */ 00708 __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR2); 00709 #endif /* DAC_CR_DMAUDRIE2 */ 00710 } 00711 00712 00713 /* Change DAC state */ 00714 hdac->State = HAL_DAC_STATE_READY; 00715 00716 /* Return function status */ 00717 return HAL_OK; 00718 } 00719 00720 /** 00721 * @brief Handles DAC interrupt request 00722 * This function uses the interruption of DMA 00723 * underrun. 00724 * @param hdac pointer to a DAC_HandleTypeDef structure that contains 00725 * the configuration information for the specified DAC. 00726 * @retval None 00727 */ 00728 void HAL_DAC_IRQHandler(DAC_HandleTypeDef *hdac) 00729 { 00730 #if !defined(DAC_SR_DMAUDR1) && !defined(DAC_SR_DMAUDR2) 00731 UNUSED(hdac); 00732 #endif 00733 00734 #if defined(DAC_SR_DMAUDR1) 00735 if (__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR1)) 00736 { 00737 /* Check underrun flag of DAC channel 1 */ 00738 if (__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR1)) 00739 { 00740 /* Change DAC state to error state */ 00741 hdac->State = HAL_DAC_STATE_ERROR; 00742 00743 /* Set DAC error code to channel1 DMA underrun error */ 00744 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH1); 00745 00746 /* Clear the underrun flag */ 00747 __HAL_DAC_CLEAR_FLAG(hdac, DAC_FLAG_DMAUDR1); 00748 00749 /* Disable the selected DAC channel1 DMA request */ 00750 CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN1); 00751 00752 /* Error callback */ 00753 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 00754 hdac->DMAUnderrunCallbackCh1(hdac); 00755 #else 00756 HAL_DAC_DMAUnderrunCallbackCh1(hdac); 00757 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 00758 } 00759 } 00760 #endif /* DAC_SR_DMAUDR1 */ 00761 00762 #if defined(DAC_SR_DMAUDR2) 00763 if (__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR2)) 00764 { 00765 /* Check underrun flag of DAC channel 2 */ 00766 if (__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR2)) 00767 { 00768 /* Change DAC state to error state */ 00769 hdac->State = HAL_DAC_STATE_ERROR; 00770 00771 /* Set DAC error code to channel2 DMA underrun error */ 00772 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH2); 00773 00774 /* Clear the underrun flag */ 00775 __HAL_DAC_CLEAR_FLAG(hdac, DAC_FLAG_DMAUDR2); 00776 00777 /* Disable the selected DAC channel2 DMA request */ 00778 CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN2); 00779 00780 /* Error callback */ 00781 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 00782 hdac->DMAUnderrunCallbackCh2(hdac); 00783 #else 00784 HAL_DACEx_DMAUnderrunCallbackCh2(hdac); 00785 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 00786 } 00787 } 00788 #endif /* DAC_SR_DMAUDR2 */ 00789 } 00790 00791 /** 00792 * @brief Set the specified data holding register value for DAC channel. 00793 * @param hdac pointer to a DAC_HandleTypeDef structure that contains 00794 * the configuration information for the specified DAC. 00795 * @param Channel The selected DAC channel. 00796 * This parameter can be one of the following values: 00797 * @arg DAC_CHANNEL_1: DAC Channel1 selected 00798 * @arg DAC_CHANNEL_2: DAC Channel2 selected 00799 * @param Alignment Specifies the data alignment. 00800 * This parameter can be one of the following values: 00801 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected 00802 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected 00803 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected 00804 * @param Data Data to be loaded in the selected data holding register. 00805 * @retval HAL status 00806 */ 00807 HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data) 00808 { 00809 __IO uint32_t tmp = 0UL; 00810 00811 /* Check the parameters */ 00812 assert_param(IS_DAC_CHANNEL(Channel)); 00813 assert_param(IS_DAC_ALIGN(Alignment)); 00814 assert_param(IS_DAC_DATA(Data)); 00815 00816 tmp = (uint32_t)hdac->Instance; 00817 if (Channel == DAC_CHANNEL_1) 00818 { 00819 tmp += DAC_DHR12R1_ALIGNMENT(Alignment); 00820 } 00821 00822 else 00823 { 00824 tmp += DAC_DHR12R2_ALIGNMENT(Alignment); 00825 } 00826 00827 00828 /* Set the DAC channel selected data holding register */ 00829 *(__IO uint32_t *) tmp = Data; 00830 00831 /* Return function status */ 00832 return HAL_OK; 00833 } 00834 00835 /** 00836 * @brief Conversion complete callback in non-blocking mode for Channel1 00837 * @param hdac pointer to a DAC_HandleTypeDef structure that contains 00838 * the configuration information for the specified DAC. 00839 * @retval None 00840 */ 00841 __weak void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef *hdac) 00842 { 00843 /* Prevent unused argument(s) compilation warning */ 00844 UNUSED(hdac); 00845 00846 /* NOTE : This function should not be modified, when the callback is needed, 00847 the HAL_DAC_ConvCpltCallbackCh1 could be implemented in the user file 00848 */ 00849 } 00850 00851 /** 00852 * @brief Conversion half DMA transfer callback in non-blocking mode for Channel1 00853 * @param hdac pointer to a DAC_HandleTypeDef structure that contains 00854 * the configuration information for the specified DAC. 00855 * @retval None 00856 */ 00857 __weak void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef *hdac) 00858 { 00859 /* Prevent unused argument(s) compilation warning */ 00860 UNUSED(hdac); 00861 00862 /* NOTE : This function should not be modified, when the callback is needed, 00863 the HAL_DAC_ConvHalfCpltCallbackCh1 could be implemented in the user file 00864 */ 00865 } 00866 00867 /** 00868 * @brief Error DAC callback for Channel1. 00869 * @param hdac pointer to a DAC_HandleTypeDef structure that contains 00870 * the configuration information for the specified DAC. 00871 * @retval None 00872 */ 00873 __weak void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac) 00874 { 00875 /* Prevent unused argument(s) compilation warning */ 00876 UNUSED(hdac); 00877 00878 /* NOTE : This function should not be modified, when the callback is needed, 00879 the HAL_DAC_ErrorCallbackCh1 could be implemented in the user file 00880 */ 00881 } 00882 00883 /** 00884 * @brief DMA underrun DAC callback for channel1. 00885 * @param hdac pointer to a DAC_HandleTypeDef structure that contains 00886 * the configuration information for the specified DAC. 00887 * @retval None 00888 */ 00889 __weak void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac) 00890 { 00891 /* Prevent unused argument(s) compilation warning */ 00892 UNUSED(hdac); 00893 00894 /* NOTE : This function should not be modified, when the callback is needed, 00895 the HAL_DAC_DMAUnderrunCallbackCh1 could be implemented in the user file 00896 */ 00897 } 00898 00899 /** 00900 * @} 00901 */ 00902 00903 /** @defgroup DAC_Exported_Functions_Group3 Peripheral Control functions 00904 * @brief Peripheral Control functions 00905 * 00906 @verbatim 00907 ============================================================================== 00908 ##### Peripheral Control functions ##### 00909 ============================================================================== 00910 [..] This section provides functions allowing to: 00911 (+) Configure channels. 00912 (+) Set the specified data holding register value for DAC channel. 00913 00914 @endverbatim 00915 * @{ 00916 */ 00917 00918 /** 00919 * @brief Returns the last data output value of the selected DAC channel. 00920 * @param hdac pointer to a DAC_HandleTypeDef structure that contains 00921 * the configuration information for the specified DAC. 00922 * @param Channel The selected DAC channel. 00923 * This parameter can be one of the following values: 00924 * @arg DAC_CHANNEL_1: DAC Channel1 selected 00925 * @arg DAC_CHANNEL_2: DAC Channel2 selected 00926 * @retval The selected DAC channel data output value. 00927 */ 00928 uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef *hdac, uint32_t Channel) 00929 { 00930 uint32_t result; 00931 00932 /* Check the parameters */ 00933 assert_param(IS_DAC_CHANNEL(Channel)); 00934 00935 if (Channel == DAC_CHANNEL_1) 00936 { 00937 result = hdac->Instance->DOR1; 00938 } 00939 00940 else 00941 { 00942 result = hdac->Instance->DOR2; 00943 } 00944 00945 /* Returns the DAC channel data output register value */ 00946 return result; 00947 } 00948 00949 /** 00950 * @brief Configures the selected DAC channel. 00951 * @param hdac pointer to a DAC_HandleTypeDef structure that contains 00952 * the configuration information for the specified DAC. 00953 * @param sConfig DAC configuration structure. 00954 * @param Channel The selected DAC channel. 00955 * This parameter can be one of the following values: 00956 * @arg DAC_CHANNEL_1: DAC Channel1 selected 00957 * @arg DAC_CHANNEL_2: DAC Channel2 selected 00958 * @retval HAL status 00959 */ 00960 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef *hdac, DAC_ChannelConfTypeDef *sConfig, uint32_t Channel) 00961 { 00962 uint32_t tmpreg1; 00963 uint32_t tmpreg2; 00964 00965 /* Check the DAC parameters */ 00966 assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger)); 00967 assert_param(IS_DAC_OUTPUT_BUFFER_STATE(sConfig->DAC_OutputBuffer)); 00968 assert_param(IS_DAC_CHANNEL(Channel)); 00969 00970 /* Process locked */ 00971 __HAL_LOCK(hdac); 00972 00973 /* Change DAC state */ 00974 hdac->State = HAL_DAC_STATE_BUSY; 00975 00976 /* Get the DAC CR value */ 00977 tmpreg1 = hdac->Instance->CR; 00978 /* Clear BOFFx, TENx, TSELx, WAVEx and MAMPx bits */ 00979 tmpreg1 &= ~(((uint32_t)(DAC_CR_MAMP1 | DAC_CR_WAVE1 | DAC_CR_TSEL1 | DAC_CR_TEN1 | DAC_CR_BOFF1)) << (Channel & 0x10UL)); 00980 /* Configure for the selected DAC channel: buffer output, trigger */ 00981 /* Set TSELx and TENx bits according to DAC_Trigger value */ 00982 /* Set BOFFx bit according to DAC_OutputBuffer value */ 00983 tmpreg2 = (sConfig->DAC_Trigger | sConfig->DAC_OutputBuffer); 00984 /* Calculate CR register value depending on DAC_Channel */ 00985 tmpreg1 |= tmpreg2 << (Channel & 0x10UL); 00986 /* Write to DAC CR */ 00987 hdac->Instance->CR = tmpreg1; 00988 /* Disable wave generation */ 00989 CLEAR_BIT(hdac->Instance->CR, (DAC_CR_WAVE1 << (Channel & 0x10UL))); 00990 00991 /* Change DAC state */ 00992 hdac->State = HAL_DAC_STATE_READY; 00993 00994 /* Process unlocked */ 00995 __HAL_UNLOCK(hdac); 00996 00997 /* Return function status */ 00998 return HAL_OK; 00999 } 01000 01001 /** 01002 * @} 01003 */ 01004 01005 /** @defgroup DAC_Exported_Functions_Group4 Peripheral State and Errors functions 01006 * @brief Peripheral State and Errors functions 01007 * 01008 @verbatim 01009 ============================================================================== 01010 ##### Peripheral State and Errors functions ##### 01011 ============================================================================== 01012 [..] 01013 This subsection provides functions allowing to 01014 (+) Check the DAC state. 01015 (+) Check the DAC Errors. 01016 01017 @endverbatim 01018 * @{ 01019 */ 01020 01021 /** 01022 * @brief return the DAC handle state 01023 * @param hdac pointer to a DAC_HandleTypeDef structure that contains 01024 * the configuration information for the specified DAC. 01025 * @retval HAL state 01026 */ 01027 HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef *hdac) 01028 { 01029 /* Return DAC handle state */ 01030 return hdac->State; 01031 } 01032 01033 01034 /** 01035 * @brief Return the DAC error code 01036 * @param hdac pointer to a DAC_HandleTypeDef structure that contains 01037 * the configuration information for the specified DAC. 01038 * @retval DAC Error Code 01039 */ 01040 uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac) 01041 { 01042 return hdac->ErrorCode; 01043 } 01044 01045 /** 01046 * @} 01047 */ 01048 01049 /** 01050 * @} 01051 */ 01052 01053 /** @addtogroup DAC_Exported_Functions 01054 * @{ 01055 */ 01056 01057 /** @addtogroup DAC_Exported_Functions_Group1 01058 * @{ 01059 */ 01060 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 01061 /** 01062 * @brief Register a User DAC Callback 01063 * To be used instead of the weak (surcharged) predefined callback 01064 * @param hdac DAC handle 01065 * @param CallbackID ID of the callback to be registered 01066 * This parameter can be one of the following values: 01067 * @arg @ref HAL_DAC_ERROR_INVALID_CALLBACK DAC Error Callback ID 01068 * @arg @ref HAL_DAC_CH1_COMPLETE_CB_ID DAC CH1 Complete Callback ID 01069 * @arg @ref HAL_DAC_CH1_HALF_COMPLETE_CB_ID DAC CH1 Half Complete Callback ID 01070 * @arg @ref HAL_DAC_CH1_ERROR_ID DAC CH1 Error Callback ID 01071 * @arg @ref HAL_DAC_CH1_UNDERRUN_CB_ID DAC CH1 UnderRun Callback ID 01072 * @arg @ref HAL_DAC_CH2_COMPLETE_CB_ID DAC CH2 Complete Callback ID 01073 * @arg @ref HAL_DAC_CH2_HALF_COMPLETE_CB_ID DAC CH2 Half Complete Callback ID 01074 * @arg @ref HAL_DAC_CH2_ERROR_ID DAC CH2 Error Callback ID 01075 * @arg @ref HAL_DAC_CH2_UNDERRUN_CB_ID DAC CH2 UnderRun Callback ID 01076 * @arg @ref HAL_DAC_MSPINIT_CB_ID DAC MSP Init Callback ID 01077 * @arg @ref HAL_DAC_MSPDEINIT_CB_ID DAC MSP DeInit Callback ID 01078 * 01079 * @param pCallback pointer to the Callback function 01080 * @retval status 01081 */ 01082 HAL_StatusTypeDef HAL_DAC_RegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID, 01083 pDAC_CallbackTypeDef pCallback) 01084 { 01085 HAL_StatusTypeDef status = HAL_OK; 01086 01087 if (pCallback == NULL) 01088 { 01089 /* Update the error code */ 01090 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; 01091 return HAL_ERROR; 01092 } 01093 01094 /* Process locked */ 01095 __HAL_LOCK(hdac); 01096 01097 if (hdac->State == HAL_DAC_STATE_READY) 01098 { 01099 switch (CallbackID) 01100 { 01101 case HAL_DAC_CH1_COMPLETE_CB_ID : 01102 hdac->ConvCpltCallbackCh1 = pCallback; 01103 break; 01104 case HAL_DAC_CH1_HALF_COMPLETE_CB_ID : 01105 hdac->ConvHalfCpltCallbackCh1 = pCallback; 01106 break; 01107 case HAL_DAC_CH1_ERROR_ID : 01108 hdac->ErrorCallbackCh1 = pCallback; 01109 break; 01110 case HAL_DAC_CH1_UNDERRUN_CB_ID : 01111 hdac->DMAUnderrunCallbackCh1 = pCallback; 01112 break; 01113 01114 case HAL_DAC_CH2_COMPLETE_CB_ID : 01115 hdac->ConvCpltCallbackCh2 = pCallback; 01116 break; 01117 case HAL_DAC_CH2_HALF_COMPLETE_CB_ID : 01118 hdac->ConvHalfCpltCallbackCh2 = pCallback; 01119 break; 01120 case HAL_DAC_CH2_ERROR_ID : 01121 hdac->ErrorCallbackCh2 = pCallback; 01122 break; 01123 case HAL_DAC_CH2_UNDERRUN_CB_ID : 01124 hdac->DMAUnderrunCallbackCh2 = pCallback; 01125 break; 01126 01127 case HAL_DAC_MSPINIT_CB_ID : 01128 hdac->MspInitCallback = pCallback; 01129 break; 01130 case HAL_DAC_MSPDEINIT_CB_ID : 01131 hdac->MspDeInitCallback = pCallback; 01132 break; 01133 default : 01134 /* Update the error code */ 01135 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; 01136 /* update return status */ 01137 status = HAL_ERROR; 01138 break; 01139 } 01140 } 01141 else if (hdac->State == HAL_DAC_STATE_RESET) 01142 { 01143 switch (CallbackID) 01144 { 01145 case HAL_DAC_MSPINIT_CB_ID : 01146 hdac->MspInitCallback = pCallback; 01147 break; 01148 case HAL_DAC_MSPDEINIT_CB_ID : 01149 hdac->MspDeInitCallback = pCallback; 01150 break; 01151 default : 01152 /* Update the error code */ 01153 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; 01154 /* update return status */ 01155 status = HAL_ERROR; 01156 break; 01157 } 01158 } 01159 else 01160 { 01161 /* Update the error code */ 01162 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; 01163 /* update return status */ 01164 status = HAL_ERROR; 01165 } 01166 01167 /* Release Lock */ 01168 __HAL_UNLOCK(hdac); 01169 return status; 01170 } 01171 01172 /** 01173 * @brief Unregister a User DAC Callback 01174 * DAC Callback is redirected to the weak (surcharged) predefined callback 01175 * @param hdac DAC handle 01176 * @param CallbackID ID of the callback to be unregistered 01177 * This parameter can be one of the following values: 01178 * @arg @ref HAL_DAC_CH1_COMPLETE_CB_ID DAC CH1 transfer Complete Callback ID 01179 * @arg @ref HAL_DAC_CH1_HALF_COMPLETE_CB_ID DAC CH1 Half Complete Callback ID 01180 * @arg @ref HAL_DAC_CH1_ERROR_ID DAC CH1 Error Callback ID 01181 * @arg @ref HAL_DAC_CH1_UNDERRUN_CB_ID DAC CH1 UnderRun Callback ID 01182 * @arg @ref HAL_DAC_CH2_COMPLETE_CB_ID DAC CH2 Complete Callback ID 01183 * @arg @ref HAL_DAC_CH2_HALF_COMPLETE_CB_ID DAC CH2 Half Complete Callback ID 01184 * @arg @ref HAL_DAC_CH2_ERROR_ID DAC CH2 Error Callback ID 01185 * @arg @ref HAL_DAC_CH2_UNDERRUN_CB_ID DAC CH2 UnderRun Callback ID 01186 * @arg @ref HAL_DAC_MSPINIT_CB_ID DAC MSP Init Callback ID 01187 * @arg @ref HAL_DAC_MSPDEINIT_CB_ID DAC MSP DeInit Callback ID 01188 * @arg @ref HAL_DAC_ALL_CB_ID DAC All callbacks 01189 * @retval status 01190 */ 01191 HAL_StatusTypeDef HAL_DAC_UnRegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID) 01192 { 01193 HAL_StatusTypeDef status = HAL_OK; 01194 01195 /* Process locked */ 01196 __HAL_LOCK(hdac); 01197 01198 if (hdac->State == HAL_DAC_STATE_READY) 01199 { 01200 switch (CallbackID) 01201 { 01202 case HAL_DAC_CH1_COMPLETE_CB_ID : 01203 hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1; 01204 break; 01205 case HAL_DAC_CH1_HALF_COMPLETE_CB_ID : 01206 hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1; 01207 break; 01208 case HAL_DAC_CH1_ERROR_ID : 01209 hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1; 01210 break; 01211 case HAL_DAC_CH1_UNDERRUN_CB_ID : 01212 hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1; 01213 break; 01214 01215 case HAL_DAC_CH2_COMPLETE_CB_ID : 01216 hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2; 01217 break; 01218 case HAL_DAC_CH2_HALF_COMPLETE_CB_ID : 01219 hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2; 01220 break; 01221 case HAL_DAC_CH2_ERROR_ID : 01222 hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2; 01223 break; 01224 case HAL_DAC_CH2_UNDERRUN_CB_ID : 01225 hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2; 01226 break; 01227 01228 case HAL_DAC_MSPINIT_CB_ID : 01229 hdac->MspInitCallback = HAL_DAC_MspInit; 01230 break; 01231 case HAL_DAC_MSPDEINIT_CB_ID : 01232 hdac->MspDeInitCallback = HAL_DAC_MspDeInit; 01233 break; 01234 case HAL_DAC_ALL_CB_ID : 01235 hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1; 01236 hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1; 01237 hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1; 01238 hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1; 01239 01240 hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2; 01241 hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2; 01242 hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2; 01243 hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2; 01244 01245 hdac->MspInitCallback = HAL_DAC_MspInit; 01246 hdac->MspDeInitCallback = HAL_DAC_MspDeInit; 01247 break; 01248 default : 01249 /* Update the error code */ 01250 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; 01251 /* update return status */ 01252 status = HAL_ERROR; 01253 break; 01254 } 01255 } 01256 else if (hdac->State == HAL_DAC_STATE_RESET) 01257 { 01258 switch (CallbackID) 01259 { 01260 case HAL_DAC_MSPINIT_CB_ID : 01261 hdac->MspInitCallback = HAL_DAC_MspInit; 01262 break; 01263 case HAL_DAC_MSPDEINIT_CB_ID : 01264 hdac->MspDeInitCallback = HAL_DAC_MspDeInit; 01265 break; 01266 default : 01267 /* Update the error code */ 01268 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; 01269 /* update return status */ 01270 status = HAL_ERROR; 01271 break; 01272 } 01273 } 01274 else 01275 { 01276 /* Update the error code */ 01277 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; 01278 /* update return status */ 01279 status = HAL_ERROR; 01280 } 01281 01282 /* Release Lock */ 01283 __HAL_UNLOCK(hdac); 01284 return status; 01285 } 01286 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 01287 01288 /** 01289 * @} 01290 */ 01291 01292 /** 01293 * @} 01294 */ 01295 01296 /** @addtogroup DAC_Private_Functions 01297 * @{ 01298 */ 01299 01300 /** 01301 * @brief DMA conversion complete callback. 01302 * @param hdma pointer to a DMA_HandleTypeDef structure that contains 01303 * the configuration information for the specified DMA module. 01304 * @retval None 01305 */ 01306 void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma) 01307 { 01308 DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; 01309 01310 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 01311 hdac->ConvCpltCallbackCh1(hdac); 01312 #else 01313 HAL_DAC_ConvCpltCallbackCh1(hdac); 01314 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 01315 01316 hdac->State = HAL_DAC_STATE_READY; 01317 } 01318 01319 /** 01320 * @brief DMA half transfer complete callback. 01321 * @param hdma pointer to a DMA_HandleTypeDef structure that contains 01322 * the configuration information for the specified DMA module. 01323 * @retval None 01324 */ 01325 void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma) 01326 { 01327 DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; 01328 /* Conversion complete callback */ 01329 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 01330 hdac->ConvHalfCpltCallbackCh1(hdac); 01331 #else 01332 HAL_DAC_ConvHalfCpltCallbackCh1(hdac); 01333 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 01334 } 01335 01336 /** 01337 * @brief DMA error callback 01338 * @param hdma pointer to a DMA_HandleTypeDef structure that contains 01339 * the configuration information for the specified DMA module. 01340 * @retval None 01341 */ 01342 void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma) 01343 { 01344 DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; 01345 01346 /* Set DAC error code to DMA error */ 01347 hdac->ErrorCode |= HAL_DAC_ERROR_DMA; 01348 01349 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 01350 hdac->ErrorCallbackCh1(hdac); 01351 #else 01352 HAL_DAC_ErrorCallbackCh1(hdac); 01353 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 01354 01355 hdac->State = HAL_DAC_STATE_READY; 01356 } 01357 01358 /** 01359 * @} 01360 */ 01361 01362 /** 01363 * @} 01364 */ 01365 01366 #endif /* DAC */ 01367 01368 #endif /* HAL_DAC_MODULE_ENABLED */ 01369 01370 /** 01371 * @} 01372 */ 01373 01374 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/