STM32F103xB HAL User Manual
Data Structures | Defines | Typedefs | Enumerations | Functions
stm32f1xx_hal_tim.h File Reference

Header file of TIM HAL module. More...

#include "stm32f1xx_hal_def.h"
#include "stm32f1xx_hal_tim_ex.h"

Go to the source code of this file.

Data Structures

struct  TIM_Base_InitTypeDef
 TIM Time base Configuration Structure definition. More...
struct  TIM_OC_InitTypeDef
 TIM Output Compare Configuration Structure definition. More...
struct  TIM_OnePulse_InitTypeDef
 TIM One Pulse Mode Configuration Structure definition. More...
struct  TIM_IC_InitTypeDef
 TIM Input Capture Configuration Structure definition. More...
struct  TIM_Encoder_InitTypeDef
 TIM Encoder Configuration Structure definition. More...
struct  TIM_ClockConfigTypeDef
 Clock Configuration Handle Structure definition. More...
struct  TIM_ClearInputConfigTypeDef
 TIM Clear Input Configuration Handle Structure definition. More...
struct  TIM_MasterConfigTypeDef
 TIM Master configuration Structure definition. More...
struct  TIM_SlaveConfigTypeDef
 TIM Slave configuration Structure definition. More...
struct  TIM_BreakDeadTimeConfigTypeDef
 TIM Break input(s) and Dead time configuration Structure definition. More...
struct  __TIM_HandleTypeDef
 TIM Time Base Handle Structure definition. More...

Defines

#define TIM_CLEARINPUTSOURCE_NONE   0x00000000U
#define TIM_CLEARINPUTSOURCE_ETR   0x00000001U
#define TIM_DMABASE_CR1   0x00000000U
#define TIM_DMABASE_CR2   0x00000001U
#define TIM_DMABASE_SMCR   0x00000002U
#define TIM_DMABASE_DIER   0x00000003U
#define TIM_DMABASE_SR   0x00000004U
#define TIM_DMABASE_EGR   0x00000005U
#define TIM_DMABASE_CCMR1   0x00000006U
#define TIM_DMABASE_CCMR2   0x00000007U
#define TIM_DMABASE_CCER   0x00000008U
#define TIM_DMABASE_CNT   0x00000009U
#define TIM_DMABASE_PSC   0x0000000AU
#define TIM_DMABASE_ARR   0x0000000BU
#define TIM_DMABASE_RCR   0x0000000CU
#define TIM_DMABASE_CCR1   0x0000000DU
#define TIM_DMABASE_CCR2   0x0000000EU
#define TIM_DMABASE_CCR3   0x0000000FU
#define TIM_DMABASE_CCR4   0x00000010U
#define TIM_DMABASE_BDTR   0x00000011U
#define TIM_DMABASE_DCR   0x00000012U
#define TIM_DMABASE_DMAR   0x00000013U
#define TIM_EVENTSOURCE_UPDATE   TIM_EGR_UG
#define TIM_EVENTSOURCE_CC1   TIM_EGR_CC1G
#define TIM_EVENTSOURCE_CC2   TIM_EGR_CC2G
#define TIM_EVENTSOURCE_CC3   TIM_EGR_CC3G
#define TIM_EVENTSOURCE_CC4   TIM_EGR_CC4G
#define TIM_EVENTSOURCE_COM   TIM_EGR_COMG
#define TIM_EVENTSOURCE_TRIGGER   TIM_EGR_TG
#define TIM_EVENTSOURCE_BREAK   TIM_EGR_BG
#define TIM_INPUTCHANNELPOLARITY_RISING   0x00000000U
#define TIM_INPUTCHANNELPOLARITY_FALLING   TIM_CCER_CC1P
#define TIM_INPUTCHANNELPOLARITY_BOTHEDGE   (TIM_CCER_CC1P | TIM_CCER_CC1NP)
#define TIM_ETRPOLARITY_INVERTED   TIM_SMCR_ETP
#define TIM_ETRPOLARITY_NONINVERTED   0x00000000U
#define TIM_ETRPRESCALER_DIV1   0x00000000U
#define TIM_ETRPRESCALER_DIV2   TIM_SMCR_ETPS_0
#define TIM_ETRPRESCALER_DIV4   TIM_SMCR_ETPS_1
#define TIM_ETRPRESCALER_DIV8   TIM_SMCR_ETPS
#define TIM_COUNTERMODE_UP   0x00000000U
#define TIM_COUNTERMODE_DOWN   TIM_CR1_DIR
#define TIM_COUNTERMODE_CENTERALIGNED1   TIM_CR1_CMS_0
#define TIM_COUNTERMODE_CENTERALIGNED2   TIM_CR1_CMS_1
#define TIM_COUNTERMODE_CENTERALIGNED3   TIM_CR1_CMS
#define TIM_CLOCKDIVISION_DIV1   0x00000000U
#define TIM_CLOCKDIVISION_DIV2   TIM_CR1_CKD_0
#define TIM_CLOCKDIVISION_DIV4   TIM_CR1_CKD_1
#define TIM_OUTPUTSTATE_DISABLE   0x00000000U
#define TIM_OUTPUTSTATE_ENABLE   TIM_CCER_CC1E
#define TIM_AUTORELOAD_PRELOAD_DISABLE   0x00000000U
#define TIM_AUTORELOAD_PRELOAD_ENABLE   TIM_CR1_ARPE
#define TIM_OCFAST_DISABLE   0x00000000U
#define TIM_OCFAST_ENABLE   TIM_CCMR1_OC1FE
#define TIM_OUTPUTNSTATE_DISABLE   0x00000000U
#define TIM_OUTPUTNSTATE_ENABLE   TIM_CCER_CC1NE
#define TIM_OCPOLARITY_HIGH   0x00000000U
#define TIM_OCPOLARITY_LOW   TIM_CCER_CC1P
#define TIM_OCNPOLARITY_HIGH   0x00000000U
#define TIM_OCNPOLARITY_LOW   TIM_CCER_CC1NP
#define TIM_OCIDLESTATE_SET   TIM_CR2_OIS1
#define TIM_OCIDLESTATE_RESET   0x00000000U
#define TIM_OCNIDLESTATE_SET   TIM_CR2_OIS1N
#define TIM_OCNIDLESTATE_RESET   0x00000000U
#define TIM_ICPOLARITY_RISING   TIM_INPUTCHANNELPOLARITY_RISING
#define TIM_ICPOLARITY_FALLING   TIM_INPUTCHANNELPOLARITY_FALLING
#define TIM_ICPOLARITY_BOTHEDGE   TIM_INPUTCHANNELPOLARITY_BOTHEDGE
#define TIM_ENCODERINPUTPOLARITY_RISING   TIM_INPUTCHANNELPOLARITY_RISING
#define TIM_ENCODERINPUTPOLARITY_FALLING   TIM_INPUTCHANNELPOLARITY_FALLING
#define TIM_ICSELECTION_DIRECTTI   TIM_CCMR1_CC1S_0
#define TIM_ICSELECTION_INDIRECTTI   TIM_CCMR1_CC1S_1
#define TIM_ICSELECTION_TRC   TIM_CCMR1_CC1S
#define TIM_ICPSC_DIV1   0x00000000U
#define TIM_ICPSC_DIV2   TIM_CCMR1_IC1PSC_0
#define TIM_ICPSC_DIV4   TIM_CCMR1_IC1PSC_1
#define TIM_ICPSC_DIV8   TIM_CCMR1_IC1PSC
#define TIM_OPMODE_SINGLE   TIM_CR1_OPM
#define TIM_OPMODE_REPETITIVE   0x00000000U
#define TIM_ENCODERMODE_TI1   TIM_SMCR_SMS_0
#define TIM_ENCODERMODE_TI2   TIM_SMCR_SMS_1
#define TIM_ENCODERMODE_TI12   (TIM_SMCR_SMS_1 | TIM_SMCR_SMS_0)
#define TIM_IT_UPDATE   TIM_DIER_UIE
#define TIM_IT_CC1   TIM_DIER_CC1IE
#define TIM_IT_CC2   TIM_DIER_CC2IE
#define TIM_IT_CC3   TIM_DIER_CC3IE
#define TIM_IT_CC4   TIM_DIER_CC4IE
#define TIM_IT_COM   TIM_DIER_COMIE
#define TIM_IT_TRIGGER   TIM_DIER_TIE
#define TIM_IT_BREAK   TIM_DIER_BIE
#define TIM_COMMUTATION_TRGI   TIM_CR2_CCUS
#define TIM_COMMUTATION_SOFTWARE   0x00000000U
#define TIM_DMA_UPDATE   TIM_DIER_UDE
#define TIM_DMA_CC1   TIM_DIER_CC1DE
#define TIM_DMA_CC2   TIM_DIER_CC2DE
#define TIM_DMA_CC3   TIM_DIER_CC3DE
#define TIM_DMA_CC4   TIM_DIER_CC4DE
#define TIM_DMA_COM   TIM_DIER_COMDE
#define TIM_DMA_TRIGGER   TIM_DIER_TDE
#define TIM_FLAG_UPDATE   TIM_SR_UIF
#define TIM_FLAG_CC1   TIM_SR_CC1IF
#define TIM_FLAG_CC2   TIM_SR_CC2IF
#define TIM_FLAG_CC3   TIM_SR_CC3IF
#define TIM_FLAG_CC4   TIM_SR_CC4IF
#define TIM_FLAG_COM   TIM_SR_COMIF
#define TIM_FLAG_TRIGGER   TIM_SR_TIF
#define TIM_FLAG_BREAK   TIM_SR_BIF
#define TIM_FLAG_CC1OF   TIM_SR_CC1OF
#define TIM_FLAG_CC2OF   TIM_SR_CC2OF
#define TIM_FLAG_CC3OF   TIM_SR_CC3OF
#define TIM_FLAG_CC4OF   TIM_SR_CC4OF
#define TIM_CHANNEL_1   0x00000000U
#define TIM_CHANNEL_2   0x00000004U
#define TIM_CHANNEL_3   0x00000008U
#define TIM_CHANNEL_4   0x0000000CU
#define TIM_CHANNEL_ALL   0x0000003CU
#define TIM_CLOCKSOURCE_ETRMODE2   TIM_SMCR_ETPS_1
#define TIM_CLOCKSOURCE_INTERNAL   TIM_SMCR_ETPS_0
#define TIM_CLOCKSOURCE_ITR0   TIM_TS_ITR0
#define TIM_CLOCKSOURCE_ITR1   TIM_TS_ITR1
#define TIM_CLOCKSOURCE_ITR2   TIM_TS_ITR2
#define TIM_CLOCKSOURCE_ITR3   TIM_TS_ITR3
#define TIM_CLOCKSOURCE_TI1ED   TIM_TS_TI1F_ED
#define TIM_CLOCKSOURCE_TI1   TIM_TS_TI1FP1
#define TIM_CLOCKSOURCE_TI2   TIM_TS_TI2FP2
#define TIM_CLOCKSOURCE_ETRMODE1   TIM_TS_ETRF
#define TIM_CLOCKPOLARITY_INVERTED   TIM_ETRPOLARITY_INVERTED
#define TIM_CLOCKPOLARITY_NONINVERTED   TIM_ETRPOLARITY_NONINVERTED
#define TIM_CLOCKPOLARITY_RISING   TIM_INPUTCHANNELPOLARITY_RISING
#define TIM_CLOCKPOLARITY_FALLING   TIM_INPUTCHANNELPOLARITY_FALLING
#define TIM_CLOCKPOLARITY_BOTHEDGE   TIM_INPUTCHANNELPOLARITY_BOTHEDGE
#define TIM_CLOCKPRESCALER_DIV1   TIM_ETRPRESCALER_DIV1
#define TIM_CLOCKPRESCALER_DIV2   TIM_ETRPRESCALER_DIV2
#define TIM_CLOCKPRESCALER_DIV4   TIM_ETRPRESCALER_DIV4
#define TIM_CLOCKPRESCALER_DIV8   TIM_ETRPRESCALER_DIV8
#define TIM_CLEARINPUTPOLARITY_INVERTED   TIM_ETRPOLARITY_INVERTED
#define TIM_CLEARINPUTPOLARITY_NONINVERTED   TIM_ETRPOLARITY_NONINVERTED
#define TIM_CLEARINPUTPRESCALER_DIV1   TIM_ETRPRESCALER_DIV1
#define TIM_CLEARINPUTPRESCALER_DIV2   TIM_ETRPRESCALER_DIV2
#define TIM_CLEARINPUTPRESCALER_DIV4   TIM_ETRPRESCALER_DIV4
#define TIM_CLEARINPUTPRESCALER_DIV8   TIM_ETRPRESCALER_DIV8
#define TIM_OSSR_ENABLE   TIM_BDTR_OSSR
#define TIM_OSSR_DISABLE   0x00000000U
#define TIM_OSSI_ENABLE   TIM_BDTR_OSSI
#define TIM_OSSI_DISABLE   0x00000000U
#define TIM_LOCKLEVEL_OFF   0x00000000U
#define TIM_LOCKLEVEL_1   TIM_BDTR_LOCK_0
#define TIM_LOCKLEVEL_2   TIM_BDTR_LOCK_1
#define TIM_LOCKLEVEL_3   TIM_BDTR_LOCK
#define TIM_BREAK_ENABLE   TIM_BDTR_BKE
#define TIM_BREAK_DISABLE   0x00000000U
#define TIM_BREAKPOLARITY_LOW   0x00000000U
#define TIM_BREAKPOLARITY_HIGH   TIM_BDTR_BKP
#define TIM_AUTOMATICOUTPUT_DISABLE   0x00000000U
#define TIM_AUTOMATICOUTPUT_ENABLE   TIM_BDTR_AOE
#define TIM_TRGO_RESET   0x00000000U
#define TIM_TRGO_ENABLE   TIM_CR2_MMS_0
#define TIM_TRGO_UPDATE   TIM_CR2_MMS_1
#define TIM_TRGO_OC1   (TIM_CR2_MMS_1 | TIM_CR2_MMS_0)
#define TIM_TRGO_OC1REF   TIM_CR2_MMS_2
#define TIM_TRGO_OC2REF   (TIM_CR2_MMS_2 | TIM_CR2_MMS_0)
#define TIM_TRGO_OC3REF   (TIM_CR2_MMS_2 | TIM_CR2_MMS_1)
#define TIM_TRGO_OC4REF   (TIM_CR2_MMS_2 | TIM_CR2_MMS_1 | TIM_CR2_MMS_0)
#define TIM_MASTERSLAVEMODE_ENABLE   TIM_SMCR_MSM
#define TIM_MASTERSLAVEMODE_DISABLE   0x00000000U
#define TIM_SLAVEMODE_DISABLE   0x00000000U
#define TIM_SLAVEMODE_RESET   TIM_SMCR_SMS_2
#define TIM_SLAVEMODE_GATED   (TIM_SMCR_SMS_2 | TIM_SMCR_SMS_0)
#define TIM_SLAVEMODE_TRIGGER   (TIM_SMCR_SMS_2 | TIM_SMCR_SMS_1)
#define TIM_SLAVEMODE_EXTERNAL1   (TIM_SMCR_SMS_2 | TIM_SMCR_SMS_1 | TIM_SMCR_SMS_0)
#define TIM_OCMODE_TIMING   0x00000000U
#define TIM_OCMODE_ACTIVE   TIM_CCMR1_OC1M_0
#define TIM_OCMODE_INACTIVE   TIM_CCMR1_OC1M_1
#define TIM_OCMODE_TOGGLE   (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0)
#define TIM_OCMODE_PWM1   (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1)
#define TIM_OCMODE_PWM2   (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0)
#define TIM_OCMODE_FORCED_ACTIVE   (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_0)
#define TIM_OCMODE_FORCED_INACTIVE   TIM_CCMR1_OC1M_2
#define TIM_TS_ITR0   0x00000000U
#define TIM_TS_ITR1   TIM_SMCR_TS_0
#define TIM_TS_ITR2   TIM_SMCR_TS_1
#define TIM_TS_ITR3   (TIM_SMCR_TS_0 | TIM_SMCR_TS_1)
#define TIM_TS_TI1F_ED   TIM_SMCR_TS_2
#define TIM_TS_TI1FP1   (TIM_SMCR_TS_0 | TIM_SMCR_TS_2)
#define TIM_TS_TI2FP2   (TIM_SMCR_TS_1 | TIM_SMCR_TS_2)
#define TIM_TS_ETRF   (TIM_SMCR_TS_0 | TIM_SMCR_TS_1 | TIM_SMCR_TS_2)
#define TIM_TS_NONE   0x0000FFFFU
#define TIM_TRIGGERPOLARITY_INVERTED   TIM_ETRPOLARITY_INVERTED
#define TIM_TRIGGERPOLARITY_NONINVERTED   TIM_ETRPOLARITY_NONINVERTED
#define TIM_TRIGGERPOLARITY_RISING   TIM_INPUTCHANNELPOLARITY_RISING
#define TIM_TRIGGERPOLARITY_FALLING   TIM_INPUTCHANNELPOLARITY_FALLING
#define TIM_TRIGGERPOLARITY_BOTHEDGE   TIM_INPUTCHANNELPOLARITY_BOTHEDGE
#define TIM_TRIGGERPRESCALER_DIV1   TIM_ETRPRESCALER_DIV1
#define TIM_TRIGGERPRESCALER_DIV2   TIM_ETRPRESCALER_DIV2
#define TIM_TRIGGERPRESCALER_DIV4   TIM_ETRPRESCALER_DIV4
#define TIM_TRIGGERPRESCALER_DIV8   TIM_ETRPRESCALER_DIV8
#define TIM_TI1SELECTION_CH1   0x00000000U
#define TIM_TI1SELECTION_XORCOMBINATION   TIM_CR2_TI1S
#define TIM_DMABURSTLENGTH_1TRANSFER   0x00000000U
#define TIM_DMABURSTLENGTH_2TRANSFERS   0x00000100U
#define TIM_DMABURSTLENGTH_3TRANSFERS   0x00000200U
#define TIM_DMABURSTLENGTH_4TRANSFERS   0x00000300U
#define TIM_DMABURSTLENGTH_5TRANSFERS   0x00000400U
#define TIM_DMABURSTLENGTH_6TRANSFERS   0x00000500U
#define TIM_DMABURSTLENGTH_7TRANSFERS   0x00000600U
#define TIM_DMABURSTLENGTH_8TRANSFERS   0x00000700U
#define TIM_DMABURSTLENGTH_9TRANSFERS   0x00000800U
#define TIM_DMABURSTLENGTH_10TRANSFERS   0x00000900U
#define TIM_DMABURSTLENGTH_11TRANSFERS   0x00000A00U
#define TIM_DMABURSTLENGTH_12TRANSFERS   0x00000B00U
#define TIM_DMABURSTLENGTH_13TRANSFERS   0x00000C00U
#define TIM_DMABURSTLENGTH_14TRANSFERS   0x00000D00U
#define TIM_DMABURSTLENGTH_15TRANSFERS   0x00000E00U
#define TIM_DMABURSTLENGTH_16TRANSFERS   0x00000F00U
#define TIM_DMABURSTLENGTH_17TRANSFERS   0x00001000U
#define TIM_DMABURSTLENGTH_18TRANSFERS   0x00001100U
#define TIM_DMA_ID_UPDATE   ((uint16_t) 0x0000)
#define TIM_DMA_ID_CC1   ((uint16_t) 0x0001)
#define TIM_DMA_ID_CC2   ((uint16_t) 0x0002)
#define TIM_DMA_ID_CC3   ((uint16_t) 0x0003)
#define TIM_DMA_ID_CC4   ((uint16_t) 0x0004)
#define TIM_DMA_ID_COMMUTATION   ((uint16_t) 0x0005)
#define TIM_DMA_ID_TRIGGER   ((uint16_t) 0x0006)
#define TIM_CCx_ENABLE   0x00000001U
#define TIM_CCx_DISABLE   0x00000000U
#define TIM_CCxN_ENABLE   0x00000004U
#define TIM_CCxN_DISABLE   0x00000000U
#define __HAL_TIM_RESET_HANDLE_STATE(__HANDLE__)
 Reset TIM handle state.
#define __HAL_TIM_ENABLE(__HANDLE__)   ((__HANDLE__)->Instance->CR1|=(TIM_CR1_CEN))
 Enable the TIM peripheral.
#define __HAL_TIM_MOE_ENABLE(__HANDLE__)   ((__HANDLE__)->Instance->BDTR|=(TIM_BDTR_MOE))
 Enable the TIM main Output.
#define __HAL_TIM_DISABLE(__HANDLE__)
 Disable the TIM peripheral.
#define __HAL_TIM_MOE_DISABLE(__HANDLE__)
 Disable the TIM main Output.
#define __HAL_TIM_MOE_DISABLE_UNCONDITIONALLY(__HANDLE__)   (__HANDLE__)->Instance->BDTR &= ~(TIM_BDTR_MOE)
 Disable the TIM main Output.
#define __HAL_TIM_ENABLE_IT(__HANDLE__, __INTERRUPT__)   ((__HANDLE__)->Instance->DIER |= (__INTERRUPT__))
 Enable the specified TIM interrupt.
#define __HAL_TIM_DISABLE_IT(__HANDLE__, __INTERRUPT__)   ((__HANDLE__)->Instance->DIER &= ~(__INTERRUPT__))
 Disable the specified TIM interrupt.
#define __HAL_TIM_ENABLE_DMA(__HANDLE__, __DMA__)   ((__HANDLE__)->Instance->DIER |= (__DMA__))
 Enable the specified DMA request.
#define __HAL_TIM_DISABLE_DMA(__HANDLE__, __DMA__)   ((__HANDLE__)->Instance->DIER &= ~(__DMA__))
 Disable the specified DMA request.
#define __HAL_TIM_GET_FLAG(__HANDLE__, __FLAG__)   (((__HANDLE__)->Instance->SR &(__FLAG__)) == (__FLAG__))
 Check whether the specified TIM interrupt flag is set or not.
#define __HAL_TIM_CLEAR_FLAG(__HANDLE__, __FLAG__)   ((__HANDLE__)->Instance->SR = ~(__FLAG__))
 Clear the specified TIM interrupt flag.
#define __HAL_TIM_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__)
 Check whether the specified TIM interrupt source is enabled or not.
#define __HAL_TIM_CLEAR_IT(__HANDLE__, __INTERRUPT__)   ((__HANDLE__)->Instance->SR = ~(__INTERRUPT__))
 Clear the TIM interrupt pending bits.
#define __HAL_TIM_IS_TIM_COUNTING_DOWN(__HANDLE__)   (((__HANDLE__)->Instance->CR1 &(TIM_CR1_DIR)) == (TIM_CR1_DIR))
 Indicates whether or not the TIM Counter is used as downcounter.
#define __HAL_TIM_SET_PRESCALER(__HANDLE__, __PRESC__)   ((__HANDLE__)->Instance->PSC = (__PRESC__))
 Set the TIM Prescaler on runtime.
#define __HAL_TIM_SET_COUNTER(__HANDLE__, __COUNTER__)   ((__HANDLE__)->Instance->CNT = (__COUNTER__))
 Set the TIM Counter Register value on runtime.
#define __HAL_TIM_GET_COUNTER(__HANDLE__)   ((__HANDLE__)->Instance->CNT)
 Get the TIM Counter Register value on runtime.
#define __HAL_TIM_SET_AUTORELOAD(__HANDLE__, __AUTORELOAD__)
 Set the TIM Autoreload Register value on runtime without calling another time any Init function.
#define __HAL_TIM_GET_AUTORELOAD(__HANDLE__)   ((__HANDLE__)->Instance->ARR)
 Get the TIM Autoreload Register value on runtime.
#define __HAL_TIM_SET_CLOCKDIVISION(__HANDLE__, __CKD__)
 Set the TIM Clock Division value on runtime without calling another time any Init function.
#define __HAL_TIM_GET_CLOCKDIVISION(__HANDLE__)   ((__HANDLE__)->Instance->CR1 & TIM_CR1_CKD)
 Get the TIM Clock Division value on runtime.
#define __HAL_TIM_SET_ICPRESCALER(__HANDLE__, __CHANNEL__, __ICPSC__)
 Set the TIM Input Capture prescaler on runtime without calling another time HAL_TIM_IC_ConfigChannel() function.
#define __HAL_TIM_GET_ICPRESCALER(__HANDLE__, __CHANNEL__)
 Get the TIM Input Capture prescaler on runtime.
#define __HAL_TIM_SET_COMPARE(__HANDLE__, __CHANNEL__, __COMPARE__)
 Set the TIM Capture Compare Register value on runtime without calling another time ConfigChannel function.
#define __HAL_TIM_GET_COMPARE(__HANDLE__, __CHANNEL__)
 Get the TIM Capture Compare Register value on runtime.
#define __HAL_TIM_ENABLE_OCxPRELOAD(__HANDLE__, __CHANNEL__)
 Set the TIM Output compare preload.
#define __HAL_TIM_DISABLE_OCxPRELOAD(__HANDLE__, __CHANNEL__)
 Reset the TIM Output compare preload.
#define __HAL_TIM_ENABLE_OCxFAST(__HANDLE__, __CHANNEL__)
 Enable fast mode for a given channel.
#define __HAL_TIM_DISABLE_OCxFAST(__HANDLE__, __CHANNEL__)
 Disable fast mode for a given channel.
#define __HAL_TIM_URS_ENABLE(__HANDLE__)   ((__HANDLE__)->Instance->CR1|= TIM_CR1_URS)
 Set the Update Request Source (URS) bit of the TIMx_CR1 register.
#define __HAL_TIM_URS_DISABLE(__HANDLE__)   ((__HANDLE__)->Instance->CR1&=~TIM_CR1_URS)
 Reset the Update Request Source (URS) bit of the TIMx_CR1 register.
#define __HAL_TIM_SET_CAPTUREPOLARITY(__HANDLE__, __CHANNEL__, __POLARITY__)
 Set the TIM Capture x input polarity on runtime.
#define TIM_CCER_CCxE_MASK   ((uint32_t)(TIM_CCER_CC1E | TIM_CCER_CC2E | TIM_CCER_CC3E | TIM_CCER_CC4E))
#define TIM_CCER_CCxNE_MASK   ((uint32_t)(TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE))
#define IS_TIM_CLEARINPUT_SOURCE(__MODE__)
#define IS_TIM_DMA_BASE(__BASE__)
#define IS_TIM_EVENT_SOURCE(__SOURCE__)   ((((__SOURCE__) & 0xFFFFFF00U) == 0x00000000U) && ((__SOURCE__) != 0x00000000U))
#define IS_TIM_COUNTER_MODE(__MODE__)
#define IS_TIM_CLOCKDIVISION_DIV(__DIV__)
#define IS_TIM_AUTORELOAD_PRELOAD(PRELOAD)
#define IS_TIM_FAST_STATE(__STATE__)
#define IS_TIM_OC_POLARITY(__POLARITY__)
#define IS_TIM_OCN_POLARITY(__POLARITY__)
#define IS_TIM_OCIDLE_STATE(__STATE__)
#define IS_TIM_OCNIDLE_STATE(__STATE__)
#define IS_TIM_ENCODERINPUT_POLARITY(__POLARITY__)
#define IS_TIM_IC_POLARITY(__POLARITY__)
#define IS_TIM_IC_SELECTION(__SELECTION__)
#define IS_TIM_IC_PRESCALER(__PRESCALER__)
#define IS_TIM_OPM_MODE(__MODE__)
#define IS_TIM_ENCODER_MODE(__MODE__)
#define IS_TIM_DMA_SOURCE(__SOURCE__)   ((((__SOURCE__) & 0xFFFF80FFU) == 0x00000000U) && ((__SOURCE__) != 0x00000000U))
#define IS_TIM_CHANNELS(__CHANNEL__)
#define IS_TIM_OPM_CHANNELS(__CHANNEL__)
#define IS_TIM_COMPLEMENTARY_CHANNELS(__CHANNEL__)
#define IS_TIM_CLOCKSOURCE(__CLOCK__)
#define IS_TIM_CLOCKPOLARITY(__POLARITY__)
#define IS_TIM_CLOCKPRESCALER(__PRESCALER__)
#define IS_TIM_CLOCKFILTER(__ICFILTER__)   ((__ICFILTER__) <= 0xFU)
#define IS_TIM_CLEARINPUT_POLARITY(__POLARITY__)
#define IS_TIM_CLEARINPUT_PRESCALER(__PRESCALER__)
#define IS_TIM_CLEARINPUT_FILTER(__ICFILTER__)   ((__ICFILTER__) <= 0xFU)
#define IS_TIM_OSSR_STATE(__STATE__)
#define IS_TIM_OSSI_STATE(__STATE__)
#define IS_TIM_LOCK_LEVEL(__LEVEL__)
#define IS_TIM_BREAK_FILTER(__BRKFILTER__)   ((__BRKFILTER__) <= 0xFUL)
#define IS_TIM_BREAK_STATE(__STATE__)
#define IS_TIM_BREAK_POLARITY(__POLARITY__)
#define IS_TIM_AUTOMATIC_OUTPUT_STATE(__STATE__)
#define IS_TIM_TRGO_SOURCE(__SOURCE__)
#define IS_TIM_MSM_STATE(__STATE__)
#define IS_TIM_SLAVE_MODE(__MODE__)
#define IS_TIM_PWM_MODE(__MODE__)
#define IS_TIM_OC_MODE(__MODE__)
#define IS_TIM_TRIGGER_SELECTION(__SELECTION__)
#define IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(__SELECTION__)
#define IS_TIM_TRIGGERPOLARITY(__POLARITY__)
#define IS_TIM_TRIGGERPRESCALER(__PRESCALER__)
#define IS_TIM_TRIGGERFILTER(__ICFILTER__)   ((__ICFILTER__) <= 0xFU)
#define IS_TIM_TI1SELECTION(__TI1SELECTION__)
#define IS_TIM_DMA_LENGTH(__LENGTH__)
#define IS_TIM_DMA_DATA_LENGTH(LENGTH)   (((LENGTH) >= 0x1U) && ((LENGTH) < 0x10000U))
#define IS_TIM_IC_FILTER(__ICFILTER__)   ((__ICFILTER__) <= 0xFU)
#define IS_TIM_DEADTIME(__DEADTIME__)   ((__DEADTIME__) <= 0xFFU)
#define IS_TIM_SLAVEMODE_TRIGGER_ENABLED(__TRIGGER__)   ((__TRIGGER__) == TIM_SLAVEMODE_TRIGGER)
#define TIM_SET_ICPRESCALERVALUE(__HANDLE__, __CHANNEL__, __ICPSC__)
#define TIM_RESET_ICPRESCALERVALUE(__HANDLE__, __CHANNEL__)
#define TIM_SET_CAPTUREPOLARITY(__HANDLE__, __CHANNEL__, __POLARITY__)
#define TIM_RESET_CAPTUREPOLARITY(__HANDLE__, __CHANNEL__)
#define TIM_CHANNEL_STATE_GET(__HANDLE__, __CHANNEL__)
#define TIM_CHANNEL_STATE_SET(__HANDLE__, __CHANNEL__, __CHANNEL_STATE__)
#define TIM_CHANNEL_STATE_SET_ALL(__HANDLE__,__CHANNEL_STATE__)
#define TIM_CHANNEL_N_STATE_GET(__HANDLE__, __CHANNEL__)
#define TIM_CHANNEL_N_STATE_SET(__HANDLE__, __CHANNEL__, __CHANNEL_STATE__)
#define TIM_CHANNEL_N_STATE_SET_ALL(__HANDLE__,__CHANNEL_STATE__)

Typedefs

typedef struct __TIM_HandleTypeDef TIM_HandleTypeDef
 TIM Time Base Handle Structure definition.
typedef void(* pTIM_CallbackTypeDef )(TIM_HandleTypeDef *htim)
 HAL TIM Callback pointer definition.

Enumerations

enum  HAL_TIM_StateTypeDef {
  HAL_TIM_STATE_RESET = 0x00U, HAL_TIM_STATE_READY = 0x01U, HAL_TIM_STATE_BUSY = 0x02U, HAL_TIM_STATE_TIMEOUT = 0x03U,
  HAL_TIM_STATE_ERROR = 0x04U
}
 HAL State structures definition. More...
enum  HAL_TIM_ChannelStateTypeDef { HAL_TIM_CHANNEL_STATE_RESET = 0x00U, HAL_TIM_CHANNEL_STATE_READY = 0x01U, HAL_TIM_CHANNEL_STATE_BUSY = 0x02U }
 TIM Channel States definition. More...
enum  HAL_TIM_DMABurstStateTypeDef { HAL_DMA_BURST_STATE_RESET = 0x00U, HAL_DMA_BURST_STATE_READY = 0x01U, HAL_DMA_BURST_STATE_BUSY = 0x02U }
 DMA Burst States definition. More...
enum  HAL_TIM_ActiveChannel {
  HAL_TIM_ACTIVE_CHANNEL_1 = 0x01U, HAL_TIM_ACTIVE_CHANNEL_2 = 0x02U, HAL_TIM_ACTIVE_CHANNEL_3 = 0x04U, HAL_TIM_ACTIVE_CHANNEL_4 = 0x08U,
  HAL_TIM_ACTIVE_CHANNEL_CLEARED = 0x00U
}
 HAL Active channel structures definition. More...
enum  HAL_TIM_CallbackIDTypeDef {
  HAL_TIM_BASE_MSPINIT_CB_ID = 0x00U, HAL_TIM_BASE_MSPDEINIT_CB_ID = 0x01U, HAL_TIM_IC_MSPINIT_CB_ID = 0x02U, HAL_TIM_IC_MSPDEINIT_CB_ID = 0x03U,
  HAL_TIM_OC_MSPINIT_CB_ID = 0x04U, HAL_TIM_OC_MSPDEINIT_CB_ID = 0x05U, HAL_TIM_PWM_MSPINIT_CB_ID = 0x06U, HAL_TIM_PWM_MSPDEINIT_CB_ID = 0x07U,
  HAL_TIM_ONE_PULSE_MSPINIT_CB_ID = 0x08U, HAL_TIM_ONE_PULSE_MSPDEINIT_CB_ID = 0x09U, HAL_TIM_ENCODER_MSPINIT_CB_ID = 0x0AU, HAL_TIM_ENCODER_MSPDEINIT_CB_ID = 0x0BU,
  HAL_TIM_HALL_SENSOR_MSPINIT_CB_ID = 0x0CU, HAL_TIM_HALL_SENSOR_MSPDEINIT_CB_ID = 0x0DU, HAL_TIM_PERIOD_ELAPSED_CB_ID = 0x0EU, HAL_TIM_PERIOD_ELAPSED_HALF_CB_ID = 0x0FU,
  HAL_TIM_TRIGGER_CB_ID = 0x10U, HAL_TIM_TRIGGER_HALF_CB_ID = 0x11U, HAL_TIM_IC_CAPTURE_CB_ID = 0x12U, HAL_TIM_IC_CAPTURE_HALF_CB_ID = 0x13U,
  HAL_TIM_OC_DELAY_ELAPSED_CB_ID = 0x14U, HAL_TIM_PWM_PULSE_FINISHED_CB_ID = 0x15U, HAL_TIM_PWM_PULSE_FINISHED_HALF_CB_ID = 0x16U, HAL_TIM_ERROR_CB_ID = 0x17U,
  HAL_TIM_COMMUTATION_CB_ID = 0x18U, HAL_TIM_COMMUTATION_HALF_CB_ID = 0x19U, HAL_TIM_BREAK_CB_ID = 0x1AU
}
 HAL TIM Callback ID enumeration definition. More...

Functions

HAL_StatusTypeDef HAL_TIM_Base_Init (TIM_HandleTypeDef *htim)
 Initializes the TIM Time base Unit according to the specified parameters in the TIM_HandleTypeDef and initialize the associated handle.
HAL_StatusTypeDef HAL_TIM_Base_DeInit (TIM_HandleTypeDef *htim)
 DeInitializes the TIM Base peripheral.
__weak void HAL_TIM_Base_MspInit (TIM_HandleTypeDef *htim)
 Initializes the TIM Base MSP.
__weak void HAL_TIM_Base_MspDeInit (TIM_HandleTypeDef *htim)
 DeInitializes TIM Base MSP.
HAL_StatusTypeDef HAL_TIM_Base_Start (TIM_HandleTypeDef *htim)
 Starts the TIM Base generation.
HAL_StatusTypeDef HAL_TIM_Base_Stop (TIM_HandleTypeDef *htim)
 Stops the TIM Base generation.
HAL_StatusTypeDef HAL_TIM_Base_Start_IT (TIM_HandleTypeDef *htim)
 Starts the TIM Base generation in interrupt mode.
HAL_StatusTypeDef HAL_TIM_Base_Stop_IT (TIM_HandleTypeDef *htim)
 Stops the TIM Base generation in interrupt mode.
HAL_StatusTypeDef HAL_TIM_Base_Start_DMA (TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length)
 Starts the TIM Base generation in DMA mode.
HAL_StatusTypeDef HAL_TIM_Base_Stop_DMA (TIM_HandleTypeDef *htim)
 Stops the TIM Base generation in DMA mode.
HAL_StatusTypeDef HAL_TIM_OC_Init (TIM_HandleTypeDef *htim)
 Initializes the TIM Output Compare according to the specified parameters in the TIM_HandleTypeDef and initializes the associated handle.
HAL_StatusTypeDef HAL_TIM_OC_DeInit (TIM_HandleTypeDef *htim)
 DeInitializes the TIM peripheral.
__weak void HAL_TIM_OC_MspInit (TIM_HandleTypeDef *htim)
 Initializes the TIM Output Compare MSP.
__weak void HAL_TIM_OC_MspDeInit (TIM_HandleTypeDef *htim)
 DeInitializes TIM Output Compare MSP.
HAL_StatusTypeDef HAL_TIM_OC_Start (TIM_HandleTypeDef *htim, uint32_t Channel)
 Starts the TIM Output Compare signal generation.
HAL_StatusTypeDef HAL_TIM_OC_Stop (TIM_HandleTypeDef *htim, uint32_t Channel)
 Stops the TIM Output Compare signal generation.
HAL_StatusTypeDef HAL_TIM_OC_Start_IT (TIM_HandleTypeDef *htim, uint32_t Channel)
 Starts the TIM Output Compare signal generation in interrupt mode.
HAL_StatusTypeDef HAL_TIM_OC_Stop_IT (TIM_HandleTypeDef *htim, uint32_t Channel)
 Stops the TIM Output Compare signal generation in interrupt mode.
HAL_StatusTypeDef HAL_TIM_OC_Start_DMA (TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
 Starts the TIM Output Compare signal generation in DMA mode.
HAL_StatusTypeDef HAL_TIM_OC_Stop_DMA (TIM_HandleTypeDef *htim, uint32_t Channel)
 Stops the TIM Output Compare signal generation in DMA mode.
HAL_StatusTypeDef HAL_TIM_PWM_Init (TIM_HandleTypeDef *htim)
 Initializes the TIM PWM Time Base according to the specified parameters in the TIM_HandleTypeDef and initializes the associated handle.
HAL_StatusTypeDef HAL_TIM_PWM_DeInit (TIM_HandleTypeDef *htim)
 DeInitializes the TIM peripheral.
__weak void HAL_TIM_PWM_MspInit (TIM_HandleTypeDef *htim)
 Initializes the TIM PWM MSP.
__weak void HAL_TIM_PWM_MspDeInit (TIM_HandleTypeDef *htim)
 DeInitializes TIM PWM MSP.
HAL_StatusTypeDef HAL_TIM_PWM_Start (TIM_HandleTypeDef *htim, uint32_t Channel)
 Starts the PWM signal generation.
HAL_StatusTypeDef HAL_TIM_PWM_Stop (TIM_HandleTypeDef *htim, uint32_t Channel)
 Stops the PWM signal generation.
HAL_StatusTypeDef HAL_TIM_PWM_Start_IT (TIM_HandleTypeDef *htim, uint32_t Channel)
 Starts the PWM signal generation in interrupt mode.
HAL_StatusTypeDef HAL_TIM_PWM_Stop_IT (TIM_HandleTypeDef *htim, uint32_t Channel)
 Stops the PWM signal generation in interrupt mode.
HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA (TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
 Starts the TIM PWM signal generation in DMA mode.
HAL_StatusTypeDef HAL_TIM_PWM_Stop_DMA (TIM_HandleTypeDef *htim, uint32_t Channel)
 Stops the TIM PWM signal generation in DMA mode.
HAL_StatusTypeDef HAL_TIM_IC_Init (TIM_HandleTypeDef *htim)
 Initializes the TIM Input Capture Time base according to the specified parameters in the TIM_HandleTypeDef and initializes the associated handle.
HAL_StatusTypeDef HAL_TIM_IC_DeInit (TIM_HandleTypeDef *htim)
 DeInitializes the TIM peripheral.
__weak void HAL_TIM_IC_MspInit (TIM_HandleTypeDef *htim)
 Initializes the TIM Input Capture MSP.
__weak void HAL_TIM_IC_MspDeInit (TIM_HandleTypeDef *htim)
 DeInitializes TIM Input Capture MSP.
HAL_StatusTypeDef HAL_TIM_IC_Start (TIM_HandleTypeDef *htim, uint32_t Channel)
 Starts the TIM Input Capture measurement.
HAL_StatusTypeDef HAL_TIM_IC_Stop (TIM_HandleTypeDef *htim, uint32_t Channel)
 Stops the TIM Input Capture measurement.
HAL_StatusTypeDef HAL_TIM_IC_Start_IT (TIM_HandleTypeDef *htim, uint32_t Channel)
 Starts the TIM Input Capture measurement in interrupt mode.
HAL_StatusTypeDef HAL_TIM_IC_Stop_IT (TIM_HandleTypeDef *htim, uint32_t Channel)
 Stops the TIM Input Capture measurement in interrupt mode.
HAL_StatusTypeDef HAL_TIM_IC_Start_DMA (TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
 Starts the TIM Input Capture measurement in DMA mode.
HAL_StatusTypeDef HAL_TIM_IC_Stop_DMA (TIM_HandleTypeDef *htim, uint32_t Channel)
 Stops the TIM Input Capture measurement in DMA mode.
HAL_StatusTypeDef HAL_TIM_OnePulse_Init (TIM_HandleTypeDef *htim, uint32_t OnePulseMode)
 Initializes the TIM One Pulse Time Base according to the specified parameters in the TIM_HandleTypeDef and initializes the associated handle.
HAL_StatusTypeDef HAL_TIM_OnePulse_DeInit (TIM_HandleTypeDef *htim)
 DeInitializes the TIM One Pulse.
__weak void HAL_TIM_OnePulse_MspInit (TIM_HandleTypeDef *htim)
 Initializes the TIM One Pulse MSP.
__weak void HAL_TIM_OnePulse_MspDeInit (TIM_HandleTypeDef *htim)
 DeInitializes TIM One Pulse MSP.
HAL_StatusTypeDef HAL_TIM_OnePulse_Start (TIM_HandleTypeDef *htim, uint32_t OutputChannel)
 Starts the TIM One Pulse signal generation.
HAL_StatusTypeDef HAL_TIM_OnePulse_Stop (TIM_HandleTypeDef *htim, uint32_t OutputChannel)
 Stops the TIM One Pulse signal generation.
HAL_StatusTypeDef HAL_TIM_OnePulse_Start_IT (TIM_HandleTypeDef *htim, uint32_t OutputChannel)
 Starts the TIM One Pulse signal generation in interrupt mode.
HAL_StatusTypeDef HAL_TIM_OnePulse_Stop_IT (TIM_HandleTypeDef *htim, uint32_t OutputChannel)
 Stops the TIM One Pulse signal generation in interrupt mode.
HAL_StatusTypeDef HAL_TIM_Encoder_Init (TIM_HandleTypeDef *htim, TIM_Encoder_InitTypeDef *sConfig)
 Initializes the TIM Encoder Interface and initialize the associated handle.
HAL_StatusTypeDef HAL_TIM_Encoder_DeInit (TIM_HandleTypeDef *htim)
 DeInitializes the TIM Encoder interface.
__weak void HAL_TIM_Encoder_MspInit (TIM_HandleTypeDef *htim)
 Initializes the TIM Encoder Interface MSP.
__weak void HAL_TIM_Encoder_MspDeInit (TIM_HandleTypeDef *htim)
 DeInitializes TIM Encoder Interface MSP.
HAL_StatusTypeDef HAL_TIM_Encoder_Start (TIM_HandleTypeDef *htim, uint32_t Channel)
 Starts the TIM Encoder Interface.
HAL_StatusTypeDef HAL_TIM_Encoder_Stop (TIM_HandleTypeDef *htim, uint32_t Channel)
 Stops the TIM Encoder Interface.
HAL_StatusTypeDef HAL_TIM_Encoder_Start_IT (TIM_HandleTypeDef *htim, uint32_t Channel)
 Starts the TIM Encoder Interface in interrupt mode.
HAL_StatusTypeDef HAL_TIM_Encoder_Stop_IT (TIM_HandleTypeDef *htim, uint32_t Channel)
 Stops the TIM Encoder Interface in interrupt mode.
HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA (TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData1, uint32_t *pData2, uint16_t Length)
 Starts the TIM Encoder Interface in DMA mode.
HAL_StatusTypeDef HAL_TIM_Encoder_Stop_DMA (TIM_HandleTypeDef *htim, uint32_t Channel)
 Stops the TIM Encoder Interface in DMA mode.
void HAL_TIM_IRQHandler (TIM_HandleTypeDef *htim)
 This function handles TIM interrupts requests.
HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel (TIM_HandleTypeDef *htim, TIM_OC_InitTypeDef *sConfig, uint32_t Channel)
 Initializes the TIM Output Compare Channels according to the specified parameters in the TIM_OC_InitTypeDef.
HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel (TIM_HandleTypeDef *htim, TIM_OC_InitTypeDef *sConfig, uint32_t Channel)
 Initializes the TIM PWM channels according to the specified parameters in the TIM_OC_InitTypeDef.
HAL_StatusTypeDef HAL_TIM_IC_ConfigChannel (TIM_HandleTypeDef *htim, TIM_IC_InitTypeDef *sConfig, uint32_t Channel)
 Initializes the TIM Input Capture Channels according to the specified parameters in the TIM_IC_InitTypeDef.
HAL_StatusTypeDef HAL_TIM_OnePulse_ConfigChannel (TIM_HandleTypeDef *htim, TIM_OnePulse_InitTypeDef *sConfig, uint32_t OutputChannel, uint32_t InputChannel)
 Initializes the TIM One Pulse Channels according to the specified parameters in the TIM_OnePulse_InitTypeDef.
HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear (TIM_HandleTypeDef *htim, TIM_ClearInputConfigTypeDef *sClearInputConfig, uint32_t Channel)
 Configures the OCRef clear feature.
HAL_StatusTypeDef HAL_TIM_ConfigClockSource (TIM_HandleTypeDef *htim, TIM_ClockConfigTypeDef *sClockSourceConfig)
 Configures the clock source to be used.
HAL_StatusTypeDef HAL_TIM_ConfigTI1Input (TIM_HandleTypeDef *htim, uint32_t TI1_Selection)
 Selects the signal connected to the TI1 input: direct from CH1_input or a XOR combination between CH1_input, CH2_input & CH3_input.
HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro (TIM_HandleTypeDef *htim, TIM_SlaveConfigTypeDef *sSlaveConfig)
 Configures the TIM in Slave mode.
HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro_IT (TIM_HandleTypeDef *htim, TIM_SlaveConfigTypeDef *sSlaveConfig)
 Configures the TIM in Slave mode in interrupt mode.
HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart (TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc, uint32_t *BurstBuffer, uint32_t BurstLength)
 Configure the DMA Burst to transfer Data from the memory to the TIM peripheral.
HAL_StatusTypeDef HAL_TIM_DMABurst_MultiWriteStart (TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc, uint32_t *BurstBuffer, uint32_t BurstLength, uint32_t DataLength)
 Configure the DMA Burst to transfer multiple Data from the memory to the TIM peripheral.
HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStop (TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc)
 Stops the TIM DMA Burst mode.
HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart (TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc, uint32_t *BurstBuffer, uint32_t BurstLength)
 Configure the DMA Burst to transfer Data from the TIM peripheral to the memory.
HAL_StatusTypeDef HAL_TIM_DMABurst_MultiReadStart (TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc, uint32_t *BurstBuffer, uint32_t BurstLength, uint32_t DataLength)
 Configure the DMA Burst to transfer Data from the TIM peripheral to the memory.
HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStop (TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc)
 Stop the DMA burst reading.
HAL_StatusTypeDef HAL_TIM_GenerateEvent (TIM_HandleTypeDef *htim, uint32_t EventSource)
 Generate a software event.
uint32_t HAL_TIM_ReadCapturedValue (TIM_HandleTypeDef *htim, uint32_t Channel)
 Read the captured value from Capture Compare unit.
__weak void HAL_TIM_PeriodElapsedCallback (TIM_HandleTypeDef *htim)
 Period elapsed callback in non-blocking mode.
__weak void HAL_TIM_PeriodElapsedHalfCpltCallback (TIM_HandleTypeDef *htim)
 Period elapsed half complete callback in non-blocking mode.
__weak void HAL_TIM_OC_DelayElapsedCallback (TIM_HandleTypeDef *htim)
 Output Compare callback in non-blocking mode.
__weak void HAL_TIM_IC_CaptureCallback (TIM_HandleTypeDef *htim)
 Input Capture callback in non-blocking mode.
__weak void HAL_TIM_IC_CaptureHalfCpltCallback (TIM_HandleTypeDef *htim)
 Input Capture half complete callback in non-blocking mode.
__weak void HAL_TIM_PWM_PulseFinishedCallback (TIM_HandleTypeDef *htim)
 PWM Pulse finished callback in non-blocking mode.
__weak void HAL_TIM_PWM_PulseFinishedHalfCpltCallback (TIM_HandleTypeDef *htim)
 PWM Pulse finished half complete callback in non-blocking mode.
__weak void HAL_TIM_TriggerCallback (TIM_HandleTypeDef *htim)
 Hall Trigger detection callback in non-blocking mode.
__weak void HAL_TIM_TriggerHalfCpltCallback (TIM_HandleTypeDef *htim)
 Hall Trigger detection half complete callback in non-blocking mode.
__weak void HAL_TIM_ErrorCallback (TIM_HandleTypeDef *htim)
 Timer error callback in non-blocking mode.
HAL_StatusTypeDef HAL_TIM_RegisterCallback (TIM_HandleTypeDef *htim, HAL_TIM_CallbackIDTypeDef CallbackID, pTIM_CallbackTypeDef pCallback)
 Register a User TIM callback to be used instead of the weak predefined callback.
HAL_StatusTypeDef HAL_TIM_UnRegisterCallback (TIM_HandleTypeDef *htim, HAL_TIM_CallbackIDTypeDef CallbackID)
 Unregister a TIM callback TIM callback is redirected to the weak predefined callback.
HAL_TIM_StateTypeDef HAL_TIM_Base_GetState (TIM_HandleTypeDef *htim)
 Return the TIM Base handle state.
HAL_TIM_StateTypeDef HAL_TIM_OC_GetState (TIM_HandleTypeDef *htim)
 Return the TIM OC handle state.
HAL_TIM_StateTypeDef HAL_TIM_PWM_GetState (TIM_HandleTypeDef *htim)
 Return the TIM PWM handle state.
HAL_TIM_StateTypeDef HAL_TIM_IC_GetState (TIM_HandleTypeDef *htim)
 Return the TIM Input Capture handle state.
HAL_TIM_StateTypeDef HAL_TIM_OnePulse_GetState (TIM_HandleTypeDef *htim)
 Return the TIM One Pulse Mode handle state.
HAL_TIM_StateTypeDef HAL_TIM_Encoder_GetState (TIM_HandleTypeDef *htim)
 Return the TIM Encoder Mode handle state.
HAL_TIM_ActiveChannel HAL_TIM_GetActiveChannel (TIM_HandleTypeDef *htim)
 Return the TIM Encoder Mode handle state.
HAL_TIM_ChannelStateTypeDef HAL_TIM_GetChannelState (TIM_HandleTypeDef *htim, uint32_t Channel)
 Return actual state of the TIM channel.
HAL_TIM_DMABurstStateTypeDef HAL_TIM_DMABurstState (TIM_HandleTypeDef *htim)
 Return actual state of a DMA burst operation.
void TIM_Base_SetConfig (TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure)
 Time Base configuration.
void TIM_TI1_SetConfig (TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, uint32_t TIM_ICFilter)
 Configure the TI1 as Input.
void TIM_OC2_SetConfig (TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config)
 Timer Output Compare 2 configuration.
void TIM_ETR_SetConfig (TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler, uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter)
 Configures the TIMx External Trigger (ETR).
void TIM_DMADelayPulseHalfCplt (DMA_HandleTypeDef *hdma)
 TIM DMA Delay Pulse half complete callback.
void TIM_DMAError (DMA_HandleTypeDef *hdma)
 TIM DMA error callback.
void TIM_DMACaptureCplt (DMA_HandleTypeDef *hdma)
 TIM DMA Capture complete callback.
void TIM_DMACaptureHalfCplt (DMA_HandleTypeDef *hdma)
 TIM DMA Capture half complete callback.
void TIM_CCxChannelCmd (TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelState)
 Enables or disables the TIM Capture Compare Channel x.
void TIM_ResetCallback (TIM_HandleTypeDef *htim)
 Reset interrupt callbacks to the legacy weak callbacks.

Detailed Description

Header file of TIM HAL module.

Author:
MCD Application Team
Attention:

© Copyright (c) 2016 STMicroelectronics. All rights reserved.

This software component is licensed by ST under BSD 3-Clause license, the "License"; You may not use this file except in compliance with the License. You may obtain a copy of the License at: opensource.org/licenses/BSD-3-Clause

Definition in file stm32f1xx_hal_tim.h.

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