|
STM32F479xx HAL User Manual
|
Defines | |
| #define | CRYP_TIMEOUT_KEYPREPARATION 82U /*The latency of key preparation operation is 82 clock cycles.*/ |
| #define | CRYP_TIMEOUT_GCMCCMINITPHASE 299U /* The latency of GCM/CCM init phase to prepare hash subkey is 299 clock cycles.*/ |
| #define | CRYP_TIMEOUT_GCMCCMHEADERPHASE 290U /* The latency of GCM/CCM header phase is 290 clock cycles.*/ |
| #define | CRYP_PHASE_READY 0x00000001U |
| #define | CRYP_PHASE_PROCESS 0x00000002U |
| #define | CRYP_PHASE_INIT 0x00000000U |
| #define | CRYP_PHASE_HEADER CRYP_CR_GCM_CCMPH_0 |
| #define | CRYP_PHASE_PAYLOAD CRYP_CR_GCM_CCMPH_1 |
| #define | CRYP_PHASE_FINAL CRYP_CR_GCM_CCMPH |
| #define | CRYP_OPERATINGMODE_ENCRYPT 0x00000000U |
| #define | CRYP_OPERATINGMODE_DECRYPT CRYP_CR_ALGODIR |
| #define | CRYP_CCM_CTR1_0 0x07FFFFFFU |
| #define | CRYP_CCM_CTR1_1 0xFFFFFF00U |
| #define | CRYP_CCM_CTR1_2 0x00000001U |
| #define CRYP_CCM_CTR1_0 0x07FFFFFFU |
Definition at line 305 of file stm32f4xx_hal_cryp.c.
Referenced by CRYP_AESCCM_Process(), CRYP_AESCCM_Process_DMA(), and CRYP_AESCCM_Process_IT().
| #define CRYP_CCM_CTR1_1 0xFFFFFF00U |
Definition at line 306 of file stm32f4xx_hal_cryp.c.
Referenced by CRYP_AESCCM_Process(), CRYP_AESCCM_Process_DMA(), and CRYP_AESCCM_Process_IT().
| #define CRYP_CCM_CTR1_2 0x00000001U |
Definition at line 307 of file stm32f4xx_hal_cryp.c.
Referenced by CRYP_AESCCM_Process(), CRYP_AESCCM_Process_DMA(), and CRYP_AESCCM_Process_IT().
| #define CRYP_OPERATINGMODE_DECRYPT CRYP_CR_ALGODIR |
Decryption
Definition at line 301 of file stm32f4xx_hal_cryp.c.
Referenced by CRYP_AES_Decrypt(), CRYP_AES_Decrypt_DMA(), CRYP_AES_Decrypt_IT(), CRYP_Workaround(), HAL_CRYP_Decrypt(), HAL_CRYP_Decrypt_DMA(), and HAL_CRYP_Decrypt_IT().
| #define CRYP_OPERATINGMODE_ENCRYPT 0x00000000U |
Encryption mode
Definition at line 300 of file stm32f4xx_hal_cryp.c.
Referenced by CRYP_AESCCM_Process(), CRYP_AESCCM_Process_DMA(), CRYP_AESCCM_Process_IT(), CRYP_Workaround(), HAL_CRYP_Encrypt(), HAL_CRYP_Encrypt_DMA(), and HAL_CRYP_Encrypt_IT().
| #define CRYP_PHASE_FINAL CRYP_CR_GCM_CCMPH |
GCM/GMAC or CCM final phase
Definition at line 299 of file stm32f4xx_hal_cryp.c.
Referenced by CRYP_Workaround().
| #define CRYP_PHASE_HEADER CRYP_CR_GCM_CCMPH_0 |
GCM/GMAC or CCM header phase
Definition at line 297 of file stm32f4xx_hal_cryp.c.
Referenced by CRYP_AESCCM_Process(), CRYP_AESCCM_Process_DMA(), CRYP_AESCCM_Process_IT(), CRYP_AESGCM_Process_IT(), CRYP_GCMCCM_SetHeaderPhase(), CRYP_GCMCCM_SetHeaderPhase_DMA(), CRYP_Workaround(), and HAL_CRYP_IRQHandler().
| #define CRYP_PHASE_INIT 0x00000000U |
GCM/GMAC (or CCM) init phase
Definition at line 296 of file stm32f4xx_hal_cryp.c.
Referenced by CRYP_AESCCM_Process(), CRYP_AESCCM_Process_DMA(), CRYP_AESCCM_Process_IT(), CRYP_AESGCM_Process(), CRYP_AESGCM_Process_DMA(), and CRYP_AESGCM_Process_IT().
| #define CRYP_PHASE_PAYLOAD CRYP_CR_GCM_CCMPH_1 |
GCM(/CCM) payload phase
Definition at line 298 of file stm32f4xx_hal_cryp.c.
Referenced by CRYP_AESCCM_Process(), CRYP_AESCCM_Process_DMA(), CRYP_AESGCM_Process(), CRYP_AESGCM_Process_DMA(), CRYP_AESGCM_Process_IT(), and CRYP_GCMCCM_SetHeaderPhase_IT().
| #define CRYP_PHASE_PROCESS 0x00000002U |
CRYP peripheral is in processing phase
Definition at line 284 of file stm32f4xx_hal_cryp.c.
Referenced by CRYP_AES_Decrypt(), CRYP_AES_Decrypt_DMA(), CRYP_AES_Decrypt_IT(), CRYP_AES_Encrypt(), CRYP_AES_Encrypt_IT(), CRYP_AESCCM_Process(), CRYP_AESCCM_Process_DMA(), CRYP_AESGCM_Process(), CRYP_AESGCM_Process_DMA(), CRYP_AESGCM_Process_IT(), CRYP_GCMCCM_SetHeaderPhase_IT(), HAL_CRYP_Decrypt(), HAL_CRYP_Decrypt_DMA(), HAL_CRYP_Decrypt_IT(), HAL_CRYP_Encrypt(), HAL_CRYP_Encrypt_DMA(), and HAL_CRYP_Encrypt_IT().
| #define CRYP_PHASE_READY 0x00000001U |
CRYP peripheral is ready for initialization.
Definition at line 283 of file stm32f4xx_hal_cryp.c.
Referenced by HAL_CRYP_DeInit(), HAL_CRYP_Init(), and HAL_CRYP_SetConfig().
| #define CRYP_TIMEOUT_GCMCCMHEADERPHASE 290U /* The latency of GCM/CCM header phase is 290 clock cycles.*/ |
Definition at line 281 of file stm32f4xx_hal_cryp.c.
Referenced by CRYP_GCMCCM_SetHeaderPhase_DMA().
| #define CRYP_TIMEOUT_GCMCCMINITPHASE 299U /* The latency of GCM/CCM init phase to prepare hash subkey is 299 clock cycles.*/ |
Definition at line 280 of file stm32f4xx_hal_cryp.c.
Referenced by CRYP_AESCCM_Process_DMA(), CRYP_AESCCM_Process_IT(), CRYP_AESGCM_Process_DMA(), and CRYP_AESGCM_Process_IT().
| #define CRYP_TIMEOUT_KEYPREPARATION 82U /*The latency of key preparation operation is 82 clock cycles.*/ |
Definition at line 279 of file stm32f4xx_hal_cryp.c.
Referenced by CRYP_AES_Decrypt_DMA(), and CRYP_AES_Decrypt_IT().
1.7.6.1