STM32F479xx HAL User Manual
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Defines | |
#define | __HAL_DBGMCU_FREEZE_TIM2() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM2_STOP)) |
Freeze/Unfreeze Peripherals in Debug mode. | |
#define | __HAL_DBGMCU_FREEZE_TIM3() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM3_STOP)) |
#define | __HAL_DBGMCU_FREEZE_TIM4() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM4_STOP)) |
#define | __HAL_DBGMCU_FREEZE_TIM5() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM5_STOP)) |
#define | __HAL_DBGMCU_FREEZE_TIM6() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM6_STOP)) |
#define | __HAL_DBGMCU_FREEZE_TIM7() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM7_STOP)) |
#define | __HAL_DBGMCU_FREEZE_TIM12() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM12_STOP)) |
#define | __HAL_DBGMCU_FREEZE_TIM13() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM13_STOP)) |
#define | __HAL_DBGMCU_FREEZE_TIM14() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM14_STOP)) |
#define | __HAL_DBGMCU_FREEZE_RTC() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_RTC_STOP)) |
#define | __HAL_DBGMCU_FREEZE_WWDG() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_WWDG_STOP)) |
#define | __HAL_DBGMCU_FREEZE_IWDG() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_IWDG_STOP)) |
#define | __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT)) |
#define | __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT)) |
#define | __HAL_DBGMCU_FREEZE_I2C3_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT)) |
#define | __HAL_DBGMCU_FREEZE_CAN1() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN1_STOP)) |
#define | __HAL_DBGMCU_FREEZE_CAN2() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN2_STOP)) |
#define | __HAL_DBGMCU_FREEZE_TIM1() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM1_STOP)) |
#define | __HAL_DBGMCU_FREEZE_TIM8() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM8_STOP)) |
#define | __HAL_DBGMCU_FREEZE_TIM9() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM9_STOP)) |
#define | __HAL_DBGMCU_FREEZE_TIM10() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM10_STOP)) |
#define | __HAL_DBGMCU_FREEZE_TIM11() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM11_STOP)) |
#define | __HAL_DBGMCU_UNFREEZE_TIM2() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM2_STOP)) |
#define | __HAL_DBGMCU_UNFREEZE_TIM3() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM3_STOP)) |
#define | __HAL_DBGMCU_UNFREEZE_TIM4() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM4_STOP)) |
#define | __HAL_DBGMCU_UNFREEZE_TIM5() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM5_STOP)) |
#define | __HAL_DBGMCU_UNFREEZE_TIM6() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM6_STOP)) |
#define | __HAL_DBGMCU_UNFREEZE_TIM7() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM7_STOP)) |
#define | __HAL_DBGMCU_UNFREEZE_TIM12() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM12_STOP)) |
#define | __HAL_DBGMCU_UNFREEZE_TIM13() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM13_STOP)) |
#define | __HAL_DBGMCU_UNFREEZE_TIM14() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM14_STOP)) |
#define | __HAL_DBGMCU_UNFREEZE_RTC() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_RTC_STOP)) |
#define | __HAL_DBGMCU_UNFREEZE_WWDG() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_WWDG_STOP)) |
#define | __HAL_DBGMCU_UNFREEZE_IWDG() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_IWDG_STOP)) |
#define | __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT)) |
#define | __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT)) |
#define | __HAL_DBGMCU_UNFREEZE_I2C3_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT)) |
#define | __HAL_DBGMCU_UNFREEZE_CAN1() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN1_STOP)) |
#define | __HAL_DBGMCU_UNFREEZE_CAN2() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN2_STOP)) |
#define | __HAL_DBGMCU_UNFREEZE_TIM1() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM1_STOP)) |
#define | __HAL_DBGMCU_UNFREEZE_TIM8() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM8_STOP)) |
#define | __HAL_DBGMCU_UNFREEZE_TIM9() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM9_STOP)) |
#define | __HAL_DBGMCU_UNFREEZE_TIM10() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM10_STOP)) |
#define | __HAL_DBGMCU_UNFREEZE_TIM11() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM11_STOP)) |
#define | __HAL_SYSCFG_REMAPMEMORY_FLASH() (SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE)) |
Main Flash memory mapped at 0x00000000. | |
#define | __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH() |
System Flash memory mapped at 0x00000000. | |
#define | __HAL_SYSCFG_REMAPMEMORY_SRAM() |
Embedded SRAM mapped at 0x00000000. | |
#define | __HAL_SYSCFG_REMAPMEMORY_FMC() |
FMC Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000. | |
#define | __HAL_SYSCFG_REMAPMEMORY_FMC_SDRAM() |
FMC/SDRAM Bank 1 and 2 mapped at 0x00000000. |
#define __HAL_DBGMCU_FREEZE_CAN1 | ( | ) | (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN1_STOP)) |
Definition at line 87 of file stm32f4xx_hal.h.
#define __HAL_DBGMCU_FREEZE_CAN2 | ( | ) | (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN2_STOP)) |
Definition at line 88 of file stm32f4xx_hal.h.
#define __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT | ( | ) | (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT)) |
Definition at line 84 of file stm32f4xx_hal.h.
#define __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT | ( | ) | (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT)) |
Definition at line 85 of file stm32f4xx_hal.h.
#define __HAL_DBGMCU_FREEZE_I2C3_TIMEOUT | ( | ) | (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT)) |
Definition at line 86 of file stm32f4xx_hal.h.
#define __HAL_DBGMCU_FREEZE_IWDG | ( | ) | (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_IWDG_STOP)) |
Definition at line 83 of file stm32f4xx_hal.h.
#define __HAL_DBGMCU_FREEZE_RTC | ( | ) | (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_RTC_STOP)) |
Definition at line 81 of file stm32f4xx_hal.h.
#define __HAL_DBGMCU_FREEZE_TIM1 | ( | ) | (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM1_STOP)) |
Definition at line 89 of file stm32f4xx_hal.h.
#define __HAL_DBGMCU_FREEZE_TIM10 | ( | ) | (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM10_STOP)) |
Definition at line 92 of file stm32f4xx_hal.h.
#define __HAL_DBGMCU_FREEZE_TIM11 | ( | ) | (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM11_STOP)) |
Definition at line 93 of file stm32f4xx_hal.h.
#define __HAL_DBGMCU_FREEZE_TIM12 | ( | ) | (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM12_STOP)) |
Definition at line 78 of file stm32f4xx_hal.h.
#define __HAL_DBGMCU_FREEZE_TIM13 | ( | ) | (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM13_STOP)) |
Definition at line 79 of file stm32f4xx_hal.h.
#define __HAL_DBGMCU_FREEZE_TIM14 | ( | ) | (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM14_STOP)) |
Definition at line 80 of file stm32f4xx_hal.h.
#define __HAL_DBGMCU_FREEZE_TIM2 | ( | ) | (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM2_STOP)) |
Freeze/Unfreeze Peripherals in Debug mode.
Definition at line 72 of file stm32f4xx_hal.h.
#define __HAL_DBGMCU_FREEZE_TIM3 | ( | ) | (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM3_STOP)) |
Definition at line 73 of file stm32f4xx_hal.h.
#define __HAL_DBGMCU_FREEZE_TIM4 | ( | ) | (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM4_STOP)) |
Definition at line 74 of file stm32f4xx_hal.h.
#define __HAL_DBGMCU_FREEZE_TIM5 | ( | ) | (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM5_STOP)) |
Definition at line 75 of file stm32f4xx_hal.h.
#define __HAL_DBGMCU_FREEZE_TIM6 | ( | ) | (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM6_STOP)) |
Definition at line 76 of file stm32f4xx_hal.h.
#define __HAL_DBGMCU_FREEZE_TIM7 | ( | ) | (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM7_STOP)) |
Definition at line 77 of file stm32f4xx_hal.h.
#define __HAL_DBGMCU_FREEZE_TIM8 | ( | ) | (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM8_STOP)) |
Definition at line 90 of file stm32f4xx_hal.h.
#define __HAL_DBGMCU_FREEZE_TIM9 | ( | ) | (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM9_STOP)) |
Definition at line 91 of file stm32f4xx_hal.h.
#define __HAL_DBGMCU_FREEZE_WWDG | ( | ) | (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_WWDG_STOP)) |
Definition at line 82 of file stm32f4xx_hal.h.
#define __HAL_DBGMCU_UNFREEZE_CAN1 | ( | ) | (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN1_STOP)) |
Definition at line 110 of file stm32f4xx_hal.h.
#define __HAL_DBGMCU_UNFREEZE_CAN2 | ( | ) | (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN2_STOP)) |
Definition at line 111 of file stm32f4xx_hal.h.
#define __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT | ( | ) | (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT)) |
Definition at line 107 of file stm32f4xx_hal.h.
#define __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT | ( | ) | (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT)) |
Definition at line 108 of file stm32f4xx_hal.h.
#define __HAL_DBGMCU_UNFREEZE_I2C3_TIMEOUT | ( | ) | (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT)) |
Definition at line 109 of file stm32f4xx_hal.h.
#define __HAL_DBGMCU_UNFREEZE_IWDG | ( | ) | (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_IWDG_STOP)) |
Definition at line 106 of file stm32f4xx_hal.h.
#define __HAL_DBGMCU_UNFREEZE_RTC | ( | ) | (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_RTC_STOP)) |
Definition at line 104 of file stm32f4xx_hal.h.
#define __HAL_DBGMCU_UNFREEZE_TIM1 | ( | ) | (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM1_STOP)) |
Definition at line 112 of file stm32f4xx_hal.h.
#define __HAL_DBGMCU_UNFREEZE_TIM10 | ( | ) | (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM10_STOP)) |
Definition at line 115 of file stm32f4xx_hal.h.
#define __HAL_DBGMCU_UNFREEZE_TIM11 | ( | ) | (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM11_STOP)) |
Definition at line 116 of file stm32f4xx_hal.h.
#define __HAL_DBGMCU_UNFREEZE_TIM12 | ( | ) | (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM12_STOP)) |
Definition at line 101 of file stm32f4xx_hal.h.
#define __HAL_DBGMCU_UNFREEZE_TIM13 | ( | ) | (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM13_STOP)) |
Definition at line 102 of file stm32f4xx_hal.h.
#define __HAL_DBGMCU_UNFREEZE_TIM14 | ( | ) | (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM14_STOP)) |
Definition at line 103 of file stm32f4xx_hal.h.
#define __HAL_DBGMCU_UNFREEZE_TIM2 | ( | ) | (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM2_STOP)) |
Definition at line 95 of file stm32f4xx_hal.h.
#define __HAL_DBGMCU_UNFREEZE_TIM3 | ( | ) | (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM3_STOP)) |
Definition at line 96 of file stm32f4xx_hal.h.
#define __HAL_DBGMCU_UNFREEZE_TIM4 | ( | ) | (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM4_STOP)) |
Definition at line 97 of file stm32f4xx_hal.h.
#define __HAL_DBGMCU_UNFREEZE_TIM5 | ( | ) | (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM5_STOP)) |
Definition at line 98 of file stm32f4xx_hal.h.
#define __HAL_DBGMCU_UNFREEZE_TIM6 | ( | ) | (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM6_STOP)) |
Definition at line 99 of file stm32f4xx_hal.h.
#define __HAL_DBGMCU_UNFREEZE_TIM7 | ( | ) | (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM7_STOP)) |
Definition at line 100 of file stm32f4xx_hal.h.
#define __HAL_DBGMCU_UNFREEZE_TIM8 | ( | ) | (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM8_STOP)) |
Definition at line 113 of file stm32f4xx_hal.h.
#define __HAL_DBGMCU_UNFREEZE_TIM9 | ( | ) | (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM9_STOP)) |
Definition at line 114 of file stm32f4xx_hal.h.
#define __HAL_DBGMCU_UNFREEZE_WWDG | ( | ) | (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_WWDG_STOP)) |
Definition at line 105 of file stm32f4xx_hal.h.
#define __HAL_SYSCFG_REMAPMEMORY_FLASH | ( | ) | (SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE)) |
Main Flash memory mapped at 0x00000000.
Definition at line 120 of file stm32f4xx_hal.h.
#define __HAL_SYSCFG_REMAPMEMORY_FMC | ( | ) |
do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\ SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_1);\ }while(0);
FMC Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000.
Definition at line 146 of file stm32f4xx_hal.h.
#define __HAL_SYSCFG_REMAPMEMORY_FMC_SDRAM | ( | ) |
do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\ SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_2);\ }while(0);
FMC/SDRAM Bank 1 and 2 mapped at 0x00000000.
Definition at line 152 of file stm32f4xx_hal.h.
#define __HAL_SYSCFG_REMAPMEMORY_SRAM | ( | ) |
do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\ SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_0 | SYSCFG_MEMRMP_MEM_MODE_1);\ }while(0);
Embedded SRAM mapped at 0x00000000.
Definition at line 130 of file stm32f4xx_hal.h.
#define __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH | ( | ) |
do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\ SYSCFG->MEMRMP |= SYSCFG_MEMRMP_MEM_MODE_0;\ }while(0);
System Flash memory mapped at 0x00000000.
Definition at line 124 of file stm32f4xx_hal.h.