STM32F479xx HAL User Manual
Defines
APB2 Peripheral Clock Enable Disable
RCC Exported Macros

Enable or disable the High Speed APB (APB2) peripheral clock. More...

Defines

#define __HAL_RCC_TIM1_CLK_ENABLE()
#define __HAL_RCC_USART1_CLK_ENABLE()
#define __HAL_RCC_USART6_CLK_ENABLE()
#define __HAL_RCC_ADC1_CLK_ENABLE()
#define __HAL_RCC_SPI1_CLK_ENABLE()
#define __HAL_RCC_SYSCFG_CLK_ENABLE()
#define __HAL_RCC_TIM9_CLK_ENABLE()
#define __HAL_RCC_TIM11_CLK_ENABLE()
#define __HAL_RCC_TIM1_CLK_DISABLE()   (RCC->APB2ENR &= ~(RCC_APB2ENR_TIM1EN))
#define __HAL_RCC_USART1_CLK_DISABLE()   (RCC->APB2ENR &= ~(RCC_APB2ENR_USART1EN))
#define __HAL_RCC_USART6_CLK_DISABLE()   (RCC->APB2ENR &= ~(RCC_APB2ENR_USART6EN))
#define __HAL_RCC_ADC1_CLK_DISABLE()   (RCC->APB2ENR &= ~(RCC_APB2ENR_ADC1EN))
#define __HAL_RCC_SPI1_CLK_DISABLE()   (RCC->APB2ENR &= ~(RCC_APB2ENR_SPI1EN))
#define __HAL_RCC_SYSCFG_CLK_DISABLE()   (RCC->APB2ENR &= ~(RCC_APB2ENR_SYSCFGEN))
#define __HAL_RCC_TIM9_CLK_DISABLE()   (RCC->APB2ENR &= ~(RCC_APB2ENR_TIM9EN))
#define __HAL_RCC_TIM11_CLK_DISABLE()   (RCC->APB2ENR &= ~(RCC_APB2ENR_TIM11EN))

Detailed Description

Enable or disable the High Speed APB (APB2) peripheral clock.

Note:
After reset, the peripheral clock (used for registers read/write access) is disabled and the application software has to enable this clock before using it.

Define Documentation

#define __HAL_RCC_ADC1_CLK_DISABLE ( )    (RCC->APB2ENR &= ~(RCC_APB2ENR_ADC1EN))

Definition at line 624 of file stm32f4xx_hal_rcc.h.

#define __HAL_RCC_ADC1_CLK_ENABLE ( )
Value:
do { \
                                        __IO uint32_t tmpreg = 0x00U; \
                                        SET_BIT(RCC->APB2ENR, RCC_APB2ENR_ADC1EN);\
                                        /* Delay after an RCC peripheral clock enabling */ \
                                        tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_ADC1EN);\
                                        UNUSED(tmpreg); \
                                          } while(0U)

Definition at line 585 of file stm32f4xx_hal_rcc.h.

#define __HAL_RCC_SPI1_CLK_DISABLE ( )    (RCC->APB2ENR &= ~(RCC_APB2ENR_SPI1EN))

Definition at line 625 of file stm32f4xx_hal_rcc.h.

#define __HAL_RCC_SPI1_CLK_ENABLE ( )
Value:
do { \
                                        __IO uint32_t tmpreg = 0x00U; \
                                        SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI1EN);\
                                        /* Delay after an RCC peripheral clock enabling */ \
                                        tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI1EN);\
                                        UNUSED(tmpreg); \
                                          } while(0U)

Definition at line 592 of file stm32f4xx_hal_rcc.h.

#define __HAL_RCC_SYSCFG_CLK_DISABLE ( )    (RCC->APB2ENR &= ~(RCC_APB2ENR_SYSCFGEN))

Definition at line 626 of file stm32f4xx_hal_rcc.h.

#define __HAL_RCC_SYSCFG_CLK_ENABLE ( )
Value:
do { \
                                        __IO uint32_t tmpreg = 0x00U; \
                                        SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SYSCFGEN);\
                                        /* Delay after an RCC peripheral clock enabling */ \
                                        tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SYSCFGEN);\
                                        UNUSED(tmpreg); \
                                          } while(0U)

Definition at line 599 of file stm32f4xx_hal_rcc.h.

Referenced by HAL_ETH_Init(), and HAL_GPIO_Init().

#define __HAL_RCC_TIM11_CLK_DISABLE ( )    (RCC->APB2ENR &= ~(RCC_APB2ENR_TIM11EN))

Definition at line 628 of file stm32f4xx_hal_rcc.h.

#define __HAL_RCC_TIM11_CLK_ENABLE ( )
Value:
do { \
                                        __IO uint32_t tmpreg = 0x00U; \
                                        SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM11EN);\
                                        /* Delay after an RCC peripheral clock enabling */ \
                                        tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM11EN);\
                                        UNUSED(tmpreg); \
                                          } while(0U)

Definition at line 613 of file stm32f4xx_hal_rcc.h.

#define __HAL_RCC_TIM1_CLK_DISABLE ( )    (RCC->APB2ENR &= ~(RCC_APB2ENR_TIM1EN))

Definition at line 621 of file stm32f4xx_hal_rcc.h.

#define __HAL_RCC_TIM1_CLK_ENABLE ( )
Value:
do { \
                                        __IO uint32_t tmpreg = 0x00U; \
                                        SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM1EN);\
                                        /* Delay after an RCC peripheral clock enabling */ \
                                        tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM1EN);\
                                        UNUSED(tmpreg); \
                                          } while(0U)

Definition at line 564 of file stm32f4xx_hal_rcc.h.

#define __HAL_RCC_TIM9_CLK_DISABLE ( )    (RCC->APB2ENR &= ~(RCC_APB2ENR_TIM9EN))

Definition at line 627 of file stm32f4xx_hal_rcc.h.

#define __HAL_RCC_TIM9_CLK_ENABLE ( )
Value:
do { \
                                        __IO uint32_t tmpreg = 0x00U; \
                                        SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM9EN);\
                                        /* Delay after an RCC peripheral clock enabling */ \
                                        tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM9EN);\
                                        UNUSED(tmpreg); \
                                          } while(0U)

Definition at line 606 of file stm32f4xx_hal_rcc.h.

#define __HAL_RCC_USART1_CLK_DISABLE ( )    (RCC->APB2ENR &= ~(RCC_APB2ENR_USART1EN))

Definition at line 622 of file stm32f4xx_hal_rcc.h.

#define __HAL_RCC_USART1_CLK_ENABLE ( )
Value:
do { \
                                        __IO uint32_t tmpreg = 0x00U; \
                                        SET_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN);\
                                        /* Delay after an RCC peripheral clock enabling */ \
                                        tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN);\
                                        UNUSED(tmpreg); \
                                          } while(0U)

Definition at line 571 of file stm32f4xx_hal_rcc.h.

#define __HAL_RCC_USART6_CLK_DISABLE ( )    (RCC->APB2ENR &= ~(RCC_APB2ENR_USART6EN))

Definition at line 623 of file stm32f4xx_hal_rcc.h.

#define __HAL_RCC_USART6_CLK_ENABLE ( )
Value:
do { \
                                        __IO uint32_t tmpreg = 0x00U; \
                                        SET_BIT(RCC->APB2ENR, RCC_APB2ENR_USART6EN);\
                                        /* Delay after an RCC peripheral clock enabling */ \
                                        tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART6EN);\
                                        UNUSED(tmpreg); \
                                          } while(0U)

Definition at line 578 of file stm32f4xx_hal_rcc.h.

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