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STM32F479xx HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32f4xx_hal_spi.h 00004 * @author MCD Application Team 00005 * @brief Header file of SPI HAL module. 00006 ****************************************************************************** 00007 * @attention 00008 * 00009 * <h2><center>© Copyright (c) 2016 STMicroelectronics. 00010 * All rights reserved.</center></h2> 00011 * 00012 * This software component is licensed by ST under BSD 3-Clause license, 00013 * the "License"; You may not use this file except in compliance with the 00014 * License. You may obtain a copy of the License at: 00015 * opensource.org/licenses/BSD-3-Clause 00016 * 00017 ****************************************************************************** 00018 */ 00019 00020 /* Define to prevent recursive inclusion -------------------------------------*/ 00021 #ifndef STM32F4xx_HAL_SPI_H 00022 #define STM32F4xx_HAL_SPI_H 00023 00024 #ifdef __cplusplus 00025 extern "C" { 00026 #endif 00027 00028 /* Includes ------------------------------------------------------------------*/ 00029 #include "stm32f4xx_hal_def.h" 00030 00031 /** @addtogroup STM32F4xx_HAL_Driver 00032 * @{ 00033 */ 00034 00035 /** @addtogroup SPI 00036 * @{ 00037 */ 00038 00039 /* Exported types ------------------------------------------------------------*/ 00040 /** @defgroup SPI_Exported_Types SPI Exported Types 00041 * @{ 00042 */ 00043 00044 /** 00045 * @brief SPI Configuration Structure definition 00046 */ 00047 typedef struct 00048 { 00049 uint32_t Mode; /*!< Specifies the SPI operating mode. 00050 This parameter can be a value of @ref SPI_Mode */ 00051 00052 uint32_t Direction; /*!< Specifies the SPI bidirectional mode state. 00053 This parameter can be a value of @ref SPI_Direction */ 00054 00055 uint32_t DataSize; /*!< Specifies the SPI data size. 00056 This parameter can be a value of @ref SPI_Data_Size */ 00057 00058 uint32_t CLKPolarity; /*!< Specifies the serial clock steady state. 00059 This parameter can be a value of @ref SPI_Clock_Polarity */ 00060 00061 uint32_t CLKPhase; /*!< Specifies the clock active edge for the bit capture. 00062 This parameter can be a value of @ref SPI_Clock_Phase */ 00063 00064 uint32_t NSS; /*!< Specifies whether the NSS signal is managed by 00065 hardware (NSS pin) or by software using the SSI bit. 00066 This parameter can be a value of @ref SPI_Slave_Select_management */ 00067 00068 uint32_t BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be 00069 used to configure the transmit and receive SCK clock. 00070 This parameter can be a value of @ref SPI_BaudRate_Prescaler 00071 @note The communication clock is derived from the master 00072 clock. The slave clock does not need to be set. */ 00073 00074 uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit. 00075 This parameter can be a value of @ref SPI_MSB_LSB_transmission */ 00076 00077 uint32_t TIMode; /*!< Specifies if the TI mode is enabled or not. 00078 This parameter can be a value of @ref SPI_TI_mode */ 00079 00080 uint32_t CRCCalculation; /*!< Specifies if the CRC calculation is enabled or not. 00081 This parameter can be a value of @ref SPI_CRC_Calculation */ 00082 00083 uint32_t CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation. 00084 This parameter must be an odd number between Min_Data = 1 and Max_Data = 65535 */ 00085 } SPI_InitTypeDef; 00086 00087 /** 00088 * @brief HAL SPI State structure definition 00089 */ 00090 typedef enum 00091 { 00092 HAL_SPI_STATE_RESET = 0x00U, /*!< Peripheral not Initialized */ 00093 HAL_SPI_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */ 00094 HAL_SPI_STATE_BUSY = 0x02U, /*!< an internal process is ongoing */ 00095 HAL_SPI_STATE_BUSY_TX = 0x03U, /*!< Data Transmission process is ongoing */ 00096 HAL_SPI_STATE_BUSY_RX = 0x04U, /*!< Data Reception process is ongoing */ 00097 HAL_SPI_STATE_BUSY_TX_RX = 0x05U, /*!< Data Transmission and Reception process is ongoing */ 00098 HAL_SPI_STATE_ERROR = 0x06U, /*!< SPI error state */ 00099 HAL_SPI_STATE_ABORT = 0x07U /*!< SPI abort is ongoing */ 00100 } HAL_SPI_StateTypeDef; 00101 00102 /** 00103 * @brief SPI handle Structure definition 00104 */ 00105 typedef struct __SPI_HandleTypeDef 00106 { 00107 SPI_TypeDef *Instance; /*!< SPI registers base address */ 00108 00109 SPI_InitTypeDef Init; /*!< SPI communication parameters */ 00110 00111 uint8_t *pTxBuffPtr; /*!< Pointer to SPI Tx transfer Buffer */ 00112 00113 uint16_t TxXferSize; /*!< SPI Tx Transfer size */ 00114 00115 __IO uint16_t TxXferCount; /*!< SPI Tx Transfer Counter */ 00116 00117 uint8_t *pRxBuffPtr; /*!< Pointer to SPI Rx transfer Buffer */ 00118 00119 uint16_t RxXferSize; /*!< SPI Rx Transfer size */ 00120 00121 __IO uint16_t RxXferCount; /*!< SPI Rx Transfer Counter */ 00122 00123 void (*RxISR)(struct __SPI_HandleTypeDef *hspi); /*!< function pointer on Rx ISR */ 00124 00125 void (*TxISR)(struct __SPI_HandleTypeDef *hspi); /*!< function pointer on Tx ISR */ 00126 00127 DMA_HandleTypeDef *hdmatx; /*!< SPI Tx DMA Handle parameters */ 00128 00129 DMA_HandleTypeDef *hdmarx; /*!< SPI Rx DMA Handle parameters */ 00130 00131 HAL_LockTypeDef Lock; /*!< Locking object */ 00132 00133 __IO HAL_SPI_StateTypeDef State; /*!< SPI communication state */ 00134 00135 __IO uint32_t ErrorCode; /*!< SPI Error code */ 00136 00137 #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) 00138 void (* TxCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Tx Completed callback */ 00139 void (* RxCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Rx Completed callback */ 00140 void (* TxRxCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI TxRx Completed callback */ 00141 void (* TxHalfCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Tx Half Completed callback */ 00142 void (* RxHalfCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Rx Half Completed callback */ 00143 void (* TxRxHalfCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI TxRx Half Completed callback */ 00144 void (* ErrorCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Error callback */ 00145 void (* AbortCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Abort callback */ 00146 void (* MspInitCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Msp Init callback */ 00147 void (* MspDeInitCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Msp DeInit callback */ 00148 00149 #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ 00150 } SPI_HandleTypeDef; 00151 00152 #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) 00153 /** 00154 * @brief HAL SPI Callback ID enumeration definition 00155 */ 00156 typedef enum 00157 { 00158 HAL_SPI_TX_COMPLETE_CB_ID = 0x00U, /*!< SPI Tx Completed callback ID */ 00159 HAL_SPI_RX_COMPLETE_CB_ID = 0x01U, /*!< SPI Rx Completed callback ID */ 00160 HAL_SPI_TX_RX_COMPLETE_CB_ID = 0x02U, /*!< SPI TxRx Completed callback ID */ 00161 HAL_SPI_TX_HALF_COMPLETE_CB_ID = 0x03U, /*!< SPI Tx Half Completed callback ID */ 00162 HAL_SPI_RX_HALF_COMPLETE_CB_ID = 0x04U, /*!< SPI Rx Half Completed callback ID */ 00163 HAL_SPI_TX_RX_HALF_COMPLETE_CB_ID = 0x05U, /*!< SPI TxRx Half Completed callback ID */ 00164 HAL_SPI_ERROR_CB_ID = 0x06U, /*!< SPI Error callback ID */ 00165 HAL_SPI_ABORT_CB_ID = 0x07U, /*!< SPI Abort callback ID */ 00166 HAL_SPI_MSPINIT_CB_ID = 0x08U, /*!< SPI Msp Init callback ID */ 00167 HAL_SPI_MSPDEINIT_CB_ID = 0x09U /*!< SPI Msp DeInit callback ID */ 00168 00169 } HAL_SPI_CallbackIDTypeDef; 00170 00171 /** 00172 * @brief HAL SPI Callback pointer definition 00173 */ 00174 typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to an SPI callback function */ 00175 00176 #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ 00177 /** 00178 * @} 00179 */ 00180 00181 /* Exported constants --------------------------------------------------------*/ 00182 /** @defgroup SPI_Exported_Constants SPI Exported Constants 00183 * @{ 00184 */ 00185 00186 /** @defgroup SPI_Error_Code SPI Error Code 00187 * @{ 00188 */ 00189 #define HAL_SPI_ERROR_NONE (0x00000000U) /*!< No error */ 00190 #define HAL_SPI_ERROR_MODF (0x00000001U) /*!< MODF error */ 00191 #define HAL_SPI_ERROR_CRC (0x00000002U) /*!< CRC error */ 00192 #define HAL_SPI_ERROR_OVR (0x00000004U) /*!< OVR error */ 00193 #define HAL_SPI_ERROR_FRE (0x00000008U) /*!< FRE error */ 00194 #define HAL_SPI_ERROR_DMA (0x00000010U) /*!< DMA transfer error */ 00195 #define HAL_SPI_ERROR_FLAG (0x00000020U) /*!< Error on RXNE/TXE/BSY Flag */ 00196 #define HAL_SPI_ERROR_ABORT (0x00000040U) /*!< Error during SPI Abort procedure */ 00197 #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) 00198 #define HAL_SPI_ERROR_INVALID_CALLBACK (0x00000080U) /*!< Invalid Callback error */ 00199 #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ 00200 /** 00201 * @} 00202 */ 00203 00204 /** @defgroup SPI_Mode SPI Mode 00205 * @{ 00206 */ 00207 #define SPI_MODE_SLAVE (0x00000000U) 00208 #define SPI_MODE_MASTER (SPI_CR1_MSTR | SPI_CR1_SSI) 00209 /** 00210 * @} 00211 */ 00212 00213 /** @defgroup SPI_Direction SPI Direction Mode 00214 * @{ 00215 */ 00216 #define SPI_DIRECTION_2LINES (0x00000000U) 00217 #define SPI_DIRECTION_2LINES_RXONLY SPI_CR1_RXONLY 00218 #define SPI_DIRECTION_1LINE SPI_CR1_BIDIMODE 00219 /** 00220 * @} 00221 */ 00222 00223 /** @defgroup SPI_Data_Size SPI Data Size 00224 * @{ 00225 */ 00226 #define SPI_DATASIZE_8BIT (0x00000000U) 00227 #define SPI_DATASIZE_16BIT SPI_CR1_DFF 00228 /** 00229 * @} 00230 */ 00231 00232 /** @defgroup SPI_Clock_Polarity SPI Clock Polarity 00233 * @{ 00234 */ 00235 #define SPI_POLARITY_LOW (0x00000000U) 00236 #define SPI_POLARITY_HIGH SPI_CR1_CPOL 00237 /** 00238 * @} 00239 */ 00240 00241 /** @defgroup SPI_Clock_Phase SPI Clock Phase 00242 * @{ 00243 */ 00244 #define SPI_PHASE_1EDGE (0x00000000U) 00245 #define SPI_PHASE_2EDGE SPI_CR1_CPHA 00246 /** 00247 * @} 00248 */ 00249 00250 /** @defgroup SPI_Slave_Select_management SPI Slave Select Management 00251 * @{ 00252 */ 00253 #define SPI_NSS_SOFT SPI_CR1_SSM 00254 #define SPI_NSS_HARD_INPUT (0x00000000U) 00255 #define SPI_NSS_HARD_OUTPUT (SPI_CR2_SSOE << 16U) 00256 /** 00257 * @} 00258 */ 00259 00260 /** @defgroup SPI_BaudRate_Prescaler SPI BaudRate Prescaler 00261 * @{ 00262 */ 00263 #define SPI_BAUDRATEPRESCALER_2 (0x00000000U) 00264 #define SPI_BAUDRATEPRESCALER_4 (SPI_CR1_BR_0) 00265 #define SPI_BAUDRATEPRESCALER_8 (SPI_CR1_BR_1) 00266 #define SPI_BAUDRATEPRESCALER_16 (SPI_CR1_BR_1 | SPI_CR1_BR_0) 00267 #define SPI_BAUDRATEPRESCALER_32 (SPI_CR1_BR_2) 00268 #define SPI_BAUDRATEPRESCALER_64 (SPI_CR1_BR_2 | SPI_CR1_BR_0) 00269 #define SPI_BAUDRATEPRESCALER_128 (SPI_CR1_BR_2 | SPI_CR1_BR_1) 00270 #define SPI_BAUDRATEPRESCALER_256 (SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0) 00271 /** 00272 * @} 00273 */ 00274 00275 /** @defgroup SPI_MSB_LSB_transmission SPI MSB LSB Transmission 00276 * @{ 00277 */ 00278 #define SPI_FIRSTBIT_MSB (0x00000000U) 00279 #define SPI_FIRSTBIT_LSB SPI_CR1_LSBFIRST 00280 /** 00281 * @} 00282 */ 00283 00284 /** @defgroup SPI_TI_mode SPI TI Mode 00285 * @{ 00286 */ 00287 #define SPI_TIMODE_DISABLE (0x00000000U) 00288 #define SPI_TIMODE_ENABLE SPI_CR2_FRF 00289 /** 00290 * @} 00291 */ 00292 00293 /** @defgroup SPI_CRC_Calculation SPI CRC Calculation 00294 * @{ 00295 */ 00296 #define SPI_CRCCALCULATION_DISABLE (0x00000000U) 00297 #define SPI_CRCCALCULATION_ENABLE SPI_CR1_CRCEN 00298 /** 00299 * @} 00300 */ 00301 00302 /** @defgroup SPI_Interrupt_definition SPI Interrupt Definition 00303 * @{ 00304 */ 00305 #define SPI_IT_TXE SPI_CR2_TXEIE 00306 #define SPI_IT_RXNE SPI_CR2_RXNEIE 00307 #define SPI_IT_ERR SPI_CR2_ERRIE 00308 /** 00309 * @} 00310 */ 00311 00312 /** @defgroup SPI_Flags_definition SPI Flags Definition 00313 * @{ 00314 */ 00315 #define SPI_FLAG_RXNE SPI_SR_RXNE /* SPI status flag: Rx buffer not empty flag */ 00316 #define SPI_FLAG_TXE SPI_SR_TXE /* SPI status flag: Tx buffer empty flag */ 00317 #define SPI_FLAG_BSY SPI_SR_BSY /* SPI status flag: Busy flag */ 00318 #define SPI_FLAG_CRCERR SPI_SR_CRCERR /* SPI Error flag: CRC error flag */ 00319 #define SPI_FLAG_MODF SPI_SR_MODF /* SPI Error flag: Mode fault flag */ 00320 #define SPI_FLAG_OVR SPI_SR_OVR /* SPI Error flag: Overrun flag */ 00321 #define SPI_FLAG_FRE SPI_SR_FRE /* SPI Error flag: TI mode frame format error flag */ 00322 #define SPI_FLAG_MASK (SPI_SR_RXNE | SPI_SR_TXE | SPI_SR_BSY | SPI_SR_CRCERR\ 00323 | SPI_SR_MODF | SPI_SR_OVR | SPI_SR_FRE) 00324 /** 00325 * @} 00326 */ 00327 00328 /** 00329 * @} 00330 */ 00331 00332 /* Exported macros -----------------------------------------------------------*/ 00333 /** @defgroup SPI_Exported_Macros SPI Exported Macros 00334 * @{ 00335 */ 00336 00337 /** @brief Reset SPI handle state. 00338 * @param __HANDLE__ specifies the SPI Handle. 00339 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 00340 * @retval None 00341 */ 00342 #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) 00343 #define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) do{ \ 00344 (__HANDLE__)->State = HAL_SPI_STATE_RESET; \ 00345 (__HANDLE__)->MspInitCallback = NULL; \ 00346 (__HANDLE__)->MspDeInitCallback = NULL; \ 00347 } while(0) 00348 #else 00349 #define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPI_STATE_RESET) 00350 #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ 00351 00352 /** @brief Enable the specified SPI interrupts. 00353 * @param __HANDLE__ specifies the SPI Handle. 00354 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 00355 * @param __INTERRUPT__ specifies the interrupt source to enable. 00356 * This parameter can be one of the following values: 00357 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable 00358 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable 00359 * @arg SPI_IT_ERR: Error interrupt enable 00360 * @retval None 00361 */ 00362 #define __HAL_SPI_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__)) 00363 00364 /** @brief Disable the specified SPI interrupts. 00365 * @param __HANDLE__ specifies the SPI handle. 00366 * This parameter can be SPIx where x: 1, 2, or 3 to select the SPI peripheral. 00367 * @param __INTERRUPT__ specifies the interrupt source to disable. 00368 * This parameter can be one of the following values: 00369 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable 00370 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable 00371 * @arg SPI_IT_ERR: Error interrupt enable 00372 * @retval None 00373 */ 00374 #define __HAL_SPI_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__)) 00375 00376 /** @brief Check whether the specified SPI interrupt source is enabled or not. 00377 * @param __HANDLE__ specifies the SPI Handle. 00378 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 00379 * @param __INTERRUPT__ specifies the SPI interrupt source to check. 00380 * This parameter can be one of the following values: 00381 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable 00382 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable 00383 * @arg SPI_IT_ERR: Error interrupt enable 00384 * @retval The new state of __IT__ (TRUE or FALSE). 00385 */ 00386 #define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2\ 00387 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 00388 00389 /** @brief Check whether the specified SPI flag is set or not. 00390 * @param __HANDLE__ specifies the SPI Handle. 00391 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 00392 * @param __FLAG__ specifies the flag to check. 00393 * This parameter can be one of the following values: 00394 * @arg SPI_FLAG_RXNE: Receive buffer not empty flag 00395 * @arg SPI_FLAG_TXE: Transmit buffer empty flag 00396 * @arg SPI_FLAG_CRCERR: CRC error flag 00397 * @arg SPI_FLAG_MODF: Mode fault flag 00398 * @arg SPI_FLAG_OVR: Overrun flag 00399 * @arg SPI_FLAG_BSY: Busy flag 00400 * @arg SPI_FLAG_FRE: Frame format error flag 00401 * @retval The new state of __FLAG__ (TRUE or FALSE). 00402 */ 00403 #define __HAL_SPI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) 00404 00405 /** @brief Clear the SPI CRCERR pending flag. 00406 * @param __HANDLE__ specifies the SPI Handle. 00407 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 00408 * @retval None 00409 */ 00410 #define __HAL_SPI_CLEAR_CRCERRFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR = (uint16_t)(~SPI_FLAG_CRCERR)) 00411 00412 /** @brief Clear the SPI MODF pending flag. 00413 * @param __HANDLE__ specifies the SPI Handle. 00414 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 00415 * @retval None 00416 */ 00417 #define __HAL_SPI_CLEAR_MODFFLAG(__HANDLE__) \ 00418 do{ \ 00419 __IO uint32_t tmpreg_modf = 0x00U; \ 00420 tmpreg_modf = (__HANDLE__)->Instance->SR; \ 00421 CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE); \ 00422 UNUSED(tmpreg_modf); \ 00423 } while(0U) 00424 00425 /** @brief Clear the SPI OVR pending flag. 00426 * @param __HANDLE__ specifies the SPI Handle. 00427 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 00428 * @retval None 00429 */ 00430 #define __HAL_SPI_CLEAR_OVRFLAG(__HANDLE__) \ 00431 do{ \ 00432 __IO uint32_t tmpreg_ovr = 0x00U; \ 00433 tmpreg_ovr = (__HANDLE__)->Instance->DR; \ 00434 tmpreg_ovr = (__HANDLE__)->Instance->SR; \ 00435 UNUSED(tmpreg_ovr); \ 00436 } while(0U) 00437 00438 /** @brief Clear the SPI FRE pending flag. 00439 * @param __HANDLE__ specifies the SPI Handle. 00440 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 00441 * @retval None 00442 */ 00443 #define __HAL_SPI_CLEAR_FREFLAG(__HANDLE__) \ 00444 do{ \ 00445 __IO uint32_t tmpreg_fre = 0x00U; \ 00446 tmpreg_fre = (__HANDLE__)->Instance->SR; \ 00447 UNUSED(tmpreg_fre); \ 00448 }while(0U) 00449 00450 /** @brief Enable the SPI peripheral. 00451 * @param __HANDLE__ specifies the SPI Handle. 00452 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 00453 * @retval None 00454 */ 00455 #define __HAL_SPI_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE) 00456 00457 /** @brief Disable the SPI peripheral. 00458 * @param __HANDLE__ specifies the SPI Handle. 00459 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 00460 * @retval None 00461 */ 00462 #define __HAL_SPI_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE) 00463 00464 /** 00465 * @} 00466 */ 00467 00468 /* Private macros ------------------------------------------------------------*/ 00469 /** @defgroup SPI_Private_Macros SPI Private Macros 00470 * @{ 00471 */ 00472 00473 /** @brief Set the SPI transmit-only mode. 00474 * @param __HANDLE__ specifies the SPI Handle. 00475 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 00476 * @retval None 00477 */ 00478 #define SPI_1LINE_TX(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_BIDIOE) 00479 00480 /** @brief Set the SPI receive-only mode. 00481 * @param __HANDLE__ specifies the SPI Handle. 00482 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 00483 * @retval None 00484 */ 00485 #define SPI_1LINE_RX(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_BIDIOE) 00486 00487 /** @brief Reset the CRC calculation of the SPI. 00488 * @param __HANDLE__ specifies the SPI Handle. 00489 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 00490 * @retval None 00491 */ 00492 #define SPI_RESET_CRC(__HANDLE__) do{CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN);\ 00493 SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN);}while(0U) 00494 00495 /** @brief Check whether the specified SPI flag is set or not. 00496 * @param __SR__ copy of SPI SR register. 00497 * @param __FLAG__ specifies the flag to check. 00498 * This parameter can be one of the following values: 00499 * @arg SPI_FLAG_RXNE: Receive buffer not empty flag 00500 * @arg SPI_FLAG_TXE: Transmit buffer empty flag 00501 * @arg SPI_FLAG_CRCERR: CRC error flag 00502 * @arg SPI_FLAG_MODF: Mode fault flag 00503 * @arg SPI_FLAG_OVR: Overrun flag 00504 * @arg SPI_FLAG_BSY: Busy flag 00505 * @arg SPI_FLAG_FRE: Frame format error flag 00506 * @retval SET or RESET. 00507 */ 00508 #define SPI_CHECK_FLAG(__SR__, __FLAG__) ((((__SR__) & ((__FLAG__) & SPI_FLAG_MASK)) == \ 00509 ((__FLAG__) & SPI_FLAG_MASK)) ? SET : RESET) 00510 00511 /** @brief Check whether the specified SPI Interrupt is set or not. 00512 * @param __CR2__ copy of SPI CR2 register. 00513 * @param __INTERRUPT__ specifies the SPI interrupt source to check. 00514 * This parameter can be one of the following values: 00515 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable 00516 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable 00517 * @arg SPI_IT_ERR: Error interrupt enable 00518 * @retval SET or RESET. 00519 */ 00520 #define SPI_CHECK_IT_SOURCE(__CR2__, __INTERRUPT__) ((((__CR2__) & (__INTERRUPT__)) == \ 00521 (__INTERRUPT__)) ? SET : RESET) 00522 00523 /** @brief Checks if SPI Mode parameter is in allowed range. 00524 * @param __MODE__ specifies the SPI Mode. 00525 * This parameter can be a value of @ref SPI_Mode 00526 * @retval None 00527 */ 00528 #define IS_SPI_MODE(__MODE__) (((__MODE__) == SPI_MODE_SLAVE) || \ 00529 ((__MODE__) == SPI_MODE_MASTER)) 00530 00531 /** @brief Checks if SPI Direction Mode parameter is in allowed range. 00532 * @param __MODE__ specifies the SPI Direction Mode. 00533 * This parameter can be a value of @ref SPI_Direction 00534 * @retval None 00535 */ 00536 #define IS_SPI_DIRECTION(__MODE__) (((__MODE__) == SPI_DIRECTION_2LINES) || \ 00537 ((__MODE__) == SPI_DIRECTION_2LINES_RXONLY) || \ 00538 ((__MODE__) == SPI_DIRECTION_1LINE)) 00539 00540 /** @brief Checks if SPI Direction Mode parameter is 2 lines. 00541 * @param __MODE__ specifies the SPI Direction Mode. 00542 * @retval None 00543 */ 00544 #define IS_SPI_DIRECTION_2LINES(__MODE__) ((__MODE__) == SPI_DIRECTION_2LINES) 00545 00546 /** @brief Checks if SPI Direction Mode parameter is 1 or 2 lines. 00547 * @param __MODE__ specifies the SPI Direction Mode. 00548 * @retval None 00549 */ 00550 #define IS_SPI_DIRECTION_2LINES_OR_1LINE(__MODE__) (((__MODE__) == SPI_DIRECTION_2LINES) || \ 00551 ((__MODE__) == SPI_DIRECTION_1LINE)) 00552 00553 /** @brief Checks if SPI Data Size parameter is in allowed range. 00554 * @param __DATASIZE__ specifies the SPI Data Size. 00555 * This parameter can be a value of @ref SPI_Data_Size 00556 * @retval None 00557 */ 00558 #define IS_SPI_DATASIZE(__DATASIZE__) (((__DATASIZE__) == SPI_DATASIZE_16BIT) || \ 00559 ((__DATASIZE__) == SPI_DATASIZE_8BIT)) 00560 00561 /** @brief Checks if SPI Serial clock steady state parameter is in allowed range. 00562 * @param __CPOL__ specifies the SPI serial clock steady state. 00563 * This parameter can be a value of @ref SPI_Clock_Polarity 00564 * @retval None 00565 */ 00566 #define IS_SPI_CPOL(__CPOL__) (((__CPOL__) == SPI_POLARITY_LOW) || \ 00567 ((__CPOL__) == SPI_POLARITY_HIGH)) 00568 00569 /** @brief Checks if SPI Clock Phase parameter is in allowed range. 00570 * @param __CPHA__ specifies the SPI Clock Phase. 00571 * This parameter can be a value of @ref SPI_Clock_Phase 00572 * @retval None 00573 */ 00574 #define IS_SPI_CPHA(__CPHA__) (((__CPHA__) == SPI_PHASE_1EDGE) || \ 00575 ((__CPHA__) == SPI_PHASE_2EDGE)) 00576 00577 /** @brief Checks if SPI Slave Select parameter is in allowed range. 00578 * @param __NSS__ specifies the SPI Slave Select management parameter. 00579 * This parameter can be a value of @ref SPI_Slave_Select_management 00580 * @retval None 00581 */ 00582 #define IS_SPI_NSS(__NSS__) (((__NSS__) == SPI_NSS_SOFT) || \ 00583 ((__NSS__) == SPI_NSS_HARD_INPUT) || \ 00584 ((__NSS__) == SPI_NSS_HARD_OUTPUT)) 00585 00586 /** @brief Checks if SPI Baudrate prescaler parameter is in allowed range. 00587 * @param __PRESCALER__ specifies the SPI Baudrate prescaler. 00588 * This parameter can be a value of @ref SPI_BaudRate_Prescaler 00589 * @retval None 00590 */ 00591 #define IS_SPI_BAUDRATE_PRESCALER(__PRESCALER__) (((__PRESCALER__) == SPI_BAUDRATEPRESCALER_2) || \ 00592 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_4) || \ 00593 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_8) || \ 00594 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_16) || \ 00595 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_32) || \ 00596 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_64) || \ 00597 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_128) || \ 00598 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_256)) 00599 00600 /** @brief Checks if SPI MSB LSB transmission parameter is in allowed range. 00601 * @param __BIT__ specifies the SPI MSB LSB transmission (whether data transfer starts from MSB or LSB bit). 00602 * This parameter can be a value of @ref SPI_MSB_LSB_transmission 00603 * @retval None 00604 */ 00605 #define IS_SPI_FIRST_BIT(__BIT__) (((__BIT__) == SPI_FIRSTBIT_MSB) || \ 00606 ((__BIT__) == SPI_FIRSTBIT_LSB)) 00607 00608 /** @brief Checks if SPI TI mode parameter is in allowed range. 00609 * @param __MODE__ specifies the SPI TI mode. 00610 * This parameter can be a value of @ref SPI_TI_mode 00611 * @retval None 00612 */ 00613 #define IS_SPI_TIMODE(__MODE__) (((__MODE__) == SPI_TIMODE_DISABLE) || \ 00614 ((__MODE__) == SPI_TIMODE_ENABLE)) 00615 00616 /** @brief Checks if SPI CRC calculation enabled state is in allowed range. 00617 * @param __CALCULATION__ specifies the SPI CRC calculation enable state. 00618 * This parameter can be a value of @ref SPI_CRC_Calculation 00619 * @retval None 00620 */ 00621 #define IS_SPI_CRC_CALCULATION(__CALCULATION__) (((__CALCULATION__) == SPI_CRCCALCULATION_DISABLE) || \ 00622 ((__CALCULATION__) == SPI_CRCCALCULATION_ENABLE)) 00623 00624 /** @brief Checks if SPI polynomial value to be used for the CRC calculation, is in allowed range. 00625 * @param __POLYNOMIAL__ specifies the SPI polynomial value to be used for the CRC calculation. 00626 * This parameter must be a number between Min_Data = 0 and Max_Data = 65535 00627 * @retval None 00628 */ 00629 #define IS_SPI_CRC_POLYNOMIAL(__POLYNOMIAL__) (((__POLYNOMIAL__) >= 0x1U) && \ 00630 ((__POLYNOMIAL__) <= 0xFFFFU) && \ 00631 (((__POLYNOMIAL__)&0x1U) != 0U)) 00632 00633 /** @brief Checks if DMA handle is valid. 00634 * @param __HANDLE__ specifies a DMA Handle. 00635 * @retval None 00636 */ 00637 #define IS_SPI_DMA_HANDLE(__HANDLE__) ((__HANDLE__) != NULL) 00638 00639 /** 00640 * @} 00641 */ 00642 00643 /* Exported functions --------------------------------------------------------*/ 00644 /** @addtogroup SPI_Exported_Functions 00645 * @{ 00646 */ 00647 00648 /** @addtogroup SPI_Exported_Functions_Group1 00649 * @{ 00650 */ 00651 /* Initialization/de-initialization functions ********************************/ 00652 HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi); 00653 HAL_StatusTypeDef HAL_SPI_DeInit(SPI_HandleTypeDef *hspi); 00654 void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi); 00655 void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi); 00656 00657 /* Callbacks Register/UnRegister functions ***********************************/ 00658 #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) 00659 HAL_StatusTypeDef HAL_SPI_RegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_CallbackIDTypeDef CallbackID, pSPI_CallbackTypeDef pCallback); 00660 HAL_StatusTypeDef HAL_SPI_UnRegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_CallbackIDTypeDef CallbackID); 00661 #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ 00662 /** 00663 * @} 00664 */ 00665 00666 /** @addtogroup SPI_Exported_Functions_Group2 00667 * @{ 00668 */ 00669 /* I/O operation functions ***************************************************/ 00670 HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout); 00671 HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout); 00672 HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, 00673 uint32_t Timeout); 00674 HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); 00675 HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); 00676 HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, 00677 uint16_t Size); 00678 HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); 00679 HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); 00680 HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, 00681 uint16_t Size); 00682 HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi); 00683 HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi); 00684 HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi); 00685 /* Transfer Abort functions */ 00686 HAL_StatusTypeDef HAL_SPI_Abort(SPI_HandleTypeDef *hspi); 00687 HAL_StatusTypeDef HAL_SPI_Abort_IT(SPI_HandleTypeDef *hspi); 00688 00689 void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi); 00690 void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi); 00691 void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi); 00692 void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi); 00693 void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi); 00694 void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi); 00695 void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi); 00696 void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi); 00697 void HAL_SPI_AbortCpltCallback(SPI_HandleTypeDef *hspi); 00698 /** 00699 * @} 00700 */ 00701 00702 /** @addtogroup SPI_Exported_Functions_Group3 00703 * @{ 00704 */ 00705 /* Peripheral State and Error functions ***************************************/ 00706 HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi); 00707 uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi); 00708 /** 00709 * @} 00710 */ 00711 00712 /** 00713 * @} 00714 */ 00715 00716 /** 00717 * @} 00718 */ 00719 00720 /** 00721 * @} 00722 */ 00723 00724 #ifdef __cplusplus 00725 } 00726 #endif 00727 00728 #endif /* STM32F4xx_HAL_SPI_H */ 00729 00730 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
1.7.6.1