Input1 Source

Defines
#define	LL_LPTIM_INPUT1_SRC_GPIO   0x00000000U
#define	LL_LPTIM_INPUT1_SRC_COMP1   LPTIM_CFGR2_IN1SEL_0
#define	LL_LPTIM_INPUT1_SRC_COMP2   LPTIM_CFGR2_IN1SEL_1
#define	LL_LPTIM_INPUT1_SRC_COMP1_COMP2   (LPTIM_CFGR2_IN1SEL_1 | LPTIM_CFGR2_IN1SEL_0)
#define	LL_LPTIM_INPUT1_SRC_SAI4_FS_A   LPTIM_CFGR2_IN1SEL_0
#define	LL_LPTIM_INPUT1_SRC_SAI4_FS_B   LPTIM_CFGR2_IN1SEL_1

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Define Documentation

#define LL_LPTIM_INPUT1_SRC_COMP1   LPTIM_CFGR2_IN1SEL_0

For LPTIM1 and LPTIM2

Definition at line 282 of file stm32h7xx_ll_lptim.h.

#define LL_LPTIM_INPUT1_SRC_COMP1_COMP2   (LPTIM_CFGR2_IN1SEL_1 | LPTIM_CFGR2_IN1SEL_0)

For LPTIM2

Definition at line 284 of file stm32h7xx_ll_lptim.h.

#define LL_LPTIM_INPUT1_SRC_COMP2   LPTIM_CFGR2_IN1SEL_1

For LPTIM2

Definition at line 283 of file stm32h7xx_ll_lptim.h.

#define LL_LPTIM_INPUT1_SRC_GPIO   0x00000000U

For LPTIM1 and LPTIM2

Definition at line 281 of file stm32h7xx_ll_lptim.h.

#define LL_LPTIM_INPUT1_SRC_SAI4_FS_A   LPTIM_CFGR2_IN1SEL_0

For LPTIM3

Definition at line 285 of file stm32h7xx_ll_lptim.h.

#define LL_LPTIM_INPUT1_SRC_SAI4_FS_B   LPTIM_CFGR2_IN1SEL_1

For LPTIM3

Definition at line 286 of file stm32h7xx_ll_lptim.h.