STM32H735xx HAL User Manual
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Defines | |
#define | LL_LPTIM_TRIG_FILTER_NONE 0x00000000U |
#define | LL_LPTIM_TRIG_FILTER_2 LPTIM_CFGR_TRGFLT_0 |
#define | LL_LPTIM_TRIG_FILTER_4 LPTIM_CFGR_TRGFLT_1 |
#define | LL_LPTIM_TRIG_FILTER_8 LPTIM_CFGR_TRGFLT |
#define LL_LPTIM_TRIG_FILTER_2 LPTIM_CFGR_TRGFLT_0 |
Trigger active level change must be stable for at least 2 clock periods before it is considered as valid trigger
Definition at line 221 of file stm32h7xx_ll_lptim.h.
#define LL_LPTIM_TRIG_FILTER_4 LPTIM_CFGR_TRGFLT_1 |
Trigger active level change must be stable for at least 4 clock periods before it is considered as valid trigger
Definition at line 222 of file stm32h7xx_ll_lptim.h.
#define LL_LPTIM_TRIG_FILTER_8 LPTIM_CFGR_TRGFLT |
Trigger active level change must be stable for at least 8 clock periods before it is considered as valid trigger
Definition at line 223 of file stm32h7xx_ll_lptim.h.
#define LL_LPTIM_TRIG_FILTER_NONE 0x00000000U |
Any trigger active level change is considered as a valid trigger
Definition at line 220 of file stm32h7xx_ll_lptim.h.