Defines
#define	OPAMP_PGA_CONNECT_INVERTINGINPUT_NO 0x00000000U
#define	OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0 OPAMP_CSR_PGGAIN_2
#define	OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0_BIAS OPAMP_CSR_PGGAIN_3
#define	OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0_IO1_BIAS (OPAMP_CSR_PGGAIN_2 \| OPAMP_CSR_PGGAIN_3)

Define Documentation

In PGA mode, the inverting input is connected to VINM0

Definition at line 216 of file stm32h7xx_hal_opamp.h.

In PGA mode, the inverting input is connected to VINM0 or bias

Definition at line 217 of file stm32h7xx_hal_opamp.h.

#define OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0_IO1_BIAS (OPAMP_CSR_PGGAIN_2 | OPAMP_CSR_PGGAIN_3)

In PGA mode, the inverting input is connected to VINM0 or bias , VINM1 connected for filtering

Definition at line 218 of file stm32h7xx_hal_opamp.h.

In PGA mode, the inverting input is not connected

Definition at line 215 of file stm32h7xx_hal_opamp.h.

Defines