TAMPER MASK

Defines
#define	LL_RTC_TAMPER_MASK_TAMPER1   RTC_TAMPCR_TAMP1MF
#define	LL_RTC_TAMPER_MASK_TAMPER2   RTC_TAMPCR_TAMP2MF
#define	LL_RTC_TAMPER_MASK_TAMPER3   RTC_TAMPCR_TAMP3MF

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Define Documentation

#define LL_RTC_TAMPER_MASK_TAMPER1   RTC_TAMPCR_TAMP1MF

Tamper 1 event generates a trigger event. TAMP1F is masked and internally cleared by hardware.The backup registers are not erased

Definition at line 585 of file stm32h7xx_ll_rtc.h.

#define LL_RTC_TAMPER_MASK_TAMPER2   RTC_TAMPCR_TAMP2MF

Tamper 2 event generates a trigger event. TAMP2F is masked and internally cleared by hardware. The backup registers are not erased.

Definition at line 588 of file stm32h7xx_ll_rtc.h.

#define LL_RTC_TAMPER_MASK_TAMPER3   RTC_TAMPCR_TAMP3MF

Tamper 3 event generates a trigger event. TAMP3F is masked and internally cleared by hardware. The backup registers are not erased

Definition at line 591 of file stm32h7xx_ll_rtc.h.