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STM32H735xx HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32h7xx_hal_cec.h 00004 * @author MCD Application Team 00005 * @brief Header file of CEC HAL module. 00006 ****************************************************************************** 00007 * @attention 00008 * 00009 * Copyright (c) 2017 STMicroelectronics. 00010 * All rights reserved. 00011 * 00012 * This software is licensed under terms that can be found in the LICENSE file 00013 * in the root directory of this software component. 00014 * If no LICENSE file comes with this software, it is provided AS-IS. 00015 * 00016 ****************************************************************************** 00017 */ 00018 00019 /* Define to prevent recursive inclusion -------------------------------------*/ 00020 #ifndef STM32H7xx_HAL_CEC_H 00021 #define STM32H7xx_HAL_CEC_H 00022 00023 #ifdef __cplusplus 00024 extern "C" { 00025 #endif 00026 00027 /* Includes ------------------------------------------------------------------*/ 00028 #include "stm32h7xx_hal_def.h" 00029 00030 #if defined (CEC) 00031 00032 /** @addtogroup STM32H7xx_HAL_Driver 00033 * @{ 00034 */ 00035 00036 /** @addtogroup CEC 00037 * @{ 00038 */ 00039 00040 /* Exported types ------------------------------------------------------------*/ 00041 /** @defgroup CEC_Exported_Types CEC Exported Types 00042 * @{ 00043 */ 00044 00045 /** 00046 * @brief CEC Init Structure definition 00047 */ 00048 typedef struct 00049 { 00050 uint32_t SignalFreeTime; /*!< Set SFT field, specifies the Signal Free Time. 00051 It can be one of @ref CEC_Signal_Free_Time 00052 and belongs to the set {0,...,7} where 00053 0x0 is the default configuration 00054 else means 0.5 + (SignalFreeTime - 1) nominal data bit periods */ 00055 00056 uint32_t Tolerance; /*!< Set RXTOL bit, specifies the tolerance accepted on the received waveforms, 00057 it can be a value of @ref CEC_Tolerance : it is either CEC_STANDARD_TOLERANCE 00058 or CEC_EXTENDED_TOLERANCE */ 00059 00060 uint32_t BRERxStop; /*!< Set BRESTP bit @ref CEC_BRERxStop : specifies whether or not a Bit Rising Error stops the reception. 00061 CEC_NO_RX_STOP_ON_BRE: reception is not stopped. 00062 CEC_RX_STOP_ON_BRE: reception is stopped. */ 00063 00064 uint32_t BREErrorBitGen; /*!< Set BREGEN bit @ref CEC_BREErrorBitGen : specifies whether or not an Error-Bit is generated on the 00065 CEC line upon Bit Rising Error detection. 00066 CEC_BRE_ERRORBIT_NO_GENERATION: no error-bit generation. 00067 CEC_BRE_ERRORBIT_GENERATION: error-bit generation if BRESTP is set. */ 00068 00069 uint32_t LBPEErrorBitGen; /*!< Set LBPEGEN bit @ref CEC_LBPEErrorBitGen : specifies whether or not an Error-Bit is generated on the 00070 CEC line upon Long Bit Period Error detection. 00071 CEC_LBPE_ERRORBIT_NO_GENERATION: no error-bit generation. 00072 CEC_LBPE_ERRORBIT_GENERATION: error-bit generation. */ 00073 00074 uint32_t BroadcastMsgNoErrorBitGen; /*!< Set BRDNOGEN bit @ref CEC_BroadCastMsgErrorBitGen : allows to avoid an Error-Bit generation on the CEC line 00075 upon an error detected on a broadcast message. 00076 00077 It supersedes BREGEN and LBPEGEN bits for a broadcast message error handling. It can take two values: 00078 00079 1) CEC_BROADCASTERROR_ERRORBIT_GENERATION. 00080 a) BRE detection: error-bit generation on the CEC line if BRESTP=CEC_RX_STOP_ON_BRE 00081 and BREGEN=CEC_BRE_ERRORBIT_NO_GENERATION. 00082 b) LBPE detection: error-bit generation on the CEC line 00083 if LBPGEN=CEC_LBPE_ERRORBIT_NO_GENERATION. 00084 00085 2) CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION. 00086 no error-bit generation in case neither a) nor b) are satisfied. Additionally, 00087 there is no error-bit generation in case of Short Bit Period Error detection in 00088 a broadcast message while LSTN bit is set. */ 00089 00090 uint32_t SignalFreeTimeOption; /*!< Set SFTOP bit @ref CEC_SFT_Option : specifies when SFT timer starts. 00091 CEC_SFT_START_ON_TXSOM SFT: timer starts when TXSOM is set by software. 00092 CEC_SFT_START_ON_TX_RX_END: SFT timer starts automatically at the end of message transmission/reception. */ 00093 00094 uint32_t ListenMode; /*!< Set LSTN bit @ref CEC_Listening_Mode : specifies device listening mode. It can take two values: 00095 00096 CEC_REDUCED_LISTENING_MODE: CEC peripheral receives only message addressed to its 00097 own address (OAR). Messages addressed to different destination are ignored. 00098 Broadcast messages are always received. 00099 00100 CEC_FULL_LISTENING_MODE: CEC peripheral receives messages addressed to its own 00101 address (OAR) with positive acknowledge. Messages addressed to different destination 00102 are received, but without interfering with the CEC bus: no acknowledge sent. */ 00103 00104 uint16_t OwnAddress; /*!< Own addresses configuration 00105 This parameter can be a value of @ref CEC_OWN_ADDRESS */ 00106 00107 uint8_t *RxBuffer; /*!< CEC Rx buffer pointeur */ 00108 00109 00110 } CEC_InitTypeDef; 00111 00112 /** 00113 * @brief HAL CEC State definition 00114 * @note HAL CEC State value is a combination of 2 different substates: gState and RxState (see @ref CEC_State_Definition). 00115 * - gState contains CEC state information related to global Handle management 00116 * and also information related to Tx operations. 00117 * gState value coding follow below described bitmap : 00118 * b7 (not used) 00119 * x : Should be set to 0 00120 * b6 Error information 00121 * 0 : No Error 00122 * 1 : Error 00123 * b5 CEC peripheral initialization status 00124 * 0 : Reset (peripheral not initialized) 00125 * 1 : Init done (peripheral initialized. HAL CEC Init function already called) 00126 * b4-b3 (not used) 00127 * xx : Should be set to 00 00128 * b2 Intrinsic process state 00129 * 0 : Ready 00130 * 1 : Busy (peripheral busy with some configuration or internal operations) 00131 * b1 (not used) 00132 * x : Should be set to 0 00133 * b0 Tx state 00134 * 0 : Ready (no Tx operation ongoing) 00135 * 1 : Busy (Tx operation ongoing) 00136 * - RxState contains information related to Rx operations. 00137 * RxState value coding follow below described bitmap : 00138 * b7-b6 (not used) 00139 * xx : Should be set to 00 00140 * b5 CEC peripheral initialization status 00141 * 0 : Reset (peripheral not initialized) 00142 * 1 : Init done (peripheral initialized) 00143 * b4-b2 (not used) 00144 * xxx : Should be set to 000 00145 * b1 Rx state 00146 * 0 : Ready (no Rx operation ongoing) 00147 * 1 : Busy (Rx operation ongoing) 00148 * b0 (not used) 00149 * x : Should be set to 0. 00150 */ 00151 typedef uint32_t HAL_CEC_StateTypeDef; 00152 00153 /** 00154 * @brief CEC handle Structure definition 00155 */ 00156 #if (USE_HAL_CEC_REGISTER_CALLBACKS == 1) 00157 typedef struct __CEC_HandleTypeDef 00158 #else 00159 typedef struct 00160 #endif /* USE_HAL_CEC_REGISTER_CALLBACKS */ 00161 { 00162 CEC_TypeDef *Instance; /*!< CEC registers base address */ 00163 00164 CEC_InitTypeDef Init; /*!< CEC communication parameters */ 00165 00166 uint8_t *pTxBuffPtr; /*!< Pointer to CEC Tx transfer Buffer */ 00167 00168 uint16_t TxXferCount; /*!< CEC Tx Transfer Counter */ 00169 00170 uint16_t RxXferSize; /*!< CEC Rx Transfer size, 0: header received only */ 00171 00172 HAL_LockTypeDef Lock; /*!< Locking object */ 00173 00174 HAL_CEC_StateTypeDef gState; /*!< CEC state information related to global Handle management 00175 and also related to Tx operations. 00176 This parameter can be a value of @ref HAL_CEC_StateTypeDef */ 00177 00178 HAL_CEC_StateTypeDef RxState; /*!< CEC state information related to Rx operations. 00179 This parameter can be a value of @ref HAL_CEC_StateTypeDef */ 00180 00181 uint32_t ErrorCode; /*!< For errors handling purposes, copy of ISR register 00182 in case error is reported */ 00183 00184 #if (USE_HAL_CEC_REGISTER_CALLBACKS == 1) 00185 void (* TxCpltCallback)(struct __CEC_HandleTypeDef 00186 *hcec); /*!< CEC Tx Transfer completed callback */ 00187 void (* RxCpltCallback)(struct __CEC_HandleTypeDef *hcec, 00188 uint32_t RxFrameSize); /*!< CEC Rx Transfer completed callback */ 00189 void (* ErrorCallback)(struct __CEC_HandleTypeDef *hcec); /*!< CEC error callback */ 00190 00191 void (* MspInitCallback)(struct __CEC_HandleTypeDef *hcec); /*!< CEC Msp Init callback */ 00192 void (* MspDeInitCallback)(struct __CEC_HandleTypeDef *hcec); /*!< CEC Msp DeInit callback */ 00193 00194 #endif /* (USE_HAL_CEC_REGISTER_CALLBACKS) */ 00195 } CEC_HandleTypeDef; 00196 00197 #if (USE_HAL_CEC_REGISTER_CALLBACKS == 1) 00198 /** 00199 * @brief HAL CEC Callback ID enumeration definition 00200 */ 00201 typedef enum 00202 { 00203 HAL_CEC_TX_CPLT_CB_ID = 0x00U, /*!< CEC Tx Transfer completed callback ID */ 00204 HAL_CEC_RX_CPLT_CB_ID = 0x01U, /*!< CEC Rx Transfer completed callback ID */ 00205 HAL_CEC_ERROR_CB_ID = 0x02U, /*!< CEC error callback ID */ 00206 HAL_CEC_MSPINIT_CB_ID = 0x03U, /*!< CEC Msp Init callback ID */ 00207 HAL_CEC_MSPDEINIT_CB_ID = 0x04U /*!< CEC Msp DeInit callback ID */ 00208 } HAL_CEC_CallbackIDTypeDef; 00209 00210 /** 00211 * @brief HAL CEC Callback pointer definition 00212 */ 00213 typedef void (*pCEC_CallbackTypeDef)(CEC_HandleTypeDef *hcec); /*!< pointer to an CEC callback function */ 00214 typedef void (*pCEC_RxCallbackTypeDef)(CEC_HandleTypeDef *hcec, 00215 uint32_t RxFrameSize); /*!< pointer to an Rx Transfer completed callback function */ 00216 #endif /* USE_HAL_CEC_REGISTER_CALLBACKS */ 00217 /** 00218 * @} 00219 */ 00220 00221 /* Exported constants --------------------------------------------------------*/ 00222 /** @defgroup CEC_Exported_Constants CEC Exported Constants 00223 * @{ 00224 */ 00225 /** @defgroup CEC_State_Definition CEC State Code Definition 00226 * @{ 00227 */ 00228 #define HAL_CEC_STATE_RESET ((uint32_t)0x00000000) /*!< Peripheral is not yet Initialized 00229 Value is allowed for gState and RxState */ 00230 #define HAL_CEC_STATE_READY ((uint32_t)0x00000020) /*!< Peripheral Initialized and ready for use 00231 Value is allowed for gState and RxState */ 00232 #define HAL_CEC_STATE_BUSY ((uint32_t)0x00000024) /*!< an internal process is ongoing 00233 Value is allowed for gState only */ 00234 #define HAL_CEC_STATE_BUSY_RX ((uint32_t)0x00000022) /*!< Data Reception process is ongoing 00235 Value is allowed for RxState only */ 00236 #define HAL_CEC_STATE_BUSY_TX ((uint32_t)0x00000021) /*!< Data Transmission process is ongoing 00237 Value is allowed for gState only */ 00238 #define HAL_CEC_STATE_BUSY_RX_TX ((uint32_t)0x00000023) /*!< an internal process is ongoing 00239 Value is allowed for gState only */ 00240 #define HAL_CEC_STATE_ERROR ((uint32_t)0x00000050) /*!< Error Value is allowed for gState only */ 00241 /** 00242 * @} 00243 */ 00244 /** @defgroup CEC_Error_Code CEC Error Code 00245 * @{ 00246 */ 00247 #define HAL_CEC_ERROR_NONE (uint32_t) 0x0000U /*!< no error */ 00248 #define HAL_CEC_ERROR_RXOVR CEC_ISR_RXOVR /*!< CEC Rx-Overrun */ 00249 #define HAL_CEC_ERROR_BRE CEC_ISR_BRE /*!< CEC Rx Bit Rising Error */ 00250 #define HAL_CEC_ERROR_SBPE CEC_ISR_SBPE /*!< CEC Rx Short Bit period Error */ 00251 #define HAL_CEC_ERROR_LBPE CEC_ISR_LBPE /*!< CEC Rx Long Bit period Error */ 00252 #define HAL_CEC_ERROR_RXACKE CEC_ISR_RXACKE /*!< CEC Rx Missing Acknowledge */ 00253 #define HAL_CEC_ERROR_ARBLST CEC_ISR_ARBLST /*!< CEC Arbitration Lost */ 00254 #define HAL_CEC_ERROR_TXUDR CEC_ISR_TXUDR /*!< CEC Tx-Buffer Underrun */ 00255 #define HAL_CEC_ERROR_TXERR CEC_ISR_TXERR /*!< CEC Tx-Error */ 00256 #define HAL_CEC_ERROR_TXACKE CEC_ISR_TXACKE /*!< CEC Tx Missing Acknowledge */ 00257 #if (USE_HAL_CEC_REGISTER_CALLBACKS == 1) 00258 #define HAL_CEC_ERROR_INVALID_CALLBACK ((uint32_t)0x00002000U) /*!< Invalid Callback Error */ 00259 #endif /* USE_HAL_CEC_REGISTER_CALLBACKS */ 00260 /** 00261 * @} 00262 */ 00263 00264 /** @defgroup CEC_Signal_Free_Time CEC Signal Free Time setting parameter 00265 * @{ 00266 */ 00267 #define CEC_DEFAULT_SFT ((uint32_t)0x00000000U) 00268 #define CEC_0_5_BITPERIOD_SFT ((uint32_t)0x00000001U) 00269 #define CEC_1_5_BITPERIOD_SFT ((uint32_t)0x00000002U) 00270 #define CEC_2_5_BITPERIOD_SFT ((uint32_t)0x00000003U) 00271 #define CEC_3_5_BITPERIOD_SFT ((uint32_t)0x00000004U) 00272 #define CEC_4_5_BITPERIOD_SFT ((uint32_t)0x00000005U) 00273 #define CEC_5_5_BITPERIOD_SFT ((uint32_t)0x00000006U) 00274 #define CEC_6_5_BITPERIOD_SFT ((uint32_t)0x00000007U) 00275 /** 00276 * @} 00277 */ 00278 00279 /** @defgroup CEC_Tolerance CEC Receiver Tolerance 00280 * @{ 00281 */ 00282 #define CEC_STANDARD_TOLERANCE ((uint32_t)0x00000000U) 00283 #define CEC_EXTENDED_TOLERANCE ((uint32_t)CEC_CFGR_RXTOL) 00284 /** 00285 * @} 00286 */ 00287 00288 /** @defgroup CEC_BRERxStop CEC Reception Stop on Error 00289 * @{ 00290 */ 00291 #define CEC_NO_RX_STOP_ON_BRE ((uint32_t)0x00000000U) 00292 #define CEC_RX_STOP_ON_BRE ((uint32_t)CEC_CFGR_BRESTP) 00293 /** 00294 * @} 00295 */ 00296 00297 /** @defgroup CEC_BREErrorBitGen CEC Error Bit Generation if Bit Rise Error reported 00298 * @{ 00299 */ 00300 #define CEC_BRE_ERRORBIT_NO_GENERATION ((uint32_t)0x00000000U) 00301 #define CEC_BRE_ERRORBIT_GENERATION ((uint32_t)CEC_CFGR_BREGEN) 00302 /** 00303 * @} 00304 */ 00305 00306 /** @defgroup CEC_LBPEErrorBitGen CEC Error Bit Generation if Long Bit Period Error reported 00307 * @{ 00308 */ 00309 #define CEC_LBPE_ERRORBIT_NO_GENERATION ((uint32_t)0x00000000U) 00310 #define CEC_LBPE_ERRORBIT_GENERATION ((uint32_t)CEC_CFGR_LBPEGEN) 00311 /** 00312 * @} 00313 */ 00314 00315 /** @defgroup CEC_BroadCastMsgErrorBitGen CEC Error Bit Generation on Broadcast message 00316 * @{ 00317 */ 00318 #define CEC_BROADCASTERROR_ERRORBIT_GENERATION ((uint32_t)0x00000000U) 00319 #define CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION ((uint32_t)CEC_CFGR_BRDNOGEN) 00320 /** 00321 * @} 00322 */ 00323 00324 /** @defgroup CEC_SFT_Option CEC Signal Free Time start option 00325 * @{ 00326 */ 00327 #define CEC_SFT_START_ON_TXSOM ((uint32_t)0x00000000U) 00328 #define CEC_SFT_START_ON_TX_RX_END ((uint32_t)CEC_CFGR_SFTOPT) 00329 /** 00330 * @} 00331 */ 00332 00333 /** @defgroup CEC_Listening_Mode CEC Listening mode option 00334 * @{ 00335 */ 00336 #define CEC_REDUCED_LISTENING_MODE ((uint32_t)0x00000000U) 00337 #define CEC_FULL_LISTENING_MODE ((uint32_t)CEC_CFGR_LSTN) 00338 /** 00339 * @} 00340 */ 00341 00342 /** @defgroup CEC_OAR_Position CEC Device Own Address position in CEC CFGR register 00343 * @{ 00344 */ 00345 #define CEC_CFGR_OAR_LSB_POS ((uint32_t) 16U) 00346 /** 00347 * @} 00348 */ 00349 00350 /** @defgroup CEC_Initiator_Position CEC Initiator logical address position in message header 00351 * @{ 00352 */ 00353 #define CEC_INITIATOR_LSB_POS ((uint32_t) 4U) 00354 /** 00355 * @} 00356 */ 00357 00358 /** @defgroup CEC_OWN_ADDRESS CEC Own Address 00359 * @{ 00360 */ 00361 #define CEC_OWN_ADDRESS_NONE ((uint16_t) 0x0000U) /* Reset value */ 00362 #define CEC_OWN_ADDRESS_0 ((uint16_t) 0x0001U) /* Logical Address 0 */ 00363 #define CEC_OWN_ADDRESS_1 ((uint16_t) 0x0002U) /* Logical Address 1 */ 00364 #define CEC_OWN_ADDRESS_2 ((uint16_t) 0x0004U) /* Logical Address 2 */ 00365 #define CEC_OWN_ADDRESS_3 ((uint16_t) 0x0008U) /* Logical Address 3 */ 00366 #define CEC_OWN_ADDRESS_4 ((uint16_t) 0x0010U) /* Logical Address 4 */ 00367 #define CEC_OWN_ADDRESS_5 ((uint16_t) 0x0020U) /* Logical Address 5 */ 00368 #define CEC_OWN_ADDRESS_6 ((uint16_t) 0x0040U) /* Logical Address 6 */ 00369 #define CEC_OWN_ADDRESS_7 ((uint16_t) 0x0080U) /* Logical Address 7 */ 00370 #define CEC_OWN_ADDRESS_8 ((uint16_t) 0x0100U) /* Logical Address 9 */ 00371 #define CEC_OWN_ADDRESS_9 ((uint16_t) 0x0200U) /* Logical Address 10 */ 00372 #define CEC_OWN_ADDRESS_10 ((uint16_t) 0x0400U) /* Logical Address 11 */ 00373 #define CEC_OWN_ADDRESS_11 ((uint16_t) 0x0800U) /* Logical Address 12 */ 00374 #define CEC_OWN_ADDRESS_12 ((uint16_t) 0x1000U) /* Logical Address 13 */ 00375 #define CEC_OWN_ADDRESS_13 ((uint16_t) 0x2000U) /* Logical Address 14 */ 00376 #define CEC_OWN_ADDRESS_14 ((uint16_t) 0x4000U) /* Logical Address 15 */ 00377 /** 00378 * @} 00379 */ 00380 00381 /** @defgroup CEC_Interrupts_Definitions CEC Interrupts definition 00382 * @{ 00383 */ 00384 #define CEC_IT_TXACKE CEC_IER_TXACKEIE 00385 #define CEC_IT_TXERR CEC_IER_TXERRIE 00386 #define CEC_IT_TXUDR CEC_IER_TXUDRIE 00387 #define CEC_IT_TXEND CEC_IER_TXENDIE 00388 #define CEC_IT_TXBR CEC_IER_TXBRIE 00389 #define CEC_IT_ARBLST CEC_IER_ARBLSTIE 00390 #define CEC_IT_RXACKE CEC_IER_RXACKEIE 00391 #define CEC_IT_LBPE CEC_IER_LBPEIE 00392 #define CEC_IT_SBPE CEC_IER_SBPEIE 00393 #define CEC_IT_BRE CEC_IER_BREIE 00394 #define CEC_IT_RXOVR CEC_IER_RXOVRIE 00395 #define CEC_IT_RXEND CEC_IER_RXENDIE 00396 #define CEC_IT_RXBR CEC_IER_RXBRIE 00397 /** 00398 * @} 00399 */ 00400 00401 /** @defgroup CEC_Flags_Definitions CEC Flags definition 00402 * @{ 00403 */ 00404 #define CEC_FLAG_TXACKE CEC_ISR_TXACKE 00405 #define CEC_FLAG_TXERR CEC_ISR_TXERR 00406 #define CEC_FLAG_TXUDR CEC_ISR_TXUDR 00407 #define CEC_FLAG_TXEND CEC_ISR_TXEND 00408 #define CEC_FLAG_TXBR CEC_ISR_TXBR 00409 #define CEC_FLAG_ARBLST CEC_ISR_ARBLST 00410 #define CEC_FLAG_RXACKE CEC_ISR_RXACKE 00411 #define CEC_FLAG_LBPE CEC_ISR_LBPE 00412 #define CEC_FLAG_SBPE CEC_ISR_SBPE 00413 #define CEC_FLAG_BRE CEC_ISR_BRE 00414 #define CEC_FLAG_RXOVR CEC_ISR_RXOVR 00415 #define CEC_FLAG_RXEND CEC_ISR_RXEND 00416 #define CEC_FLAG_RXBR CEC_ISR_RXBR 00417 /** 00418 * @} 00419 */ 00420 00421 /** @defgroup CEC_ALL_ERROR CEC all RX or TX errors flags 00422 * @{ 00423 */ 00424 #define CEC_ISR_ALL_ERROR ((uint32_t)CEC_ISR_RXOVR|CEC_ISR_BRE|CEC_ISR_SBPE|CEC_ISR_LBPE|CEC_ISR_RXACKE|\ 00425 CEC_ISR_ARBLST|CEC_ISR_TXUDR|CEC_ISR_TXERR|CEC_ISR_TXACKE) 00426 /** 00427 * @} 00428 */ 00429 00430 /** @defgroup CEC_IER_ALL_RX CEC all RX errors interrupts enabling flag 00431 * @{ 00432 */ 00433 #define CEC_IER_RX_ALL_ERR ((uint32_t)CEC_IER_RXACKEIE|CEC_IER_LBPEIE|CEC_IER_SBPEIE|CEC_IER_BREIE|CEC_IER_RXOVRIE) 00434 /** 00435 * @} 00436 */ 00437 00438 /** @defgroup CEC_IER_ALL_TX CEC all TX errors interrupts enabling flag 00439 * @{ 00440 */ 00441 #define CEC_IER_TX_ALL_ERR ((uint32_t)CEC_IER_TXACKEIE|CEC_IER_TXERRIE|CEC_IER_TXUDRIE|CEC_IER_ARBLSTIE) 00442 /** 00443 * @} 00444 */ 00445 00446 /** 00447 * @} 00448 */ 00449 00450 /* Exported macros -----------------------------------------------------------*/ 00451 /** @defgroup CEC_Exported_Macros CEC Exported Macros 00452 * @{ 00453 */ 00454 00455 /** @brief Reset CEC handle gstate & RxState 00456 * @param __HANDLE__ CEC handle. 00457 * @retval None 00458 */ 00459 #if (USE_HAL_CEC_REGISTER_CALLBACKS == 1) 00460 #define __HAL_CEC_RESET_HANDLE_STATE(__HANDLE__) do{ \ 00461 (__HANDLE__)->gState = HAL_CEC_STATE_RESET; \ 00462 (__HANDLE__)->RxState = HAL_CEC_STATE_RESET; \ 00463 (__HANDLE__)->MspInitCallback = NULL; \ 00464 (__HANDLE__)->MspDeInitCallback = NULL; \ 00465 } while(0) 00466 #else 00467 #define __HAL_CEC_RESET_HANDLE_STATE(__HANDLE__) do{ \ 00468 (__HANDLE__)->gState = HAL_CEC_STATE_RESET; \ 00469 (__HANDLE__)->RxState = HAL_CEC_STATE_RESET; \ 00470 } while(0) 00471 #endif /* USE_HAL_CEC_REGISTER_CALLBACKS */ 00472 /** @brief Checks whether or not the specified CEC interrupt flag is set. 00473 * @param __HANDLE__ specifies the CEC Handle. 00474 * @param __FLAG__ specifies the flag to check. 00475 * @arg CEC_FLAG_TXACKE: Tx Missing acknowledge Error 00476 * @arg CEC_FLAG_TXERR: Tx Error. 00477 * @arg CEC_FLAG_TXUDR: Tx-Buffer Underrun. 00478 * @arg CEC_FLAG_TXEND: End of transmission (successful transmission of the last byte). 00479 * @arg CEC_FLAG_TXBR: Tx-Byte Request. 00480 * @arg CEC_FLAG_ARBLST: Arbitration Lost 00481 * @arg CEC_FLAG_RXACKE: Rx-Missing Acknowledge 00482 * @arg CEC_FLAG_LBPE: Rx Long period Error 00483 * @arg CEC_FLAG_SBPE: Rx Short period Error 00484 * @arg CEC_FLAG_BRE: Rx Bit Rising Error 00485 * @arg CEC_FLAG_RXOVR: Rx Overrun. 00486 * @arg CEC_FLAG_RXEND: End Of Reception. 00487 * @arg CEC_FLAG_RXBR: Rx-Byte Received. 00488 * @retval ITStatus 00489 */ 00490 #define __HAL_CEC_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR & (__FLAG__)) 00491 00492 /** @brief Clears the interrupt or status flag when raised (write at 1) 00493 * @param __HANDLE__ specifies the CEC Handle. 00494 * @param __FLAG__ specifies the interrupt/status flag to clear. 00495 * This parameter can be one of the following values: 00496 * @arg CEC_FLAG_TXACKE: Tx Missing acknowledge Error 00497 * @arg CEC_FLAG_TXERR: Tx Error. 00498 * @arg CEC_FLAG_TXUDR: Tx-Buffer Underrun. 00499 * @arg CEC_FLAG_TXEND: End of transmission (successful transmission of the last byte). 00500 * @arg CEC_FLAG_TXBR: Tx-Byte Request. 00501 * @arg CEC_FLAG_ARBLST: Arbitration Lost 00502 * @arg CEC_FLAG_RXACKE: Rx-Missing Acknowledge 00503 * @arg CEC_FLAG_LBPE: Rx Long period Error 00504 * @arg CEC_FLAG_SBPE: Rx Short period Error 00505 * @arg CEC_FLAG_BRE: Rx Bit Rising Error 00506 * @arg CEC_FLAG_RXOVR: Rx Overrun. 00507 * @arg CEC_FLAG_RXEND: End Of Reception. 00508 * @arg CEC_FLAG_RXBR: Rx-Byte Received. 00509 * @retval none 00510 */ 00511 #define __HAL_CEC_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR |= (__FLAG__)) 00512 00513 /** @brief Enables the specified CEC interrupt. 00514 * @param __HANDLE__ specifies the CEC Handle. 00515 * @param __INTERRUPT__ specifies the CEC interrupt to enable. 00516 * This parameter can be one of the following values: 00517 * @arg CEC_IT_TXACKE: Tx Missing acknowledge Error IT Enable 00518 * @arg CEC_IT_TXERR: Tx Error IT Enable 00519 * @arg CEC_IT_TXUDR: Tx-Buffer Underrun IT Enable 00520 * @arg CEC_IT_TXEND: End of transmission IT Enable 00521 * @arg CEC_IT_TXBR: Tx-Byte Request IT Enable 00522 * @arg CEC_IT_ARBLST: Arbitration Lost IT Enable 00523 * @arg CEC_IT_RXACKE: Rx-Missing Acknowledge IT Enable 00524 * @arg CEC_IT_LBPE: Rx Long period Error IT Enable 00525 * @arg CEC_IT_SBPE: Rx Short period Error IT Enable 00526 * @arg CEC_IT_BRE: Rx Bit Rising Error IT Enable 00527 * @arg CEC_IT_RXOVR: Rx Overrun IT Enable 00528 * @arg CEC_IT_RXEND: End Of Reception IT Enable 00529 * @arg CEC_IT_RXBR: Rx-Byte Received IT Enable 00530 * @retval none 00531 */ 00532 #define __HAL_CEC_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__)) 00533 00534 /** @brief Disables the specified CEC interrupt. 00535 * @param __HANDLE__ specifies the CEC Handle. 00536 * @param __INTERRUPT__ specifies the CEC interrupt to disable. 00537 * This parameter can be one of the following values: 00538 * @arg CEC_IT_TXACKE: Tx Missing acknowledge Error IT Enable 00539 * @arg CEC_IT_TXERR: Tx Error IT Enable 00540 * @arg CEC_IT_TXUDR: Tx-Buffer Underrun IT Enable 00541 * @arg CEC_IT_TXEND: End of transmission IT Enable 00542 * @arg CEC_IT_TXBR: Tx-Byte Request IT Enable 00543 * @arg CEC_IT_ARBLST: Arbitration Lost IT Enable 00544 * @arg CEC_IT_RXACKE: Rx-Missing Acknowledge IT Enable 00545 * @arg CEC_IT_LBPE: Rx Long period Error IT Enable 00546 * @arg CEC_IT_SBPE: Rx Short period Error IT Enable 00547 * @arg CEC_IT_BRE: Rx Bit Rising Error IT Enable 00548 * @arg CEC_IT_RXOVR: Rx Overrun IT Enable 00549 * @arg CEC_IT_RXEND: End Of Reception IT Enable 00550 * @arg CEC_IT_RXBR: Rx-Byte Received IT Enable 00551 * @retval none 00552 */ 00553 #define __HAL_CEC_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= (~(__INTERRUPT__))) 00554 00555 /** @brief Checks whether or not the specified CEC interrupt is enabled. 00556 * @param __HANDLE__ specifies the CEC Handle. 00557 * @param __INTERRUPT__ specifies the CEC interrupt to check. 00558 * This parameter can be one of the following values: 00559 * @arg CEC_IT_TXACKE: Tx Missing acknowledge Error IT Enable 00560 * @arg CEC_IT_TXERR: Tx Error IT Enable 00561 * @arg CEC_IT_TXUDR: Tx-Buffer Underrun IT Enable 00562 * @arg CEC_IT_TXEND: End of transmission IT Enable 00563 * @arg CEC_IT_TXBR: Tx-Byte Request IT Enable 00564 * @arg CEC_IT_ARBLST: Arbitration Lost IT Enable 00565 * @arg CEC_IT_RXACKE: Rx-Missing Acknowledge IT Enable 00566 * @arg CEC_IT_LBPE: Rx Long period Error IT Enable 00567 * @arg CEC_IT_SBPE: Rx Short period Error IT Enable 00568 * @arg CEC_IT_BRE: Rx Bit Rising Error IT Enable 00569 * @arg CEC_IT_RXOVR: Rx Overrun IT Enable 00570 * @arg CEC_IT_RXEND: End Of Reception IT Enable 00571 * @arg CEC_IT_RXBR: Rx-Byte Received IT Enable 00572 * @retval FlagStatus 00573 */ 00574 #define __HAL_CEC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER & (__INTERRUPT__)) 00575 00576 /** @brief Enables the CEC device 00577 * @param __HANDLE__ specifies the CEC Handle. 00578 * @retval none 00579 */ 00580 #define __HAL_CEC_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= CEC_CR_CECEN) 00581 00582 /** @brief Disables the CEC device 00583 * @param __HANDLE__ specifies the CEC Handle. 00584 * @retval none 00585 */ 00586 #define __HAL_CEC_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~CEC_CR_CECEN) 00587 00588 /** @brief Set Transmission Start flag 00589 * @param __HANDLE__ specifies the CEC Handle. 00590 * @retval none 00591 */ 00592 #define __HAL_CEC_FIRST_BYTE_TX_SET(__HANDLE__) ((__HANDLE__)->Instance->CR |= CEC_CR_TXSOM) 00593 00594 /** @brief Set Transmission End flag 00595 * @param __HANDLE__ specifies the CEC Handle. 00596 * @retval none 00597 * If the CEC message consists of only one byte, TXEOM must be set before of TXSOM. 00598 */ 00599 #define __HAL_CEC_LAST_BYTE_TX_SET(__HANDLE__) ((__HANDLE__)->Instance->CR |= CEC_CR_TXEOM) 00600 00601 /** @brief Get Transmission Start flag 00602 * @param __HANDLE__ specifies the CEC Handle. 00603 * @retval FlagStatus 00604 */ 00605 #define __HAL_CEC_GET_TRANSMISSION_START_FLAG(__HANDLE__) ((__HANDLE__)->Instance->CR & CEC_CR_TXSOM) 00606 00607 /** @brief Get Transmission End flag 00608 * @param __HANDLE__ specifies the CEC Handle. 00609 * @retval FlagStatus 00610 */ 00611 #define __HAL_CEC_GET_TRANSMISSION_END_FLAG(__HANDLE__) ((__HANDLE__)->Instance->CR & CEC_CR_TXEOM) 00612 00613 /** @brief Clear OAR register 00614 * @param __HANDLE__ specifies the CEC Handle. 00615 * @retval none 00616 */ 00617 #define __HAL_CEC_CLEAR_OAR(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CFGR, CEC_CFGR_OAR) 00618 00619 /** @brief Set OAR register (without resetting previously set address in case of multi-address mode) 00620 * To reset OAR, __HAL_CEC_CLEAR_OAR() needs to be called beforehand 00621 * @param __HANDLE__ specifies the CEC Handle. 00622 * @param __ADDRESS__ Own Address value (CEC logical address is identified by bit position) 00623 * @retval none 00624 */ 00625 #define __HAL_CEC_SET_OAR(__HANDLE__,__ADDRESS__) SET_BIT((__HANDLE__)->Instance->CFGR, (__ADDRESS__)<< CEC_CFGR_OAR_LSB_POS) 00626 00627 /** 00628 * @} 00629 */ 00630 00631 /* Exported functions --------------------------------------------------------*/ 00632 /** @addtogroup CEC_Exported_Functions 00633 * @{ 00634 */ 00635 00636 /** @addtogroup CEC_Exported_Functions_Group1 00637 * @{ 00638 */ 00639 /* Initialization and de-initialization functions ****************************/ 00640 HAL_StatusTypeDef HAL_CEC_Init(CEC_HandleTypeDef *hcec); 00641 HAL_StatusTypeDef HAL_CEC_DeInit(CEC_HandleTypeDef *hcec); 00642 HAL_StatusTypeDef HAL_CEC_SetDeviceAddress(CEC_HandleTypeDef *hcec, uint16_t CEC_OwnAddress); 00643 void HAL_CEC_MspInit(CEC_HandleTypeDef *hcec); 00644 void HAL_CEC_MspDeInit(CEC_HandleTypeDef *hcec); 00645 00646 #if (USE_HAL_CEC_REGISTER_CALLBACKS == 1) 00647 HAL_StatusTypeDef HAL_CEC_RegisterCallback(CEC_HandleTypeDef *hcec, HAL_CEC_CallbackIDTypeDef CallbackID, 00648 pCEC_CallbackTypeDef pCallback); 00649 HAL_StatusTypeDef HAL_CEC_UnRegisterCallback(CEC_HandleTypeDef *hcec, HAL_CEC_CallbackIDTypeDef CallbackID); 00650 00651 HAL_StatusTypeDef HAL_CEC_RegisterRxCpltCallback(CEC_HandleTypeDef *hcec, pCEC_RxCallbackTypeDef pCallback); 00652 HAL_StatusTypeDef HAL_CEC_UnRegisterRxCpltCallback(CEC_HandleTypeDef *hcec); 00653 #endif /* USE_HAL_CEC_REGISTER_CALLBACKS */ 00654 /** 00655 * @} 00656 */ 00657 00658 /** @addtogroup CEC_Exported_Functions_Group2 00659 * @{ 00660 */ 00661 /* I/O operation functions ***************************************************/ 00662 HAL_StatusTypeDef HAL_CEC_Transmit_IT(CEC_HandleTypeDef *hcec, uint8_t InitiatorAddress, uint8_t DestinationAddress, 00663 uint8_t *pData, uint32_t Size); 00664 uint32_t HAL_CEC_GetLastReceivedFrameSize(CEC_HandleTypeDef *hcec); 00665 void HAL_CEC_ChangeRxBuffer(CEC_HandleTypeDef *hcec, uint8_t *Rxbuffer); 00666 void HAL_CEC_IRQHandler(CEC_HandleTypeDef *hcec); 00667 void HAL_CEC_TxCpltCallback(CEC_HandleTypeDef *hcec); 00668 void HAL_CEC_RxCpltCallback(CEC_HandleTypeDef *hcec, uint32_t RxFrameSize); 00669 void HAL_CEC_ErrorCallback(CEC_HandleTypeDef *hcec); 00670 /** 00671 * @} 00672 */ 00673 00674 /** @addtogroup CEC_Exported_Functions_Group3 00675 * @{ 00676 */ 00677 /* Peripheral State functions ************************************************/ 00678 HAL_CEC_StateTypeDef HAL_CEC_GetState(CEC_HandleTypeDef *hcec); 00679 uint32_t HAL_CEC_GetError(CEC_HandleTypeDef *hcec); 00680 /** 00681 * @} 00682 */ 00683 00684 /** 00685 * @} 00686 */ 00687 00688 /* Private types -------------------------------------------------------------*/ 00689 /** @defgroup CEC_Private_Types CEC Private Types 00690 * @{ 00691 */ 00692 00693 /** 00694 * @} 00695 */ 00696 00697 /* Private variables ---------------------------------------------------------*/ 00698 /** @defgroup CEC_Private_Variables CEC Private Variables 00699 * @{ 00700 */ 00701 00702 /** 00703 * @} 00704 */ 00705 00706 /* Private constants ---------------------------------------------------------*/ 00707 /** @defgroup CEC_Private_Constants CEC Private Constants 00708 * @{ 00709 */ 00710 00711 /** 00712 * @} 00713 */ 00714 00715 /* Private macros ------------------------------------------------------------*/ 00716 /** @defgroup CEC_Private_Macros CEC Private Macros 00717 * @{ 00718 */ 00719 00720 #define IS_CEC_SIGNALFREETIME(__SFT__) ((__SFT__) <= CEC_CFGR_SFT) 00721 00722 #define IS_CEC_TOLERANCE(__RXTOL__) (((__RXTOL__) == CEC_STANDARD_TOLERANCE) || \ 00723 ((__RXTOL__) == CEC_EXTENDED_TOLERANCE)) 00724 00725 #define IS_CEC_BRERXSTOP(__BRERXSTOP__) (((__BRERXSTOP__) == CEC_NO_RX_STOP_ON_BRE) || \ 00726 ((__BRERXSTOP__) == CEC_RX_STOP_ON_BRE)) 00727 00728 #define IS_CEC_BREERRORBITGEN(__ERRORBITGEN__) (((__ERRORBITGEN__) == CEC_BRE_ERRORBIT_NO_GENERATION) || \ 00729 ((__ERRORBITGEN__) == CEC_BRE_ERRORBIT_GENERATION)) 00730 00731 #define IS_CEC_LBPEERRORBITGEN(__ERRORBITGEN__) (((__ERRORBITGEN__) == CEC_LBPE_ERRORBIT_NO_GENERATION) || \ 00732 ((__ERRORBITGEN__) == CEC_LBPE_ERRORBIT_GENERATION)) 00733 00734 #define IS_CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION(__ERRORBITGEN__) (((__ERRORBITGEN__) == CEC_BROADCASTERROR_ERRORBIT_GENERATION) || \ 00735 ((__ERRORBITGEN__) == CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION)) 00736 00737 #define IS_CEC_SFTOP(__SFTOP__) (((__SFTOP__) == CEC_SFT_START_ON_TXSOM) || \ 00738 ((__SFTOP__) == CEC_SFT_START_ON_TX_RX_END)) 00739 00740 #define IS_CEC_LISTENING_MODE(__MODE__) (((__MODE__) == CEC_REDUCED_LISTENING_MODE) || \ 00741 ((__MODE__) == CEC_FULL_LISTENING_MODE)) 00742 00743 /** @brief Check CEC message size. 00744 * The message size is the payload size: without counting the header, 00745 * it varies from 0 byte (ping operation, one header only, no payload) to 00746 * 15 bytes (1 opcode and up to 14 operands following the header). 00747 * @param __SIZE__ CEC message size. 00748 * @retval Test result (TRUE or FALSE). 00749 */ 00750 #define IS_CEC_MSGSIZE(__SIZE__) ((__SIZE__) <= 0x10U) 00751 00752 /** @brief Check CEC device Own Address Register (OAR) setting. 00753 * OAR address is written in a 15-bit field within CEC_CFGR register. 00754 * @param __ADDRESS__ CEC own address. 00755 * @retval Test result (TRUE or FALSE). 00756 */ 00757 #define IS_CEC_OWN_ADDRESS(__ADDRESS__) ((__ADDRESS__) <= 0x7FFFU) 00758 00759 /** @brief Check CEC initiator or destination logical address setting. 00760 * Initiator and destination addresses are coded over 4 bits. 00761 * @param __ADDRESS__ CEC initiator or logical address. 00762 * @retval Test result (TRUE or FALSE). 00763 */ 00764 #define IS_CEC_ADDRESS(__ADDRESS__) ((__ADDRESS__) <= 0xFU) 00765 /** 00766 * @} 00767 */ 00768 /* Private functions ---------------------------------------------------------*/ 00769 /** @defgroup CEC_Private_Functions CEC Private Functions 00770 * @{ 00771 */ 00772 00773 /** 00774 * @} 00775 */ 00776 00777 /** 00778 * @} 00779 */ 00780 00781 /** 00782 * @} 00783 */ 00784 00785 #endif /* CEC */ 00786 00787 #ifdef __cplusplus 00788 } 00789 #endif 00790 00791 #endif /* STM32H7xxHAL_CEC_H */ 00792
1.7.6.1